1 // REQUIRES: aarch64-registered-target
2 // RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +crc \
3 // RUN: -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s
4 // RUN: %clang_cc1 -triple aarch64-windows -target-feature +crc \
5 // RUN: -disable-O0-optnone -emit-llvm -o - %s | opt -S -passes=mem2reg | FileCheck %s
6 // RUN: %clang_cc1 -verify -emit-llvm-only -triple aarch64 -target-feature -crc %s
10 uint32_t crc32b(uint32_t a
, uint8_t b
)
12 // expected-error@+1 {{'__builtin_arm_crc32b' needs target feature crc}}
13 return __builtin_arm_crc32b(a
,b
);
14 // CHECK: [[T0:%[0-9]+]] = zext i8 %b to i32
15 // CHECK: call i32 @llvm.aarch64.crc32b(i32 %a, i32 [[T0]])
18 uint32_t crc32cb(uint32_t a
, uint8_t b
)
20 return __builtin_arm_crc32cb(a
,b
);
21 // CHECK: [[T0:%[0-9]+]] = zext i8 %b to i32
22 // CHECK: call i32 @llvm.aarch64.crc32cb(i32 %a, i32 [[T0]])
25 uint32_t crc32h(uint32_t a
, uint16_t b
)
27 return __builtin_arm_crc32h(a
,b
);
28 // CHECK: [[T0:%[0-9]+]] = zext i16 %b to i32
29 // CHECK: call i32 @llvm.aarch64.crc32h(i32 %a, i32 [[T0]])
32 uint32_t crc32ch(uint32_t a
, uint16_t b
)
34 return __builtin_arm_crc32ch(a
,b
);
35 // CHECK: [[T0:%[0-9]+]] = zext i16 %b to i32
36 // CHECK: call i32 @llvm.aarch64.crc32ch(i32 %a, i32 [[T0]])
39 uint32_t crc32w(uint32_t a
, uint32_t b
)
41 return __builtin_arm_crc32w(a
,b
);
42 // CHECK: call i32 @llvm.aarch64.crc32w(i32 %a, i32 %b)
45 uint32_t crc32cw(uint32_t a
, uint32_t b
)
47 return __builtin_arm_crc32cw(a
,b
);
48 // CHECK: call i32 @llvm.aarch64.crc32cw(i32 %a, i32 %b)
51 uint32_t crc32d(uint32_t a
, uint64_t b
)
53 return __builtin_arm_crc32d(a
,b
);
54 // CHECK: call i32 @llvm.aarch64.crc32x(i32 %a, i64 %b)
57 uint32_t crc32cd(uint32_t a
, uint64_t b
)
59 return __builtin_arm_crc32cd(a
,b
);
60 // CHECK: call i32 @llvm.aarch64.crc32cx(i32 %a, i64 %b)