1 // REQUIRES: hexagon-registered-target
2 // RUN: %clang_cc1 -emit-llvm -O2 -o - -triple hexagon-unknown-elf -target-cpu hexagonv60 %s | FileCheck %s
4 // The return value should return the value in A[1].
5 // Check that the HexagonBuiltinExpr doesn't evaluate &(*ptr++) twice. If so,
6 // the return value will be the value in A[2]
7 // CHECK: @brev_ptr_inc
8 // CHECK-DAG: llvm.hexagon.L2.loadri.pbr
9 // CHECK-DAG: getelementptr inbounds nuw i8, {{.*}}i32 4
10 // CHECK-NOT: getelementptr inbounds nuw i8, {{.*}}i32 8
11 // CHECK-NOT: getelementptr inbounds nuw i8, {{.*}}i32 4
12 int brev_ptr_inc(int A
[], int B
[]) {
15 __builtin_brev_ldw(p0
, &*p1
++, 8);
19 // The return value should return the value in A[0].
20 // CHECK: @brev_ptr_dec
21 // CHECK: llvm.hexagon.L2.loadri.pbr
22 // CHECK: [[RET:%[0-9]+]] = load{{.*}}%A
23 // CHECK: ret{{.*}}[[RET]]
24 int brev_ptr_dec(int A
[], int B
[]) {
27 __builtin_brev_ldw(p0
, &*p1
--, 8);
31 // The store in bitcode needs to be of width correspondng to 16-bit.
32 // CHECK: @brev_ptr_half
33 // CHECK: llvm.hexagon.L2.loadrh.pbr
34 // CHECK: store{{.*}}i16{{.*}}ptr
35 short int brev_ptr_half(short int A
[], short int B
[]) {
36 short int *p0
= &B
[0];
37 short int *p1
= &A
[0];
38 __builtin_brev_ldh(p0
, &*p1
++, 8);
42 // The store in bitcode needs to be of width correspondng to 8-bit.
43 // CHECK: @brev_ptr_byte
44 // CHECK: llvm.hexagon.L2.loadrub.pbr
45 // CHECK: store{{.*}}i8{{.*}}ptr
46 unsigned char brev_ptr_byte(unsigned char A
[], unsigned char B
[]) {
47 unsigned char *p0
= &B
[0];
48 unsigned char *p1
= &A
[0];
49 __builtin_brev_ldub(p0
, &*p1
++, 8);