1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _ --version 5
2 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=52 -triple x86_64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s
3 // RUN: %clang_cc1 -fopenmp -fopenmp-version=52 -triple x86_64-unknown-linux-gnu -x c++ -std=c++11 -emit-pch -o %t %s
4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=52 -triple x86_64-unknown-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
5 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=52 -triple x86_64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck %s
6 // RUN: %clang_cc1 -fopenmp -fopenmp-version=52 -fnoopenmp-use-tls -triple x86_64-unknown-linux-gnu -x c++ -std=c++11 -emit-pch -o %t %s
7 // RUN: %clang_cc1 -fopenmp -fopenmp-version=52 -fnoopenmp-use-tls -triple x86_64-unknown-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix CHECK-TLS %s
9 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=52 -triple x86_64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck --check-prefix SIMD-ONLY0 %s
10 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=52 -triple x86_64-unknown-linux-gnu -x c++ -std=c++11 -emit-pch -o %t %s
11 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=52 -triple x86_64-unknown-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
12 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=52 -triple x86_64-unknown-linux-gnu -emit-llvm -o - %s | FileCheck --check-prefix SIMD-ONLY0 %s
13 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=52 -fnoopenmp-use-tls -triple x86_64-unknown-linux-gnu -x c++ -std=c++11 -emit-pch -o %t %s
14 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=52 -fnoopenmp-use-tls -triple x86_64-unknown-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
15 // expected-no-diagnostics
20 enum omp_allocator_handle_t
{
21 omp_null_allocator
= 0,
22 omp_default_mem_alloc
= 1,
23 omp_large_cap_mem_alloc
= 2,
24 omp_const_mem_alloc
= 3,
25 omp_high_bw_mem_alloc
= 4,
26 omp_low_lat_mem_alloc
= 5,
27 omp_cgroup_mem_alloc
= 6,
28 omp_pteam_mem_alloc
= 7,
29 omp_thread_mem_alloc
= 8,
30 KMP_ALLOCATOR_MAX_HANDLE
= __UINTPTR_MAX__
38 template <class T
, omp_allocator_handle_t TY
> T
foo() {
40 #pragma omp scope private(v) allocate(allocator(TY):v)
52 #pragma omp scope private(ns::a) allocate(allocator(omp_pteam_mem_alloc):ns::a)
55 #pragma omp scope private(a) allocate(allocator(omp_thread_mem_alloc):a)
58 #pragma omp scope private(temp) allocate(temp)
59 temp
+= foo
<int, omp_cgroup_mem_alloc
>();
63 extern template int ST
<int>::m
;
67 void bar(int a
, float &z
) {
68 #pragma omp scope private(a,z) allocate(allocator(omp_default_mem_alloc):a,z)
72 // CHECK-LABEL: define dso_local noundef i32 @main(
73 // CHECK-SAME: ) #[[ATTR0:[0-9]+]] {
74 // CHECK-NEXT: [[ENTRY:.*:]]
75 // CHECK-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
76 // CHECK-NEXT: [[B:%.*]] = alloca double, align 8
77 // CHECK-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])
78 // CHECK-NEXT: store i32 0, ptr [[RETVAL]], align 4
79 // CHECK-NEXT: [[DOTA__VOID_ADDR:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP0]], i64 4, ptr inttoptr (i64 7 to ptr))
80 // CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTA__VOID_ADDR]], align 4
81 // CHECK-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
82 // CHECK-NEXT: store i32 [[INC]], ptr [[DOTA__VOID_ADDR]], align 4
83 // CHECK-NEXT: call void @__kmpc_free(i32 [[TMP0]], ptr [[DOTA__VOID_ADDR]], ptr inttoptr (i64 7 to ptr))
84 // CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP0]])
85 // CHECK-NEXT: [[DOTA__VOID_ADDR1:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP0]], i64 4, ptr inttoptr (i64 8 to ptr))
86 // CHECK-NEXT: store i32 2, ptr [[DOTA__VOID_ADDR1]], align 4
87 // CHECK-NEXT: call void @__kmpc_free(i32 [[TMP0]], ptr [[DOTA__VOID_ADDR1]], ptr inttoptr (i64 8 to ptr))
88 // CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP0]])
89 // CHECK-NEXT: store double 3.000000e+00, ptr [[B]], align 8
90 // CHECK-NEXT: [[DOTTEMP__VOID_ADDR:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP0]], i64 4, ptr null)
91 // CHECK-NEXT: [[CALL:%.*]] = call noundef i32 @_Z3fooIiL22omp_allocator_handle_t6EET_v()
92 // CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTTEMP__VOID_ADDR]], align 4
93 // CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], [[CALL]]
94 // CHECK-NEXT: store i32 [[ADD]], ptr [[DOTTEMP__VOID_ADDR]], align 4
95 // CHECK-NEXT: call void @__kmpc_free(i32 [[TMP0]], ptr [[DOTTEMP__VOID_ADDR]], ptr null)
96 // CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP0]])
97 // CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr @_ZZ4mainE4temp, align 4
98 // CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr @_ZN2ns1aE, align 4
99 // CHECK-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[TMP4]]
100 // CHECK-NEXT: ret i32 [[ADD2]]
103 // CHECK-LABEL: define linkonce_odr noundef i32 @_Z3fooIiL22omp_allocator_handle_t6EET_v(
104 // CHECK-SAME: ) #[[ATTR3:[0-9]+]] comdat {
105 // CHECK-NEXT: [[ENTRY:.*:]]
106 // CHECK-NEXT: [[V:%.*]] = alloca i32, align 4
107 // CHECK-NEXT: [[V1:%.*]] = alloca i32, align 4
108 // CHECK-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
109 // CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @_ZN2STIiE1mE, align 4
110 // CHECK-NEXT: store i32 [[TMP1]], ptr [[V1]], align 4
111 // CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP0]])
112 // CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[V]], align 4
113 // CHECK-NEXT: ret i32 [[TMP2]]
116 // CHECK-LABEL: define dso_local void @_Z3bariRf(
117 // CHECK-SAME: i32 noundef [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[Z:%.*]]) #[[ATTR3]] {
118 // CHECK-NEXT: [[ENTRY:.*:]]
119 // CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
120 // CHECK-NEXT: [[Z_ADDR:%.*]] = alloca ptr, align 8
121 // CHECK-NEXT: [[TMP:%.*]] = alloca ptr, align 8
122 // CHECK-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
123 // CHECK-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
124 // CHECK-NEXT: store ptr [[Z]], ptr [[Z_ADDR]], align 8
125 // CHECK-NEXT: [[DOTA__VOID_ADDR:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP0]], i64 4, ptr inttoptr (i64 1 to ptr))
126 // CHECK-NEXT: [[DOTZ__VOID_ADDR:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP0]], i64 4, ptr inttoptr (i64 1 to ptr))
127 // CHECK-NEXT: store ptr [[DOTZ__VOID_ADDR]], ptr [[TMP]], align 8
128 // CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @b, align 4
129 // CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTA__VOID_ADDR]], align 4
130 // CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], [[TMP1]]
131 // CHECK-NEXT: store i32 [[ADD]], ptr [[DOTA__VOID_ADDR]], align 4
132 // CHECK-NEXT: call void @__kmpc_free(i32 [[TMP0]], ptr [[DOTZ__VOID_ADDR]], ptr inttoptr (i64 1 to ptr))
133 // CHECK-NEXT: call void @__kmpc_free(i32 [[TMP0]], ptr [[DOTA__VOID_ADDR]], ptr inttoptr (i64 1 to ptr))
134 // CHECK-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP0]])
135 // CHECK-NEXT: ret void
138 // CHECK-TLS-LABEL: define dso_local noundef i32 @main(
139 // CHECK-TLS-SAME: ) #[[ATTR0:[0-9]+]] {
140 // CHECK-TLS-NEXT: [[ENTRY:.*:]]
141 // CHECK-TLS-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
142 // CHECK-TLS-NEXT: [[B:%.*]] = alloca double, align 8
143 // CHECK-TLS-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])
144 // CHECK-TLS-NEXT: store i32 0, ptr [[RETVAL]], align 4
145 // CHECK-TLS-NEXT: [[DOTA__VOID_ADDR:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP0]], i64 4, ptr inttoptr (i64 7 to ptr))
146 // CHECK-TLS-NEXT: [[TMP1:%.*]] = load i32, ptr [[DOTA__VOID_ADDR]], align 4
147 // CHECK-TLS-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
148 // CHECK-TLS-NEXT: store i32 [[INC]], ptr [[DOTA__VOID_ADDR]], align 4
149 // CHECK-TLS-NEXT: call void @__kmpc_free(i32 [[TMP0]], ptr [[DOTA__VOID_ADDR]], ptr inttoptr (i64 7 to ptr))
150 // CHECK-TLS-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP0]])
151 // CHECK-TLS-NEXT: [[DOTA__VOID_ADDR1:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP0]], i64 4, ptr inttoptr (i64 8 to ptr))
152 // CHECK-TLS-NEXT: store i32 2, ptr [[DOTA__VOID_ADDR1]], align 4
153 // CHECK-TLS-NEXT: call void @__kmpc_free(i32 [[TMP0]], ptr [[DOTA__VOID_ADDR1]], ptr inttoptr (i64 8 to ptr))
154 // CHECK-TLS-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP0]])
155 // CHECK-TLS-NEXT: store double 3.000000e+00, ptr [[B]], align 8
156 // CHECK-TLS-NEXT: [[DOTTEMP__VOID_ADDR:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP0]], i64 4, ptr null)
157 // CHECK-TLS-NEXT: [[CALL:%.*]] = call noundef i32 @_Z3fooIiL22omp_allocator_handle_t6EET_v()
158 // CHECK-TLS-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTTEMP__VOID_ADDR]], align 4
159 // CHECK-TLS-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], [[CALL]]
160 // CHECK-TLS-NEXT: store i32 [[ADD]], ptr [[DOTTEMP__VOID_ADDR]], align 4
161 // CHECK-TLS-NEXT: call void @__kmpc_free(i32 [[TMP0]], ptr [[DOTTEMP__VOID_ADDR]], ptr null)
162 // CHECK-TLS-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP0]])
163 // CHECK-TLS-NEXT: [[TMP3:%.*]] = load i32, ptr @_ZZ4mainE4temp, align 4
164 // CHECK-TLS-NEXT: [[TMP4:%.*]] = load i32, ptr @_ZN2ns1aE, align 4
165 // CHECK-TLS-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP3]], [[TMP4]]
166 // CHECK-TLS-NEXT: ret i32 [[ADD2]]
169 // CHECK-TLS-LABEL: define linkonce_odr noundef i32 @_Z3fooIiL22omp_allocator_handle_t6EET_v(
170 // CHECK-TLS-SAME: ) #[[ATTR3:[0-9]+]] comdat {
171 // CHECK-TLS-NEXT: [[ENTRY:.*:]]
172 // CHECK-TLS-NEXT: [[V:%.*]] = alloca i32, align 4
173 // CHECK-TLS-NEXT: [[V1:%.*]] = alloca i32, align 4
174 // CHECK-TLS-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
175 // CHECK-TLS-NEXT: [[TMP1:%.*]] = load i32, ptr @_ZN2STIiE1mE, align 4
176 // CHECK-TLS-NEXT: store i32 [[TMP1]], ptr [[V1]], align 4
177 // CHECK-TLS-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP0]])
178 // CHECK-TLS-NEXT: [[TMP2:%.*]] = load i32, ptr [[V]], align 4
179 // CHECK-TLS-NEXT: ret i32 [[TMP2]]
182 // CHECK-TLS-LABEL: define dso_local void @_Z3bariRf(
183 // CHECK-TLS-SAME: i32 noundef [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[Z:%.*]]) #[[ATTR3]] {
184 // CHECK-TLS-NEXT: [[ENTRY:.*:]]
185 // CHECK-TLS-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
186 // CHECK-TLS-NEXT: [[Z_ADDR:%.*]] = alloca ptr, align 8
187 // CHECK-TLS-NEXT: [[TMP:%.*]] = alloca ptr, align 8
188 // CHECK-TLS-NEXT: [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
189 // CHECK-TLS-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
190 // CHECK-TLS-NEXT: store ptr [[Z]], ptr [[Z_ADDR]], align 8
191 // CHECK-TLS-NEXT: [[DOTA__VOID_ADDR:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP0]], i64 4, ptr inttoptr (i64 1 to ptr))
192 // CHECK-TLS-NEXT: [[DOTZ__VOID_ADDR:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP0]], i64 4, ptr inttoptr (i64 1 to ptr))
193 // CHECK-TLS-NEXT: store ptr [[DOTZ__VOID_ADDR]], ptr [[TMP]], align 8
194 // CHECK-TLS-NEXT: [[TMP1:%.*]] = load i32, ptr @b, align 4
195 // CHECK-TLS-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTA__VOID_ADDR]], align 4
196 // CHECK-TLS-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP2]], [[TMP1]]
197 // CHECK-TLS-NEXT: store i32 [[ADD]], ptr [[DOTA__VOID_ADDR]], align 4
198 // CHECK-TLS-NEXT: call void @__kmpc_free(i32 [[TMP0]], ptr [[DOTZ__VOID_ADDR]], ptr inttoptr (i64 1 to ptr))
199 // CHECK-TLS-NEXT: call void @__kmpc_free(i32 [[TMP0]], ptr [[DOTA__VOID_ADDR]], ptr inttoptr (i64 1 to ptr))
200 // CHECK-TLS-NEXT: call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP0]])
201 // CHECK-TLS-NEXT: ret void
204 // SIMD-ONLY0-LABEL: define dso_local noundef i32 @main(
205 // SIMD-ONLY0-SAME: ) #[[ATTR0:[0-9]+]] {
206 // SIMD-ONLY0-NEXT: [[ENTRY:.*:]]
207 // SIMD-ONLY0-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
208 // SIMD-ONLY0-NEXT: [[A:%.*]] = alloca i32, align 4
209 // SIMD-ONLY0-NEXT: [[A1:%.*]] = alloca i32, align 4
210 // SIMD-ONLY0-NEXT: [[B:%.*]] = alloca double, align 8
211 // SIMD-ONLY0-NEXT: [[TEMP:%.*]] = alloca i32, align 4
212 // SIMD-ONLY0-NEXT: store i32 0, ptr [[RETVAL]], align 4
213 // SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load i32, ptr [[A]], align 4
214 // SIMD-ONLY0-NEXT: [[INC:%.*]] = add nsw i32 [[TMP0]], 1
215 // SIMD-ONLY0-NEXT: store i32 [[INC]], ptr [[A]], align 4
216 // SIMD-ONLY0-NEXT: store i32 2, ptr [[A1]], align 4
217 // SIMD-ONLY0-NEXT: store double 3.000000e+00, ptr [[B]], align 8
218 // SIMD-ONLY0-NEXT: [[CALL:%.*]] = call noundef i32 @_Z3fooIiL22omp_allocator_handle_t6EET_v()
219 // SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load i32, ptr [[TEMP]], align 4
220 // SIMD-ONLY0-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[CALL]]
221 // SIMD-ONLY0-NEXT: store i32 [[ADD]], ptr [[TEMP]], align 4
222 // SIMD-ONLY0-NEXT: [[TMP2:%.*]] = load i32, ptr @_ZZ4mainE4temp, align 4
223 // SIMD-ONLY0-NEXT: [[TMP3:%.*]] = load i32, ptr @_ZN2ns1aE, align 4
224 // SIMD-ONLY0-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP2]], [[TMP3]]
225 // SIMD-ONLY0-NEXT: ret i32 [[ADD2]]
228 // SIMD-ONLY0-LABEL: define linkonce_odr noundef i32 @_Z3fooIiL22omp_allocator_handle_t6EET_v(
229 // SIMD-ONLY0-SAME: ) #[[ATTR1:[0-9]+]] comdat {
230 // SIMD-ONLY0-NEXT: [[ENTRY:.*:]]
231 // SIMD-ONLY0-NEXT: [[V:%.*]] = alloca i32, align 4
232 // SIMD-ONLY0-NEXT: [[V1:%.*]] = alloca i32, align 4
233 // SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load i32, ptr @_ZN2STIiE1mE, align 4
234 // SIMD-ONLY0-NEXT: store i32 [[TMP0]], ptr [[V1]], align 4
235 // SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load i32, ptr [[V]], align 4
236 // SIMD-ONLY0-NEXT: ret i32 [[TMP1]]
239 // SIMD-ONLY0-LABEL: define dso_local void @_Z3bariRf(
240 // SIMD-ONLY0-SAME: i32 noundef [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[Z:%.*]]) #[[ATTR1]] {
241 // SIMD-ONLY0-NEXT: [[ENTRY:.*:]]
242 // SIMD-ONLY0-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
243 // SIMD-ONLY0-NEXT: [[Z_ADDR:%.*]] = alloca ptr, align 8
244 // SIMD-ONLY0-NEXT: [[A1:%.*]] = alloca i32, align 4
245 // SIMD-ONLY0-NEXT: [[Z2:%.*]] = alloca float, align 4
246 // SIMD-ONLY0-NEXT: [[TMP:%.*]] = alloca ptr, align 8
247 // SIMD-ONLY0-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
248 // SIMD-ONLY0-NEXT: store ptr [[Z]], ptr [[Z_ADDR]], align 8
249 // SIMD-ONLY0-NEXT: store ptr [[Z2]], ptr [[TMP]], align 8
250 // SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load i32, ptr @b, align 4
251 // SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load i32, ptr [[A1]], align 4
252 // SIMD-ONLY0-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP0]]
253 // SIMD-ONLY0-NEXT: store i32 [[ADD]], ptr [[A1]], align 4
254 // SIMD-ONLY0-NEXT: ret void