clang/test/OpenMP/debug-info-complex-byval.cpp

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
   2 // RUN: %clang_cc1 -fopenmp -x c++ %s -verify -debug-info-kind=limited -triple x86_64-unknown-unknown -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
   3
   4 // RUN: %clang_cc1 -fopenmp-simd -x c++ %s -verify -debug-info-kind=limited -triple x86_64-unknown-unknown -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
   5 // expected-no-diagnostics
   6
   7 void a() {
   8   float _Complex b;
   9 #pragma omp parallel firstprivate(b)
  10   ;
  11 }
  12
  13
  14 // CHECK1-LABEL: define {{[^@]+}}@_Z1av
  15 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] !dbg [[DBG6:![0-9]+]] {
  16 // CHECK1-NEXT:  entry:
  17 // CHECK1-NEXT:    [[B:%.*]] = alloca { float, float }, align 4
  18 // CHECK1-NEXT:    [[B_CASTED:%.*]] = alloca i64, align 8
  19 // CHECK1-NEXT:      #dbg_declare(ptr [[B]], [[META11:![0-9]+]], !DIExpression(), [[META13:![0-9]+]])
  20 // CHECK1-NEXT:    [[TMP0:%.*]] = load { float, float }, ptr [[B]], align 4, !dbg [[DBG14:![0-9]+]]
  21 // CHECK1-NEXT:    store { float, float } [[TMP0]], ptr [[B_CASTED]], align 4, !dbg [[DBG14]]
  22 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[B_CASTED]], align 8, !dbg [[DBG14]]
  23 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 1, ptr @_Z1av.omp_outlined, i64 [[TMP1]]), !dbg [[DBG14]]
  24 // CHECK1-NEXT:    ret void, !dbg [[DBG15:![0-9]+]]
  25 //
  26 //
  27 // CHECK1-LABEL: define {{[^@]+}}@_Z1av.omp_outlined_debug__
  28 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], <2 x float> noundef [[B_COERCE:%.*]]) #[[ATTR1:[0-9]+]] !dbg [[DBG16:![0-9]+]] {
  29 // CHECK1-NEXT:  entry:
  30 // CHECK1-NEXT:    [[B:%.*]] = alloca { float, float }, align 4
  31 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
  32 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
  33 // CHECK1-NEXT:    store <2 x float> [[B_COERCE]], ptr [[B]], align 4
  34 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
  35 // CHECK1-NEXT:      #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META24:![0-9]+]], !DIExpression(), [[META25:![0-9]+]])
  36 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
  37 // CHECK1-NEXT:      #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META26:![0-9]+]], !DIExpression(), [[META25]])
  38 // CHECK1-NEXT:      #dbg_declare(ptr [[B]], [[META27:![0-9]+]], !DIExpression(), [[META28:![0-9]+]])
  39 // CHECK1-NEXT:    ret void, !dbg [[DBG29:![0-9]+]]
  40 //
  41 //
  42 // CHECK1-LABEL: define {{[^@]+}}@_Z1av.omp_outlined
  43 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[B:%.*]]) #[[ATTR2:[0-9]+]] !dbg [[DBG30:![0-9]+]] {
  44 // CHECK1-NEXT:  entry:
  45 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
  46 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
  47 // CHECK1-NEXT:    [[B_ADDR:%.*]] = alloca i64, align 8
  48 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
  49 // CHECK1-NEXT:      #dbg_declare(ptr [[DOTGLOBAL_TID__ADDR]], [[META34:![0-9]+]], !DIExpression(), [[META35:![0-9]+]])
  50 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
  51 // CHECK1-NEXT:      #dbg_declare(ptr [[DOTBOUND_TID__ADDR]], [[META36:![0-9]+]], !DIExpression(), [[META35]])
  52 // CHECK1-NEXT:    store i64 [[B]], ptr [[B_ADDR]], align 8
  53 // CHECK1-NEXT:      #dbg_declare(ptr [[B_ADDR]], [[META37:![0-9]+]], !DIExpression(), [[META35]])
  54 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !dbg [[DBG38:![0-9]+]]
  55 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTBOUND_TID__ADDR]], align 8, !dbg [[DBG38]]
  56 // CHECK1-NEXT:    [[TMP2:%.*]] = load <2 x float>, ptr [[B_ADDR]], align 4, !dbg [[DBG38]]
  57 // CHECK1-NEXT:    call void @_Z1av.omp_outlined_debug__(ptr [[TMP0]], ptr [[TMP1]], <2 x float> [[TMP2]]) #[[ATTR3:[0-9]+]], !dbg [[DBG38]]
  58 // CHECK1-NEXT:    ret void, !dbg [[DBG38]]
  59 //