clang/test/OpenMP/distribute_parallel_for_num_threads_codegen.cpp

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
   2 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK1
   3 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
   4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
   5
   6 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
   7 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
   8 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
   9
  10 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK5
  11 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
  12 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5
  13
  14 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  15 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
  16 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  17
  18 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK9
  19 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
  20 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
  21
  22 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  23 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
  24 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  25
  26 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK13
  27 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
  28 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13
  29
  30 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  31 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
  32 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  33
  34 // expected-no-diagnostics
  35 #ifndef HEADER
  36 #define HEADER
  37
  38 typedef __INTPTR_TYPE__ intptr_t;
  39
  40
  41 void foo();
  42
  43 struct S {
  44   intptr_t a, b, c;
  45   S(intptr_t a) : a(a) {}
  46   operator char() { extern void mayThrow(); mayThrow(); return a; }
  47   ~S() {}
  48 };
  49
  50 template <typename T, int C>
  51 int tmain() {
  52 #pragma omp target
  53 #pragma omp teams
  54 #pragma omp distribute parallel for num_threads(C)
  55   for (int i = 0; i < 100; i++)
  56     foo();
  57 #pragma omp target
  58 #pragma omp teams
  59 #pragma omp distribute parallel for num_threads(T(23))
  60   for (int i = 0; i < 100; i++)
  61     foo();
  62   return 0;
  63 }
  64
  65 int main() {
  66   S s(0);
  67   char a = s;
  68 #pragma omp target
  69 #pragma omp teams
  70 #pragma omp distribute parallel for num_threads(2)
  71   for (int i = 0; i < 100; i++) {
  72     foo();
  73   }
  74 #pragma omp target
  75 #pragma omp teams
  76
  77 #pragma omp distribute parallel for num_threads(a)
  78   for (int i = 0; i < 100; i++) {
  79     foo();
  80   }
  81   return a + tmain<char, 5>() + tmain<S, 1>();
  82 }
  83
  84 // tmain 5
  85
  86 // tmain 1
  87
  88
  89
  90
  91
  92
  93
  94
  95 #endif
  96 // CHECK1-LABEL: define {{[^@]+}}@main
  97 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__gxx_personality_v0 {
  98 // CHECK1-NEXT:  entry:
  99 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 100 // CHECK1-NEXT:    [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
 101 // CHECK1-NEXT:    [[A:%.*]] = alloca i8, align 1
 102 // CHECK1-NEXT:    [[EXN_SLOT:%.*]] = alloca ptr, align 8
 103 // CHECK1-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
 104 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 105 // CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
 106 // CHECK1-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
 107 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
 108 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
 109 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
 110 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 111 // CHECK1-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
 112 // CHECK1-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 113 // CHECK1-NEXT:    call void @_ZN1SC1El(ptr noundef nonnull align 8 dereferenceable(24) [[S]], i64 noundef 0)
 114 // CHECK1-NEXT:    [[CALL:%.*]] = invoke noundef signext i8 @_ZN1ScvcEv(ptr noundef nonnull align 8 dereferenceable(24) [[S]])
 115 // CHECK1-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
 116 // CHECK1:       invoke.cont:
 117 // CHECK1-NEXT:    store i8 [[CALL]], ptr [[A]], align 1
 118 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
 119 // CHECK1-NEXT:    store i32 3, ptr [[TMP0]], align 4
 120 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
 121 // CHECK1-NEXT:    store i32 0, ptr [[TMP1]], align 4
 122 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
 123 // CHECK1-NEXT:    store ptr null, ptr [[TMP2]], align 8
 124 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
 125 // CHECK1-NEXT:    store ptr null, ptr [[TMP3]], align 8
 126 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
 127 // CHECK1-NEXT:    store ptr null, ptr [[TMP4]], align 8
 128 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
 129 // CHECK1-NEXT:    store ptr null, ptr [[TMP5]], align 8
 130 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
 131 // CHECK1-NEXT:    store ptr null, ptr [[TMP6]], align 8
 132 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
 133 // CHECK1-NEXT:    store ptr null, ptr [[TMP7]], align 8
 134 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
 135 // CHECK1-NEXT:    store i64 100, ptr [[TMP8]], align 8
 136 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
 137 // CHECK1-NEXT:    store i64 0, ptr [[TMP9]], align 8
 138 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
 139 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
 140 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
 141 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
 142 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
 143 // CHECK1-NEXT:    store i32 0, ptr [[TMP12]], align 4
 144 // CHECK1-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, ptr [[KERNEL_ARGS]])
 145 // CHECK1-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
 146 // CHECK1-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 147 // CHECK1:       omp_offload.failed:
 148 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR3:[0-9]+]]
 149 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 150 // CHECK1:       lpad:
 151 // CHECK1-NEXT:    [[TMP15:%.*]] = landingpad { ptr, i32 }
 152 // CHECK1-NEXT:            cleanup
 153 // CHECK1-NEXT:    [[TMP16:%.*]] = extractvalue { ptr, i32 } [[TMP15]], 0
 154 // CHECK1-NEXT:    store ptr [[TMP16]], ptr [[EXN_SLOT]], align 8
 155 // CHECK1-NEXT:    [[TMP17:%.*]] = extractvalue { ptr, i32 } [[TMP15]], 1
 156 // CHECK1-NEXT:    store i32 [[TMP17]], ptr [[EHSELECTOR_SLOT]], align 4
 157 // CHECK1-NEXT:    call void @_ZN1SD1Ev(ptr noundef nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR3]]
 158 // CHECK1-NEXT:    br label [[EH_RESUME:%.*]]
 159 // CHECK1:       omp_offload.cont:
 160 // CHECK1-NEXT:    [[TMP18:%.*]] = load i8, ptr [[A]], align 1
 161 // CHECK1-NEXT:    store i8 [[TMP18]], ptr [[A_CASTED]], align 1
 162 // CHECK1-NEXT:    [[TMP19:%.*]] = load i64, ptr [[A_CASTED]], align 8
 163 // CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 164 // CHECK1-NEXT:    store i64 [[TMP19]], ptr [[TMP20]], align 8
 165 // CHECK1-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 166 // CHECK1-NEXT:    store i64 [[TMP19]], ptr [[TMP21]], align 8
 167 // CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
 168 // CHECK1-NEXT:    store ptr null, ptr [[TMP22]], align 8
 169 // CHECK1-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 170 // CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 171 // CHECK1-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
 172 // CHECK1-NEXT:    store i32 3, ptr [[TMP25]], align 4
 173 // CHECK1-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
 174 // CHECK1-NEXT:    store i32 1, ptr [[TMP26]], align 4
 175 // CHECK1-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
 176 // CHECK1-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 8
 177 // CHECK1-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
 178 // CHECK1-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 8
 179 // CHECK1-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
 180 // CHECK1-NEXT:    store ptr @.offload_sizes, ptr [[TMP29]], align 8
 181 // CHECK1-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
 182 // CHECK1-NEXT:    store ptr @.offload_maptypes, ptr [[TMP30]], align 8
 183 // CHECK1-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
 184 // CHECK1-NEXT:    store ptr null, ptr [[TMP31]], align 8
 185 // CHECK1-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
 186 // CHECK1-NEXT:    store ptr null, ptr [[TMP32]], align 8
 187 // CHECK1-NEXT:    [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
 188 // CHECK1-NEXT:    store i64 100, ptr [[TMP33]], align 8
 189 // CHECK1-NEXT:    [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
 190 // CHECK1-NEXT:    store i64 0, ptr [[TMP34]], align 8
 191 // CHECK1-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
 192 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
 193 // CHECK1-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
 194 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
 195 // CHECK1-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
 196 // CHECK1-NEXT:    store i32 0, ptr [[TMP37]], align 4
 197 // CHECK1-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, ptr [[KERNEL_ARGS2]])
 198 // CHECK1-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
 199 // CHECK1-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
 200 // CHECK1:       omp_offload.failed3:
 201 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP19]]) #[[ATTR3]]
 202 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
 203 // CHECK1:       omp_offload.cont4:
 204 // CHECK1-NEXT:    [[TMP40:%.*]] = load i8, ptr [[A]], align 1
 205 // CHECK1-NEXT:    [[CONV:%.*]] = sext i8 [[TMP40]] to i32
 206 // CHECK1-NEXT:    [[CALL6:%.*]] = invoke noundef i32 @_Z5tmainIcLi5EEiv()
 207 // CHECK1-NEXT:            to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]]
 208 // CHECK1:       invoke.cont5:
 209 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV]], [[CALL6]]
 210 // CHECK1-NEXT:    [[CALL8:%.*]] = invoke noundef i32 @_Z5tmainI1SLi1EEiv()
 211 // CHECK1-NEXT:            to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]]
 212 // CHECK1:       invoke.cont7:
 213 // CHECK1-NEXT:    [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]]
 214 // CHECK1-NEXT:    store i32 [[ADD9]], ptr [[RETVAL]], align 4
 215 // CHECK1-NEXT:    call void @_ZN1SD1Ev(ptr noundef nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR3]]
 216 // CHECK1-NEXT:    [[TMP41:%.*]] = load i32, ptr [[RETVAL]], align 4
 217 // CHECK1-NEXT:    ret i32 [[TMP41]]
 218 // CHECK1:       eh.resume:
 219 // CHECK1-NEXT:    [[EXN:%.*]] = load ptr, ptr [[EXN_SLOT]], align 8
 220 // CHECK1-NEXT:    [[SEL:%.*]] = load i32, ptr [[EHSELECTOR_SLOT]], align 4
 221 // CHECK1-NEXT:    [[LPAD_VAL:%.*]] = insertvalue { ptr, i32 } poison, ptr [[EXN]], 0
 222 // CHECK1-NEXT:    [[LPAD_VAL10:%.*]] = insertvalue { ptr, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
 223 // CHECK1-NEXT:    resume { ptr, i32 } [[LPAD_VAL10]]
 224 //
 225 //
 226 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC1El
 227 // CHECK1-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
 228 // CHECK1-NEXT:  entry:
 229 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 230 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
 231 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 232 // CHECK1-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
 233 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 234 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8
 235 // CHECK1-NEXT:    call void @_ZN1SC2El(ptr noundef nonnull align 8 dereferenceable(24) [[THIS1]], i64 noundef [[TMP0]])
 236 // CHECK1-NEXT:    ret void
 237 //
 238 //
 239 // CHECK1-LABEL: define {{[^@]+}}@_ZN1ScvcEv
 240 // CHECK1-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
 241 // CHECK1-NEXT:  entry:
 242 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 243 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 244 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 245 // CHECK1-NEXT:    call void @_Z8mayThrowv()
 246 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
 247 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[A]], align 8
 248 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
 249 // CHECK1-NEXT:    ret i8 [[CONV]]
 250 //
 251 //
 252 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
 253 // CHECK1-SAME: () #[[ATTR2:[0-9]+]] {
 254 // CHECK1-NEXT:  entry:
 255 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined)
 256 // CHECK1-NEXT:    ret void
 257 //
 258 //
 259 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined
 260 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
 261 // CHECK1-NEXT:  entry:
 262 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 263 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 264 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 265 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 266 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 267 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 268 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 269 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 270 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 271 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 272 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 273 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 274 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
 275 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 276 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 277 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 278 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 279 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 280 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 281 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
 282 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 283 // CHECK1:       cond.true:
 284 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 285 // CHECK1:       cond.false:
 286 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 287 // CHECK1-NEXT:    br label [[COND_END]]
 288 // CHECK1:       cond.end:
 289 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
 290 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 291 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 292 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
 293 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 294 // CHECK1:       omp.inner.for.cond:
 295 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 296 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 297 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
 298 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 299 // CHECK1:       omp.inner.for.body:
 300 // CHECK1-NEXT:    call void @__kmpc_push_num_threads(ptr @[[GLOB3]], i32 [[TMP1]], i32 2)
 301 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 302 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
 303 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 304 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
 305 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]])
 306 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 307 // CHECK1:       omp.inner.for.inc:
 308 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 309 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 310 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
 311 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
 312 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 313 // CHECK1:       omp.inner.for.end:
 314 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 315 // CHECK1:       omp.loop.exit:
 316 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
 317 // CHECK1-NEXT:    ret void
 318 //
 319 //
 320 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined
 321 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
 322 // CHECK1-NEXT:  entry:
 323 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 324 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 325 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 326 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 327 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 328 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 329 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 330 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 331 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 332 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 333 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 334 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 335 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 336 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 337 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 338 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 339 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
 340 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 341 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
 342 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 343 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
 344 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 345 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
 346 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 347 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 348 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 349 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
 350 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 351 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 352 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
 353 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 354 // CHECK1:       cond.true:
 355 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 356 // CHECK1:       cond.false:
 357 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 358 // CHECK1-NEXT:    br label [[COND_END]]
 359 // CHECK1:       cond.end:
 360 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
 361 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 362 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 363 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
 364 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 365 // CHECK1:       omp.inner.for.cond:
 366 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 367 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 368 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
 369 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 370 // CHECK1:       omp.inner.for.body:
 371 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 372 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
 373 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 374 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
 375 // CHECK1-NEXT:    invoke void @_Z3foov()
 376 // CHECK1-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
 377 // CHECK1:       invoke.cont:
 378 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 379 // CHECK1:       omp.body.continue:
 380 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 381 // CHECK1:       omp.inner.for.inc:
 382 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 383 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
 384 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
 385 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 386 // CHECK1:       omp.inner.for.end:
 387 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 388 // CHECK1:       omp.loop.exit:
 389 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
 390 // CHECK1-NEXT:    ret void
 391 // CHECK1:       terminate.lpad:
 392 // CHECK1-NEXT:    [[TMP11:%.*]] = landingpad { ptr, i32 }
 393 // CHECK1-NEXT:            catch ptr null
 394 // CHECK1-NEXT:    [[TMP12:%.*]] = extractvalue { ptr, i32 } [[TMP11]], 0
 395 // CHECK1-NEXT:    call void @__clang_call_terminate(ptr [[TMP12]]) #[[ATTR7:[0-9]+]]
 396 // CHECK1-NEXT:    unreachable
 397 //
 398 //
 399 // CHECK1-LABEL: define {{[^@]+}}@__clang_call_terminate
 400 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat {
 401 // CHECK1-NEXT:    [[TMP2:%.*]] = call ptr @__cxa_begin_catch(ptr [[TMP0]]) #[[ATTR3]]
 402 // CHECK1-NEXT:    call void @_ZSt9terminatev() #[[ATTR7]]
 403 // CHECK1-NEXT:    unreachable
 404 //
 405 //
 406 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74
 407 // CHECK1-SAME: (i64 noundef [[A:%.*]]) #[[ATTR2]] {
 408 // CHECK1-NEXT:  entry:
 409 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
 410 // CHECK1-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
 411 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.omp_outlined, ptr [[A_ADDR]])
 412 // CHECK1-NEXT:    ret void
 413 //
 414 //
 415 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.omp_outlined
 416 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR2]] {
 417 // CHECK1-NEXT:  entry:
 418 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 419 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 420 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 421 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 422 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 423 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 424 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 425 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 426 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 427 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 428 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 429 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 430 // CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 431 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 432 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 433 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
 434 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 435 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 436 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 437 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
 438 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 439 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 440 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
 441 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 442 // CHECK1:       cond.true:
 443 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 444 // CHECK1:       cond.false:
 445 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 446 // CHECK1-NEXT:    br label [[COND_END]]
 447 // CHECK1:       cond.end:
 448 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
 449 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 450 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 451 // CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
 452 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 453 // CHECK1:       omp.inner.for.cond:
 454 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 455 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 456 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
 457 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 458 // CHECK1:       omp.inner.for.body:
 459 // CHECK1-NEXT:    [[TMP8:%.*]] = load i8, ptr [[TMP0]], align 1
 460 // CHECK1-NEXT:    [[TMP9:%.*]] = sext i8 [[TMP8]] to i32
 461 // CHECK1-NEXT:    call void @__kmpc_push_num_threads(ptr @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]])
 462 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 463 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
 464 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 465 // CHECK1-NEXT:    [[TMP13:%.*]] = zext i32 [[TMP12]] to i64
 466 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.omp_outlined.omp_outlined, i64 [[TMP11]], i64 [[TMP13]])
 467 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 468 // CHECK1:       omp.inner.for.inc:
 469 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 470 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 471 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
 472 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
 473 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 474 // CHECK1:       omp.inner.for.end:
 475 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 476 // CHECK1:       omp.loop.exit:
 477 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
 478 // CHECK1-NEXT:    ret void
 479 //
 480 //
 481 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.omp_outlined.omp_outlined
 482 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
 483 // CHECK1-NEXT:  entry:
 484 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 485 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 486 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 487 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 488 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 489 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 490 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 491 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 492 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 493 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 494 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 495 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 496 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 497 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 498 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 499 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 500 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
 501 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 502 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
 503 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 504 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
 505 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 506 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
 507 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 508 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 509 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 510 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
 511 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 512 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 513 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
 514 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 515 // CHECK1:       cond.true:
 516 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 517 // CHECK1:       cond.false:
 518 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 519 // CHECK1-NEXT:    br label [[COND_END]]
 520 // CHECK1:       cond.end:
 521 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
 522 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 523 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 524 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
 525 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 526 // CHECK1:       omp.inner.for.cond:
 527 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 528 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 529 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
 530 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 531 // CHECK1:       omp.inner.for.body:
 532 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 533 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
 534 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 535 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
 536 // CHECK1-NEXT:    invoke void @_Z3foov()
 537 // CHECK1-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
 538 // CHECK1:       invoke.cont:
 539 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 540 // CHECK1:       omp.body.continue:
 541 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 542 // CHECK1:       omp.inner.for.inc:
 543 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 544 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
 545 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
 546 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 547 // CHECK1:       omp.inner.for.end:
 548 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 549 // CHECK1:       omp.loop.exit:
 550 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
 551 // CHECK1-NEXT:    ret void
 552 // CHECK1:       terminate.lpad:
 553 // CHECK1-NEXT:    [[TMP11:%.*]] = landingpad { ptr, i32 }
 554 // CHECK1-NEXT:            catch ptr null
 555 // CHECK1-NEXT:    [[TMP12:%.*]] = extractvalue { ptr, i32 } [[TMP11]], 0
 556 // CHECK1-NEXT:    call void @__clang_call_terminate(ptr [[TMP12]]) #[[ATTR7]]
 557 // CHECK1-NEXT:    unreachable
 558 //
 559 //
 560 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
 561 // CHECK1-SAME: () #[[ATTR6:[0-9]+]] comdat {
 562 // CHECK1-NEXT:  entry:
 563 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 564 // CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
 565 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 566 // CHECK1-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
 567 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
 568 // CHECK1-NEXT:    store i32 3, ptr [[TMP0]], align 4
 569 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
 570 // CHECK1-NEXT:    store i32 0, ptr [[TMP1]], align 4
 571 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
 572 // CHECK1-NEXT:    store ptr null, ptr [[TMP2]], align 8
 573 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
 574 // CHECK1-NEXT:    store ptr null, ptr [[TMP3]], align 8
 575 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
 576 // CHECK1-NEXT:    store ptr null, ptr [[TMP4]], align 8
 577 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
 578 // CHECK1-NEXT:    store ptr null, ptr [[TMP5]], align 8
 579 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
 580 // CHECK1-NEXT:    store ptr null, ptr [[TMP6]], align 8
 581 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
 582 // CHECK1-NEXT:    store ptr null, ptr [[TMP7]], align 8
 583 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
 584 // CHECK1-NEXT:    store i64 100, ptr [[TMP8]], align 8
 585 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
 586 // CHECK1-NEXT:    store i64 0, ptr [[TMP9]], align 8
 587 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
 588 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
 589 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
 590 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
 591 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
 592 // CHECK1-NEXT:    store i32 0, ptr [[TMP12]], align 4
 593 // CHECK1-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, ptr [[KERNEL_ARGS]])
 594 // CHECK1-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
 595 // CHECK1-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 596 // CHECK1:       omp_offload.failed:
 597 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR3]]
 598 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 599 // CHECK1:       omp_offload.cont:
 600 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
 601 // CHECK1-NEXT:    store i32 3, ptr [[TMP15]], align 4
 602 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
 603 // CHECK1-NEXT:    store i32 0, ptr [[TMP16]], align 4
 604 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
 605 // CHECK1-NEXT:    store ptr null, ptr [[TMP17]], align 8
 606 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
 607 // CHECK1-NEXT:    store ptr null, ptr [[TMP18]], align 8
 608 // CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
 609 // CHECK1-NEXT:    store ptr null, ptr [[TMP19]], align 8
 610 // CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
 611 // CHECK1-NEXT:    store ptr null, ptr [[TMP20]], align 8
 612 // CHECK1-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
 613 // CHECK1-NEXT:    store ptr null, ptr [[TMP21]], align 8
 614 // CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
 615 // CHECK1-NEXT:    store ptr null, ptr [[TMP22]], align 8
 616 // CHECK1-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
 617 // CHECK1-NEXT:    store i64 100, ptr [[TMP23]], align 8
 618 // CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
 619 // CHECK1-NEXT:    store i64 0, ptr [[TMP24]], align 8
 620 // CHECK1-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
 621 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
 622 // CHECK1-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
 623 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4
 624 // CHECK1-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
 625 // CHECK1-NEXT:    store i32 0, ptr [[TMP27]], align 4
 626 // CHECK1-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, ptr [[KERNEL_ARGS2]])
 627 // CHECK1-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
 628 // CHECK1-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
 629 // CHECK1:       omp_offload.failed3:
 630 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR3]]
 631 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
 632 // CHECK1:       omp_offload.cont4:
 633 // CHECK1-NEXT:    ret i32 0
 634 //
 635 //
 636 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
 637 // CHECK1-SAME: () #[[ATTR6]] comdat {
 638 // CHECK1-NEXT:  entry:
 639 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 640 // CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
 641 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 642 // CHECK1-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
 643 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
 644 // CHECK1-NEXT:    store i32 3, ptr [[TMP0]], align 4
 645 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
 646 // CHECK1-NEXT:    store i32 0, ptr [[TMP1]], align 4
 647 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
 648 // CHECK1-NEXT:    store ptr null, ptr [[TMP2]], align 8
 649 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
 650 // CHECK1-NEXT:    store ptr null, ptr [[TMP3]], align 8
 651 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
 652 // CHECK1-NEXT:    store ptr null, ptr [[TMP4]], align 8
 653 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
 654 // CHECK1-NEXT:    store ptr null, ptr [[TMP5]], align 8
 655 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
 656 // CHECK1-NEXT:    store ptr null, ptr [[TMP6]], align 8
 657 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
 658 // CHECK1-NEXT:    store ptr null, ptr [[TMP7]], align 8
 659 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
 660 // CHECK1-NEXT:    store i64 100, ptr [[TMP8]], align 8
 661 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
 662 // CHECK1-NEXT:    store i64 0, ptr [[TMP9]], align 8
 663 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
 664 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
 665 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
 666 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
 667 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
 668 // CHECK1-NEXT:    store i32 0, ptr [[TMP12]], align 4
 669 // CHECK1-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, ptr [[KERNEL_ARGS]])
 670 // CHECK1-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
 671 // CHECK1-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 672 // CHECK1:       omp_offload.failed:
 673 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR3]]
 674 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 675 // CHECK1:       omp_offload.cont:
 676 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
 677 // CHECK1-NEXT:    store i32 3, ptr [[TMP15]], align 4
 678 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
 679 // CHECK1-NEXT:    store i32 0, ptr [[TMP16]], align 4
 680 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
 681 // CHECK1-NEXT:    store ptr null, ptr [[TMP17]], align 8
 682 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
 683 // CHECK1-NEXT:    store ptr null, ptr [[TMP18]], align 8
 684 // CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
 685 // CHECK1-NEXT:    store ptr null, ptr [[TMP19]], align 8
 686 // CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
 687 // CHECK1-NEXT:    store ptr null, ptr [[TMP20]], align 8
 688 // CHECK1-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
 689 // CHECK1-NEXT:    store ptr null, ptr [[TMP21]], align 8
 690 // CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
 691 // CHECK1-NEXT:    store ptr null, ptr [[TMP22]], align 8
 692 // CHECK1-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
 693 // CHECK1-NEXT:    store i64 100, ptr [[TMP23]], align 8
 694 // CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
 695 // CHECK1-NEXT:    store i64 0, ptr [[TMP24]], align 8
 696 // CHECK1-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
 697 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
 698 // CHECK1-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
 699 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4
 700 // CHECK1-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
 701 // CHECK1-NEXT:    store i32 0, ptr [[TMP27]], align 4
 702 // CHECK1-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, ptr [[KERNEL_ARGS2]])
 703 // CHECK1-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
 704 // CHECK1-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
 705 // CHECK1:       omp_offload.failed3:
 706 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR3]]
 707 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
 708 // CHECK1:       omp_offload.cont4:
 709 // CHECK1-NEXT:    ret i32 0
 710 //
 711 //
 712 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SD1Ev
 713 // CHECK1-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
 714 // CHECK1-NEXT:  entry:
 715 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 716 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 717 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 718 // CHECK1-NEXT:    call void @_ZN1SD2Ev(ptr noundef nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR3]]
 719 // CHECK1-NEXT:    ret void
 720 //
 721 //
 722 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SC2El
 723 // CHECK1-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
 724 // CHECK1-NEXT:  entry:
 725 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 726 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
 727 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 728 // CHECK1-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
 729 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 730 // CHECK1-NEXT:    [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
 731 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8
 732 // CHECK1-NEXT:    store i64 [[TMP0]], ptr [[A2]], align 8
 733 // CHECK1-NEXT:    ret void
 734 //
 735 //
 736 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SD2Ev
 737 // CHECK1-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
 738 // CHECK1-NEXT:  entry:
 739 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 740 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 741 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 742 // CHECK1-NEXT:    ret void
 743 //
 744 //
 745 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52
 746 // CHECK1-SAME: () #[[ATTR2]] {
 747 // CHECK1-NEXT:  entry:
 748 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.omp_outlined)
 749 // CHECK1-NEXT:    ret void
 750 //
 751 //
 752 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.omp_outlined
 753 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
 754 // CHECK1-NEXT:  entry:
 755 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 756 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 757 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 758 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 759 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 760 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 761 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 762 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 763 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 764 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 765 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 766 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 767 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
 768 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 769 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 770 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 771 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 772 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 773 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 774 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
 775 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 776 // CHECK1:       cond.true:
 777 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 778 // CHECK1:       cond.false:
 779 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 780 // CHECK1-NEXT:    br label [[COND_END]]
 781 // CHECK1:       cond.end:
 782 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
 783 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 784 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 785 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
 786 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 787 // CHECK1:       omp.inner.for.cond:
 788 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 789 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 790 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
 791 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 792 // CHECK1:       omp.inner.for.body:
 793 // CHECK1-NEXT:    call void @__kmpc_push_num_threads(ptr @[[GLOB3]], i32 [[TMP1]], i32 5)
 794 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 795 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
 796 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 797 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
 798 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]])
 799 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 800 // CHECK1:       omp.inner.for.inc:
 801 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 802 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 803 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
 804 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
 805 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 806 // CHECK1:       omp.inner.for.end:
 807 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 808 // CHECK1:       omp.loop.exit:
 809 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
 810 // CHECK1-NEXT:    ret void
 811 //
 812 //
 813 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.omp_outlined.omp_outlined
 814 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
 815 // CHECK1-NEXT:  entry:
 816 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 817 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 818 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 819 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 820 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 821 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 822 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 823 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 824 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 825 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 826 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 827 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 828 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 829 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 830 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 831 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 832 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
 833 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 834 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
 835 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 836 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
 837 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 838 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
 839 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 840 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 841 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 842 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
 843 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 844 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 845 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
 846 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 847 // CHECK1:       cond.true:
 848 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 849 // CHECK1:       cond.false:
 850 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 851 // CHECK1-NEXT:    br label [[COND_END]]
 852 // CHECK1:       cond.end:
 853 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
 854 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 855 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 856 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
 857 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 858 // CHECK1:       omp.inner.for.cond:
 859 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 860 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 861 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
 862 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 863 // CHECK1:       omp.inner.for.body:
 864 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 865 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
 866 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 867 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
 868 // CHECK1-NEXT:    invoke void @_Z3foov()
 869 // CHECK1-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
 870 // CHECK1:       invoke.cont:
 871 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 872 // CHECK1:       omp.body.continue:
 873 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 874 // CHECK1:       omp.inner.for.inc:
 875 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 876 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
 877 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
 878 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 879 // CHECK1:       omp.inner.for.end:
 880 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 881 // CHECK1:       omp.loop.exit:
 882 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
 883 // CHECK1-NEXT:    ret void
 884 // CHECK1:       terminate.lpad:
 885 // CHECK1-NEXT:    [[TMP11:%.*]] = landingpad { ptr, i32 }
 886 // CHECK1-NEXT:            catch ptr null
 887 // CHECK1-NEXT:    [[TMP12:%.*]] = extractvalue { ptr, i32 } [[TMP11]], 0
 888 // CHECK1-NEXT:    call void @__clang_call_terminate(ptr [[TMP12]]) #[[ATTR7]]
 889 // CHECK1-NEXT:    unreachable
 890 //
 891 //
 892 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57
 893 // CHECK1-SAME: () #[[ATTR2]] {
 894 // CHECK1-NEXT:  entry:
 895 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.omp_outlined)
 896 // CHECK1-NEXT:    ret void
 897 //
 898 //
 899 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.omp_outlined
 900 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
 901 // CHECK1-NEXT:  entry:
 902 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 903 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 904 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 905 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 906 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 907 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 908 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 909 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 910 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 911 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 912 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 913 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 914 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
 915 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 916 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 917 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 918 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 919 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 920 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 921 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
 922 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 923 // CHECK1:       cond.true:
 924 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 925 // CHECK1:       cond.false:
 926 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 927 // CHECK1-NEXT:    br label [[COND_END]]
 928 // CHECK1:       cond.end:
 929 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
 930 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 931 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 932 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
 933 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 934 // CHECK1:       omp.inner.for.cond:
 935 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 936 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 937 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
 938 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 939 // CHECK1:       omp.inner.for.body:
 940 // CHECK1-NEXT:    call void @__kmpc_push_num_threads(ptr @[[GLOB3]], i32 [[TMP1]], i32 23)
 941 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 942 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
 943 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 944 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
 945 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]])
 946 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 947 // CHECK1:       omp.inner.for.inc:
 948 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 949 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 950 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
 951 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
 952 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 953 // CHECK1:       omp.inner.for.end:
 954 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 955 // CHECK1:       omp.loop.exit:
 956 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
 957 // CHECK1-NEXT:    ret void
 958 //
 959 //
 960 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.omp_outlined.omp_outlined
 961 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
 962 // CHECK1-NEXT:  entry:
 963 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 964 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 965 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 966 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 967 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 968 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 969 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 970 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 971 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 972 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 973 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 974 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 975 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 976 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 977 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 978 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 979 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
 980 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 981 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
 982 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 983 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
 984 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 985 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
 986 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 987 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 988 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 989 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
 990 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 991 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 992 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
 993 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 994 // CHECK1:       cond.true:
 995 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 996 // CHECK1:       cond.false:
 997 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 998 // CHECK1-NEXT:    br label [[COND_END]]
 999 // CHECK1:       cond.end:
1000 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1001 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1002 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1003 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
1004 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1005 // CHECK1:       omp.inner.for.cond:
1006 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1007 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1008 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1009 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1010 // CHECK1:       omp.inner.for.body:
1011 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1012 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1013 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1014 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
1015 // CHECK1-NEXT:    invoke void @_Z3foov()
1016 // CHECK1-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
1017 // CHECK1:       invoke.cont:
1018 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1019 // CHECK1:       omp.body.continue:
1020 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1021 // CHECK1:       omp.inner.for.inc:
1022 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1023 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1024 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
1025 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
1026 // CHECK1:       omp.inner.for.end:
1027 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1028 // CHECK1:       omp.loop.exit:
1029 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
1030 // CHECK1-NEXT:    ret void
1031 // CHECK1:       terminate.lpad:
1032 // CHECK1-NEXT:    [[TMP11:%.*]] = landingpad { ptr, i32 }
1033 // CHECK1-NEXT:            catch ptr null
1034 // CHECK1-NEXT:    [[TMP12:%.*]] = extractvalue { ptr, i32 } [[TMP11]], 0
1035 // CHECK1-NEXT:    call void @__clang_call_terminate(ptr [[TMP12]]) #[[ATTR7]]
1036 // CHECK1-NEXT:    unreachable
1037 //
1038 //
1039 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52
1040 // CHECK1-SAME: () #[[ATTR2]] {
1041 // CHECK1-NEXT:  entry:
1042 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.omp_outlined)
1043 // CHECK1-NEXT:    ret void
1044 //
1045 //
1046 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.omp_outlined
1047 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
1048 // CHECK1-NEXT:  entry:
1049 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1050 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1051 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1052 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1053 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1054 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1055 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1056 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1057 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1058 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1059 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1060 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1061 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
1062 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1063 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1064 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1065 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1066 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1067 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1068 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1069 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1070 // CHECK1:       cond.true:
1071 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1072 // CHECK1:       cond.false:
1073 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1074 // CHECK1-NEXT:    br label [[COND_END]]
1075 // CHECK1:       cond.end:
1076 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1077 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1078 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1079 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
1080 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1081 // CHECK1:       omp.inner.for.cond:
1082 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1083 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1084 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1085 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1086 // CHECK1:       omp.inner.for.body:
1087 // CHECK1-NEXT:    call void @__kmpc_push_num_threads(ptr @[[GLOB3]], i32 [[TMP1]], i32 1)
1088 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1089 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1090 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1091 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1092 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]])
1093 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1094 // CHECK1:       omp.inner.for.inc:
1095 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1096 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1097 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1098 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
1099 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
1100 // CHECK1:       omp.inner.for.end:
1101 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1102 // CHECK1:       omp.loop.exit:
1103 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
1104 // CHECK1-NEXT:    ret void
1105 //
1106 //
1107 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.omp_outlined.omp_outlined
1108 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
1109 // CHECK1-NEXT:  entry:
1110 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1111 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1112 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1113 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1114 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1115 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1116 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1117 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1118 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1119 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1120 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1121 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1122 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1123 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1124 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1125 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1126 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
1127 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1128 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1129 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1130 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1131 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1132 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
1133 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1134 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1135 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1136 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
1137 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1138 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1139 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1140 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1141 // CHECK1:       cond.true:
1142 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1143 // CHECK1:       cond.false:
1144 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1145 // CHECK1-NEXT:    br label [[COND_END]]
1146 // CHECK1:       cond.end:
1147 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1148 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1149 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1150 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
1151 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1152 // CHECK1:       omp.inner.for.cond:
1153 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1154 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1155 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1156 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1157 // CHECK1:       omp.inner.for.body:
1158 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1159 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1160 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1161 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
1162 // CHECK1-NEXT:    invoke void @_Z3foov()
1163 // CHECK1-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
1164 // CHECK1:       invoke.cont:
1165 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1166 // CHECK1:       omp.body.continue:
1167 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1168 // CHECK1:       omp.inner.for.inc:
1169 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1170 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1171 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
1172 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
1173 // CHECK1:       omp.inner.for.end:
1174 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1175 // CHECK1:       omp.loop.exit:
1176 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
1177 // CHECK1-NEXT:    ret void
1178 // CHECK1:       terminate.lpad:
1179 // CHECK1-NEXT:    [[TMP11:%.*]] = landingpad { ptr, i32 }
1180 // CHECK1-NEXT:            catch ptr null
1181 // CHECK1-NEXT:    [[TMP12:%.*]] = extractvalue { ptr, i32 } [[TMP11]], 0
1182 // CHECK1-NEXT:    call void @__clang_call_terminate(ptr [[TMP12]]) #[[ATTR7]]
1183 // CHECK1-NEXT:    unreachable
1184 //
1185 //
1186 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57
1187 // CHECK1-SAME: () #[[ATTR2]] {
1188 // CHECK1-NEXT:  entry:
1189 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.omp_outlined)
1190 // CHECK1-NEXT:    ret void
1191 //
1192 //
1193 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.omp_outlined
1194 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
1195 // CHECK1-NEXT:  entry:
1196 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1197 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1198 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1199 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1200 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1201 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1202 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1203 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1204 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1205 // CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8
1206 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1207 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1208 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1209 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
1210 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1211 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1212 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1213 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1214 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1215 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1216 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1217 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1218 // CHECK1:       cond.true:
1219 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1220 // CHECK1:       cond.false:
1221 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1222 // CHECK1-NEXT:    br label [[COND_END]]
1223 // CHECK1:       cond.end:
1224 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1225 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1226 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1227 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
1228 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1229 // CHECK1:       omp.inner.for.cond:
1230 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1231 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1232 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1233 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1234 // CHECK1:       omp.inner.for.body:
1235 // CHECK1-NEXT:    invoke void @_ZN1SC1El(ptr noundef nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 noundef 23)
1236 // CHECK1-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
1237 // CHECK1:       invoke.cont:
1238 // CHECK1-NEXT:    [[CALL:%.*]] = invoke noundef signext i8 @_ZN1ScvcEv(ptr noundef nonnull align 8 dereferenceable(24) [[REF_TMP]])
1239 // CHECK1-NEXT:            to label [[INVOKE_CONT2:%.*]] unwind label [[TERMINATE_LPAD]]
1240 // CHECK1:       invoke.cont2:
1241 // CHECK1-NEXT:    [[TMP7:%.*]] = sext i8 [[CALL]] to i32
1242 // CHECK1-NEXT:    call void @__kmpc_push_num_threads(ptr @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]])
1243 // CHECK1-NEXT:    call void @_ZN1SD1Ev(ptr noundef nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR3]]
1244 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1245 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1246 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1247 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1248 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]])
1249 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1250 // CHECK1:       omp.inner.for.inc:
1251 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1252 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1253 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1254 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
1255 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
1256 // CHECK1:       omp.inner.for.end:
1257 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1258 // CHECK1:       omp.loop.exit:
1259 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
1260 // CHECK1-NEXT:    ret void
1261 // CHECK1:       terminate.lpad:
1262 // CHECK1-NEXT:    [[TMP14:%.*]] = landingpad { ptr, i32 }
1263 // CHECK1-NEXT:            catch ptr null
1264 // CHECK1-NEXT:    [[TMP15:%.*]] = extractvalue { ptr, i32 } [[TMP14]], 0
1265 // CHECK1-NEXT:    call void @__clang_call_terminate(ptr [[TMP15]]) #[[ATTR7]]
1266 // CHECK1-NEXT:    unreachable
1267 //
1268 //
1269 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.omp_outlined.omp_outlined
1270 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
1271 // CHECK1-NEXT:  entry:
1272 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1273 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1274 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1275 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1276 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1277 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1278 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1279 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1280 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1281 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1282 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1283 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1284 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1285 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1286 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1287 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1288 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
1289 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1290 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1291 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1292 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1293 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1294 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
1295 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1296 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1297 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1298 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
1299 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1300 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1301 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1302 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1303 // CHECK1:       cond.true:
1304 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1305 // CHECK1:       cond.false:
1306 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1307 // CHECK1-NEXT:    br label [[COND_END]]
1308 // CHECK1:       cond.end:
1309 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1310 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1311 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1312 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
1313 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1314 // CHECK1:       omp.inner.for.cond:
1315 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1316 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1317 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1318 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1319 // CHECK1:       omp.inner.for.body:
1320 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1321 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1322 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1323 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
1324 // CHECK1-NEXT:    invoke void @_Z3foov()
1325 // CHECK1-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
1326 // CHECK1:       invoke.cont:
1327 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1328 // CHECK1:       omp.body.continue:
1329 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1330 // CHECK1:       omp.inner.for.inc:
1331 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1332 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1333 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
1334 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
1335 // CHECK1:       omp.inner.for.end:
1336 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1337 // CHECK1:       omp.loop.exit:
1338 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
1339 // CHECK1-NEXT:    ret void
1340 // CHECK1:       terminate.lpad:
1341 // CHECK1-NEXT:    [[TMP11:%.*]] = landingpad { ptr, i32 }
1342 // CHECK1-NEXT:            catch ptr null
1343 // CHECK1-NEXT:    [[TMP12:%.*]] = extractvalue { ptr, i32 } [[TMP11]], 0
1344 // CHECK1-NEXT:    call void @__clang_call_terminate(ptr [[TMP12]]) #[[ATTR7]]
1345 // CHECK1-NEXT:    unreachable
1346 //
1347 //
1348 // CHECK5-LABEL: define {{[^@]+}}@main
1349 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__gxx_personality_v0 {
1350 // CHECK5-NEXT:  entry:
1351 // CHECK5-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1352 // CHECK5-NEXT:    [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
1353 // CHECK5-NEXT:    [[A:%.*]] = alloca i8, align 1
1354 // CHECK5-NEXT:    [[EXN_SLOT:%.*]] = alloca ptr, align 8
1355 // CHECK5-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
1356 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1357 // CHECK5-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1358 // CHECK5-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
1359 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
1360 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
1361 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
1362 // CHECK5-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1363 // CHECK5-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1364 // CHECK5-NEXT:    store i32 0, ptr [[RETVAL]], align 4
1365 // CHECK5-NEXT:    call void @_ZN1SC1El(ptr noundef nonnull align 8 dereferenceable(24) [[S]], i64 noundef 0)
1366 // CHECK5-NEXT:    [[CALL:%.*]] = invoke noundef signext i8 @_ZN1ScvcEv(ptr noundef nonnull align 8 dereferenceable(24) [[S]])
1367 // CHECK5-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
1368 // CHECK5:       invoke.cont:
1369 // CHECK5-NEXT:    store i8 [[CALL]], ptr [[A]], align 1
1370 // CHECK5-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1371 // CHECK5-NEXT:    store i32 3, ptr [[TMP0]], align 4
1372 // CHECK5-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1373 // CHECK5-NEXT:    store i32 0, ptr [[TMP1]], align 4
1374 // CHECK5-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1375 // CHECK5-NEXT:    store ptr null, ptr [[TMP2]], align 8
1376 // CHECK5-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1377 // CHECK5-NEXT:    store ptr null, ptr [[TMP3]], align 8
1378 // CHECK5-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1379 // CHECK5-NEXT:    store ptr null, ptr [[TMP4]], align 8
1380 // CHECK5-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1381 // CHECK5-NEXT:    store ptr null, ptr [[TMP5]], align 8
1382 // CHECK5-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1383 // CHECK5-NEXT:    store ptr null, ptr [[TMP6]], align 8
1384 // CHECK5-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1385 // CHECK5-NEXT:    store ptr null, ptr [[TMP7]], align 8
1386 // CHECK5-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1387 // CHECK5-NEXT:    store i64 100, ptr [[TMP8]], align 8
1388 // CHECK5-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1389 // CHECK5-NEXT:    store i64 0, ptr [[TMP9]], align 8
1390 // CHECK5-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1391 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
1392 // CHECK5-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1393 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
1394 // CHECK5-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1395 // CHECK5-NEXT:    store i32 0, ptr [[TMP12]], align 4
1396 // CHECK5-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, ptr [[KERNEL_ARGS]])
1397 // CHECK5-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1398 // CHECK5-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1399 // CHECK5:       omp_offload.failed:
1400 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR3:[0-9]+]]
1401 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1402 // CHECK5:       lpad:
1403 // CHECK5-NEXT:    [[TMP15:%.*]] = landingpad { ptr, i32 }
1404 // CHECK5-NEXT:            cleanup
1405 // CHECK5-NEXT:    [[TMP16:%.*]] = extractvalue { ptr, i32 } [[TMP15]], 0
1406 // CHECK5-NEXT:    store ptr [[TMP16]], ptr [[EXN_SLOT]], align 8
1407 // CHECK5-NEXT:    [[TMP17:%.*]] = extractvalue { ptr, i32 } [[TMP15]], 1
1408 // CHECK5-NEXT:    store i32 [[TMP17]], ptr [[EHSELECTOR_SLOT]], align 4
1409 // CHECK5-NEXT:    call void @_ZN1SD1Ev(ptr noundef nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR3]]
1410 // CHECK5-NEXT:    br label [[EH_RESUME:%.*]]
1411 // CHECK5:       omp_offload.cont:
1412 // CHECK5-NEXT:    [[TMP18:%.*]] = load i8, ptr [[A]], align 1
1413 // CHECK5-NEXT:    store i8 [[TMP18]], ptr [[A_CASTED]], align 1
1414 // CHECK5-NEXT:    [[TMP19:%.*]] = load i64, ptr [[A_CASTED]], align 8
1415 // CHECK5-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1416 // CHECK5-NEXT:    store i64 [[TMP19]], ptr [[TMP20]], align 8
1417 // CHECK5-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1418 // CHECK5-NEXT:    store i64 [[TMP19]], ptr [[TMP21]], align 8
1419 // CHECK5-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1420 // CHECK5-NEXT:    store ptr null, ptr [[TMP22]], align 8
1421 // CHECK5-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1422 // CHECK5-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1423 // CHECK5-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
1424 // CHECK5-NEXT:    store i32 3, ptr [[TMP25]], align 4
1425 // CHECK5-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
1426 // CHECK5-NEXT:    store i32 1, ptr [[TMP26]], align 4
1427 // CHECK5-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
1428 // CHECK5-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 8
1429 // CHECK5-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
1430 // CHECK5-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 8
1431 // CHECK5-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
1432 // CHECK5-NEXT:    store ptr @.offload_sizes, ptr [[TMP29]], align 8
1433 // CHECK5-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
1434 // CHECK5-NEXT:    store ptr @.offload_maptypes, ptr [[TMP30]], align 8
1435 // CHECK5-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
1436 // CHECK5-NEXT:    store ptr null, ptr [[TMP31]], align 8
1437 // CHECK5-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
1438 // CHECK5-NEXT:    store ptr null, ptr [[TMP32]], align 8
1439 // CHECK5-NEXT:    [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
1440 // CHECK5-NEXT:    store i64 100, ptr [[TMP33]], align 8
1441 // CHECK5-NEXT:    [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
1442 // CHECK5-NEXT:    store i64 0, ptr [[TMP34]], align 8
1443 // CHECK5-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
1444 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
1445 // CHECK5-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
1446 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
1447 // CHECK5-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
1448 // CHECK5-NEXT:    store i32 0, ptr [[TMP37]], align 4
1449 // CHECK5-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, ptr [[KERNEL_ARGS2]])
1450 // CHECK5-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
1451 // CHECK5-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
1452 // CHECK5:       omp_offload.failed3:
1453 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP19]]) #[[ATTR3]]
1454 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
1455 // CHECK5:       omp_offload.cont4:
1456 // CHECK5-NEXT:    [[TMP40:%.*]] = load i8, ptr [[A]], align 1
1457 // CHECK5-NEXT:    [[CONV:%.*]] = sext i8 [[TMP40]] to i32
1458 // CHECK5-NEXT:    [[CALL6:%.*]] = invoke noundef i32 @_Z5tmainIcLi5EEiv()
1459 // CHECK5-NEXT:            to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]]
1460 // CHECK5:       invoke.cont5:
1461 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV]], [[CALL6]]
1462 // CHECK5-NEXT:    [[CALL8:%.*]] = invoke noundef i32 @_Z5tmainI1SLi1EEiv()
1463 // CHECK5-NEXT:            to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]]
1464 // CHECK5:       invoke.cont7:
1465 // CHECK5-NEXT:    [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]]
1466 // CHECK5-NEXT:    store i32 [[ADD9]], ptr [[RETVAL]], align 4
1467 // CHECK5-NEXT:    call void @_ZN1SD1Ev(ptr noundef nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR3]]
1468 // CHECK5-NEXT:    [[TMP41:%.*]] = load i32, ptr [[RETVAL]], align 4
1469 // CHECK5-NEXT:    ret i32 [[TMP41]]
1470 // CHECK5:       eh.resume:
1471 // CHECK5-NEXT:    [[EXN:%.*]] = load ptr, ptr [[EXN_SLOT]], align 8
1472 // CHECK5-NEXT:    [[SEL:%.*]] = load i32, ptr [[EHSELECTOR_SLOT]], align 4
1473 // CHECK5-NEXT:    [[LPAD_VAL:%.*]] = insertvalue { ptr, i32 } poison, ptr [[EXN]], 0
1474 // CHECK5-NEXT:    [[LPAD_VAL10:%.*]] = insertvalue { ptr, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
1475 // CHECK5-NEXT:    resume { ptr, i32 } [[LPAD_VAL10]]
1476 //
1477 //
1478 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SC1El
1479 // CHECK5-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
1480 // CHECK5-NEXT:  entry:
1481 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1482 // CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
1483 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1484 // CHECK5-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
1485 // CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1486 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8
1487 // CHECK5-NEXT:    call void @_ZN1SC2El(ptr noundef nonnull align 8 dereferenceable(24) [[THIS1]], i64 noundef [[TMP0]])
1488 // CHECK5-NEXT:    ret void
1489 //
1490 //
1491 // CHECK5-LABEL: define {{[^@]+}}@_ZN1ScvcEv
1492 // CHECK5-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR1]] comdat align 2 {
1493 // CHECK5-NEXT:  entry:
1494 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1495 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1496 // CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1497 // CHECK5-NEXT:    call void @_Z8mayThrowv()
1498 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
1499 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, ptr [[A]], align 8
1500 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
1501 // CHECK5-NEXT:    ret i8 [[CONV]]
1502 //
1503 //
1504 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
1505 // CHECK5-SAME: () #[[ATTR2:[0-9]+]] {
1506 // CHECK5-NEXT:  entry:
1507 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined)
1508 // CHECK5-NEXT:    ret void
1509 //
1510 //
1511 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined
1512 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
1513 // CHECK5-NEXT:  entry:
1514 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1515 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1516 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1517 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1518 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1519 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1520 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1521 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1522 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
1523 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1524 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1525 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1526 // CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
1527 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1528 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1529 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1530 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1531 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1532 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1533 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1534 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1535 // CHECK5:       cond.true:
1536 // CHECK5-NEXT:    br label [[COND_END:%.*]]
1537 // CHECK5:       cond.false:
1538 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1539 // CHECK5-NEXT:    br label [[COND_END]]
1540 // CHECK5:       cond.end:
1541 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1542 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1543 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1544 // CHECK5-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
1545 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1546 // CHECK5:       omp.inner.for.cond:
1547 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1548 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1549 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1550 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1551 // CHECK5:       omp.inner.for.body:
1552 // CHECK5-NEXT:    call void @__kmpc_push_num_threads(ptr @[[GLOB3]], i32 [[TMP1]], i32 2)
1553 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1554 // CHECK5-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1555 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1556 // CHECK5-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1557 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]])
1558 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1559 // CHECK5:       omp.inner.for.inc:
1560 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1561 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1562 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1563 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
1564 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
1565 // CHECK5:       omp.inner.for.end:
1566 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1567 // CHECK5:       omp.loop.exit:
1568 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
1569 // CHECK5-NEXT:    ret void
1570 //
1571 //
1572 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined
1573 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
1574 // CHECK5-NEXT:  entry:
1575 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1576 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1577 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1578 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1579 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1580 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1581 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1582 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1583 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1584 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1585 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
1586 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1587 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1588 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1589 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1590 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1591 // CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
1592 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1593 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1594 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1595 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1596 // CHECK5-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1597 // CHECK5-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
1598 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1599 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1600 // CHECK5-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1601 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
1602 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1603 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1604 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1605 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1606 // CHECK5:       cond.true:
1607 // CHECK5-NEXT:    br label [[COND_END:%.*]]
1608 // CHECK5:       cond.false:
1609 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1610 // CHECK5-NEXT:    br label [[COND_END]]
1611 // CHECK5:       cond.end:
1612 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1613 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1614 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1615 // CHECK5-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
1616 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1617 // CHECK5:       omp.inner.for.cond:
1618 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1619 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1620 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1621 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1622 // CHECK5:       omp.inner.for.body:
1623 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1624 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1625 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1626 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
1627 // CHECK5-NEXT:    invoke void @_Z3foov()
1628 // CHECK5-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
1629 // CHECK5:       invoke.cont:
1630 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1631 // CHECK5:       omp.body.continue:
1632 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1633 // CHECK5:       omp.inner.for.inc:
1634 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1635 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1636 // CHECK5-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
1637 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
1638 // CHECK5:       omp.inner.for.end:
1639 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1640 // CHECK5:       omp.loop.exit:
1641 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
1642 // CHECK5-NEXT:    ret void
1643 // CHECK5:       terminate.lpad:
1644 // CHECK5-NEXT:    [[TMP11:%.*]] = landingpad { ptr, i32 }
1645 // CHECK5-NEXT:            catch ptr null
1646 // CHECK5-NEXT:    [[TMP12:%.*]] = extractvalue { ptr, i32 } [[TMP11]], 0
1647 // CHECK5-NEXT:    call void @__clang_call_terminate(ptr [[TMP12]]) #[[ATTR7:[0-9]+]]
1648 // CHECK5-NEXT:    unreachable
1649 //
1650 //
1651 // CHECK5-LABEL: define {{[^@]+}}@__clang_call_terminate
1652 // CHECK5-SAME: (ptr noundef [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat {
1653 // CHECK5-NEXT:    [[TMP2:%.*]] = call ptr @__cxa_begin_catch(ptr [[TMP0]]) #[[ATTR3]]
1654 // CHECK5-NEXT:    call void @_ZSt9terminatev() #[[ATTR7]]
1655 // CHECK5-NEXT:    unreachable
1656 //
1657 //
1658 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74
1659 // CHECK5-SAME: (i64 noundef [[A:%.*]]) #[[ATTR2]] {
1660 // CHECK5-NEXT:  entry:
1661 // CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
1662 // CHECK5-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
1663 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.omp_outlined, ptr [[A_ADDR]])
1664 // CHECK5-NEXT:    ret void
1665 //
1666 //
1667 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.omp_outlined
1668 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR2]] {
1669 // CHECK5-NEXT:  entry:
1670 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1671 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1672 // CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
1673 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1674 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1675 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1676 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1677 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1678 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1679 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
1680 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1681 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1682 // CHECK5-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
1683 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1684 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1685 // CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
1686 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1687 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1688 // CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1689 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
1690 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1691 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1692 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
1693 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1694 // CHECK5:       cond.true:
1695 // CHECK5-NEXT:    br label [[COND_END:%.*]]
1696 // CHECK5:       cond.false:
1697 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1698 // CHECK5-NEXT:    br label [[COND_END]]
1699 // CHECK5:       cond.end:
1700 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1701 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1702 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1703 // CHECK5-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
1704 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1705 // CHECK5:       omp.inner.for.cond:
1706 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1707 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1708 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1709 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1710 // CHECK5:       omp.inner.for.body:
1711 // CHECK5-NEXT:    [[TMP8:%.*]] = load i8, ptr [[TMP0]], align 1
1712 // CHECK5-NEXT:    [[TMP9:%.*]] = sext i8 [[TMP8]] to i32
1713 // CHECK5-NEXT:    call void @__kmpc_push_num_threads(ptr @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]])
1714 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1715 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1716 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1717 // CHECK5-NEXT:    [[TMP13:%.*]] = zext i32 [[TMP12]] to i64
1718 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.omp_outlined.omp_outlined, i64 [[TMP11]], i64 [[TMP13]])
1719 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1720 // CHECK5:       omp.inner.for.inc:
1721 // CHECK5-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1722 // CHECK5-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1723 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
1724 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
1725 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
1726 // CHECK5:       omp.inner.for.end:
1727 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1728 // CHECK5:       omp.loop.exit:
1729 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
1730 // CHECK5-NEXT:    ret void
1731 //
1732 //
1733 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.omp_outlined.omp_outlined
1734 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
1735 // CHECK5-NEXT:  entry:
1736 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1737 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1738 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1739 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1740 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1741 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1742 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1743 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1744 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1745 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1746 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
1747 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1748 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1749 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1750 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1751 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1752 // CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
1753 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1754 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1755 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1756 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1757 // CHECK5-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1758 // CHECK5-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
1759 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1760 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1761 // CHECK5-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1762 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
1763 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1764 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1765 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1766 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1767 // CHECK5:       cond.true:
1768 // CHECK5-NEXT:    br label [[COND_END:%.*]]
1769 // CHECK5:       cond.false:
1770 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1771 // CHECK5-NEXT:    br label [[COND_END]]
1772 // CHECK5:       cond.end:
1773 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1774 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1775 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1776 // CHECK5-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
1777 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1778 // CHECK5:       omp.inner.for.cond:
1779 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1780 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1781 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1782 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1783 // CHECK5:       omp.inner.for.body:
1784 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1785 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1786 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1787 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
1788 // CHECK5-NEXT:    invoke void @_Z3foov()
1789 // CHECK5-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
1790 // CHECK5:       invoke.cont:
1791 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1792 // CHECK5:       omp.body.continue:
1793 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1794 // CHECK5:       omp.inner.for.inc:
1795 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1796 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1797 // CHECK5-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
1798 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
1799 // CHECK5:       omp.inner.for.end:
1800 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1801 // CHECK5:       omp.loop.exit:
1802 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
1803 // CHECK5-NEXT:    ret void
1804 // CHECK5:       terminate.lpad:
1805 // CHECK5-NEXT:    [[TMP11:%.*]] = landingpad { ptr, i32 }
1806 // CHECK5-NEXT:            catch ptr null
1807 // CHECK5-NEXT:    [[TMP12:%.*]] = extractvalue { ptr, i32 } [[TMP11]], 0
1808 // CHECK5-NEXT:    call void @__clang_call_terminate(ptr [[TMP12]]) #[[ATTR7]]
1809 // CHECK5-NEXT:    unreachable
1810 //
1811 //
1812 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
1813 // CHECK5-SAME: () #[[ATTR6:[0-9]+]] comdat {
1814 // CHECK5-NEXT:  entry:
1815 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1816 // CHECK5-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1817 // CHECK5-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1818 // CHECK5-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1819 // CHECK5-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1820 // CHECK5-NEXT:    store i32 3, ptr [[TMP0]], align 4
1821 // CHECK5-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1822 // CHECK5-NEXT:    store i32 0, ptr [[TMP1]], align 4
1823 // CHECK5-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1824 // CHECK5-NEXT:    store ptr null, ptr [[TMP2]], align 8
1825 // CHECK5-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1826 // CHECK5-NEXT:    store ptr null, ptr [[TMP3]], align 8
1827 // CHECK5-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1828 // CHECK5-NEXT:    store ptr null, ptr [[TMP4]], align 8
1829 // CHECK5-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1830 // CHECK5-NEXT:    store ptr null, ptr [[TMP5]], align 8
1831 // CHECK5-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1832 // CHECK5-NEXT:    store ptr null, ptr [[TMP6]], align 8
1833 // CHECK5-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1834 // CHECK5-NEXT:    store ptr null, ptr [[TMP7]], align 8
1835 // CHECK5-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1836 // CHECK5-NEXT:    store i64 100, ptr [[TMP8]], align 8
1837 // CHECK5-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1838 // CHECK5-NEXT:    store i64 0, ptr [[TMP9]], align 8
1839 // CHECK5-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1840 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
1841 // CHECK5-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1842 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
1843 // CHECK5-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1844 // CHECK5-NEXT:    store i32 0, ptr [[TMP12]], align 4
1845 // CHECK5-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, ptr [[KERNEL_ARGS]])
1846 // CHECK5-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1847 // CHECK5-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1848 // CHECK5:       omp_offload.failed:
1849 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR3]]
1850 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1851 // CHECK5:       omp_offload.cont:
1852 // CHECK5-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
1853 // CHECK5-NEXT:    store i32 3, ptr [[TMP15]], align 4
1854 // CHECK5-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
1855 // CHECK5-NEXT:    store i32 0, ptr [[TMP16]], align 4
1856 // CHECK5-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
1857 // CHECK5-NEXT:    store ptr null, ptr [[TMP17]], align 8
1858 // CHECK5-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
1859 // CHECK5-NEXT:    store ptr null, ptr [[TMP18]], align 8
1860 // CHECK5-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
1861 // CHECK5-NEXT:    store ptr null, ptr [[TMP19]], align 8
1862 // CHECK5-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
1863 // CHECK5-NEXT:    store ptr null, ptr [[TMP20]], align 8
1864 // CHECK5-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
1865 // CHECK5-NEXT:    store ptr null, ptr [[TMP21]], align 8
1866 // CHECK5-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
1867 // CHECK5-NEXT:    store ptr null, ptr [[TMP22]], align 8
1868 // CHECK5-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
1869 // CHECK5-NEXT:    store i64 100, ptr [[TMP23]], align 8
1870 // CHECK5-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
1871 // CHECK5-NEXT:    store i64 0, ptr [[TMP24]], align 8
1872 // CHECK5-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
1873 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
1874 // CHECK5-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
1875 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4
1876 // CHECK5-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
1877 // CHECK5-NEXT:    store i32 0, ptr [[TMP27]], align 4
1878 // CHECK5-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, ptr [[KERNEL_ARGS2]])
1879 // CHECK5-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
1880 // CHECK5-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
1881 // CHECK5:       omp_offload.failed3:
1882 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR3]]
1883 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
1884 // CHECK5:       omp_offload.cont4:
1885 // CHECK5-NEXT:    ret i32 0
1886 //
1887 //
1888 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
1889 // CHECK5-SAME: () #[[ATTR6]] comdat {
1890 // CHECK5-NEXT:  entry:
1891 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1892 // CHECK5-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1893 // CHECK5-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1894 // CHECK5-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1895 // CHECK5-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1896 // CHECK5-NEXT:    store i32 3, ptr [[TMP0]], align 4
1897 // CHECK5-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1898 // CHECK5-NEXT:    store i32 0, ptr [[TMP1]], align 4
1899 // CHECK5-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1900 // CHECK5-NEXT:    store ptr null, ptr [[TMP2]], align 8
1901 // CHECK5-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1902 // CHECK5-NEXT:    store ptr null, ptr [[TMP3]], align 8
1903 // CHECK5-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1904 // CHECK5-NEXT:    store ptr null, ptr [[TMP4]], align 8
1905 // CHECK5-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1906 // CHECK5-NEXT:    store ptr null, ptr [[TMP5]], align 8
1907 // CHECK5-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1908 // CHECK5-NEXT:    store ptr null, ptr [[TMP6]], align 8
1909 // CHECK5-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1910 // CHECK5-NEXT:    store ptr null, ptr [[TMP7]], align 8
1911 // CHECK5-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1912 // CHECK5-NEXT:    store i64 100, ptr [[TMP8]], align 8
1913 // CHECK5-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1914 // CHECK5-NEXT:    store i64 0, ptr [[TMP9]], align 8
1915 // CHECK5-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1916 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
1917 // CHECK5-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1918 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
1919 // CHECK5-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1920 // CHECK5-NEXT:    store i32 0, ptr [[TMP12]], align 4
1921 // CHECK5-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, ptr [[KERNEL_ARGS]])
1922 // CHECK5-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1923 // CHECK5-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1924 // CHECK5:       omp_offload.failed:
1925 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR3]]
1926 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1927 // CHECK5:       omp_offload.cont:
1928 // CHECK5-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
1929 // CHECK5-NEXT:    store i32 3, ptr [[TMP15]], align 4
1930 // CHECK5-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
1931 // CHECK5-NEXT:    store i32 0, ptr [[TMP16]], align 4
1932 // CHECK5-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
1933 // CHECK5-NEXT:    store ptr null, ptr [[TMP17]], align 8
1934 // CHECK5-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
1935 // CHECK5-NEXT:    store ptr null, ptr [[TMP18]], align 8
1936 // CHECK5-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
1937 // CHECK5-NEXT:    store ptr null, ptr [[TMP19]], align 8
1938 // CHECK5-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
1939 // CHECK5-NEXT:    store ptr null, ptr [[TMP20]], align 8
1940 // CHECK5-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
1941 // CHECK5-NEXT:    store ptr null, ptr [[TMP21]], align 8
1942 // CHECK5-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
1943 // CHECK5-NEXT:    store ptr null, ptr [[TMP22]], align 8
1944 // CHECK5-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
1945 // CHECK5-NEXT:    store i64 100, ptr [[TMP23]], align 8
1946 // CHECK5-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
1947 // CHECK5-NEXT:    store i64 0, ptr [[TMP24]], align 8
1948 // CHECK5-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
1949 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
1950 // CHECK5-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
1951 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4
1952 // CHECK5-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
1953 // CHECK5-NEXT:    store i32 0, ptr [[TMP27]], align 4
1954 // CHECK5-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, ptr [[KERNEL_ARGS2]])
1955 // CHECK5-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
1956 // CHECK5-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
1957 // CHECK5:       omp_offload.failed3:
1958 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR3]]
1959 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
1960 // CHECK5:       omp_offload.cont4:
1961 // CHECK5-NEXT:    ret i32 0
1962 //
1963 //
1964 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SD1Ev
1965 // CHECK5-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
1966 // CHECK5-NEXT:  entry:
1967 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1968 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1969 // CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1970 // CHECK5-NEXT:    call void @_ZN1SD2Ev(ptr noundef nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR3]]
1971 // CHECK5-NEXT:    ret void
1972 //
1973 //
1974 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SC2El
1975 // CHECK5-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
1976 // CHECK5-NEXT:  entry:
1977 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1978 // CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
1979 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1980 // CHECK5-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
1981 // CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1982 // CHECK5-NEXT:    [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
1983 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8
1984 // CHECK5-NEXT:    store i64 [[TMP0]], ptr [[A2]], align 8
1985 // CHECK5-NEXT:    ret void
1986 //
1987 //
1988 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52
1989 // CHECK5-SAME: () #[[ATTR2]] {
1990 // CHECK5-NEXT:  entry:
1991 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.omp_outlined)
1992 // CHECK5-NEXT:    ret void
1993 //
1994 //
1995 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.omp_outlined
1996 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
1997 // CHECK5-NEXT:  entry:
1998 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1999 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2000 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2001 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2002 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2003 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2004 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2005 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2006 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2007 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2008 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2009 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2010 // CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
2011 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2012 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2013 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2014 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2015 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2016 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2017 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2018 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2019 // CHECK5:       cond.true:
2020 // CHECK5-NEXT:    br label [[COND_END:%.*]]
2021 // CHECK5:       cond.false:
2022 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2023 // CHECK5-NEXT:    br label [[COND_END]]
2024 // CHECK5:       cond.end:
2025 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2026 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2027 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2028 // CHECK5-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2029 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2030 // CHECK5:       omp.inner.for.cond:
2031 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2032 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2033 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2034 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2035 // CHECK5:       omp.inner.for.body:
2036 // CHECK5-NEXT:    call void @__kmpc_push_num_threads(ptr @[[GLOB3]], i32 [[TMP1]], i32 5)
2037 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2038 // CHECK5-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2039 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2040 // CHECK5-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2041 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]])
2042 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2043 // CHECK5:       omp.inner.for.inc:
2044 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2045 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2046 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
2047 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2048 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
2049 // CHECK5:       omp.inner.for.end:
2050 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2051 // CHECK5:       omp.loop.exit:
2052 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
2053 // CHECK5-NEXT:    ret void
2054 //
2055 //
2056 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.omp_outlined.omp_outlined
2057 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
2058 // CHECK5-NEXT:  entry:
2059 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2060 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2061 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2062 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2063 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2064 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2065 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2066 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2067 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2068 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2069 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2070 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2071 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2072 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2073 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2074 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2075 // CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
2076 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2077 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2078 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2079 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2080 // CHECK5-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2081 // CHECK5-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
2082 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2083 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2084 // CHECK5-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2085 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
2086 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2087 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2088 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2089 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2090 // CHECK5:       cond.true:
2091 // CHECK5-NEXT:    br label [[COND_END:%.*]]
2092 // CHECK5:       cond.false:
2093 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2094 // CHECK5-NEXT:    br label [[COND_END]]
2095 // CHECK5:       cond.end:
2096 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2097 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2098 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2099 // CHECK5-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
2100 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2101 // CHECK5:       omp.inner.for.cond:
2102 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2103 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2104 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2105 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2106 // CHECK5:       omp.inner.for.body:
2107 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2108 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2109 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2110 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2111 // CHECK5-NEXT:    invoke void @_Z3foov()
2112 // CHECK5-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
2113 // CHECK5:       invoke.cont:
2114 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2115 // CHECK5:       omp.body.continue:
2116 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2117 // CHECK5:       omp.inner.for.inc:
2118 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2119 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2120 // CHECK5-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
2121 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
2122 // CHECK5:       omp.inner.for.end:
2123 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2124 // CHECK5:       omp.loop.exit:
2125 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
2126 // CHECK5-NEXT:    ret void
2127 // CHECK5:       terminate.lpad:
2128 // CHECK5-NEXT:    [[TMP11:%.*]] = landingpad { ptr, i32 }
2129 // CHECK5-NEXT:            catch ptr null
2130 // CHECK5-NEXT:    [[TMP12:%.*]] = extractvalue { ptr, i32 } [[TMP11]], 0
2131 // CHECK5-NEXT:    call void @__clang_call_terminate(ptr [[TMP12]]) #[[ATTR7]]
2132 // CHECK5-NEXT:    unreachable
2133 //
2134 //
2135 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57
2136 // CHECK5-SAME: () #[[ATTR2]] {
2137 // CHECK5-NEXT:  entry:
2138 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.omp_outlined)
2139 // CHECK5-NEXT:    ret void
2140 //
2141 //
2142 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.omp_outlined
2143 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
2144 // CHECK5-NEXT:  entry:
2145 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2146 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2147 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2148 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2149 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2150 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2151 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2152 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2153 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2154 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2155 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2156 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2157 // CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
2158 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2159 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2160 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2161 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2162 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2163 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2164 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2165 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2166 // CHECK5:       cond.true:
2167 // CHECK5-NEXT:    br label [[COND_END:%.*]]
2168 // CHECK5:       cond.false:
2169 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2170 // CHECK5-NEXT:    br label [[COND_END]]
2171 // CHECK5:       cond.end:
2172 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2173 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2174 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2175 // CHECK5-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2176 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2177 // CHECK5:       omp.inner.for.cond:
2178 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2179 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2180 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2181 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2182 // CHECK5:       omp.inner.for.body:
2183 // CHECK5-NEXT:    call void @__kmpc_push_num_threads(ptr @[[GLOB3]], i32 [[TMP1]], i32 23)
2184 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2185 // CHECK5-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2186 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2187 // CHECK5-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2188 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]])
2189 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2190 // CHECK5:       omp.inner.for.inc:
2191 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2192 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2193 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
2194 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2195 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
2196 // CHECK5:       omp.inner.for.end:
2197 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2198 // CHECK5:       omp.loop.exit:
2199 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
2200 // CHECK5-NEXT:    ret void
2201 //
2202 //
2203 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.omp_outlined.omp_outlined
2204 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
2205 // CHECK5-NEXT:  entry:
2206 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2207 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2208 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2209 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2210 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2211 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2212 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2213 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2214 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2215 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2216 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2217 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2218 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2219 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2220 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2221 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2222 // CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
2223 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2224 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2225 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2226 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2227 // CHECK5-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2228 // CHECK5-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
2229 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2230 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2231 // CHECK5-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2232 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
2233 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2234 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2235 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2236 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2237 // CHECK5:       cond.true:
2238 // CHECK5-NEXT:    br label [[COND_END:%.*]]
2239 // CHECK5:       cond.false:
2240 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2241 // CHECK5-NEXT:    br label [[COND_END]]
2242 // CHECK5:       cond.end:
2243 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2244 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2245 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2246 // CHECK5-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
2247 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2248 // CHECK5:       omp.inner.for.cond:
2249 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2250 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2251 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2252 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2253 // CHECK5:       omp.inner.for.body:
2254 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2255 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2256 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2257 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2258 // CHECK5-NEXT:    invoke void @_Z3foov()
2259 // CHECK5-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
2260 // CHECK5:       invoke.cont:
2261 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2262 // CHECK5:       omp.body.continue:
2263 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2264 // CHECK5:       omp.inner.for.inc:
2265 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2266 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2267 // CHECK5-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
2268 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
2269 // CHECK5:       omp.inner.for.end:
2270 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2271 // CHECK5:       omp.loop.exit:
2272 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
2273 // CHECK5-NEXT:    ret void
2274 // CHECK5:       terminate.lpad:
2275 // CHECK5-NEXT:    [[TMP11:%.*]] = landingpad { ptr, i32 }
2276 // CHECK5-NEXT:            catch ptr null
2277 // CHECK5-NEXT:    [[TMP12:%.*]] = extractvalue { ptr, i32 } [[TMP11]], 0
2278 // CHECK5-NEXT:    call void @__clang_call_terminate(ptr [[TMP12]]) #[[ATTR7]]
2279 // CHECK5-NEXT:    unreachable
2280 //
2281 //
2282 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52
2283 // CHECK5-SAME: () #[[ATTR2]] {
2284 // CHECK5-NEXT:  entry:
2285 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.omp_outlined)
2286 // CHECK5-NEXT:    ret void
2287 //
2288 //
2289 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.omp_outlined
2290 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
2291 // CHECK5-NEXT:  entry:
2292 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2293 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2294 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2295 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2296 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2297 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2298 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2299 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2300 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2301 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2302 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2303 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2304 // CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
2305 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2306 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2307 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2308 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2309 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2310 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2311 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2312 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2313 // CHECK5:       cond.true:
2314 // CHECK5-NEXT:    br label [[COND_END:%.*]]
2315 // CHECK5:       cond.false:
2316 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2317 // CHECK5-NEXT:    br label [[COND_END]]
2318 // CHECK5:       cond.end:
2319 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2320 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2321 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2322 // CHECK5-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2323 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2324 // CHECK5:       omp.inner.for.cond:
2325 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2326 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2327 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2328 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2329 // CHECK5:       omp.inner.for.body:
2330 // CHECK5-NEXT:    call void @__kmpc_push_num_threads(ptr @[[GLOB3]], i32 [[TMP1]], i32 1)
2331 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2332 // CHECK5-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2333 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2334 // CHECK5-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2335 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]])
2336 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2337 // CHECK5:       omp.inner.for.inc:
2338 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2339 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2340 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
2341 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2342 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
2343 // CHECK5:       omp.inner.for.end:
2344 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2345 // CHECK5:       omp.loop.exit:
2346 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
2347 // CHECK5-NEXT:    ret void
2348 //
2349 //
2350 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.omp_outlined.omp_outlined
2351 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
2352 // CHECK5-NEXT:  entry:
2353 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2354 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2355 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2356 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2357 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2358 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2359 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2360 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2361 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2362 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2363 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2364 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2365 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2366 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2367 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2368 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2369 // CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
2370 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2371 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2372 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2373 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2374 // CHECK5-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2375 // CHECK5-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
2376 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2377 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2378 // CHECK5-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2379 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
2380 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2381 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2382 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2383 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2384 // CHECK5:       cond.true:
2385 // CHECK5-NEXT:    br label [[COND_END:%.*]]
2386 // CHECK5:       cond.false:
2387 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2388 // CHECK5-NEXT:    br label [[COND_END]]
2389 // CHECK5:       cond.end:
2390 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2391 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2392 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2393 // CHECK5-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
2394 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2395 // CHECK5:       omp.inner.for.cond:
2396 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2397 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2398 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2399 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2400 // CHECK5:       omp.inner.for.body:
2401 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2402 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2403 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2404 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2405 // CHECK5-NEXT:    invoke void @_Z3foov()
2406 // CHECK5-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
2407 // CHECK5:       invoke.cont:
2408 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2409 // CHECK5:       omp.body.continue:
2410 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2411 // CHECK5:       omp.inner.for.inc:
2412 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2413 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2414 // CHECK5-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
2415 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
2416 // CHECK5:       omp.inner.for.end:
2417 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2418 // CHECK5:       omp.loop.exit:
2419 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
2420 // CHECK5-NEXT:    ret void
2421 // CHECK5:       terminate.lpad:
2422 // CHECK5-NEXT:    [[TMP11:%.*]] = landingpad { ptr, i32 }
2423 // CHECK5-NEXT:            catch ptr null
2424 // CHECK5-NEXT:    [[TMP12:%.*]] = extractvalue { ptr, i32 } [[TMP11]], 0
2425 // CHECK5-NEXT:    call void @__clang_call_terminate(ptr [[TMP12]]) #[[ATTR7]]
2426 // CHECK5-NEXT:    unreachable
2427 //
2428 //
2429 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57
2430 // CHECK5-SAME: () #[[ATTR2]] {
2431 // CHECK5-NEXT:  entry:
2432 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.omp_outlined)
2433 // CHECK5-NEXT:    ret void
2434 //
2435 //
2436 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.omp_outlined
2437 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
2438 // CHECK5-NEXT:  entry:
2439 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2440 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2441 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2442 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2443 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2444 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2445 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2446 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2447 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2448 // CHECK5-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8
2449 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2450 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2451 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2452 // CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
2453 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2454 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2455 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2456 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2457 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2458 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2459 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2460 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2461 // CHECK5:       cond.true:
2462 // CHECK5-NEXT:    br label [[COND_END:%.*]]
2463 // CHECK5:       cond.false:
2464 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2465 // CHECK5-NEXT:    br label [[COND_END]]
2466 // CHECK5:       cond.end:
2467 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2468 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2469 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2470 // CHECK5-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2471 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2472 // CHECK5:       omp.inner.for.cond:
2473 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2474 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2475 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2476 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2477 // CHECK5:       omp.inner.for.body:
2478 // CHECK5-NEXT:    invoke void @_ZN1SC1El(ptr noundef nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 noundef 23)
2479 // CHECK5-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
2480 // CHECK5:       invoke.cont:
2481 // CHECK5-NEXT:    [[CALL:%.*]] = invoke noundef signext i8 @_ZN1ScvcEv(ptr noundef nonnull align 8 dereferenceable(24) [[REF_TMP]])
2482 // CHECK5-NEXT:            to label [[INVOKE_CONT2:%.*]] unwind label [[TERMINATE_LPAD]]
2483 // CHECK5:       invoke.cont2:
2484 // CHECK5-NEXT:    [[TMP7:%.*]] = sext i8 [[CALL]] to i32
2485 // CHECK5-NEXT:    call void @__kmpc_push_num_threads(ptr @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]])
2486 // CHECK5-NEXT:    call void @_ZN1SD1Ev(ptr noundef nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR3]]
2487 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2488 // CHECK5-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2489 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2490 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2491 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]])
2492 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2493 // CHECK5:       omp.inner.for.inc:
2494 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2495 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2496 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2497 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2498 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
2499 // CHECK5:       omp.inner.for.end:
2500 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2501 // CHECK5:       omp.loop.exit:
2502 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
2503 // CHECK5-NEXT:    ret void
2504 // CHECK5:       terminate.lpad:
2505 // CHECK5-NEXT:    [[TMP14:%.*]] = landingpad { ptr, i32 }
2506 // CHECK5-NEXT:            catch ptr null
2507 // CHECK5-NEXT:    [[TMP15:%.*]] = extractvalue { ptr, i32 } [[TMP14]], 0
2508 // CHECK5-NEXT:    call void @__clang_call_terminate(ptr [[TMP15]]) #[[ATTR7]]
2509 // CHECK5-NEXT:    unreachable
2510 //
2511 //
2512 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.omp_outlined.omp_outlined
2513 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
2514 // CHECK5-NEXT:  entry:
2515 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2516 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2517 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2518 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2519 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2520 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2521 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2522 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2523 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2524 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2525 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2526 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2527 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2528 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2529 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2530 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2531 // CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
2532 // CHECK5-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2533 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2534 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2535 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2536 // CHECK5-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2537 // CHECK5-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
2538 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2539 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2540 // CHECK5-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2541 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
2542 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2543 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2544 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2545 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2546 // CHECK5:       cond.true:
2547 // CHECK5-NEXT:    br label [[COND_END:%.*]]
2548 // CHECK5:       cond.false:
2549 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2550 // CHECK5-NEXT:    br label [[COND_END]]
2551 // CHECK5:       cond.end:
2552 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2553 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2554 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2555 // CHECK5-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
2556 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2557 // CHECK5:       omp.inner.for.cond:
2558 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2559 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2560 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2561 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2562 // CHECK5:       omp.inner.for.body:
2563 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2564 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2565 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2566 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2567 // CHECK5-NEXT:    invoke void @_Z3foov()
2568 // CHECK5-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
2569 // CHECK5:       invoke.cont:
2570 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2571 // CHECK5:       omp.body.continue:
2572 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2573 // CHECK5:       omp.inner.for.inc:
2574 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2575 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2576 // CHECK5-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
2577 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
2578 // CHECK5:       omp.inner.for.end:
2579 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2580 // CHECK5:       omp.loop.exit:
2581 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
2582 // CHECK5-NEXT:    ret void
2583 // CHECK5:       terminate.lpad:
2584 // CHECK5-NEXT:    [[TMP11:%.*]] = landingpad { ptr, i32 }
2585 // CHECK5-NEXT:            catch ptr null
2586 // CHECK5-NEXT:    [[TMP12:%.*]] = extractvalue { ptr, i32 } [[TMP11]], 0
2587 // CHECK5-NEXT:    call void @__clang_call_terminate(ptr [[TMP12]]) #[[ATTR7]]
2588 // CHECK5-NEXT:    unreachable
2589 //
2590 //
2591 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SD2Ev
2592 // CHECK5-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat align 2 {
2593 // CHECK5-NEXT:  entry:
2594 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2595 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2596 // CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2597 // CHECK5-NEXT:    ret void
2598 //
2599 //
2600 // CHECK9-LABEL: define {{[^@]+}}@main
2601 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__gxx_personality_v0 {
2602 // CHECK9-NEXT:  entry:
2603 // CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2604 // CHECK9-NEXT:    [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
2605 // CHECK9-NEXT:    [[A:%.*]] = alloca i8, align 1
2606 // CHECK9-NEXT:    [[EXN_SLOT:%.*]] = alloca ptr, align 8
2607 // CHECK9-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
2608 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2609 // CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2610 // CHECK9-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
2611 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
2612 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
2613 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
2614 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
2615 // CHECK9-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2616 // CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 4
2617 // CHECK9-NEXT:    call void @_ZN1SC1El(ptr noundef nonnull align 8 dereferenceable(24) [[S]], i64 noundef 0)
2618 // CHECK9-NEXT:    [[CALL:%.*]] = invoke noundef i8 @_ZN1ScvcEv(ptr noundef nonnull align 8 dereferenceable(24) [[S]])
2619 // CHECK9-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
2620 // CHECK9:       invoke.cont:
2621 // CHECK9-NEXT:    store i8 [[CALL]], ptr [[A]], align 1
2622 // CHECK9-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
2623 // CHECK9-NEXT:    store i32 3, ptr [[TMP0]], align 4
2624 // CHECK9-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
2625 // CHECK9-NEXT:    store i32 0, ptr [[TMP1]], align 4
2626 // CHECK9-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
2627 // CHECK9-NEXT:    store ptr null, ptr [[TMP2]], align 8
2628 // CHECK9-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
2629 // CHECK9-NEXT:    store ptr null, ptr [[TMP3]], align 8
2630 // CHECK9-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
2631 // CHECK9-NEXT:    store ptr null, ptr [[TMP4]], align 8
2632 // CHECK9-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
2633 // CHECK9-NEXT:    store ptr null, ptr [[TMP5]], align 8
2634 // CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
2635 // CHECK9-NEXT:    store ptr null, ptr [[TMP6]], align 8
2636 // CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
2637 // CHECK9-NEXT:    store ptr null, ptr [[TMP7]], align 8
2638 // CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
2639 // CHECK9-NEXT:    store i64 100, ptr [[TMP8]], align 8
2640 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
2641 // CHECK9-NEXT:    store i64 0, ptr [[TMP9]], align 8
2642 // CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
2643 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
2644 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
2645 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
2646 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
2647 // CHECK9-NEXT:    store i32 0, ptr [[TMP12]], align 4
2648 // CHECK9-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, ptr [[KERNEL_ARGS]])
2649 // CHECK9-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
2650 // CHECK9-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2651 // CHECK9:       omp_offload.failed:
2652 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR3:[0-9]+]]
2653 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2654 // CHECK9:       lpad:
2655 // CHECK9-NEXT:    [[TMP15:%.*]] = landingpad { ptr, i32 }
2656 // CHECK9-NEXT:            cleanup
2657 // CHECK9-NEXT:    [[TMP16:%.*]] = extractvalue { ptr, i32 } [[TMP15]], 0
2658 // CHECK9-NEXT:    store ptr [[TMP16]], ptr [[EXN_SLOT]], align 8
2659 // CHECK9-NEXT:    [[TMP17:%.*]] = extractvalue { ptr, i32 } [[TMP15]], 1
2660 // CHECK9-NEXT:    store i32 [[TMP17]], ptr [[EHSELECTOR_SLOT]], align 4
2661 // CHECK9-NEXT:    call void @_ZN1SD1Ev(ptr noundef nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR3]]
2662 // CHECK9-NEXT:    br label [[EH_RESUME:%.*]]
2663 // CHECK9:       omp_offload.cont:
2664 // CHECK9-NEXT:    [[TMP18:%.*]] = load i8, ptr [[A]], align 1
2665 // CHECK9-NEXT:    store i8 [[TMP18]], ptr [[A_CASTED]], align 1
2666 // CHECK9-NEXT:    [[TMP19:%.*]] = load i64, ptr [[A_CASTED]], align 8
2667 // CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2668 // CHECK9-NEXT:    store i64 [[TMP19]], ptr [[TMP20]], align 8
2669 // CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2670 // CHECK9-NEXT:    store i64 [[TMP19]], ptr [[TMP21]], align 8
2671 // CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2672 // CHECK9-NEXT:    store ptr null, ptr [[TMP22]], align 8
2673 // CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2674 // CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2675 // CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
2676 // CHECK9-NEXT:    store i32 3, ptr [[TMP25]], align 4
2677 // CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
2678 // CHECK9-NEXT:    store i32 1, ptr [[TMP26]], align 4
2679 // CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
2680 // CHECK9-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 8
2681 // CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
2682 // CHECK9-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 8
2683 // CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
2684 // CHECK9-NEXT:    store ptr @.offload_sizes, ptr [[TMP29]], align 8
2685 // CHECK9-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
2686 // CHECK9-NEXT:    store ptr @.offload_maptypes, ptr [[TMP30]], align 8
2687 // CHECK9-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
2688 // CHECK9-NEXT:    store ptr null, ptr [[TMP31]], align 8
2689 // CHECK9-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
2690 // CHECK9-NEXT:    store ptr null, ptr [[TMP32]], align 8
2691 // CHECK9-NEXT:    [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
2692 // CHECK9-NEXT:    store i64 100, ptr [[TMP33]], align 8
2693 // CHECK9-NEXT:    [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
2694 // CHECK9-NEXT:    store i64 0, ptr [[TMP34]], align 8
2695 // CHECK9-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
2696 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
2697 // CHECK9-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
2698 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
2699 // CHECK9-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
2700 // CHECK9-NEXT:    store i32 0, ptr [[TMP37]], align 4
2701 // CHECK9-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, ptr [[KERNEL_ARGS2]])
2702 // CHECK9-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
2703 // CHECK9-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
2704 // CHECK9:       omp_offload.failed3:
2705 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP19]]) #[[ATTR3]]
2706 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
2707 // CHECK9:       omp_offload.cont4:
2708 // CHECK9-NEXT:    [[TMP40:%.*]] = load i8, ptr [[A]], align 1
2709 // CHECK9-NEXT:    [[CONV:%.*]] = sext i8 [[TMP40]] to i32
2710 // CHECK9-NEXT:    [[CALL6:%.*]] = invoke noundef i32 @_Z5tmainIcLi5EEiv()
2711 // CHECK9-NEXT:            to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]]
2712 // CHECK9:       invoke.cont5:
2713 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV]], [[CALL6]]
2714 // CHECK9-NEXT:    [[CALL8:%.*]] = invoke noundef i32 @_Z5tmainI1SLi1EEiv()
2715 // CHECK9-NEXT:            to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]]
2716 // CHECK9:       invoke.cont7:
2717 // CHECK9-NEXT:    [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]]
2718 // CHECK9-NEXT:    store i32 [[ADD9]], ptr [[RETVAL]], align 4
2719 // CHECK9-NEXT:    call void @_ZN1SD1Ev(ptr noundef nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR3]]
2720 // CHECK9-NEXT:    [[TMP41:%.*]] = load i32, ptr [[RETVAL]], align 4
2721 // CHECK9-NEXT:    ret i32 [[TMP41]]
2722 // CHECK9:       eh.resume:
2723 // CHECK9-NEXT:    [[EXN:%.*]] = load ptr, ptr [[EXN_SLOT]], align 8
2724 // CHECK9-NEXT:    [[SEL:%.*]] = load i32, ptr [[EHSELECTOR_SLOT]], align 4
2725 // CHECK9-NEXT:    [[LPAD_VAL:%.*]] = insertvalue { ptr, i32 } poison, ptr [[EXN]], 0
2726 // CHECK9-NEXT:    [[LPAD_VAL10:%.*]] = insertvalue { ptr, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
2727 // CHECK9-NEXT:    resume { ptr, i32 } [[LPAD_VAL10]]
2728 //
2729 //
2730 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SC1El
2731 // CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {
2732 // CHECK9-NEXT:  entry:
2733 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2734 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2735 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2736 // CHECK9-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
2737 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2738 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8
2739 // CHECK9-NEXT:    call void @_ZN1SC2El(ptr noundef nonnull align 8 dereferenceable(24) [[THIS1]], i64 noundef [[TMP0]])
2740 // CHECK9-NEXT:    ret void
2741 //
2742 //
2743 // CHECK9-LABEL: define {{[^@]+}}@_ZN1ScvcEv
2744 // CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR1]] comdat {
2745 // CHECK9-NEXT:  entry:
2746 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2747 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2748 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2749 // CHECK9-NEXT:    call void @_Z8mayThrowv()
2750 // CHECK9-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
2751 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[A]], align 8
2752 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
2753 // CHECK9-NEXT:    ret i8 [[CONV]]
2754 //
2755 //
2756 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
2757 // CHECK9-SAME: () #[[ATTR2:[0-9]+]] {
2758 // CHECK9-NEXT:  entry:
2759 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined)
2760 // CHECK9-NEXT:    ret void
2761 //
2762 //
2763 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined
2764 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
2765 // CHECK9-NEXT:  entry:
2766 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2767 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2768 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2769 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2770 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2771 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2772 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2773 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2774 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
2775 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2776 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2777 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2778 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
2779 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2780 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2781 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2782 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2783 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2784 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2785 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2786 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2787 // CHECK9:       cond.true:
2788 // CHECK9-NEXT:    br label [[COND_END:%.*]]
2789 // CHECK9:       cond.false:
2790 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2791 // CHECK9-NEXT:    br label [[COND_END]]
2792 // CHECK9:       cond.end:
2793 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2794 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2795 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2796 // CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2797 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2798 // CHECK9:       omp.inner.for.cond:
2799 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2800 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2801 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2802 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2803 // CHECK9:       omp.inner.for.body:
2804 // CHECK9-NEXT:    call void @__kmpc_push_num_threads(ptr @[[GLOB3]], i32 [[TMP1]], i32 2)
2805 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2806 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2807 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2808 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2809 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]])
2810 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2811 // CHECK9:       omp.inner.for.inc:
2812 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2813 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2814 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
2815 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2816 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
2817 // CHECK9:       omp.inner.for.end:
2818 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2819 // CHECK9:       omp.loop.exit:
2820 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
2821 // CHECK9-NEXT:    ret void
2822 //
2823 //
2824 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined
2825 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
2826 // CHECK9-NEXT:  entry:
2827 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2828 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2829 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2830 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2831 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2832 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2833 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2834 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2835 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2836 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2837 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
2838 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2839 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2840 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2841 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2842 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2843 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
2844 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2845 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2846 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2847 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2848 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2849 // CHECK9-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
2850 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2851 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2852 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2853 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
2854 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2855 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2856 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2857 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2858 // CHECK9:       cond.true:
2859 // CHECK9-NEXT:    br label [[COND_END:%.*]]
2860 // CHECK9:       cond.false:
2861 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2862 // CHECK9-NEXT:    br label [[COND_END]]
2863 // CHECK9:       cond.end:
2864 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2865 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2866 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2867 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
2868 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2869 // CHECK9:       omp.inner.for.cond:
2870 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2871 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2872 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2873 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2874 // CHECK9:       omp.inner.for.body:
2875 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2876 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2877 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2878 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2879 // CHECK9-NEXT:    invoke void @_Z3foov()
2880 // CHECK9-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
2881 // CHECK9:       invoke.cont:
2882 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2883 // CHECK9:       omp.body.continue:
2884 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2885 // CHECK9:       omp.inner.for.inc:
2886 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2887 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2888 // CHECK9-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
2889 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
2890 // CHECK9:       omp.inner.for.end:
2891 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2892 // CHECK9:       omp.loop.exit:
2893 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
2894 // CHECK9-NEXT:    ret void
2895 // CHECK9:       terminate.lpad:
2896 // CHECK9-NEXT:    [[TMP11:%.*]] = landingpad { ptr, i32 }
2897 // CHECK9-NEXT:            catch ptr null
2898 // CHECK9-NEXT:    [[TMP12:%.*]] = extractvalue { ptr, i32 } [[TMP11]], 0
2899 // CHECK9-NEXT:    call void @__clang_call_terminate(ptr [[TMP12]]) #[[ATTR7:[0-9]+]]
2900 // CHECK9-NEXT:    unreachable
2901 //
2902 //
2903 // CHECK9-LABEL: define {{[^@]+}}@__clang_call_terminate
2904 // CHECK9-SAME: (ptr noundef [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat {
2905 // CHECK9-NEXT:    [[TMP2:%.*]] = call ptr @__cxa_begin_catch(ptr [[TMP0]]) #[[ATTR3]]
2906 // CHECK9-NEXT:    call void @_ZSt9terminatev() #[[ATTR7]]
2907 // CHECK9-NEXT:    unreachable
2908 //
2909 //
2910 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74
2911 // CHECK9-SAME: (i64 noundef [[A:%.*]]) #[[ATTR2]] {
2912 // CHECK9-NEXT:  entry:
2913 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2914 // CHECK9-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
2915 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.omp_outlined, ptr [[A_ADDR]])
2916 // CHECK9-NEXT:    ret void
2917 //
2918 //
2919 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.omp_outlined
2920 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR2]] {
2921 // CHECK9-NEXT:  entry:
2922 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2923 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2924 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
2925 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2926 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2927 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2928 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2929 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2930 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2931 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
2932 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2933 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2934 // CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
2935 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
2936 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2937 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
2938 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2939 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2940 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2941 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
2942 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2943 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2944 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
2945 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2946 // CHECK9:       cond.true:
2947 // CHECK9-NEXT:    br label [[COND_END:%.*]]
2948 // CHECK9:       cond.false:
2949 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2950 // CHECK9-NEXT:    br label [[COND_END]]
2951 // CHECK9:       cond.end:
2952 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2953 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2954 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2955 // CHECK9-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
2956 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2957 // CHECK9:       omp.inner.for.cond:
2958 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2959 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2960 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2961 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2962 // CHECK9:       omp.inner.for.body:
2963 // CHECK9-NEXT:    [[TMP8:%.*]] = load i8, ptr [[TMP0]], align 1
2964 // CHECK9-NEXT:    [[TMP9:%.*]] = sext i8 [[TMP8]] to i32
2965 // CHECK9-NEXT:    call void @__kmpc_push_num_threads(ptr @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]])
2966 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2967 // CHECK9-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2968 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2969 // CHECK9-NEXT:    [[TMP13:%.*]] = zext i32 [[TMP12]] to i64
2970 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.omp_outlined.omp_outlined, i64 [[TMP11]], i64 [[TMP13]])
2971 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2972 // CHECK9:       omp.inner.for.inc:
2973 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2974 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2975 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
2976 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2977 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
2978 // CHECK9:       omp.inner.for.end:
2979 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2980 // CHECK9:       omp.loop.exit:
2981 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
2982 // CHECK9-NEXT:    ret void
2983 //
2984 //
2985 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.omp_outlined.omp_outlined
2986 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
2987 // CHECK9-NEXT:  entry:
2988 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2989 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2990 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2991 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2992 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2993 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2994 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2995 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2996 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2997 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2998 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
2999 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3000 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3001 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3002 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3003 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3004 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
3005 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3006 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3007 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3008 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3009 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
3010 // CHECK9-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
3011 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3012 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3013 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3014 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
3015 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3016 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3017 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3018 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3019 // CHECK9:       cond.true:
3020 // CHECK9-NEXT:    br label [[COND_END:%.*]]
3021 // CHECK9:       cond.false:
3022 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3023 // CHECK9-NEXT:    br label [[COND_END]]
3024 // CHECK9:       cond.end:
3025 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3026 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3027 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3028 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
3029 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3030 // CHECK9:       omp.inner.for.cond:
3031 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3032 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3033 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3034 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3035 // CHECK9:       omp.inner.for.body:
3036 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3037 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3038 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3039 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
3040 // CHECK9-NEXT:    invoke void @_Z3foov()
3041 // CHECK9-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
3042 // CHECK9:       invoke.cont:
3043 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3044 // CHECK9:       omp.body.continue:
3045 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3046 // CHECK9:       omp.inner.for.inc:
3047 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3048 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3049 // CHECK9-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
3050 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
3051 // CHECK9:       omp.inner.for.end:
3052 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3053 // CHECK9:       omp.loop.exit:
3054 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
3055 // CHECK9-NEXT:    ret void
3056 // CHECK9:       terminate.lpad:
3057 // CHECK9-NEXT:    [[TMP11:%.*]] = landingpad { ptr, i32 }
3058 // CHECK9-NEXT:            catch ptr null
3059 // CHECK9-NEXT:    [[TMP12:%.*]] = extractvalue { ptr, i32 } [[TMP11]], 0
3060 // CHECK9-NEXT:    call void @__clang_call_terminate(ptr [[TMP12]]) #[[ATTR7]]
3061 // CHECK9-NEXT:    unreachable
3062 //
3063 //
3064 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
3065 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] comdat {
3066 // CHECK9-NEXT:  entry:
3067 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3068 // CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
3069 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
3070 // CHECK9-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3071 // CHECK9-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
3072 // CHECK9-NEXT:    store i32 3, ptr [[TMP0]], align 4
3073 // CHECK9-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
3074 // CHECK9-NEXT:    store i32 0, ptr [[TMP1]], align 4
3075 // CHECK9-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
3076 // CHECK9-NEXT:    store ptr null, ptr [[TMP2]], align 8
3077 // CHECK9-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
3078 // CHECK9-NEXT:    store ptr null, ptr [[TMP3]], align 8
3079 // CHECK9-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
3080 // CHECK9-NEXT:    store ptr null, ptr [[TMP4]], align 8
3081 // CHECK9-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
3082 // CHECK9-NEXT:    store ptr null, ptr [[TMP5]], align 8
3083 // CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
3084 // CHECK9-NEXT:    store ptr null, ptr [[TMP6]], align 8
3085 // CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
3086 // CHECK9-NEXT:    store ptr null, ptr [[TMP7]], align 8
3087 // CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
3088 // CHECK9-NEXT:    store i64 100, ptr [[TMP8]], align 8
3089 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
3090 // CHECK9-NEXT:    store i64 0, ptr [[TMP9]], align 8
3091 // CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
3092 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
3093 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
3094 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
3095 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
3096 // CHECK9-NEXT:    store i32 0, ptr [[TMP12]], align 4
3097 // CHECK9-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, ptr [[KERNEL_ARGS]])
3098 // CHECK9-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
3099 // CHECK9-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3100 // CHECK9:       omp_offload.failed:
3101 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR3]]
3102 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3103 // CHECK9:       omp_offload.cont:
3104 // CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
3105 // CHECK9-NEXT:    store i32 3, ptr [[TMP15]], align 4
3106 // CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
3107 // CHECK9-NEXT:    store i32 0, ptr [[TMP16]], align 4
3108 // CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
3109 // CHECK9-NEXT:    store ptr null, ptr [[TMP17]], align 8
3110 // CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
3111 // CHECK9-NEXT:    store ptr null, ptr [[TMP18]], align 8
3112 // CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
3113 // CHECK9-NEXT:    store ptr null, ptr [[TMP19]], align 8
3114 // CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
3115 // CHECK9-NEXT:    store ptr null, ptr [[TMP20]], align 8
3116 // CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
3117 // CHECK9-NEXT:    store ptr null, ptr [[TMP21]], align 8
3118 // CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
3119 // CHECK9-NEXT:    store ptr null, ptr [[TMP22]], align 8
3120 // CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
3121 // CHECK9-NEXT:    store i64 100, ptr [[TMP23]], align 8
3122 // CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
3123 // CHECK9-NEXT:    store i64 0, ptr [[TMP24]], align 8
3124 // CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
3125 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
3126 // CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
3127 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4
3128 // CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
3129 // CHECK9-NEXT:    store i32 0, ptr [[TMP27]], align 4
3130 // CHECK9-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, ptr [[KERNEL_ARGS2]])
3131 // CHECK9-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
3132 // CHECK9-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
3133 // CHECK9:       omp_offload.failed3:
3134 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR3]]
3135 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
3136 // CHECK9:       omp_offload.cont4:
3137 // CHECK9-NEXT:    ret i32 0
3138 //
3139 //
3140 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
3141 // CHECK9-SAME: () #[[ATTR6]] comdat {
3142 // CHECK9-NEXT:  entry:
3143 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3144 // CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
3145 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
3146 // CHECK9-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3147 // CHECK9-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
3148 // CHECK9-NEXT:    store i32 3, ptr [[TMP0]], align 4
3149 // CHECK9-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
3150 // CHECK9-NEXT:    store i32 0, ptr [[TMP1]], align 4
3151 // CHECK9-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
3152 // CHECK9-NEXT:    store ptr null, ptr [[TMP2]], align 8
3153 // CHECK9-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
3154 // CHECK9-NEXT:    store ptr null, ptr [[TMP3]], align 8
3155 // CHECK9-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
3156 // CHECK9-NEXT:    store ptr null, ptr [[TMP4]], align 8
3157 // CHECK9-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
3158 // CHECK9-NEXT:    store ptr null, ptr [[TMP5]], align 8
3159 // CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
3160 // CHECK9-NEXT:    store ptr null, ptr [[TMP6]], align 8
3161 // CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
3162 // CHECK9-NEXT:    store ptr null, ptr [[TMP7]], align 8
3163 // CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
3164 // CHECK9-NEXT:    store i64 100, ptr [[TMP8]], align 8
3165 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
3166 // CHECK9-NEXT:    store i64 0, ptr [[TMP9]], align 8
3167 // CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
3168 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
3169 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
3170 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
3171 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
3172 // CHECK9-NEXT:    store i32 0, ptr [[TMP12]], align 4
3173 // CHECK9-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, ptr [[KERNEL_ARGS]])
3174 // CHECK9-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
3175 // CHECK9-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3176 // CHECK9:       omp_offload.failed:
3177 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR3]]
3178 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3179 // CHECK9:       omp_offload.cont:
3180 // CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
3181 // CHECK9-NEXT:    store i32 3, ptr [[TMP15]], align 4
3182 // CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
3183 // CHECK9-NEXT:    store i32 0, ptr [[TMP16]], align 4
3184 // CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
3185 // CHECK9-NEXT:    store ptr null, ptr [[TMP17]], align 8
3186 // CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
3187 // CHECK9-NEXT:    store ptr null, ptr [[TMP18]], align 8
3188 // CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
3189 // CHECK9-NEXT:    store ptr null, ptr [[TMP19]], align 8
3190 // CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
3191 // CHECK9-NEXT:    store ptr null, ptr [[TMP20]], align 8
3192 // CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
3193 // CHECK9-NEXT:    store ptr null, ptr [[TMP21]], align 8
3194 // CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
3195 // CHECK9-NEXT:    store ptr null, ptr [[TMP22]], align 8
3196 // CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
3197 // CHECK9-NEXT:    store i64 100, ptr [[TMP23]], align 8
3198 // CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
3199 // CHECK9-NEXT:    store i64 0, ptr [[TMP24]], align 8
3200 // CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
3201 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
3202 // CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
3203 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4
3204 // CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
3205 // CHECK9-NEXT:    store i32 0, ptr [[TMP27]], align 4
3206 // CHECK9-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, ptr [[KERNEL_ARGS2]])
3207 // CHECK9-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
3208 // CHECK9-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
3209 // CHECK9:       omp_offload.failed3:
3210 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR3]]
3211 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
3212 // CHECK9:       omp_offload.cont4:
3213 // CHECK9-NEXT:    ret i32 0
3214 //
3215 //
3216 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SD1Ev
3217 // CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat {
3218 // CHECK9-NEXT:  entry:
3219 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3220 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3221 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3222 // CHECK9-NEXT:    call void @_ZN1SD2Ev(ptr noundef nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR3]]
3223 // CHECK9-NEXT:    ret void
3224 //
3225 //
3226 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SC2El
3227 // CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat {
3228 // CHECK9-NEXT:  entry:
3229 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3230 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
3231 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3232 // CHECK9-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
3233 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3234 // CHECK9-NEXT:    [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
3235 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8
3236 // CHECK9-NEXT:    store i64 [[TMP0]], ptr [[A2]], align 8
3237 // CHECK9-NEXT:    ret void
3238 //
3239 //
3240 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SD2Ev
3241 // CHECK9-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat {
3242 // CHECK9-NEXT:  entry:
3243 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3244 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3245 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3246 // CHECK9-NEXT:    ret void
3247 //
3248 //
3249 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52
3250 // CHECK9-SAME: () #[[ATTR2]] {
3251 // CHECK9-NEXT:  entry:
3252 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.omp_outlined)
3253 // CHECK9-NEXT:    ret void
3254 //
3255 //
3256 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.omp_outlined
3257 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
3258 // CHECK9-NEXT:  entry:
3259 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3260 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3261 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3262 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3263 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3264 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3265 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3266 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3267 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
3268 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3269 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3270 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3271 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
3272 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3273 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3274 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3275 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3276 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3277 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3278 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3279 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3280 // CHECK9:       cond.true:
3281 // CHECK9-NEXT:    br label [[COND_END:%.*]]
3282 // CHECK9:       cond.false:
3283 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3284 // CHECK9-NEXT:    br label [[COND_END]]
3285 // CHECK9:       cond.end:
3286 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3287 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3288 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3289 // CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
3290 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3291 // CHECK9:       omp.inner.for.cond:
3292 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3293 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3294 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3295 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3296 // CHECK9:       omp.inner.for.body:
3297 // CHECK9-NEXT:    call void @__kmpc_push_num_threads(ptr @[[GLOB3]], i32 [[TMP1]], i32 5)
3298 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3299 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3300 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3301 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3302 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]])
3303 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3304 // CHECK9:       omp.inner.for.inc:
3305 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3306 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3307 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3308 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
3309 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
3310 // CHECK9:       omp.inner.for.end:
3311 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3312 // CHECK9:       omp.loop.exit:
3313 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
3314 // CHECK9-NEXT:    ret void
3315 //
3316 //
3317 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.omp_outlined.omp_outlined
3318 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
3319 // CHECK9-NEXT:  entry:
3320 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3321 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3322 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3323 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3324 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3325 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3326 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3327 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3328 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3329 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3330 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
3331 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3332 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3333 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3334 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3335 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3336 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
3337 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3338 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3339 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3340 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3341 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
3342 // CHECK9-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
3343 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3344 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3345 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3346 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
3347 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3348 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3349 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3350 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3351 // CHECK9:       cond.true:
3352 // CHECK9-NEXT:    br label [[COND_END:%.*]]
3353 // CHECK9:       cond.false:
3354 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3355 // CHECK9-NEXT:    br label [[COND_END]]
3356 // CHECK9:       cond.end:
3357 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3358 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3359 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3360 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
3361 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3362 // CHECK9:       omp.inner.for.cond:
3363 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3364 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3365 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3366 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3367 // CHECK9:       omp.inner.for.body:
3368 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3369 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3370 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3371 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
3372 // CHECK9-NEXT:    invoke void @_Z3foov()
3373 // CHECK9-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
3374 // CHECK9:       invoke.cont:
3375 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3376 // CHECK9:       omp.body.continue:
3377 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3378 // CHECK9:       omp.inner.for.inc:
3379 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3380 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3381 // CHECK9-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
3382 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
3383 // CHECK9:       omp.inner.for.end:
3384 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3385 // CHECK9:       omp.loop.exit:
3386 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
3387 // CHECK9-NEXT:    ret void
3388 // CHECK9:       terminate.lpad:
3389 // CHECK9-NEXT:    [[TMP11:%.*]] = landingpad { ptr, i32 }
3390 // CHECK9-NEXT:            catch ptr null
3391 // CHECK9-NEXT:    [[TMP12:%.*]] = extractvalue { ptr, i32 } [[TMP11]], 0
3392 // CHECK9-NEXT:    call void @__clang_call_terminate(ptr [[TMP12]]) #[[ATTR7]]
3393 // CHECK9-NEXT:    unreachable
3394 //
3395 //
3396 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57
3397 // CHECK9-SAME: () #[[ATTR2]] {
3398 // CHECK9-NEXT:  entry:
3399 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.omp_outlined)
3400 // CHECK9-NEXT:    ret void
3401 //
3402 //
3403 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.omp_outlined
3404 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
3405 // CHECK9-NEXT:  entry:
3406 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3407 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3408 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3409 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3410 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3411 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3412 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3413 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3414 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
3415 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3416 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3417 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3418 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
3419 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3420 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3421 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3422 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3423 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3424 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3425 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3426 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3427 // CHECK9:       cond.true:
3428 // CHECK9-NEXT:    br label [[COND_END:%.*]]
3429 // CHECK9:       cond.false:
3430 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3431 // CHECK9-NEXT:    br label [[COND_END]]
3432 // CHECK9:       cond.end:
3433 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3434 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3435 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3436 // CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
3437 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3438 // CHECK9:       omp.inner.for.cond:
3439 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3440 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3441 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3442 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3443 // CHECK9:       omp.inner.for.body:
3444 // CHECK9-NEXT:    call void @__kmpc_push_num_threads(ptr @[[GLOB3]], i32 [[TMP1]], i32 23)
3445 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3446 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3447 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3448 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3449 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]])
3450 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3451 // CHECK9:       omp.inner.for.inc:
3452 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3453 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3454 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3455 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
3456 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
3457 // CHECK9:       omp.inner.for.end:
3458 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3459 // CHECK9:       omp.loop.exit:
3460 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
3461 // CHECK9-NEXT:    ret void
3462 //
3463 //
3464 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.omp_outlined.omp_outlined
3465 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
3466 // CHECK9-NEXT:  entry:
3467 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3468 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3469 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3470 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3471 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3472 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3473 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3474 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3475 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3476 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3477 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
3478 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3479 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3480 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3481 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3482 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3483 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
3484 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3485 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3486 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3487 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3488 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
3489 // CHECK9-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
3490 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3491 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3492 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3493 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
3494 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3495 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3496 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3497 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3498 // CHECK9:       cond.true:
3499 // CHECK9-NEXT:    br label [[COND_END:%.*]]
3500 // CHECK9:       cond.false:
3501 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3502 // CHECK9-NEXT:    br label [[COND_END]]
3503 // CHECK9:       cond.end:
3504 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3505 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3506 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3507 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
3508 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3509 // CHECK9:       omp.inner.for.cond:
3510 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3511 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3512 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3513 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3514 // CHECK9:       omp.inner.for.body:
3515 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3516 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3517 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3518 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
3519 // CHECK9-NEXT:    invoke void @_Z3foov()
3520 // CHECK9-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
3521 // CHECK9:       invoke.cont:
3522 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3523 // CHECK9:       omp.body.continue:
3524 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3525 // CHECK9:       omp.inner.for.inc:
3526 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3527 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3528 // CHECK9-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
3529 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
3530 // CHECK9:       omp.inner.for.end:
3531 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3532 // CHECK9:       omp.loop.exit:
3533 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
3534 // CHECK9-NEXT:    ret void
3535 // CHECK9:       terminate.lpad:
3536 // CHECK9-NEXT:    [[TMP11:%.*]] = landingpad { ptr, i32 }
3537 // CHECK9-NEXT:            catch ptr null
3538 // CHECK9-NEXT:    [[TMP12:%.*]] = extractvalue { ptr, i32 } [[TMP11]], 0
3539 // CHECK9-NEXT:    call void @__clang_call_terminate(ptr [[TMP12]]) #[[ATTR7]]
3540 // CHECK9-NEXT:    unreachable
3541 //
3542 //
3543 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52
3544 // CHECK9-SAME: () #[[ATTR2]] {
3545 // CHECK9-NEXT:  entry:
3546 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.omp_outlined)
3547 // CHECK9-NEXT:    ret void
3548 //
3549 //
3550 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.omp_outlined
3551 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
3552 // CHECK9-NEXT:  entry:
3553 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3554 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3555 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3556 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3557 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3558 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3559 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3560 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3561 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
3562 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3563 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3564 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3565 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
3566 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3567 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3568 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3569 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3570 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3571 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3572 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3573 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3574 // CHECK9:       cond.true:
3575 // CHECK9-NEXT:    br label [[COND_END:%.*]]
3576 // CHECK9:       cond.false:
3577 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3578 // CHECK9-NEXT:    br label [[COND_END]]
3579 // CHECK9:       cond.end:
3580 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3581 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3582 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3583 // CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
3584 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3585 // CHECK9:       omp.inner.for.cond:
3586 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3587 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3588 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3589 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3590 // CHECK9:       omp.inner.for.body:
3591 // CHECK9-NEXT:    call void @__kmpc_push_num_threads(ptr @[[GLOB3]], i32 [[TMP1]], i32 1)
3592 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3593 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3594 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3595 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3596 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]])
3597 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3598 // CHECK9:       omp.inner.for.inc:
3599 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3600 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3601 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3602 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
3603 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
3604 // CHECK9:       omp.inner.for.end:
3605 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3606 // CHECK9:       omp.loop.exit:
3607 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
3608 // CHECK9-NEXT:    ret void
3609 //
3610 //
3611 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.omp_outlined.omp_outlined
3612 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
3613 // CHECK9-NEXT:  entry:
3614 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3615 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3616 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3617 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3618 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3619 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3620 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3621 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3622 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3623 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3624 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
3625 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3626 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3627 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3628 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3629 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3630 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
3631 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3632 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3633 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3634 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3635 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
3636 // CHECK9-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
3637 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3638 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3639 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3640 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
3641 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3642 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3643 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3644 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3645 // CHECK9:       cond.true:
3646 // CHECK9-NEXT:    br label [[COND_END:%.*]]
3647 // CHECK9:       cond.false:
3648 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3649 // CHECK9-NEXT:    br label [[COND_END]]
3650 // CHECK9:       cond.end:
3651 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3652 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3653 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3654 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
3655 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3656 // CHECK9:       omp.inner.for.cond:
3657 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3658 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3659 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3660 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3661 // CHECK9:       omp.inner.for.body:
3662 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3663 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3664 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3665 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
3666 // CHECK9-NEXT:    invoke void @_Z3foov()
3667 // CHECK9-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
3668 // CHECK9:       invoke.cont:
3669 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3670 // CHECK9:       omp.body.continue:
3671 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3672 // CHECK9:       omp.inner.for.inc:
3673 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3674 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3675 // CHECK9-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
3676 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
3677 // CHECK9:       omp.inner.for.end:
3678 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3679 // CHECK9:       omp.loop.exit:
3680 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
3681 // CHECK9-NEXT:    ret void
3682 // CHECK9:       terminate.lpad:
3683 // CHECK9-NEXT:    [[TMP11:%.*]] = landingpad { ptr, i32 }
3684 // CHECK9-NEXT:            catch ptr null
3685 // CHECK9-NEXT:    [[TMP12:%.*]] = extractvalue { ptr, i32 } [[TMP11]], 0
3686 // CHECK9-NEXT:    call void @__clang_call_terminate(ptr [[TMP12]]) #[[ATTR7]]
3687 // CHECK9-NEXT:    unreachable
3688 //
3689 //
3690 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57
3691 // CHECK9-SAME: () #[[ATTR2]] {
3692 // CHECK9-NEXT:  entry:
3693 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.omp_outlined)
3694 // CHECK9-NEXT:    ret void
3695 //
3696 //
3697 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.omp_outlined
3698 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
3699 // CHECK9-NEXT:  entry:
3700 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3701 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3702 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3703 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3704 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3705 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3706 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3707 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3708 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
3709 // CHECK9-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8
3710 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3711 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3712 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3713 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
3714 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3715 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3716 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3717 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3718 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3719 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3720 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3721 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3722 // CHECK9:       cond.true:
3723 // CHECK9-NEXT:    br label [[COND_END:%.*]]
3724 // CHECK9:       cond.false:
3725 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3726 // CHECK9-NEXT:    br label [[COND_END]]
3727 // CHECK9:       cond.end:
3728 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3729 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3730 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3731 // CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
3732 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3733 // CHECK9:       omp.inner.for.cond:
3734 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3735 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3736 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3737 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3738 // CHECK9:       omp.inner.for.body:
3739 // CHECK9-NEXT:    invoke void @_ZN1SC1El(ptr noundef nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 noundef 23)
3740 // CHECK9-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
3741 // CHECK9:       invoke.cont:
3742 // CHECK9-NEXT:    [[CALL:%.*]] = invoke noundef i8 @_ZN1ScvcEv(ptr noundef nonnull align 8 dereferenceable(24) [[REF_TMP]])
3743 // CHECK9-NEXT:            to label [[INVOKE_CONT2:%.*]] unwind label [[TERMINATE_LPAD]]
3744 // CHECK9:       invoke.cont2:
3745 // CHECK9-NEXT:    [[TMP7:%.*]] = sext i8 [[CALL]] to i32
3746 // CHECK9-NEXT:    call void @__kmpc_push_num_threads(ptr @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]])
3747 // CHECK9-NEXT:    call void @_ZN1SD1Ev(ptr noundef nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR3]]
3748 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3749 // CHECK9-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
3750 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3751 // CHECK9-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
3752 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]])
3753 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3754 // CHECK9:       omp.inner.for.inc:
3755 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3756 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3757 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3758 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
3759 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
3760 // CHECK9:       omp.inner.for.end:
3761 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3762 // CHECK9:       omp.loop.exit:
3763 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
3764 // CHECK9-NEXT:    ret void
3765 // CHECK9:       terminate.lpad:
3766 // CHECK9-NEXT:    [[TMP14:%.*]] = landingpad { ptr, i32 }
3767 // CHECK9-NEXT:            catch ptr null
3768 // CHECK9-NEXT:    [[TMP15:%.*]] = extractvalue { ptr, i32 } [[TMP14]], 0
3769 // CHECK9-NEXT:    call void @__clang_call_terminate(ptr [[TMP15]]) #[[ATTR7]]
3770 // CHECK9-NEXT:    unreachable
3771 //
3772 //
3773 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.omp_outlined.omp_outlined
3774 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
3775 // CHECK9-NEXT:  entry:
3776 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3777 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3778 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3779 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3780 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3781 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3782 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3783 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3784 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3785 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3786 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
3787 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3788 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3789 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3790 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3791 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3792 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
3793 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3794 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3795 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3796 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3797 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
3798 // CHECK9-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
3799 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3800 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3801 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3802 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
3803 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3804 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3805 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3806 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3807 // CHECK9:       cond.true:
3808 // CHECK9-NEXT:    br label [[COND_END:%.*]]
3809 // CHECK9:       cond.false:
3810 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3811 // CHECK9-NEXT:    br label [[COND_END]]
3812 // CHECK9:       cond.end:
3813 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3814 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3815 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3816 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
3817 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3818 // CHECK9:       omp.inner.for.cond:
3819 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3820 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3821 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3822 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3823 // CHECK9:       omp.inner.for.body:
3824 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3825 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3826 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3827 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
3828 // CHECK9-NEXT:    invoke void @_Z3foov()
3829 // CHECK9-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
3830 // CHECK9:       invoke.cont:
3831 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3832 // CHECK9:       omp.body.continue:
3833 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3834 // CHECK9:       omp.inner.for.inc:
3835 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3836 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3837 // CHECK9-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
3838 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
3839 // CHECK9:       omp.inner.for.end:
3840 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3841 // CHECK9:       omp.loop.exit:
3842 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
3843 // CHECK9-NEXT:    ret void
3844 // CHECK9:       terminate.lpad:
3845 // CHECK9-NEXT:    [[TMP11:%.*]] = landingpad { ptr, i32 }
3846 // CHECK9-NEXT:            catch ptr null
3847 // CHECK9-NEXT:    [[TMP12:%.*]] = extractvalue { ptr, i32 } [[TMP11]], 0
3848 // CHECK9-NEXT:    call void @__clang_call_terminate(ptr [[TMP12]]) #[[ATTR7]]
3849 // CHECK9-NEXT:    unreachable
3850 //
3851 //
3852 // CHECK13-LABEL: define {{[^@]+}}@main
3853 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] personality ptr @__gxx_personality_v0 {
3854 // CHECK13-NEXT:  entry:
3855 // CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3856 // CHECK13-NEXT:    [[S:%.*]] = alloca [[STRUCT_S:%.*]], align 8
3857 // CHECK13-NEXT:    [[A:%.*]] = alloca i8, align 1
3858 // CHECK13-NEXT:    [[EXN_SLOT:%.*]] = alloca ptr, align 8
3859 // CHECK13-NEXT:    [[EHSELECTOR_SLOT:%.*]] = alloca i32, align 4
3860 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3861 // CHECK13-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
3862 // CHECK13-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
3863 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
3864 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
3865 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
3866 // CHECK13-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
3867 // CHECK13-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3868 // CHECK13-NEXT:    store i32 0, ptr [[RETVAL]], align 4
3869 // CHECK13-NEXT:    call void @_ZN1SC1El(ptr noundef nonnull align 8 dereferenceable(24) [[S]], i64 noundef 0)
3870 // CHECK13-NEXT:    [[CALL:%.*]] = invoke noundef i8 @_ZN1ScvcEv(ptr noundef nonnull align 8 dereferenceable(24) [[S]])
3871 // CHECK13-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[LPAD:%.*]]
3872 // CHECK13:       invoke.cont:
3873 // CHECK13-NEXT:    store i8 [[CALL]], ptr [[A]], align 1
3874 // CHECK13-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
3875 // CHECK13-NEXT:    store i32 3, ptr [[TMP0]], align 4
3876 // CHECK13-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
3877 // CHECK13-NEXT:    store i32 0, ptr [[TMP1]], align 4
3878 // CHECK13-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
3879 // CHECK13-NEXT:    store ptr null, ptr [[TMP2]], align 8
3880 // CHECK13-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
3881 // CHECK13-NEXT:    store ptr null, ptr [[TMP3]], align 8
3882 // CHECK13-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
3883 // CHECK13-NEXT:    store ptr null, ptr [[TMP4]], align 8
3884 // CHECK13-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
3885 // CHECK13-NEXT:    store ptr null, ptr [[TMP5]], align 8
3886 // CHECK13-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
3887 // CHECK13-NEXT:    store ptr null, ptr [[TMP6]], align 8
3888 // CHECK13-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
3889 // CHECK13-NEXT:    store ptr null, ptr [[TMP7]], align 8
3890 // CHECK13-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
3891 // CHECK13-NEXT:    store i64 100, ptr [[TMP8]], align 8
3892 // CHECK13-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
3893 // CHECK13-NEXT:    store i64 0, ptr [[TMP9]], align 8
3894 // CHECK13-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
3895 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
3896 // CHECK13-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
3897 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
3898 // CHECK13-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
3899 // CHECK13-NEXT:    store i32 0, ptr [[TMP12]], align 4
3900 // CHECK13-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.region_id, ptr [[KERNEL_ARGS]])
3901 // CHECK13-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
3902 // CHECK13-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3903 // CHECK13:       omp_offload.failed:
3904 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68() #[[ATTR3:[0-9]+]]
3905 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3906 // CHECK13:       lpad:
3907 // CHECK13-NEXT:    [[TMP15:%.*]] = landingpad { ptr, i32 }
3908 // CHECK13-NEXT:            cleanup
3909 // CHECK13-NEXT:    [[TMP16:%.*]] = extractvalue { ptr, i32 } [[TMP15]], 0
3910 // CHECK13-NEXT:    store ptr [[TMP16]], ptr [[EXN_SLOT]], align 8
3911 // CHECK13-NEXT:    [[TMP17:%.*]] = extractvalue { ptr, i32 } [[TMP15]], 1
3912 // CHECK13-NEXT:    store i32 [[TMP17]], ptr [[EHSELECTOR_SLOT]], align 4
3913 // CHECK13-NEXT:    call void @_ZN1SD1Ev(ptr noundef nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR3]]
3914 // CHECK13-NEXT:    br label [[EH_RESUME:%.*]]
3915 // CHECK13:       omp_offload.cont:
3916 // CHECK13-NEXT:    [[TMP18:%.*]] = load i8, ptr [[A]], align 1
3917 // CHECK13-NEXT:    store i8 [[TMP18]], ptr [[A_CASTED]], align 1
3918 // CHECK13-NEXT:    [[TMP19:%.*]] = load i64, ptr [[A_CASTED]], align 8
3919 // CHECK13-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3920 // CHECK13-NEXT:    store i64 [[TMP19]], ptr [[TMP20]], align 8
3921 // CHECK13-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3922 // CHECK13-NEXT:    store i64 [[TMP19]], ptr [[TMP21]], align 8
3923 // CHECK13-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3924 // CHECK13-NEXT:    store ptr null, ptr [[TMP22]], align 8
3925 // CHECK13-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3926 // CHECK13-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3927 // CHECK13-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
3928 // CHECK13-NEXT:    store i32 3, ptr [[TMP25]], align 4
3929 // CHECK13-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
3930 // CHECK13-NEXT:    store i32 1, ptr [[TMP26]], align 4
3931 // CHECK13-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
3932 // CHECK13-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 8
3933 // CHECK13-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
3934 // CHECK13-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 8
3935 // CHECK13-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
3936 // CHECK13-NEXT:    store ptr @.offload_sizes, ptr [[TMP29]], align 8
3937 // CHECK13-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
3938 // CHECK13-NEXT:    store ptr @.offload_maptypes, ptr [[TMP30]], align 8
3939 // CHECK13-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
3940 // CHECK13-NEXT:    store ptr null, ptr [[TMP31]], align 8
3941 // CHECK13-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
3942 // CHECK13-NEXT:    store ptr null, ptr [[TMP32]], align 8
3943 // CHECK13-NEXT:    [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
3944 // CHECK13-NEXT:    store i64 100, ptr [[TMP33]], align 8
3945 // CHECK13-NEXT:    [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
3946 // CHECK13-NEXT:    store i64 0, ptr [[TMP34]], align 8
3947 // CHECK13-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
3948 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
3949 // CHECK13-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
3950 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
3951 // CHECK13-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
3952 // CHECK13-NEXT:    store i32 0, ptr [[TMP37]], align 4
3953 // CHECK13-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.region_id, ptr [[KERNEL_ARGS2]])
3954 // CHECK13-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
3955 // CHECK13-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
3956 // CHECK13:       omp_offload.failed3:
3957 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74(i64 [[TMP19]]) #[[ATTR3]]
3958 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
3959 // CHECK13:       omp_offload.cont4:
3960 // CHECK13-NEXT:    [[TMP40:%.*]] = load i8, ptr [[A]], align 1
3961 // CHECK13-NEXT:    [[CONV:%.*]] = sext i8 [[TMP40]] to i32
3962 // CHECK13-NEXT:    [[CALL6:%.*]] = invoke noundef i32 @_Z5tmainIcLi5EEiv()
3963 // CHECK13-NEXT:            to label [[INVOKE_CONT5:%.*]] unwind label [[LPAD]]
3964 // CHECK13:       invoke.cont5:
3965 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV]], [[CALL6]]
3966 // CHECK13-NEXT:    [[CALL8:%.*]] = invoke noundef i32 @_Z5tmainI1SLi1EEiv()
3967 // CHECK13-NEXT:            to label [[INVOKE_CONT7:%.*]] unwind label [[LPAD]]
3968 // CHECK13:       invoke.cont7:
3969 // CHECK13-NEXT:    [[ADD9:%.*]] = add nsw i32 [[ADD]], [[CALL8]]
3970 // CHECK13-NEXT:    store i32 [[ADD9]], ptr [[RETVAL]], align 4
3971 // CHECK13-NEXT:    call void @_ZN1SD1Ev(ptr noundef nonnull align 8 dereferenceable(24) [[S]]) #[[ATTR3]]
3972 // CHECK13-NEXT:    [[TMP41:%.*]] = load i32, ptr [[RETVAL]], align 4
3973 // CHECK13-NEXT:    ret i32 [[TMP41]]
3974 // CHECK13:       eh.resume:
3975 // CHECK13-NEXT:    [[EXN:%.*]] = load ptr, ptr [[EXN_SLOT]], align 8
3976 // CHECK13-NEXT:    [[SEL:%.*]] = load i32, ptr [[EHSELECTOR_SLOT]], align 4
3977 // CHECK13-NEXT:    [[LPAD_VAL:%.*]] = insertvalue { ptr, i32 } poison, ptr [[EXN]], 0
3978 // CHECK13-NEXT:    [[LPAD_VAL10:%.*]] = insertvalue { ptr, i32 } [[LPAD_VAL]], i32 [[SEL]], 1
3979 // CHECK13-NEXT:    resume { ptr, i32 } [[LPAD_VAL10]]
3980 //
3981 //
3982 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SC1El
3983 // CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {
3984 // CHECK13-NEXT:  entry:
3985 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3986 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
3987 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3988 // CHECK13-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
3989 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3990 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8
3991 // CHECK13-NEXT:    call void @_ZN1SC2El(ptr noundef nonnull align 8 dereferenceable(24) [[THIS1]], i64 noundef [[TMP0]])
3992 // CHECK13-NEXT:    ret void
3993 //
3994 //
3995 // CHECK13-LABEL: define {{[^@]+}}@_ZN1ScvcEv
3996 // CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) #[[ATTR1]] comdat {
3997 // CHECK13-NEXT:  entry:
3998 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3999 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
4000 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
4001 // CHECK13-NEXT:    call void @_Z8mayThrowv()
4002 // CHECK13-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
4003 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[A]], align 8
4004 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i8
4005 // CHECK13-NEXT:    ret i8 [[CONV]]
4006 //
4007 //
4008 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
4009 // CHECK13-SAME: () #[[ATTR2:[0-9]+]] {
4010 // CHECK13-NEXT:  entry:
4011 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined)
4012 // CHECK13-NEXT:    ret void
4013 //
4014 //
4015 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined
4016 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
4017 // CHECK13-NEXT:  entry:
4018 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4019 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4020 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4021 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4022 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4023 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4024 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4025 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4026 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
4027 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4028 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4029 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
4030 // CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
4031 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4032 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4033 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4034 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4035 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4036 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4037 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4038 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4039 // CHECK13:       cond.true:
4040 // CHECK13-NEXT:    br label [[COND_END:%.*]]
4041 // CHECK13:       cond.false:
4042 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4043 // CHECK13-NEXT:    br label [[COND_END]]
4044 // CHECK13:       cond.end:
4045 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4046 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
4047 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4048 // CHECK13-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
4049 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4050 // CHECK13:       omp.inner.for.cond:
4051 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4052 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4053 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4054 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4055 // CHECK13:       omp.inner.for.body:
4056 // CHECK13-NEXT:    call void @__kmpc_push_num_threads(ptr @[[GLOB3]], i32 [[TMP1]], i32 2)
4057 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4058 // CHECK13-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4059 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4060 // CHECK13-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4061 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]])
4062 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4063 // CHECK13:       omp.inner.for.inc:
4064 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4065 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
4066 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4067 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
4068 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
4069 // CHECK13:       omp.inner.for.end:
4070 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4071 // CHECK13:       omp.loop.exit:
4072 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
4073 // CHECK13-NEXT:    ret void
4074 //
4075 //
4076 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined
4077 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
4078 // CHECK13-NEXT:  entry:
4079 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4080 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4081 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4082 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4083 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4084 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4085 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4086 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4087 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4088 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4089 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
4090 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4091 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4092 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4093 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4094 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
4095 // CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
4096 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4097 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4098 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4099 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4100 // CHECK13-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
4101 // CHECK13-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
4102 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4103 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4104 // CHECK13-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4105 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
4106 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4107 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4108 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4109 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4110 // CHECK13:       cond.true:
4111 // CHECK13-NEXT:    br label [[COND_END:%.*]]
4112 // CHECK13:       cond.false:
4113 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4114 // CHECK13-NEXT:    br label [[COND_END]]
4115 // CHECK13:       cond.end:
4116 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4117 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
4118 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4119 // CHECK13-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
4120 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4121 // CHECK13:       omp.inner.for.cond:
4122 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4123 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4124 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4125 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4126 // CHECK13:       omp.inner.for.body:
4127 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4128 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4129 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4130 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
4131 // CHECK13-NEXT:    invoke void @_Z3foov()
4132 // CHECK13-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
4133 // CHECK13:       invoke.cont:
4134 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4135 // CHECK13:       omp.body.continue:
4136 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4137 // CHECK13:       omp.inner.for.inc:
4138 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4139 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4140 // CHECK13-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
4141 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
4142 // CHECK13:       omp.inner.for.end:
4143 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4144 // CHECK13:       omp.loop.exit:
4145 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
4146 // CHECK13-NEXT:    ret void
4147 // CHECK13:       terminate.lpad:
4148 // CHECK13-NEXT:    [[TMP11:%.*]] = landingpad { ptr, i32 }
4149 // CHECK13-NEXT:            catch ptr null
4150 // CHECK13-NEXT:    [[TMP12:%.*]] = extractvalue { ptr, i32 } [[TMP11]], 0
4151 // CHECK13-NEXT:    call void @__clang_call_terminate(ptr [[TMP12]]) #[[ATTR7:[0-9]+]]
4152 // CHECK13-NEXT:    unreachable
4153 //
4154 //
4155 // CHECK13-LABEL: define {{[^@]+}}@__clang_call_terminate
4156 // CHECK13-SAME: (ptr noundef [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat {
4157 // CHECK13-NEXT:    [[TMP2:%.*]] = call ptr @__cxa_begin_catch(ptr [[TMP0]]) #[[ATTR3]]
4158 // CHECK13-NEXT:    call void @_ZSt9terminatev() #[[ATTR7]]
4159 // CHECK13-NEXT:    unreachable
4160 //
4161 //
4162 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74
4163 // CHECK13-SAME: (i64 noundef [[A:%.*]]) #[[ATTR2]] {
4164 // CHECK13-NEXT:  entry:
4165 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
4166 // CHECK13-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
4167 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.omp_outlined, ptr [[A_ADDR]])
4168 // CHECK13-NEXT:    ret void
4169 //
4170 //
4171 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.omp_outlined
4172 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR2]] {
4173 // CHECK13-NEXT:  entry:
4174 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4175 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4176 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
4177 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4178 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4179 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4180 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4181 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4182 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4183 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
4184 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4185 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4186 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
4187 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
4188 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
4189 // CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
4190 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4191 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4192 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4193 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
4194 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4195 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4196 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
4197 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4198 // CHECK13:       cond.true:
4199 // CHECK13-NEXT:    br label [[COND_END:%.*]]
4200 // CHECK13:       cond.false:
4201 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4202 // CHECK13-NEXT:    br label [[COND_END]]
4203 // CHECK13:       cond.end:
4204 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4205 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
4206 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4207 // CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
4208 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4209 // CHECK13:       omp.inner.for.cond:
4210 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4211 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4212 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4213 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4214 // CHECK13:       omp.inner.for.body:
4215 // CHECK13-NEXT:    [[TMP8:%.*]] = load i8, ptr [[TMP0]], align 1
4216 // CHECK13-NEXT:    [[TMP9:%.*]] = sext i8 [[TMP8]] to i32
4217 // CHECK13-NEXT:    call void @__kmpc_push_num_threads(ptr @[[GLOB3]], i32 [[TMP2]], i32 [[TMP9]])
4218 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4219 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
4220 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4221 // CHECK13-NEXT:    [[TMP13:%.*]] = zext i32 [[TMP12]] to i64
4222 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.omp_outlined.omp_outlined, i64 [[TMP11]], i64 [[TMP13]])
4223 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4224 // CHECK13:       omp.inner.for.inc:
4225 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4226 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
4227 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
4228 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
4229 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
4230 // CHECK13:       omp.inner.for.end:
4231 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4232 // CHECK13:       omp.loop.exit:
4233 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
4234 // CHECK13-NEXT:    ret void
4235 //
4236 //
4237 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l74.omp_outlined.omp_outlined
4238 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
4239 // CHECK13-NEXT:  entry:
4240 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4241 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4242 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4243 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4244 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4245 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4246 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4247 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4248 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4249 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4250 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
4251 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4252 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4253 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4254 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4255 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
4256 // CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
4257 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4258 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4259 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4260 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4261 // CHECK13-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
4262 // CHECK13-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
4263 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4264 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4265 // CHECK13-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4266 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
4267 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4268 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4269 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4270 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4271 // CHECK13:       cond.true:
4272 // CHECK13-NEXT:    br label [[COND_END:%.*]]
4273 // CHECK13:       cond.false:
4274 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4275 // CHECK13-NEXT:    br label [[COND_END]]
4276 // CHECK13:       cond.end:
4277 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4278 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
4279 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4280 // CHECK13-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
4281 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4282 // CHECK13:       omp.inner.for.cond:
4283 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4284 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4285 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4286 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4287 // CHECK13:       omp.inner.for.body:
4288 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4289 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4290 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4291 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
4292 // CHECK13-NEXT:    invoke void @_Z3foov()
4293 // CHECK13-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
4294 // CHECK13:       invoke.cont:
4295 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4296 // CHECK13:       omp.body.continue:
4297 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4298 // CHECK13:       omp.inner.for.inc:
4299 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4300 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4301 // CHECK13-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
4302 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
4303 // CHECK13:       omp.inner.for.end:
4304 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4305 // CHECK13:       omp.loop.exit:
4306 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
4307 // CHECK13-NEXT:    ret void
4308 // CHECK13:       terminate.lpad:
4309 // CHECK13-NEXT:    [[TMP11:%.*]] = landingpad { ptr, i32 }
4310 // CHECK13-NEXT:            catch ptr null
4311 // CHECK13-NEXT:    [[TMP12:%.*]] = extractvalue { ptr, i32 } [[TMP11]], 0
4312 // CHECK13-NEXT:    call void @__clang_call_terminate(ptr [[TMP12]]) #[[ATTR7]]
4313 // CHECK13-NEXT:    unreachable
4314 //
4315 //
4316 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIcLi5EEiv
4317 // CHECK13-SAME: () #[[ATTR6:[0-9]+]] comdat {
4318 // CHECK13-NEXT:  entry:
4319 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4320 // CHECK13-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
4321 // CHECK13-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
4322 // CHECK13-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4323 // CHECK13-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
4324 // CHECK13-NEXT:    store i32 3, ptr [[TMP0]], align 4
4325 // CHECK13-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
4326 // CHECK13-NEXT:    store i32 0, ptr [[TMP1]], align 4
4327 // CHECK13-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
4328 // CHECK13-NEXT:    store ptr null, ptr [[TMP2]], align 8
4329 // CHECK13-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
4330 // CHECK13-NEXT:    store ptr null, ptr [[TMP3]], align 8
4331 // CHECK13-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
4332 // CHECK13-NEXT:    store ptr null, ptr [[TMP4]], align 8
4333 // CHECK13-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
4334 // CHECK13-NEXT:    store ptr null, ptr [[TMP5]], align 8
4335 // CHECK13-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
4336 // CHECK13-NEXT:    store ptr null, ptr [[TMP6]], align 8
4337 // CHECK13-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
4338 // CHECK13-NEXT:    store ptr null, ptr [[TMP7]], align 8
4339 // CHECK13-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
4340 // CHECK13-NEXT:    store i64 100, ptr [[TMP8]], align 8
4341 // CHECK13-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
4342 // CHECK13-NEXT:    store i64 0, ptr [[TMP9]], align 8
4343 // CHECK13-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
4344 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
4345 // CHECK13-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
4346 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
4347 // CHECK13-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
4348 // CHECK13-NEXT:    store i32 0, ptr [[TMP12]], align 4
4349 // CHECK13-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.region_id, ptr [[KERNEL_ARGS]])
4350 // CHECK13-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
4351 // CHECK13-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4352 // CHECK13:       omp_offload.failed:
4353 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52() #[[ATTR3]]
4354 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4355 // CHECK13:       omp_offload.cont:
4356 // CHECK13-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
4357 // CHECK13-NEXT:    store i32 3, ptr [[TMP15]], align 4
4358 // CHECK13-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
4359 // CHECK13-NEXT:    store i32 0, ptr [[TMP16]], align 4
4360 // CHECK13-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
4361 // CHECK13-NEXT:    store ptr null, ptr [[TMP17]], align 8
4362 // CHECK13-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
4363 // CHECK13-NEXT:    store ptr null, ptr [[TMP18]], align 8
4364 // CHECK13-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
4365 // CHECK13-NEXT:    store ptr null, ptr [[TMP19]], align 8
4366 // CHECK13-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
4367 // CHECK13-NEXT:    store ptr null, ptr [[TMP20]], align 8
4368 // CHECK13-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
4369 // CHECK13-NEXT:    store ptr null, ptr [[TMP21]], align 8
4370 // CHECK13-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
4371 // CHECK13-NEXT:    store ptr null, ptr [[TMP22]], align 8
4372 // CHECK13-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
4373 // CHECK13-NEXT:    store i64 100, ptr [[TMP23]], align 8
4374 // CHECK13-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
4375 // CHECK13-NEXT:    store i64 0, ptr [[TMP24]], align 8
4376 // CHECK13-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
4377 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
4378 // CHECK13-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
4379 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4
4380 // CHECK13-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
4381 // CHECK13-NEXT:    store i32 0, ptr [[TMP27]], align 4
4382 // CHECK13-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.region_id, ptr [[KERNEL_ARGS2]])
4383 // CHECK13-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
4384 // CHECK13-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
4385 // CHECK13:       omp_offload.failed3:
4386 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57() #[[ATTR3]]
4387 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
4388 // CHECK13:       omp_offload.cont4:
4389 // CHECK13-NEXT:    ret i32 0
4390 //
4391 //
4392 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainI1SLi1EEiv
4393 // CHECK13-SAME: () #[[ATTR6]] comdat {
4394 // CHECK13-NEXT:  entry:
4395 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4396 // CHECK13-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
4397 // CHECK13-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
4398 // CHECK13-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4399 // CHECK13-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
4400 // CHECK13-NEXT:    store i32 3, ptr [[TMP0]], align 4
4401 // CHECK13-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
4402 // CHECK13-NEXT:    store i32 0, ptr [[TMP1]], align 4
4403 // CHECK13-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
4404 // CHECK13-NEXT:    store ptr null, ptr [[TMP2]], align 8
4405 // CHECK13-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
4406 // CHECK13-NEXT:    store ptr null, ptr [[TMP3]], align 8
4407 // CHECK13-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
4408 // CHECK13-NEXT:    store ptr null, ptr [[TMP4]], align 8
4409 // CHECK13-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
4410 // CHECK13-NEXT:    store ptr null, ptr [[TMP5]], align 8
4411 // CHECK13-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
4412 // CHECK13-NEXT:    store ptr null, ptr [[TMP6]], align 8
4413 // CHECK13-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
4414 // CHECK13-NEXT:    store ptr null, ptr [[TMP7]], align 8
4415 // CHECK13-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
4416 // CHECK13-NEXT:    store i64 100, ptr [[TMP8]], align 8
4417 // CHECK13-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
4418 // CHECK13-NEXT:    store i64 0, ptr [[TMP9]], align 8
4419 // CHECK13-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
4420 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
4421 // CHECK13-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
4422 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
4423 // CHECK13-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
4424 // CHECK13-NEXT:    store i32 0, ptr [[TMP12]], align 4
4425 // CHECK13-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.region_id, ptr [[KERNEL_ARGS]])
4426 // CHECK13-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
4427 // CHECK13-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4428 // CHECK13:       omp_offload.failed:
4429 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52() #[[ATTR3]]
4430 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4431 // CHECK13:       omp_offload.cont:
4432 // CHECK13-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
4433 // CHECK13-NEXT:    store i32 3, ptr [[TMP15]], align 4
4434 // CHECK13-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
4435 // CHECK13-NEXT:    store i32 0, ptr [[TMP16]], align 4
4436 // CHECK13-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
4437 // CHECK13-NEXT:    store ptr null, ptr [[TMP17]], align 8
4438 // CHECK13-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
4439 // CHECK13-NEXT:    store ptr null, ptr [[TMP18]], align 8
4440 // CHECK13-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
4441 // CHECK13-NEXT:    store ptr null, ptr [[TMP19]], align 8
4442 // CHECK13-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
4443 // CHECK13-NEXT:    store ptr null, ptr [[TMP20]], align 8
4444 // CHECK13-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
4445 // CHECK13-NEXT:    store ptr null, ptr [[TMP21]], align 8
4446 // CHECK13-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
4447 // CHECK13-NEXT:    store ptr null, ptr [[TMP22]], align 8
4448 // CHECK13-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
4449 // CHECK13-NEXT:    store i64 100, ptr [[TMP23]], align 8
4450 // CHECK13-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
4451 // CHECK13-NEXT:    store i64 0, ptr [[TMP24]], align 8
4452 // CHECK13-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
4453 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
4454 // CHECK13-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
4455 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4
4456 // CHECK13-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
4457 // CHECK13-NEXT:    store i32 0, ptr [[TMP27]], align 4
4458 // CHECK13-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.region_id, ptr [[KERNEL_ARGS2]])
4459 // CHECK13-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
4460 // CHECK13-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
4461 // CHECK13:       omp_offload.failed3:
4462 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57() #[[ATTR3]]
4463 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
4464 // CHECK13:       omp_offload.cont4:
4465 // CHECK13-NEXT:    ret i32 0
4466 //
4467 //
4468 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SD1Ev
4469 // CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat {
4470 // CHECK13-NEXT:  entry:
4471 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
4472 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
4473 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
4474 // CHECK13-NEXT:    call void @_ZN1SD2Ev(ptr noundef nonnull align 8 dereferenceable(24) [[THIS1]]) #[[ATTR3]]
4475 // CHECK13-NEXT:    ret void
4476 //
4477 //
4478 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SC2El
4479 // CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], i64 noundef [[A:%.*]]) unnamed_addr #[[ATTR6]] comdat {
4480 // CHECK13-NEXT:  entry:
4481 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
4482 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
4483 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
4484 // CHECK13-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
4485 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
4486 // CHECK13-NEXT:    [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
4487 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[A_ADDR]], align 8
4488 // CHECK13-NEXT:    store i64 [[TMP0]], ptr [[A2]], align 8
4489 // CHECK13-NEXT:    ret void
4490 //
4491 //
4492 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52
4493 // CHECK13-SAME: () #[[ATTR2]] {
4494 // CHECK13-NEXT:  entry:
4495 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.omp_outlined)
4496 // CHECK13-NEXT:    ret void
4497 //
4498 //
4499 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.omp_outlined
4500 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
4501 // CHECK13-NEXT:  entry:
4502 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4503 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4504 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4505 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4506 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4507 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4508 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4509 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4510 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
4511 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4512 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4513 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
4514 // CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
4515 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4516 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4517 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4518 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4519 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4520 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4521 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4522 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4523 // CHECK13:       cond.true:
4524 // CHECK13-NEXT:    br label [[COND_END:%.*]]
4525 // CHECK13:       cond.false:
4526 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4527 // CHECK13-NEXT:    br label [[COND_END]]
4528 // CHECK13:       cond.end:
4529 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4530 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
4531 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4532 // CHECK13-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
4533 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4534 // CHECK13:       omp.inner.for.cond:
4535 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4536 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4537 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4538 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4539 // CHECK13:       omp.inner.for.body:
4540 // CHECK13-NEXT:    call void @__kmpc_push_num_threads(ptr @[[GLOB3]], i32 [[TMP1]], i32 5)
4541 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4542 // CHECK13-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4543 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4544 // CHECK13-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4545 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]])
4546 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4547 // CHECK13:       omp.inner.for.inc:
4548 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4549 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
4550 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4551 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
4552 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
4553 // CHECK13:       omp.inner.for.end:
4554 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4555 // CHECK13:       omp.loop.exit:
4556 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
4557 // CHECK13-NEXT:    ret void
4558 //
4559 //
4560 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l52.omp_outlined.omp_outlined
4561 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
4562 // CHECK13-NEXT:  entry:
4563 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4564 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4565 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4566 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4567 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4568 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4569 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4570 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4571 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4572 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4573 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
4574 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4575 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4576 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4577 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4578 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
4579 // CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
4580 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4581 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4582 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4583 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4584 // CHECK13-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
4585 // CHECK13-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
4586 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4587 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4588 // CHECK13-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4589 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
4590 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4591 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4592 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4593 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4594 // CHECK13:       cond.true:
4595 // CHECK13-NEXT:    br label [[COND_END:%.*]]
4596 // CHECK13:       cond.false:
4597 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4598 // CHECK13-NEXT:    br label [[COND_END]]
4599 // CHECK13:       cond.end:
4600 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4601 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
4602 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4603 // CHECK13-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
4604 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4605 // CHECK13:       omp.inner.for.cond:
4606 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4607 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4608 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4609 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4610 // CHECK13:       omp.inner.for.body:
4611 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4612 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4613 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4614 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
4615 // CHECK13-NEXT:    invoke void @_Z3foov()
4616 // CHECK13-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
4617 // CHECK13:       invoke.cont:
4618 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4619 // CHECK13:       omp.body.continue:
4620 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4621 // CHECK13:       omp.inner.for.inc:
4622 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4623 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4624 // CHECK13-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
4625 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
4626 // CHECK13:       omp.inner.for.end:
4627 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4628 // CHECK13:       omp.loop.exit:
4629 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
4630 // CHECK13-NEXT:    ret void
4631 // CHECK13:       terminate.lpad:
4632 // CHECK13-NEXT:    [[TMP11:%.*]] = landingpad { ptr, i32 }
4633 // CHECK13-NEXT:            catch ptr null
4634 // CHECK13-NEXT:    [[TMP12:%.*]] = extractvalue { ptr, i32 } [[TMP11]], 0
4635 // CHECK13-NEXT:    call void @__clang_call_terminate(ptr [[TMP12]]) #[[ATTR7]]
4636 // CHECK13-NEXT:    unreachable
4637 //
4638 //
4639 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57
4640 // CHECK13-SAME: () #[[ATTR2]] {
4641 // CHECK13-NEXT:  entry:
4642 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.omp_outlined)
4643 // CHECK13-NEXT:    ret void
4644 //
4645 //
4646 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.omp_outlined
4647 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
4648 // CHECK13-NEXT:  entry:
4649 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4650 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4651 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4652 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4653 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4654 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4655 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4656 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4657 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
4658 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4659 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4660 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
4661 // CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
4662 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4663 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4664 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4665 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4666 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4667 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4668 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4669 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4670 // CHECK13:       cond.true:
4671 // CHECK13-NEXT:    br label [[COND_END:%.*]]
4672 // CHECK13:       cond.false:
4673 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4674 // CHECK13-NEXT:    br label [[COND_END]]
4675 // CHECK13:       cond.end:
4676 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4677 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
4678 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4679 // CHECK13-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
4680 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4681 // CHECK13:       omp.inner.for.cond:
4682 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4683 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4684 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4685 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4686 // CHECK13:       omp.inner.for.body:
4687 // CHECK13-NEXT:    call void @__kmpc_push_num_threads(ptr @[[GLOB3]], i32 [[TMP1]], i32 23)
4688 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4689 // CHECK13-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4690 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4691 // CHECK13-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4692 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]])
4693 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4694 // CHECK13:       omp.inner.for.inc:
4695 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4696 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
4697 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4698 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
4699 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
4700 // CHECK13:       omp.inner.for.end:
4701 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4702 // CHECK13:       omp.loop.exit:
4703 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
4704 // CHECK13-NEXT:    ret void
4705 //
4706 //
4707 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIcLi5EEiv_l57.omp_outlined.omp_outlined
4708 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
4709 // CHECK13-NEXT:  entry:
4710 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4711 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4712 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4713 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4714 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4715 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4716 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4717 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4718 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4719 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4720 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
4721 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4722 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4723 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4724 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4725 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
4726 // CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
4727 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4728 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4729 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4730 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4731 // CHECK13-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
4732 // CHECK13-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
4733 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4734 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4735 // CHECK13-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4736 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
4737 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4738 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4739 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4740 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4741 // CHECK13:       cond.true:
4742 // CHECK13-NEXT:    br label [[COND_END:%.*]]
4743 // CHECK13:       cond.false:
4744 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4745 // CHECK13-NEXT:    br label [[COND_END]]
4746 // CHECK13:       cond.end:
4747 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4748 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
4749 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4750 // CHECK13-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
4751 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4752 // CHECK13:       omp.inner.for.cond:
4753 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4754 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4755 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4756 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4757 // CHECK13:       omp.inner.for.body:
4758 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4759 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4760 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4761 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
4762 // CHECK13-NEXT:    invoke void @_Z3foov()
4763 // CHECK13-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
4764 // CHECK13:       invoke.cont:
4765 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4766 // CHECK13:       omp.body.continue:
4767 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4768 // CHECK13:       omp.inner.for.inc:
4769 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4770 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4771 // CHECK13-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
4772 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
4773 // CHECK13:       omp.inner.for.end:
4774 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4775 // CHECK13:       omp.loop.exit:
4776 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
4777 // CHECK13-NEXT:    ret void
4778 // CHECK13:       terminate.lpad:
4779 // CHECK13-NEXT:    [[TMP11:%.*]] = landingpad { ptr, i32 }
4780 // CHECK13-NEXT:            catch ptr null
4781 // CHECK13-NEXT:    [[TMP12:%.*]] = extractvalue { ptr, i32 } [[TMP11]], 0
4782 // CHECK13-NEXT:    call void @__clang_call_terminate(ptr [[TMP12]]) #[[ATTR7]]
4783 // CHECK13-NEXT:    unreachable
4784 //
4785 //
4786 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52
4787 // CHECK13-SAME: () #[[ATTR2]] {
4788 // CHECK13-NEXT:  entry:
4789 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.omp_outlined)
4790 // CHECK13-NEXT:    ret void
4791 //
4792 //
4793 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.omp_outlined
4794 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
4795 // CHECK13-NEXT:  entry:
4796 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4797 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4798 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4799 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4800 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4801 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4802 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4803 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4804 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
4805 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4806 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4807 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
4808 // CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
4809 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4810 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4811 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4812 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4813 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4814 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4815 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4816 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4817 // CHECK13:       cond.true:
4818 // CHECK13-NEXT:    br label [[COND_END:%.*]]
4819 // CHECK13:       cond.false:
4820 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4821 // CHECK13-NEXT:    br label [[COND_END]]
4822 // CHECK13:       cond.end:
4823 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4824 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
4825 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4826 // CHECK13-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
4827 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4828 // CHECK13:       omp.inner.for.cond:
4829 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4830 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4831 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4832 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4833 // CHECK13:       omp.inner.for.body:
4834 // CHECK13-NEXT:    call void @__kmpc_push_num_threads(ptr @[[GLOB3]], i32 [[TMP1]], i32 1)
4835 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4836 // CHECK13-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4837 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4838 // CHECK13-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4839 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]])
4840 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4841 // CHECK13:       omp.inner.for.inc:
4842 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4843 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
4844 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4845 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
4846 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
4847 // CHECK13:       omp.inner.for.end:
4848 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4849 // CHECK13:       omp.loop.exit:
4850 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
4851 // CHECK13-NEXT:    ret void
4852 //
4853 //
4854 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l52.omp_outlined.omp_outlined
4855 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
4856 // CHECK13-NEXT:  entry:
4857 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4858 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4859 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4860 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4861 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4862 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4863 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4864 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4865 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4866 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4867 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
4868 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4869 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4870 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4871 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4872 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
4873 // CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
4874 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4875 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4876 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4877 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4878 // CHECK13-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
4879 // CHECK13-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
4880 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4881 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4882 // CHECK13-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4883 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
4884 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4885 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4886 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4887 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4888 // CHECK13:       cond.true:
4889 // CHECK13-NEXT:    br label [[COND_END:%.*]]
4890 // CHECK13:       cond.false:
4891 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4892 // CHECK13-NEXT:    br label [[COND_END]]
4893 // CHECK13:       cond.end:
4894 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4895 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
4896 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4897 // CHECK13-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
4898 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4899 // CHECK13:       omp.inner.for.cond:
4900 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4901 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4902 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4903 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4904 // CHECK13:       omp.inner.for.body:
4905 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4906 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4907 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4908 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
4909 // CHECK13-NEXT:    invoke void @_Z3foov()
4910 // CHECK13-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
4911 // CHECK13:       invoke.cont:
4912 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4913 // CHECK13:       omp.body.continue:
4914 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4915 // CHECK13:       omp.inner.for.inc:
4916 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4917 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4918 // CHECK13-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
4919 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
4920 // CHECK13:       omp.inner.for.end:
4921 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4922 // CHECK13:       omp.loop.exit:
4923 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
4924 // CHECK13-NEXT:    ret void
4925 // CHECK13:       terminate.lpad:
4926 // CHECK13-NEXT:    [[TMP11:%.*]] = landingpad { ptr, i32 }
4927 // CHECK13-NEXT:            catch ptr null
4928 // CHECK13-NEXT:    [[TMP12:%.*]] = extractvalue { ptr, i32 } [[TMP11]], 0
4929 // CHECK13-NEXT:    call void @__clang_call_terminate(ptr [[TMP12]]) #[[ATTR7]]
4930 // CHECK13-NEXT:    unreachable
4931 //
4932 //
4933 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57
4934 // CHECK13-SAME: () #[[ATTR2]] {
4935 // CHECK13-NEXT:  entry:
4936 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.omp_outlined)
4937 // CHECK13-NEXT:    ret void
4938 //
4939 //
4940 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.omp_outlined
4941 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
4942 // CHECK13-NEXT:  entry:
4943 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4944 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4945 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4946 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4947 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4948 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4949 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4950 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4951 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
4952 // CHECK13-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 8
4953 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4954 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4955 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
4956 // CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
4957 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4958 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4959 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4960 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4961 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4962 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4963 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4964 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4965 // CHECK13:       cond.true:
4966 // CHECK13-NEXT:    br label [[COND_END:%.*]]
4967 // CHECK13:       cond.false:
4968 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4969 // CHECK13-NEXT:    br label [[COND_END]]
4970 // CHECK13:       cond.end:
4971 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4972 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
4973 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4974 // CHECK13-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
4975 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4976 // CHECK13:       omp.inner.for.cond:
4977 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4978 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4979 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4980 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4981 // CHECK13:       omp.inner.for.body:
4982 // CHECK13-NEXT:    invoke void @_ZN1SC1El(ptr noundef nonnull align 8 dereferenceable(24) [[REF_TMP]], i64 noundef 23)
4983 // CHECK13-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
4984 // CHECK13:       invoke.cont:
4985 // CHECK13-NEXT:    [[CALL:%.*]] = invoke noundef i8 @_ZN1ScvcEv(ptr noundef nonnull align 8 dereferenceable(24) [[REF_TMP]])
4986 // CHECK13-NEXT:            to label [[INVOKE_CONT2:%.*]] unwind label [[TERMINATE_LPAD]]
4987 // CHECK13:       invoke.cont2:
4988 // CHECK13-NEXT:    [[TMP7:%.*]] = sext i8 [[CALL]] to i32
4989 // CHECK13-NEXT:    call void @__kmpc_push_num_threads(ptr @[[GLOB3]], i32 [[TMP1]], i32 [[TMP7]])
4990 // CHECK13-NEXT:    call void @_ZN1SD1Ev(ptr noundef nonnull align 8 dereferenceable(24) [[REF_TMP]]) #[[ATTR3]]
4991 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4992 // CHECK13-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
4993 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4994 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
4995 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]])
4996 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4997 // CHECK13:       omp.inner.for.inc:
4998 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4999 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5000 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5001 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
5002 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
5003 // CHECK13:       omp.inner.for.end:
5004 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5005 // CHECK13:       omp.loop.exit:
5006 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
5007 // CHECK13-NEXT:    ret void
5008 // CHECK13:       terminate.lpad:
5009 // CHECK13-NEXT:    [[TMP14:%.*]] = landingpad { ptr, i32 }
5010 // CHECK13-NEXT:            catch ptr null
5011 // CHECK13-NEXT:    [[TMP15:%.*]] = extractvalue { ptr, i32 } [[TMP14]], 0
5012 // CHECK13-NEXT:    call void @__clang_call_terminate(ptr [[TMP15]]) #[[ATTR7]]
5013 // CHECK13-NEXT:    unreachable
5014 //
5015 //
5016 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainI1SLi1EEiv_l57.omp_outlined.omp_outlined
5017 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] personality ptr @__gxx_personality_v0 {
5018 // CHECK13-NEXT:  entry:
5019 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5020 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5021 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5022 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5023 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5024 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5025 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5026 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5027 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5028 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5029 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
5030 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5031 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5032 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5033 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5034 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
5035 // CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
5036 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5037 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5038 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5039 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5040 // CHECK13-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
5041 // CHECK13-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
5042 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5043 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5044 // CHECK13-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5045 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
5046 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5047 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5048 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5049 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5050 // CHECK13:       cond.true:
5051 // CHECK13-NEXT:    br label [[COND_END:%.*]]
5052 // CHECK13:       cond.false:
5053 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5054 // CHECK13-NEXT:    br label [[COND_END]]
5055 // CHECK13:       cond.end:
5056 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5057 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
5058 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5059 // CHECK13-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
5060 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5061 // CHECK13:       omp.inner.for.cond:
5062 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5063 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5064 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5065 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5066 // CHECK13:       omp.inner.for.body:
5067 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5068 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5069 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5070 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
5071 // CHECK13-NEXT:    invoke void @_Z3foov()
5072 // CHECK13-NEXT:            to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
5073 // CHECK13:       invoke.cont:
5074 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5075 // CHECK13:       omp.body.continue:
5076 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5077 // CHECK13:       omp.inner.for.inc:
5078 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5079 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5080 // CHECK13-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
5081 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
5082 // CHECK13:       omp.inner.for.end:
5083 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5084 // CHECK13:       omp.loop.exit:
5085 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
5086 // CHECK13-NEXT:    ret void
5087 // CHECK13:       terminate.lpad:
5088 // CHECK13-NEXT:    [[TMP11:%.*]] = landingpad { ptr, i32 }
5089 // CHECK13-NEXT:            catch ptr null
5090 // CHECK13-NEXT:    [[TMP12:%.*]] = extractvalue { ptr, i32 } [[TMP11]], 0
5091 // CHECK13-NEXT:    call void @__clang_call_terminate(ptr [[TMP12]]) #[[ATTR7]]
5092 // CHECK13-NEXT:    unreachable
5093 //
5094 //
5095 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SD2Ev
5096 // CHECK13-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]]) unnamed_addr #[[ATTR6]] comdat {
5097 // CHECK13-NEXT:  entry:
5098 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
5099 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
5100 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
5101 // CHECK13-NEXT:    ret void
5102 //