clang/test/OpenMP/distribute_parallel_for_simd_if_codegen.cpp

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
   2 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
   3 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
   4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
   5 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
   6 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
   7 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
   8
   9 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
  10 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
  11 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5
  12 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
  13 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
  14 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7
  15
  16 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
  17 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
  18 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
  19 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
  20 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
  21 // RUN: %clang_cc1 -fopenmp -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11
  22
  23 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13
  24 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
  25 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13
  26 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15
  27 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -std=c++11 -triple aarch64-unknown-unknown -emit-pch -o %t %s
  28 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-targets=powerpc64le-ibm-linux-gnu -x c++ -triple aarch64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15
  29 // expected-no-diagnostics
  30 #ifndef HEADER
  31 #define HEADER
  32
  33 void fn1();
  34 void fn2();
  35 void fn3();
  36 void fn4();
  37 void fn5();
  38 void fn6();
  39
  40 int Arg;
  41
  42 void gtid_test() {
  43 #pragma omp target
  44 #pragma omp teams
  45 #pragma omp distribute parallel for simd
  46   for(int i = 0 ; i < 100; i++) {}
  47
  48 #pragma omp target
  49 #pragma omp teams
  50 #pragma omp distribute parallel for simd if (parallel: false)
  51   for(int i = 0 ; i < 100; i++) {
  52     gtid_test();
  53   }
  54 }
  55
  56
  57 template <typename T>
  58 int tmain(T Arg) {
  59 #pragma omp target
  60 #pragma omp teams
  61 #pragma omp distribute parallel for simd if (true)
  62   for(int i = 0 ; i < 100; i++) {
  63     fn1();
  64   }
  65 #pragma omp target
  66 #pragma omp teams
  67 #pragma omp distribute parallel for simd if (false)
  68   for(int i = 0 ; i < 100; i++) {
  69     fn2();
  70   }
  71 #pragma omp target
  72 #pragma omp teams
  73 #pragma omp distribute parallel for simd if (parallel: Arg)
  74   for(int i = 0 ; i < 100; i++) {
  75     fn3();
  76   }
  77   return 0;
  78 }
  79
  80 int main() {
  81 #pragma omp target
  82 #pragma omp teams
  83 #pragma omp distribute parallel for simd if (true)
  84   for(int i = 0 ; i < 100; i++) {
  85
  86
  87     fn4();
  88   }
  89
  90 #pragma omp target
  91 #pragma omp teams
  92 #pragma omp distribute parallel for simd if (false)
  93   for(int i = 0 ; i < 100; i++) {
  94
  95
  96     fn5();
  97   }
  98
  99 #pragma omp target
 100 #pragma omp teams
 101 #pragma omp distribute parallel for simd if (Arg)
 102   for(int i = 0 ; i < 100; i++) {
 103
 104
 105     fn6();
 106   }
 107
 108   return tmain(Arg);
 109 }
 110
 111
 112
 113
 114
 115
 116 // call void [[T_OUTLINE_FUN_3:@.+]](
 117
 118
 119 #endif
 120 // CHECK1-LABEL: define {{[^@]+}}@_Z9gtid_testv
 121 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
 122 // CHECK1-NEXT:  entry:
 123 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 124 // CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
 125 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 126 // CHECK1-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
 127 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
 128 // CHECK1-NEXT:    store i32 3, ptr [[TMP0]], align 4
 129 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
 130 // CHECK1-NEXT:    store i32 0, ptr [[TMP1]], align 4
 131 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
 132 // CHECK1-NEXT:    store ptr null, ptr [[TMP2]], align 8
 133 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
 134 // CHECK1-NEXT:    store ptr null, ptr [[TMP3]], align 8
 135 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
 136 // CHECK1-NEXT:    store ptr null, ptr [[TMP4]], align 8
 137 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
 138 // CHECK1-NEXT:    store ptr null, ptr [[TMP5]], align 8
 139 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
 140 // CHECK1-NEXT:    store ptr null, ptr [[TMP6]], align 8
 141 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
 142 // CHECK1-NEXT:    store ptr null, ptr [[TMP7]], align 8
 143 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
 144 // CHECK1-NEXT:    store i64 100, ptr [[TMP8]], align 8
 145 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
 146 // CHECK1-NEXT:    store i64 0, ptr [[TMP9]], align 8
 147 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
 148 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
 149 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
 150 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
 151 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
 152 // CHECK1-NEXT:    store i32 0, ptr [[TMP12]], align 4
 153 // CHECK1-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.region_id, ptr [[KERNEL_ARGS]])
 154 // CHECK1-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
 155 // CHECK1-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 156 // CHECK1:       omp_offload.failed:
 157 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43() #[[ATTR2:[0-9]+]]
 158 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 159 // CHECK1:       omp_offload.cont:
 160 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
 161 // CHECK1-NEXT:    store i32 3, ptr [[TMP15]], align 4
 162 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
 163 // CHECK1-NEXT:    store i32 0, ptr [[TMP16]], align 4
 164 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
 165 // CHECK1-NEXT:    store ptr null, ptr [[TMP17]], align 8
 166 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
 167 // CHECK1-NEXT:    store ptr null, ptr [[TMP18]], align 8
 168 // CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
 169 // CHECK1-NEXT:    store ptr null, ptr [[TMP19]], align 8
 170 // CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
 171 // CHECK1-NEXT:    store ptr null, ptr [[TMP20]], align 8
 172 // CHECK1-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
 173 // CHECK1-NEXT:    store ptr null, ptr [[TMP21]], align 8
 174 // CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
 175 // CHECK1-NEXT:    store ptr null, ptr [[TMP22]], align 8
 176 // CHECK1-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
 177 // CHECK1-NEXT:    store i64 100, ptr [[TMP23]], align 8
 178 // CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
 179 // CHECK1-NEXT:    store i64 0, ptr [[TMP24]], align 8
 180 // CHECK1-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
 181 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
 182 // CHECK1-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
 183 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4
 184 // CHECK1-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
 185 // CHECK1-NEXT:    store i32 0, ptr [[TMP27]], align 4
 186 // CHECK1-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, ptr [[KERNEL_ARGS2]])
 187 // CHECK1-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
 188 // CHECK1-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
 189 // CHECK1:       omp_offload.failed3:
 190 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2]]
 191 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
 192 // CHECK1:       omp_offload.cont4:
 193 // CHECK1-NEXT:    ret void
 194 //
 195 //
 196 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43
 197 // CHECK1-SAME: () #[[ATTR1:[0-9]+]] {
 198 // CHECK1-NEXT:  entry:
 199 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined)
 200 // CHECK1-NEXT:    ret void
 201 //
 202 //
 203 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined
 204 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
 205 // CHECK1-NEXT:  entry:
 206 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 207 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 208 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 209 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 210 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 211 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 212 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 213 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 214 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 215 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 216 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 217 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 218 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
 219 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 220 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 221 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 222 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 223 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 224 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 225 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
 226 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 227 // CHECK1:       cond.true:
 228 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 229 // CHECK1:       cond.false:
 230 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 231 // CHECK1-NEXT:    br label [[COND_END]]
 232 // CHECK1:       cond.end:
 233 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
 234 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 235 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 236 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
 237 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 238 // CHECK1:       omp.inner.for.cond:
 239 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]
 240 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
 241 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
 242 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 243 // CHECK1:       omp.inner.for.body:
 244 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP11]]
 245 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
 246 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
 247 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
 248 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP11]]
 249 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 250 // CHECK1:       omp.inner.for.inc:
 251 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
 252 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP11]]
 253 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
 254 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
 255 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
 256 // CHECK1:       omp.inner.for.end:
 257 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 258 // CHECK1:       omp.loop.exit:
 259 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
 260 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 261 // CHECK1-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
 262 // CHECK1-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 263 // CHECK1:       .omp.final.then:
 264 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
 265 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 266 // CHECK1:       .omp.final.done:
 267 // CHECK1-NEXT:    ret void
 268 //
 269 //
 270 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined.omp_outlined
 271 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
 272 // CHECK1-NEXT:  entry:
 273 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 274 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 275 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 276 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 277 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 278 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 279 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 280 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 281 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 282 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 283 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 284 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 285 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 286 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 287 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 288 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 289 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
 290 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 291 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
 292 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 293 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
 294 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 295 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
 296 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 297 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 298 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 299 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
 300 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 301 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 302 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
 303 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 304 // CHECK1:       cond.true:
 305 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 306 // CHECK1:       cond.false:
 307 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 308 // CHECK1-NEXT:    br label [[COND_END]]
 309 // CHECK1:       cond.end:
 310 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
 311 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 312 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 313 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
 314 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 315 // CHECK1:       omp.inner.for.cond:
 316 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
 317 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
 318 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
 319 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 320 // CHECK1:       omp.inner.for.body:
 321 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
 322 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
 323 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 324 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]
 325 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 326 // CHECK1:       omp.body.continue:
 327 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 328 // CHECK1:       omp.inner.for.inc:
 329 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
 330 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
 331 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
 332 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
 333 // CHECK1:       omp.inner.for.end:
 334 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 335 // CHECK1:       omp.loop.exit:
 336 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
 337 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 338 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
 339 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 340 // CHECK1:       .omp.final.then:
 341 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
 342 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 343 // CHECK1:       .omp.final.done:
 344 // CHECK1-NEXT:    ret void
 345 //
 346 //
 347 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48
 348 // CHECK1-SAME: () #[[ATTR1]] {
 349 // CHECK1-NEXT:  entry:
 350 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined)
 351 // CHECK1-NEXT:    ret void
 352 //
 353 //
 354 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined
 355 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
 356 // CHECK1-NEXT:  entry:
 357 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 358 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 359 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 360 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 361 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 362 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 363 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 364 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 365 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 366 // CHECK1-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
 367 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 368 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 369 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 370 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
 371 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 372 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 373 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 374 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 375 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 376 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 377 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
 378 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 379 // CHECK1:       cond.true:
 380 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 381 // CHECK1:       cond.false:
 382 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 383 // CHECK1-NEXT:    br label [[COND_END]]
 384 // CHECK1:       cond.end:
 385 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
 386 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 387 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 388 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
 389 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 390 // CHECK1:       omp.inner.for.cond:
 391 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20:![0-9]+]]
 392 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
 393 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
 394 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 395 // CHECK1:       omp.inner.for.body:
 396 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP20]]
 397 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
 398 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
 399 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
 400 // CHECK1-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
 401 // CHECK1-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP20]]
 402 // CHECK1-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP20]]
 403 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP20]]
 404 // CHECK1-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
 405 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 406 // CHECK1:       omp.inner.for.inc:
 407 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
 408 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP20]]
 409 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
 410 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
 411 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
 412 // CHECK1:       omp.inner.for.end:
 413 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 414 // CHECK1:       omp.loop.exit:
 415 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
 416 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 417 // CHECK1-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
 418 // CHECK1-NEXT:    br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 419 // CHECK1:       .omp.final.then:
 420 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
 421 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 422 // CHECK1:       .omp.final.done:
 423 // CHECK1-NEXT:    ret void
 424 //
 425 //
 426 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined.omp_outlined
 427 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
 428 // CHECK1-NEXT:  entry:
 429 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 430 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 431 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 432 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 433 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 434 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 435 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 436 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 437 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 438 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 439 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 440 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 441 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 442 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 443 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 444 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 445 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
 446 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 447 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
 448 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 449 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
 450 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 451 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
 452 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 453 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 454 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 455 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
 456 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 457 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 458 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
 459 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 460 // CHECK1:       cond.true:
 461 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 462 // CHECK1:       cond.false:
 463 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 464 // CHECK1-NEXT:    br label [[COND_END]]
 465 // CHECK1:       cond.end:
 466 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
 467 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 468 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 469 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
 470 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 471 // CHECK1:       omp.inner.for.cond:
 472 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]]
 473 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP23]]
 474 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
 475 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 476 // CHECK1:       omp.inner.for.body:
 477 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
 478 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
 479 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 480 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP23]]
 481 // CHECK1-NEXT:    call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP23]]
 482 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 483 // CHECK1:       omp.body.continue:
 484 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 485 // CHECK1:       omp.inner.for.inc:
 486 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
 487 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
 488 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
 489 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
 490 // CHECK1:       omp.inner.for.end:
 491 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 492 // CHECK1:       omp.loop.exit:
 493 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
 494 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 495 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
 496 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 497 // CHECK1:       .omp.final.then:
 498 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
 499 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 500 // CHECK1:       .omp.final.done:
 501 // CHECK1-NEXT:    ret void
 502 //
 503 //
 504 // CHECK1-LABEL: define {{[^@]+}}@main
 505 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
 506 // CHECK1-NEXT:  entry:
 507 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 508 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 509 // CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
 510 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 511 // CHECK1-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
 512 // CHECK1-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
 513 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
 514 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
 515 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
 516 // CHECK1-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
 517 // CHECK1-NEXT:    [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
 518 // CHECK1-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 519 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
 520 // CHECK1-NEXT:    store i32 3, ptr [[TMP0]], align 4
 521 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
 522 // CHECK1-NEXT:    store i32 0, ptr [[TMP1]], align 4
 523 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
 524 // CHECK1-NEXT:    store ptr null, ptr [[TMP2]], align 8
 525 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
 526 // CHECK1-NEXT:    store ptr null, ptr [[TMP3]], align 8
 527 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
 528 // CHECK1-NEXT:    store ptr null, ptr [[TMP4]], align 8
 529 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
 530 // CHECK1-NEXT:    store ptr null, ptr [[TMP5]], align 8
 531 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
 532 // CHECK1-NEXT:    store ptr null, ptr [[TMP6]], align 8
 533 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
 534 // CHECK1-NEXT:    store ptr null, ptr [[TMP7]], align 8
 535 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
 536 // CHECK1-NEXT:    store i64 100, ptr [[TMP8]], align 8
 537 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
 538 // CHECK1-NEXT:    store i64 0, ptr [[TMP9]], align 8
 539 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
 540 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
 541 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
 542 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
 543 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
 544 // CHECK1-NEXT:    store i32 0, ptr [[TMP12]], align 4
 545 // CHECK1-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, ptr [[KERNEL_ARGS]])
 546 // CHECK1-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
 547 // CHECK1-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 548 // CHECK1:       omp_offload.failed:
 549 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]]
 550 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 551 // CHECK1:       omp_offload.cont:
 552 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
 553 // CHECK1-NEXT:    store i32 3, ptr [[TMP15]], align 4
 554 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
 555 // CHECK1-NEXT:    store i32 0, ptr [[TMP16]], align 4
 556 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
 557 // CHECK1-NEXT:    store ptr null, ptr [[TMP17]], align 8
 558 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
 559 // CHECK1-NEXT:    store ptr null, ptr [[TMP18]], align 8
 560 // CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
 561 // CHECK1-NEXT:    store ptr null, ptr [[TMP19]], align 8
 562 // CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
 563 // CHECK1-NEXT:    store ptr null, ptr [[TMP20]], align 8
 564 // CHECK1-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
 565 // CHECK1-NEXT:    store ptr null, ptr [[TMP21]], align 8
 566 // CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
 567 // CHECK1-NEXT:    store ptr null, ptr [[TMP22]], align 8
 568 // CHECK1-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
 569 // CHECK1-NEXT:    store i64 100, ptr [[TMP23]], align 8
 570 // CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
 571 // CHECK1-NEXT:    store i64 0, ptr [[TMP24]], align 8
 572 // CHECK1-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
 573 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
 574 // CHECK1-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
 575 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4
 576 // CHECK1-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
 577 // CHECK1-NEXT:    store i32 0, ptr [[TMP27]], align 4
 578 // CHECK1-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.region_id, ptr [[KERNEL_ARGS2]])
 579 // CHECK1-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
 580 // CHECK1-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
 581 // CHECK1:       omp_offload.failed3:
 582 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90() #[[ATTR2]]
 583 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
 584 // CHECK1:       omp_offload.cont4:
 585 // CHECK1-NEXT:    [[TMP30:%.*]] = load i32, ptr @Arg, align 4
 586 // CHECK1-NEXT:    store i32 [[TMP30]], ptr [[ARG_CASTED]], align 4
 587 // CHECK1-NEXT:    [[TMP31:%.*]] = load i64, ptr [[ARG_CASTED]], align 8
 588 // CHECK1-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 589 // CHECK1-NEXT:    store i64 [[TMP31]], ptr [[TMP32]], align 8
 590 // CHECK1-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 591 // CHECK1-NEXT:    store i64 [[TMP31]], ptr [[TMP33]], align 8
 592 // CHECK1-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
 593 // CHECK1-NEXT:    store ptr null, ptr [[TMP34]], align 8
 594 // CHECK1-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 595 // CHECK1-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 596 // CHECK1-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 0
 597 // CHECK1-NEXT:    store i32 3, ptr [[TMP37]], align 4
 598 // CHECK1-NEXT:    [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 1
 599 // CHECK1-NEXT:    store i32 1, ptr [[TMP38]], align 4
 600 // CHECK1-NEXT:    [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 2
 601 // CHECK1-NEXT:    store ptr [[TMP35]], ptr [[TMP39]], align 8
 602 // CHECK1-NEXT:    [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 3
 603 // CHECK1-NEXT:    store ptr [[TMP36]], ptr [[TMP40]], align 8
 604 // CHECK1-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 4
 605 // CHECK1-NEXT:    store ptr @.offload_sizes, ptr [[TMP41]], align 8
 606 // CHECK1-NEXT:    [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 5
 607 // CHECK1-NEXT:    store ptr @.offload_maptypes, ptr [[TMP42]], align 8
 608 // CHECK1-NEXT:    [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 6
 609 // CHECK1-NEXT:    store ptr null, ptr [[TMP43]], align 8
 610 // CHECK1-NEXT:    [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 7
 611 // CHECK1-NEXT:    store ptr null, ptr [[TMP44]], align 8
 612 // CHECK1-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 8
 613 // CHECK1-NEXT:    store i64 100, ptr [[TMP45]], align 8
 614 // CHECK1-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 9
 615 // CHECK1-NEXT:    store i64 0, ptr [[TMP46]], align 8
 616 // CHECK1-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 10
 617 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP47]], align 4
 618 // CHECK1-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 11
 619 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP48]], align 4
 620 // CHECK1-NEXT:    [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 12
 621 // CHECK1-NEXT:    store i32 0, ptr [[TMP49]], align 4
 622 // CHECK1-NEXT:    [[TMP50:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.region_id, ptr [[KERNEL_ARGS6]])
 623 // CHECK1-NEXT:    [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 0
 624 // CHECK1-NEXT:    br i1 [[TMP51]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
 625 // CHECK1:       omp_offload.failed7:
 626 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99(i64 [[TMP31]]) #[[ATTR2]]
 627 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
 628 // CHECK1:       omp_offload.cont8:
 629 // CHECK1-NEXT:    [[TMP52:%.*]] = load i32, ptr @Arg, align 4
 630 // CHECK1-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP52]])
 631 // CHECK1-NEXT:    ret i32 [[CALL]]
 632 //
 633 //
 634 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
 635 // CHECK1-SAME: () #[[ATTR1]] {
 636 // CHECK1-NEXT:  entry:
 637 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined)
 638 // CHECK1-NEXT:    ret void
 639 //
 640 //
 641 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined
 642 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
 643 // CHECK1-NEXT:  entry:
 644 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 645 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 646 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 647 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 648 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 649 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 650 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 651 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 652 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 653 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 654 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 655 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 656 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
 657 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 658 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 659 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 660 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 661 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 662 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 663 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
 664 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 665 // CHECK1:       cond.true:
 666 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 667 // CHECK1:       cond.false:
 668 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 669 // CHECK1-NEXT:    br label [[COND_END]]
 670 // CHECK1:       cond.end:
 671 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
 672 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 673 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 674 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
 675 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 676 // CHECK1:       omp.inner.for.cond:
 677 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26:![0-9]+]]
 678 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
 679 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
 680 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 681 // CHECK1:       omp.inner.for.body:
 682 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP26]]
 683 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
 684 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
 685 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
 686 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP26]]
 687 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 688 // CHECK1:       omp.inner.for.inc:
 689 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
 690 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP26]]
 691 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
 692 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
 693 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
 694 // CHECK1:       omp.inner.for.end:
 695 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 696 // CHECK1:       omp.loop.exit:
 697 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
 698 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 699 // CHECK1-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
 700 // CHECK1-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 701 // CHECK1:       .omp.final.then:
 702 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
 703 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 704 // CHECK1:       .omp.final.done:
 705 // CHECK1-NEXT:    ret void
 706 //
 707 //
 708 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined.omp_outlined
 709 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
 710 // CHECK1-NEXT:  entry:
 711 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 712 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 713 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 714 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 715 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 716 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 717 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 718 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 719 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 720 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 721 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 722 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 723 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 724 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 725 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 726 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 727 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
 728 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 729 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
 730 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 731 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
 732 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 733 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
 734 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 735 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 736 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 737 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
 738 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 739 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 740 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
 741 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 742 // CHECK1:       cond.true:
 743 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 744 // CHECK1:       cond.false:
 745 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 746 // CHECK1-NEXT:    br label [[COND_END]]
 747 // CHECK1:       cond.end:
 748 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
 749 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 750 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 751 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
 752 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 753 // CHECK1:       omp.inner.for.cond:
 754 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29:![0-9]+]]
 755 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP29]]
 756 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
 757 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 758 // CHECK1:       omp.inner.for.body:
 759 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
 760 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
 761 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 762 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP29]]
 763 // CHECK1-NEXT:    call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP29]]
 764 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 765 // CHECK1:       omp.body.continue:
 766 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 767 // CHECK1:       omp.inner.for.inc:
 768 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
 769 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
 770 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
 771 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
 772 // CHECK1:       omp.inner.for.end:
 773 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 774 // CHECK1:       omp.loop.exit:
 775 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
 776 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 777 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
 778 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 779 // CHECK1:       .omp.final.then:
 780 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
 781 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 782 // CHECK1:       .omp.final.done:
 783 // CHECK1-NEXT:    ret void
 784 //
 785 //
 786 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90
 787 // CHECK1-SAME: () #[[ATTR1]] {
 788 // CHECK1-NEXT:  entry:
 789 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined)
 790 // CHECK1-NEXT:    ret void
 791 //
 792 //
 793 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined
 794 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
 795 // CHECK1-NEXT:  entry:
 796 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 797 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 798 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 799 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 800 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 801 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 802 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 803 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 804 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 805 // CHECK1-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
 806 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 807 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 808 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 809 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
 810 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 811 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 812 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 813 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 814 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 815 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 816 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
 817 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 818 // CHECK1:       cond.true:
 819 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 820 // CHECK1:       cond.false:
 821 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 822 // CHECK1-NEXT:    br label [[COND_END]]
 823 // CHECK1:       cond.end:
 824 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
 825 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 826 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 827 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
 828 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 829 // CHECK1:       omp.inner.for.cond:
 830 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32:![0-9]+]]
 831 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP32]]
 832 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
 833 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 834 // CHECK1:       omp.inner.for.body:
 835 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP32]]
 836 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
 837 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP32]]
 838 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
 839 // CHECK1-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP32]]
 840 // CHECK1-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP32]]
 841 // CHECK1-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP32]]
 842 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP32]]
 843 // CHECK1-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP32]]
 844 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 845 // CHECK1:       omp.inner.for.inc:
 846 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]]
 847 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP32]]
 848 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
 849 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]]
 850 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
 851 // CHECK1:       omp.inner.for.end:
 852 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 853 // CHECK1:       omp.loop.exit:
 854 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
 855 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 856 // CHECK1-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
 857 // CHECK1-NEXT:    br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 858 // CHECK1:       .omp.final.then:
 859 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
 860 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 861 // CHECK1:       .omp.final.done:
 862 // CHECK1-NEXT:    ret void
 863 //
 864 //
 865 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined.omp_outlined
 866 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
 867 // CHECK1-NEXT:  entry:
 868 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 869 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 870 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 871 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 872 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 873 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 874 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 875 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 876 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 877 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 878 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 879 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 880 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 881 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 882 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 883 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 884 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
 885 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 886 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
 887 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 888 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
 889 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 890 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
 891 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 892 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 893 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 894 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
 895 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 896 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 897 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
 898 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 899 // CHECK1:       cond.true:
 900 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 901 // CHECK1:       cond.false:
 902 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 903 // CHECK1-NEXT:    br label [[COND_END]]
 904 // CHECK1:       cond.end:
 905 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
 906 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 907 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 908 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
 909 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 910 // CHECK1:       omp.inner.for.cond:
 911 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35:![0-9]+]]
 912 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP35]]
 913 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
 914 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 915 // CHECK1:       omp.inner.for.body:
 916 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
 917 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
 918 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 919 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP35]]
 920 // CHECK1-NEXT:    call void @_Z3fn5v(), !llvm.access.group [[ACC_GRP35]]
 921 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 922 // CHECK1:       omp.body.continue:
 923 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 924 // CHECK1:       omp.inner.for.inc:
 925 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
 926 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
 927 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
 928 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
 929 // CHECK1:       omp.inner.for.end:
 930 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 931 // CHECK1:       omp.loop.exit:
 932 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
 933 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 934 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
 935 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 936 // CHECK1:       .omp.final.then:
 937 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
 938 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 939 // CHECK1:       .omp.final.done:
 940 // CHECK1-NEXT:    ret void
 941 //
 942 //
 943 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99
 944 // CHECK1-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
 945 // CHECK1-NEXT:  entry:
 946 // CHECK1-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
 947 // CHECK1-NEXT:    store i64 [[ARG]], ptr [[ARG_ADDR]], align 8
 948 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined, ptr [[ARG_ADDR]])
 949 // CHECK1-NEXT:    ret void
 950 //
 951 //
 952 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined
 953 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] {
 954 // CHECK1-NEXT:  entry:
 955 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 956 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 957 // CHECK1-NEXT:    [[ARG_ADDR:%.*]] = alloca ptr, align 8
 958 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 959 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 960 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 961 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 962 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 963 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 964 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 965 // CHECK1-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
 966 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 967 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 968 // CHECK1-NEXT:    store ptr [[ARG]], ptr [[ARG_ADDR]], align 8
 969 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[ARG_ADDR]], align 8
 970 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 971 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
 972 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 973 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 974 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 975 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
 976 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 977 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 978 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
 979 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 980 // CHECK1:       cond.true:
 981 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 982 // CHECK1:       cond.false:
 983 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 984 // CHECK1-NEXT:    br label [[COND_END]]
 985 // CHECK1:       cond.end:
 986 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
 987 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 988 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 989 // CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
 990 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 991 // CHECK1:       omp.inner.for.cond:
 992 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38:![0-9]+]]
 993 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP38]]
 994 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
 995 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 996 // CHECK1:       omp.inner.for.body:
 997 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP38]]
 998 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
 999 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP38]]
1000 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1001 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP0]], align 4, !llvm.access.group [[ACC_GRP38]]
1002 // CHECK1-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0
1003 // CHECK1-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
1004 // CHECK1:       omp_if.then:
1005 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group [[ACC_GRP38]]
1006 // CHECK1-NEXT:    br label [[OMP_IF_END:%.*]]
1007 // CHECK1:       omp_if.else:
1008 // CHECK1-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP38]]
1009 // CHECK1-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP38]]
1010 // CHECK1-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP38]]
1011 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined(ptr [[TMP13]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP38]]
1012 // CHECK1-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP38]]
1013 // CHECK1-NEXT:    br label [[OMP_IF_END]]
1014 // CHECK1:       omp_if.end:
1015 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1016 // CHECK1:       omp.inner.for.inc:
1017 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]]
1018 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP38]]
1019 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
1020 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]]
1021 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
1022 // CHECK1:       omp.inner.for.end:
1023 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1024 // CHECK1:       omp.loop.exit:
1025 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
1026 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1027 // CHECK1-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1028 // CHECK1-NEXT:    br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1029 // CHECK1:       .omp.final.then:
1030 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
1031 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1032 // CHECK1:       .omp.final.done:
1033 // CHECK1-NEXT:    ret void
1034 //
1035 //
1036 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined
1037 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1038 // CHECK1-NEXT:  entry:
1039 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1040 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1041 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1042 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1043 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1044 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1045 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1046 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1047 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1048 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1049 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1050 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1051 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1052 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1053 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1054 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1055 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
1056 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1057 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1058 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1059 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1060 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1061 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
1062 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1063 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1064 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1065 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
1066 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1067 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1068 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1069 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1070 // CHECK1:       cond.true:
1071 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1072 // CHECK1:       cond.false:
1073 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1074 // CHECK1-NEXT:    br label [[COND_END]]
1075 // CHECK1:       cond.end:
1076 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1077 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1078 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1079 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
1080 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1081 // CHECK1:       omp.inner.for.cond:
1082 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41:![0-9]+]]
1083 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP41]]
1084 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1085 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1086 // CHECK1:       omp.inner.for.body:
1087 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]
1088 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1089 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1090 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP41]]
1091 // CHECK1-NEXT:    call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP41]]
1092 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1093 // CHECK1:       omp.body.continue:
1094 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1095 // CHECK1:       omp.inner.for.inc:
1096 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]
1097 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1098 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]
1099 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP42:![0-9]+]]
1100 // CHECK1:       omp.inner.for.end:
1101 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1102 // CHECK1:       omp.loop.exit:
1103 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
1104 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1105 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1106 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1107 // CHECK1:       .omp.final.then:
1108 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
1109 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1110 // CHECK1:       .omp.final.done:
1111 // CHECK1-NEXT:    ret void
1112 //
1113 //
1114 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
1115 // CHECK1-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
1116 // CHECK1-NEXT:  entry:
1117 // CHECK1-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
1118 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1119 // CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1120 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1121 // CHECK1-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1122 // CHECK1-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
1123 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
1124 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
1125 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
1126 // CHECK1-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
1127 // CHECK1-NEXT:    [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1128 // CHECK1-NEXT:    store i32 [[ARG]], ptr [[ARG_ADDR]], align 4
1129 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1130 // CHECK1-NEXT:    store i32 3, ptr [[TMP0]], align 4
1131 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1132 // CHECK1-NEXT:    store i32 0, ptr [[TMP1]], align 4
1133 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1134 // CHECK1-NEXT:    store ptr null, ptr [[TMP2]], align 8
1135 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1136 // CHECK1-NEXT:    store ptr null, ptr [[TMP3]], align 8
1137 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1138 // CHECK1-NEXT:    store ptr null, ptr [[TMP4]], align 8
1139 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1140 // CHECK1-NEXT:    store ptr null, ptr [[TMP5]], align 8
1141 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1142 // CHECK1-NEXT:    store ptr null, ptr [[TMP6]], align 8
1143 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1144 // CHECK1-NEXT:    store ptr null, ptr [[TMP7]], align 8
1145 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1146 // CHECK1-NEXT:    store i64 100, ptr [[TMP8]], align 8
1147 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1148 // CHECK1-NEXT:    store i64 0, ptr [[TMP9]], align 8
1149 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1150 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
1151 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1152 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
1153 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1154 // CHECK1-NEXT:    store i32 0, ptr [[TMP12]], align 4
1155 // CHECK1-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.region_id, ptr [[KERNEL_ARGS]])
1156 // CHECK1-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1157 // CHECK1-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1158 // CHECK1:       omp_offload.failed:
1159 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59() #[[ATTR2]]
1160 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1161 // CHECK1:       omp_offload.cont:
1162 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
1163 // CHECK1-NEXT:    store i32 3, ptr [[TMP15]], align 4
1164 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
1165 // CHECK1-NEXT:    store i32 0, ptr [[TMP16]], align 4
1166 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
1167 // CHECK1-NEXT:    store ptr null, ptr [[TMP17]], align 8
1168 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
1169 // CHECK1-NEXT:    store ptr null, ptr [[TMP18]], align 8
1170 // CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
1171 // CHECK1-NEXT:    store ptr null, ptr [[TMP19]], align 8
1172 // CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
1173 // CHECK1-NEXT:    store ptr null, ptr [[TMP20]], align 8
1174 // CHECK1-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
1175 // CHECK1-NEXT:    store ptr null, ptr [[TMP21]], align 8
1176 // CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
1177 // CHECK1-NEXT:    store ptr null, ptr [[TMP22]], align 8
1178 // CHECK1-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
1179 // CHECK1-NEXT:    store i64 100, ptr [[TMP23]], align 8
1180 // CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
1181 // CHECK1-NEXT:    store i64 0, ptr [[TMP24]], align 8
1182 // CHECK1-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
1183 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
1184 // CHECK1-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
1185 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4
1186 // CHECK1-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
1187 // CHECK1-NEXT:    store i32 0, ptr [[TMP27]], align 4
1188 // CHECK1-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.region_id, ptr [[KERNEL_ARGS2]])
1189 // CHECK1-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
1190 // CHECK1-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
1191 // CHECK1:       omp_offload.failed3:
1192 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65() #[[ATTR2]]
1193 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
1194 // CHECK1:       omp_offload.cont4:
1195 // CHECK1-NEXT:    [[TMP30:%.*]] = load i32, ptr [[ARG_ADDR]], align 4
1196 // CHECK1-NEXT:    store i32 [[TMP30]], ptr [[ARG_CASTED]], align 4
1197 // CHECK1-NEXT:    [[TMP31:%.*]] = load i64, ptr [[ARG_CASTED]], align 8
1198 // CHECK1-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1199 // CHECK1-NEXT:    store i64 [[TMP31]], ptr [[TMP32]], align 8
1200 // CHECK1-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1201 // CHECK1-NEXT:    store i64 [[TMP31]], ptr [[TMP33]], align 8
1202 // CHECK1-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1203 // CHECK1-NEXT:    store ptr null, ptr [[TMP34]], align 8
1204 // CHECK1-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1205 // CHECK1-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1206 // CHECK1-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 0
1207 // CHECK1-NEXT:    store i32 3, ptr [[TMP37]], align 4
1208 // CHECK1-NEXT:    [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 1
1209 // CHECK1-NEXT:    store i32 1, ptr [[TMP38]], align 4
1210 // CHECK1-NEXT:    [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 2
1211 // CHECK1-NEXT:    store ptr [[TMP35]], ptr [[TMP39]], align 8
1212 // CHECK1-NEXT:    [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 3
1213 // CHECK1-NEXT:    store ptr [[TMP36]], ptr [[TMP40]], align 8
1214 // CHECK1-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 4
1215 // CHECK1-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP41]], align 8
1216 // CHECK1-NEXT:    [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 5
1217 // CHECK1-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP42]], align 8
1218 // CHECK1-NEXT:    [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 6
1219 // CHECK1-NEXT:    store ptr null, ptr [[TMP43]], align 8
1220 // CHECK1-NEXT:    [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 7
1221 // CHECK1-NEXT:    store ptr null, ptr [[TMP44]], align 8
1222 // CHECK1-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 8
1223 // CHECK1-NEXT:    store i64 100, ptr [[TMP45]], align 8
1224 // CHECK1-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 9
1225 // CHECK1-NEXT:    store i64 0, ptr [[TMP46]], align 8
1226 // CHECK1-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 10
1227 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP47]], align 4
1228 // CHECK1-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 11
1229 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP48]], align 4
1230 // CHECK1-NEXT:    [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 12
1231 // CHECK1-NEXT:    store i32 0, ptr [[TMP49]], align 4
1232 // CHECK1-NEXT:    [[TMP50:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.region_id, ptr [[KERNEL_ARGS6]])
1233 // CHECK1-NEXT:    [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 0
1234 // CHECK1-NEXT:    br i1 [[TMP51]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
1235 // CHECK1:       omp_offload.failed7:
1236 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71(i64 [[TMP31]]) #[[ATTR2]]
1237 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
1238 // CHECK1:       omp_offload.cont8:
1239 // CHECK1-NEXT:    ret i32 0
1240 //
1241 //
1242 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59
1243 // CHECK1-SAME: () #[[ATTR1]] {
1244 // CHECK1-NEXT:  entry:
1245 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined)
1246 // CHECK1-NEXT:    ret void
1247 //
1248 //
1249 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined
1250 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1251 // CHECK1-NEXT:  entry:
1252 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1253 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1254 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1255 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1256 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1257 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1258 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1259 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1260 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1261 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1262 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1263 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1264 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
1265 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1266 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1267 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1268 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1269 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1270 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1271 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1272 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1273 // CHECK1:       cond.true:
1274 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1275 // CHECK1:       cond.false:
1276 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1277 // CHECK1-NEXT:    br label [[COND_END]]
1278 // CHECK1:       cond.end:
1279 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1280 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1281 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1282 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
1283 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1284 // CHECK1:       omp.inner.for.cond:
1285 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44:![0-9]+]]
1286 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP44]]
1287 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1288 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1289 // CHECK1:       omp.inner.for.body:
1290 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP44]]
1291 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1292 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP44]]
1293 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1294 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP44]]
1295 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1296 // CHECK1:       omp.inner.for.inc:
1297 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]]
1298 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP44]]
1299 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1300 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]]
1301 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP45:![0-9]+]]
1302 // CHECK1:       omp.inner.for.end:
1303 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1304 // CHECK1:       omp.loop.exit:
1305 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
1306 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1307 // CHECK1-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1308 // CHECK1-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1309 // CHECK1:       .omp.final.then:
1310 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
1311 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1312 // CHECK1:       .omp.final.done:
1313 // CHECK1-NEXT:    ret void
1314 //
1315 //
1316 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined.omp_outlined
1317 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1318 // CHECK1-NEXT:  entry:
1319 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1320 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1321 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1322 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1323 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1324 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1325 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1326 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1327 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1328 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1329 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1330 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1331 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1332 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1333 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1334 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1335 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
1336 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1337 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1338 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1339 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1340 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1341 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
1342 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1343 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1344 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1345 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
1346 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1347 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1348 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1349 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1350 // CHECK1:       cond.true:
1351 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1352 // CHECK1:       cond.false:
1353 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1354 // CHECK1-NEXT:    br label [[COND_END]]
1355 // CHECK1:       cond.end:
1356 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1357 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1358 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1359 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
1360 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1361 // CHECK1:       omp.inner.for.cond:
1362 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47:![0-9]+]]
1363 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP47]]
1364 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1365 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1366 // CHECK1:       omp.inner.for.body:
1367 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
1368 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1369 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1370 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP47]]
1371 // CHECK1-NEXT:    call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP47]]
1372 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1373 // CHECK1:       omp.body.continue:
1374 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1375 // CHECK1:       omp.inner.for.inc:
1376 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
1377 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1378 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
1379 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
1380 // CHECK1:       omp.inner.for.end:
1381 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1382 // CHECK1:       omp.loop.exit:
1383 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
1384 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1385 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1386 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1387 // CHECK1:       .omp.final.then:
1388 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
1389 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1390 // CHECK1:       .omp.final.done:
1391 // CHECK1-NEXT:    ret void
1392 //
1393 //
1394 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65
1395 // CHECK1-SAME: () #[[ATTR1]] {
1396 // CHECK1-NEXT:  entry:
1397 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined)
1398 // CHECK1-NEXT:    ret void
1399 //
1400 //
1401 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined
1402 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1403 // CHECK1-NEXT:  entry:
1404 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1405 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1406 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1407 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1408 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1409 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1410 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1411 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1412 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1413 // CHECK1-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1414 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1415 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1416 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1417 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
1418 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1419 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1420 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1421 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1422 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1423 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1424 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1425 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1426 // CHECK1:       cond.true:
1427 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1428 // CHECK1:       cond.false:
1429 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1430 // CHECK1-NEXT:    br label [[COND_END]]
1431 // CHECK1:       cond.end:
1432 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1433 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1434 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1435 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
1436 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1437 // CHECK1:       omp.inner.for.cond:
1438 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50:![0-9]+]]
1439 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP50]]
1440 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1441 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1442 // CHECK1:       omp.inner.for.body:
1443 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP50]]
1444 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1445 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP50]]
1446 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1447 // CHECK1-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP50]]
1448 // CHECK1-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP50]]
1449 // CHECK1-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP50]]
1450 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP50]]
1451 // CHECK1-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP50]]
1452 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1453 // CHECK1:       omp.inner.for.inc:
1454 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
1455 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP50]]
1456 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1457 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
1458 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
1459 // CHECK1:       omp.inner.for.end:
1460 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1461 // CHECK1:       omp.loop.exit:
1462 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
1463 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1464 // CHECK1-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1465 // CHECK1-NEXT:    br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1466 // CHECK1:       .omp.final.then:
1467 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
1468 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1469 // CHECK1:       .omp.final.done:
1470 // CHECK1-NEXT:    ret void
1471 //
1472 //
1473 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined.omp_outlined
1474 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1475 // CHECK1-NEXT:  entry:
1476 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1477 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1478 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1479 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1480 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1481 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1482 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1483 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1484 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1485 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1486 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1487 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1488 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1489 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1490 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1491 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1492 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
1493 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1494 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1495 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1496 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1497 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1498 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
1499 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1500 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1501 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1502 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
1503 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1504 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1505 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1506 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1507 // CHECK1:       cond.true:
1508 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1509 // CHECK1:       cond.false:
1510 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1511 // CHECK1-NEXT:    br label [[COND_END]]
1512 // CHECK1:       cond.end:
1513 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1514 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1515 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1516 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
1517 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1518 // CHECK1:       omp.inner.for.cond:
1519 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53:![0-9]+]]
1520 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP53]]
1521 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1522 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1523 // CHECK1:       omp.inner.for.body:
1524 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]
1525 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1526 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1527 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP53]]
1528 // CHECK1-NEXT:    call void @_Z3fn2v(), !llvm.access.group [[ACC_GRP53]]
1529 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1530 // CHECK1:       omp.body.continue:
1531 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1532 // CHECK1:       omp.inner.for.inc:
1533 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]
1534 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1535 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]
1536 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
1537 // CHECK1:       omp.inner.for.end:
1538 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1539 // CHECK1:       omp.loop.exit:
1540 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
1541 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1542 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1543 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1544 // CHECK1:       .omp.final.then:
1545 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
1546 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1547 // CHECK1:       .omp.final.done:
1548 // CHECK1-NEXT:    ret void
1549 //
1550 //
1551 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71
1552 // CHECK1-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
1553 // CHECK1-NEXT:  entry:
1554 // CHECK1-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
1555 // CHECK1-NEXT:    store i64 [[ARG]], ptr [[ARG_ADDR]], align 8
1556 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined, ptr [[ARG_ADDR]])
1557 // CHECK1-NEXT:    ret void
1558 //
1559 //
1560 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined
1561 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] {
1562 // CHECK1-NEXT:  entry:
1563 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1564 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1565 // CHECK1-NEXT:    [[ARG_ADDR:%.*]] = alloca ptr, align 8
1566 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1567 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1568 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1569 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1570 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1571 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1572 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1573 // CHECK1-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1574 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1575 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1576 // CHECK1-NEXT:    store ptr [[ARG]], ptr [[ARG_ADDR]], align 8
1577 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[ARG_ADDR]], align 8
1578 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1579 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
1580 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1581 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1582 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1583 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
1584 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1585 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1586 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
1587 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1588 // CHECK1:       cond.true:
1589 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1590 // CHECK1:       cond.false:
1591 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1592 // CHECK1-NEXT:    br label [[COND_END]]
1593 // CHECK1:       cond.end:
1594 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1595 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1596 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1597 // CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
1598 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1599 // CHECK1:       omp.inner.for.cond:
1600 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56:![0-9]+]]
1601 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP56]]
1602 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1603 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1604 // CHECK1:       omp.inner.for.body:
1605 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP56]]
1606 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1607 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP56]]
1608 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1609 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP0]], align 4, !llvm.access.group [[ACC_GRP56]]
1610 // CHECK1-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0
1611 // CHECK1-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
1612 // CHECK1:       omp_if.then:
1613 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group [[ACC_GRP56]]
1614 // CHECK1-NEXT:    br label [[OMP_IF_END:%.*]]
1615 // CHECK1:       omp_if.else:
1616 // CHECK1-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP56]]
1617 // CHECK1-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP56]]
1618 // CHECK1-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP56]]
1619 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined.omp_outlined(ptr [[TMP13]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP56]]
1620 // CHECK1-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP56]]
1621 // CHECK1-NEXT:    br label [[OMP_IF_END]]
1622 // CHECK1:       omp_if.end:
1623 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1624 // CHECK1:       omp.inner.for.inc:
1625 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56]]
1626 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP56]]
1627 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
1628 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56]]
1629 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]]
1630 // CHECK1:       omp.inner.for.end:
1631 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1632 // CHECK1:       omp.loop.exit:
1633 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
1634 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1635 // CHECK1-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
1636 // CHECK1-NEXT:    br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1637 // CHECK1:       .omp.final.then:
1638 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
1639 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1640 // CHECK1:       .omp.final.done:
1641 // CHECK1-NEXT:    ret void
1642 //
1643 //
1644 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined.omp_outlined
1645 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1646 // CHECK1-NEXT:  entry:
1647 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1648 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1649 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1650 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1651 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1652 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1653 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1654 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1655 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1656 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1657 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1658 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1659 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1660 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1661 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1662 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1663 // CHECK1-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
1664 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1665 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1666 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1667 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1668 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1669 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
1670 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1671 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1672 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1673 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
1674 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1675 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1676 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1677 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1678 // CHECK1:       cond.true:
1679 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1680 // CHECK1:       cond.false:
1681 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1682 // CHECK1-NEXT:    br label [[COND_END]]
1683 // CHECK1:       cond.end:
1684 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1685 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1686 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1687 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
1688 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1689 // CHECK1:       omp.inner.for.cond:
1690 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59:![0-9]+]]
1691 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP59]]
1692 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1693 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1694 // CHECK1:       omp.inner.for.body:
1695 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]
1696 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1697 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1698 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP59]]
1699 // CHECK1-NEXT:    call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP59]]
1700 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1701 // CHECK1:       omp.body.continue:
1702 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1703 // CHECK1:       omp.inner.for.inc:
1704 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]
1705 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1706 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]
1707 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP60:![0-9]+]]
1708 // CHECK1:       omp.inner.for.end:
1709 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1710 // CHECK1:       omp.loop.exit:
1711 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
1712 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1713 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1714 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1715 // CHECK1:       .omp.final.then:
1716 // CHECK1-NEXT:    store i32 100, ptr [[I]], align 4
1717 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1718 // CHECK1:       .omp.final.done:
1719 // CHECK1-NEXT:    ret void
1720 //
1721 //
1722 // CHECK3-LABEL: define {{[^@]+}}@_Z9gtid_testv
1723 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
1724 // CHECK3-NEXT:  entry:
1725 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1726 // CHECK3-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1727 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1728 // CHECK3-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1729 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1730 // CHECK3-NEXT:    store i32 3, ptr [[TMP0]], align 4
1731 // CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1732 // CHECK3-NEXT:    store i32 0, ptr [[TMP1]], align 4
1733 // CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1734 // CHECK3-NEXT:    store ptr null, ptr [[TMP2]], align 8
1735 // CHECK3-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1736 // CHECK3-NEXT:    store ptr null, ptr [[TMP3]], align 8
1737 // CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1738 // CHECK3-NEXT:    store ptr null, ptr [[TMP4]], align 8
1739 // CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1740 // CHECK3-NEXT:    store ptr null, ptr [[TMP5]], align 8
1741 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1742 // CHECK3-NEXT:    store ptr null, ptr [[TMP6]], align 8
1743 // CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1744 // CHECK3-NEXT:    store ptr null, ptr [[TMP7]], align 8
1745 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1746 // CHECK3-NEXT:    store i64 100, ptr [[TMP8]], align 8
1747 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1748 // CHECK3-NEXT:    store i64 0, ptr [[TMP9]], align 8
1749 // CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1750 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
1751 // CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1752 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
1753 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1754 // CHECK3-NEXT:    store i32 0, ptr [[TMP12]], align 4
1755 // CHECK3-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.region_id, ptr [[KERNEL_ARGS]])
1756 // CHECK3-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1757 // CHECK3-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1758 // CHECK3:       omp_offload.failed:
1759 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43() #[[ATTR2:[0-9]+]]
1760 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1761 // CHECK3:       omp_offload.cont:
1762 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
1763 // CHECK3-NEXT:    store i32 3, ptr [[TMP15]], align 4
1764 // CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
1765 // CHECK3-NEXT:    store i32 0, ptr [[TMP16]], align 4
1766 // CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
1767 // CHECK3-NEXT:    store ptr null, ptr [[TMP17]], align 8
1768 // CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
1769 // CHECK3-NEXT:    store ptr null, ptr [[TMP18]], align 8
1770 // CHECK3-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
1771 // CHECK3-NEXT:    store ptr null, ptr [[TMP19]], align 8
1772 // CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
1773 // CHECK3-NEXT:    store ptr null, ptr [[TMP20]], align 8
1774 // CHECK3-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
1775 // CHECK3-NEXT:    store ptr null, ptr [[TMP21]], align 8
1776 // CHECK3-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
1777 // CHECK3-NEXT:    store ptr null, ptr [[TMP22]], align 8
1778 // CHECK3-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
1779 // CHECK3-NEXT:    store i64 100, ptr [[TMP23]], align 8
1780 // CHECK3-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
1781 // CHECK3-NEXT:    store i64 0, ptr [[TMP24]], align 8
1782 // CHECK3-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
1783 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
1784 // CHECK3-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
1785 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4
1786 // CHECK3-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
1787 // CHECK3-NEXT:    store i32 0, ptr [[TMP27]], align 4
1788 // CHECK3-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, ptr [[KERNEL_ARGS2]])
1789 // CHECK3-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
1790 // CHECK3-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
1791 // CHECK3:       omp_offload.failed3:
1792 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2]]
1793 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
1794 // CHECK3:       omp_offload.cont4:
1795 // CHECK3-NEXT:    ret void
1796 //
1797 //
1798 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43
1799 // CHECK3-SAME: () #[[ATTR1:[0-9]+]] {
1800 // CHECK3-NEXT:  entry:
1801 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined)
1802 // CHECK3-NEXT:    ret void
1803 //
1804 //
1805 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined
1806 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1807 // CHECK3-NEXT:  entry:
1808 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1809 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1810 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1811 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1812 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1813 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1814 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1815 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1816 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1817 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1818 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1819 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1820 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
1821 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1822 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1823 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1824 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1825 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1826 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1827 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1828 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1829 // CHECK3:       cond.true:
1830 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1831 // CHECK3:       cond.false:
1832 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1833 // CHECK3-NEXT:    br label [[COND_END]]
1834 // CHECK3:       cond.end:
1835 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1836 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1837 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1838 // CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
1839 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1840 // CHECK3:       omp.inner.for.cond:
1841 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]
1842 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
1843 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1844 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1845 // CHECK3:       omp.inner.for.body:
1846 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP11]]
1847 // CHECK3-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1848 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
1849 // CHECK3-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1850 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP11]]
1851 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1852 // CHECK3:       omp.inner.for.inc:
1853 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
1854 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP11]]
1855 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1856 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
1857 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
1858 // CHECK3:       omp.inner.for.end:
1859 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1860 // CHECK3:       omp.loop.exit:
1861 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
1862 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1863 // CHECK3-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1864 // CHECK3-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1865 // CHECK3:       .omp.final.then:
1866 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
1867 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1868 // CHECK3:       .omp.final.done:
1869 // CHECK3-NEXT:    ret void
1870 //
1871 //
1872 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined.omp_outlined
1873 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
1874 // CHECK3-NEXT:  entry:
1875 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1876 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1877 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1878 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1879 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1880 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1881 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1882 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1883 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1884 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1885 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1886 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1887 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1888 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1889 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1890 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1891 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
1892 // CHECK3-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1893 // CHECK3-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1894 // CHECK3-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1895 // CHECK3-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
1896 // CHECK3-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1897 // CHECK3-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
1898 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1899 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1900 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1901 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
1902 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1903 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1904 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1905 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1906 // CHECK3:       cond.true:
1907 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1908 // CHECK3:       cond.false:
1909 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1910 // CHECK3-NEXT:    br label [[COND_END]]
1911 // CHECK3:       cond.end:
1912 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1913 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1914 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1915 // CHECK3-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
1916 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1917 // CHECK3:       omp.inner.for.cond:
1918 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
1919 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
1920 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1921 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1922 // CHECK3:       omp.inner.for.body:
1923 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
1924 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1925 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1926 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]
1927 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1928 // CHECK3:       omp.body.continue:
1929 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1930 // CHECK3:       omp.inner.for.inc:
1931 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
1932 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
1933 // CHECK3-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
1934 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
1935 // CHECK3:       omp.inner.for.end:
1936 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1937 // CHECK3:       omp.loop.exit:
1938 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
1939 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1940 // CHECK3-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
1941 // CHECK3-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1942 // CHECK3:       .omp.final.then:
1943 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
1944 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1945 // CHECK3:       .omp.final.done:
1946 // CHECK3-NEXT:    ret void
1947 //
1948 //
1949 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48
1950 // CHECK3-SAME: () #[[ATTR1]] {
1951 // CHECK3-NEXT:  entry:
1952 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined)
1953 // CHECK3-NEXT:    ret void
1954 //
1955 //
1956 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined
1957 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
1958 // CHECK3-NEXT:  entry:
1959 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1960 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1961 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1962 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1963 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1964 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1965 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1966 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1967 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1968 // CHECK3-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
1969 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1970 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1971 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1972 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
1973 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1974 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1975 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1976 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1977 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1978 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1979 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
1980 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1981 // CHECK3:       cond.true:
1982 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1983 // CHECK3:       cond.false:
1984 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1985 // CHECK3-NEXT:    br label [[COND_END]]
1986 // CHECK3:       cond.end:
1987 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1988 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1989 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1990 // CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
1991 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1992 // CHECK3:       omp.inner.for.cond:
1993 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20:![0-9]+]]
1994 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
1995 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1996 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1997 // CHECK3:       omp.inner.for.body:
1998 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP20]]
1999 // CHECK3-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2000 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
2001 // CHECK3-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2002 // CHECK3-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
2003 // CHECK3-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP20]]
2004 // CHECK3-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP20]]
2005 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP20]]
2006 // CHECK3-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
2007 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2008 // CHECK3:       omp.inner.for.inc:
2009 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
2010 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP20]]
2011 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2012 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
2013 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
2014 // CHECK3:       omp.inner.for.end:
2015 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2016 // CHECK3:       omp.loop.exit:
2017 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
2018 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2019 // CHECK3-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2020 // CHECK3-NEXT:    br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2021 // CHECK3:       .omp.final.then:
2022 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
2023 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2024 // CHECK3:       .omp.final.done:
2025 // CHECK3-NEXT:    ret void
2026 //
2027 //
2028 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined.omp_outlined
2029 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2030 // CHECK3-NEXT:  entry:
2031 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2032 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2033 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2034 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2035 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2036 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2037 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2038 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2039 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2040 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2041 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2042 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2043 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2044 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2045 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2046 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2047 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
2048 // CHECK3-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2049 // CHECK3-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2050 // CHECK3-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2051 // CHECK3-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2052 // CHECK3-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2053 // CHECK3-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
2054 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2055 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2056 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2057 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
2058 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2059 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2060 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2061 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2062 // CHECK3:       cond.true:
2063 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2064 // CHECK3:       cond.false:
2065 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2066 // CHECK3-NEXT:    br label [[COND_END]]
2067 // CHECK3:       cond.end:
2068 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2069 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2070 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2071 // CHECK3-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
2072 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2073 // CHECK3:       omp.inner.for.cond:
2074 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]]
2075 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP23]]
2076 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2077 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2078 // CHECK3:       omp.inner.for.body:
2079 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
2080 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2081 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2082 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP23]]
2083 // CHECK3-NEXT:    call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP23]]
2084 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2085 // CHECK3:       omp.body.continue:
2086 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2087 // CHECK3:       omp.inner.for.inc:
2088 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
2089 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2090 // CHECK3-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
2091 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
2092 // CHECK3:       omp.inner.for.end:
2093 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2094 // CHECK3:       omp.loop.exit:
2095 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
2096 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2097 // CHECK3-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2098 // CHECK3-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2099 // CHECK3:       .omp.final.then:
2100 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
2101 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2102 // CHECK3:       .omp.final.done:
2103 // CHECK3-NEXT:    ret void
2104 //
2105 //
2106 // CHECK3-LABEL: define {{[^@]+}}@main
2107 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] {
2108 // CHECK3-NEXT:  entry:
2109 // CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2110 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2111 // CHECK3-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2112 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
2113 // CHECK3-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2114 // CHECK3-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
2115 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
2116 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
2117 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
2118 // CHECK3-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
2119 // CHECK3-NEXT:    [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2120 // CHECK3-NEXT:    store i32 0, ptr [[RETVAL]], align 4
2121 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
2122 // CHECK3-NEXT:    store i32 3, ptr [[TMP0]], align 4
2123 // CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
2124 // CHECK3-NEXT:    store i32 0, ptr [[TMP1]], align 4
2125 // CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
2126 // CHECK3-NEXT:    store ptr null, ptr [[TMP2]], align 8
2127 // CHECK3-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
2128 // CHECK3-NEXT:    store ptr null, ptr [[TMP3]], align 8
2129 // CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
2130 // CHECK3-NEXT:    store ptr null, ptr [[TMP4]], align 8
2131 // CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
2132 // CHECK3-NEXT:    store ptr null, ptr [[TMP5]], align 8
2133 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
2134 // CHECK3-NEXT:    store ptr null, ptr [[TMP6]], align 8
2135 // CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
2136 // CHECK3-NEXT:    store ptr null, ptr [[TMP7]], align 8
2137 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
2138 // CHECK3-NEXT:    store i64 100, ptr [[TMP8]], align 8
2139 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
2140 // CHECK3-NEXT:    store i64 0, ptr [[TMP9]], align 8
2141 // CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
2142 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
2143 // CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
2144 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
2145 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
2146 // CHECK3-NEXT:    store i32 0, ptr [[TMP12]], align 4
2147 // CHECK3-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, ptr [[KERNEL_ARGS]])
2148 // CHECK3-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
2149 // CHECK3-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2150 // CHECK3:       omp_offload.failed:
2151 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]]
2152 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2153 // CHECK3:       omp_offload.cont:
2154 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
2155 // CHECK3-NEXT:    store i32 3, ptr [[TMP15]], align 4
2156 // CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
2157 // CHECK3-NEXT:    store i32 0, ptr [[TMP16]], align 4
2158 // CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
2159 // CHECK3-NEXT:    store ptr null, ptr [[TMP17]], align 8
2160 // CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
2161 // CHECK3-NEXT:    store ptr null, ptr [[TMP18]], align 8
2162 // CHECK3-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
2163 // CHECK3-NEXT:    store ptr null, ptr [[TMP19]], align 8
2164 // CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
2165 // CHECK3-NEXT:    store ptr null, ptr [[TMP20]], align 8
2166 // CHECK3-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
2167 // CHECK3-NEXT:    store ptr null, ptr [[TMP21]], align 8
2168 // CHECK3-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
2169 // CHECK3-NEXT:    store ptr null, ptr [[TMP22]], align 8
2170 // CHECK3-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
2171 // CHECK3-NEXT:    store i64 100, ptr [[TMP23]], align 8
2172 // CHECK3-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
2173 // CHECK3-NEXT:    store i64 0, ptr [[TMP24]], align 8
2174 // CHECK3-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
2175 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
2176 // CHECK3-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
2177 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4
2178 // CHECK3-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
2179 // CHECK3-NEXT:    store i32 0, ptr [[TMP27]], align 4
2180 // CHECK3-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.region_id, ptr [[KERNEL_ARGS2]])
2181 // CHECK3-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
2182 // CHECK3-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
2183 // CHECK3:       omp_offload.failed3:
2184 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90() #[[ATTR2]]
2185 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
2186 // CHECK3:       omp_offload.cont4:
2187 // CHECK3-NEXT:    [[TMP30:%.*]] = load i32, ptr @Arg, align 4
2188 // CHECK3-NEXT:    store i32 [[TMP30]], ptr [[ARG_CASTED]], align 4
2189 // CHECK3-NEXT:    [[TMP31:%.*]] = load i64, ptr [[ARG_CASTED]], align 8
2190 // CHECK3-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2191 // CHECK3-NEXT:    store i64 [[TMP31]], ptr [[TMP32]], align 8
2192 // CHECK3-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2193 // CHECK3-NEXT:    store i64 [[TMP31]], ptr [[TMP33]], align 8
2194 // CHECK3-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2195 // CHECK3-NEXT:    store ptr null, ptr [[TMP34]], align 8
2196 // CHECK3-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2197 // CHECK3-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2198 // CHECK3-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 0
2199 // CHECK3-NEXT:    store i32 3, ptr [[TMP37]], align 4
2200 // CHECK3-NEXT:    [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 1
2201 // CHECK3-NEXT:    store i32 1, ptr [[TMP38]], align 4
2202 // CHECK3-NEXT:    [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 2
2203 // CHECK3-NEXT:    store ptr [[TMP35]], ptr [[TMP39]], align 8
2204 // CHECK3-NEXT:    [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 3
2205 // CHECK3-NEXT:    store ptr [[TMP36]], ptr [[TMP40]], align 8
2206 // CHECK3-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 4
2207 // CHECK3-NEXT:    store ptr @.offload_sizes, ptr [[TMP41]], align 8
2208 // CHECK3-NEXT:    [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 5
2209 // CHECK3-NEXT:    store ptr @.offload_maptypes, ptr [[TMP42]], align 8
2210 // CHECK3-NEXT:    [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 6
2211 // CHECK3-NEXT:    store ptr null, ptr [[TMP43]], align 8
2212 // CHECK3-NEXT:    [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 7
2213 // CHECK3-NEXT:    store ptr null, ptr [[TMP44]], align 8
2214 // CHECK3-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 8
2215 // CHECK3-NEXT:    store i64 100, ptr [[TMP45]], align 8
2216 // CHECK3-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 9
2217 // CHECK3-NEXT:    store i64 0, ptr [[TMP46]], align 8
2218 // CHECK3-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 10
2219 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP47]], align 4
2220 // CHECK3-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 11
2221 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP48]], align 4
2222 // CHECK3-NEXT:    [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 12
2223 // CHECK3-NEXT:    store i32 0, ptr [[TMP49]], align 4
2224 // CHECK3-NEXT:    [[TMP50:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.region_id, ptr [[KERNEL_ARGS6]])
2225 // CHECK3-NEXT:    [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 0
2226 // CHECK3-NEXT:    br i1 [[TMP51]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
2227 // CHECK3:       omp_offload.failed7:
2228 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99(i64 [[TMP31]]) #[[ATTR2]]
2229 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
2230 // CHECK3:       omp_offload.cont8:
2231 // CHECK3-NEXT:    [[TMP52:%.*]] = load i32, ptr @Arg, align 4
2232 // CHECK3-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP52]])
2233 // CHECK3-NEXT:    ret i32 [[CALL]]
2234 //
2235 //
2236 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
2237 // CHECK3-SAME: () #[[ATTR1]] {
2238 // CHECK3-NEXT:  entry:
2239 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined)
2240 // CHECK3-NEXT:    ret void
2241 //
2242 //
2243 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined
2244 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2245 // CHECK3-NEXT:  entry:
2246 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2247 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2248 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2249 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2250 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2251 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2252 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2253 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2254 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2255 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2256 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2257 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2258 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
2259 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2260 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2261 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2262 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2263 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2264 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2265 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2266 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2267 // CHECK3:       cond.true:
2268 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2269 // CHECK3:       cond.false:
2270 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2271 // CHECK3-NEXT:    br label [[COND_END]]
2272 // CHECK3:       cond.end:
2273 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2274 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2275 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2276 // CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2277 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2278 // CHECK3:       omp.inner.for.cond:
2279 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26:![0-9]+]]
2280 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
2281 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2282 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2283 // CHECK3:       omp.inner.for.body:
2284 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP26]]
2285 // CHECK3-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2286 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
2287 // CHECK3-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2288 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP26]]
2289 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2290 // CHECK3:       omp.inner.for.inc:
2291 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
2292 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP26]]
2293 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
2294 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
2295 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
2296 // CHECK3:       omp.inner.for.end:
2297 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2298 // CHECK3:       omp.loop.exit:
2299 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
2300 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2301 // CHECK3-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
2302 // CHECK3-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2303 // CHECK3:       .omp.final.then:
2304 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
2305 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2306 // CHECK3:       .omp.final.done:
2307 // CHECK3-NEXT:    ret void
2308 //
2309 //
2310 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined.omp_outlined
2311 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2312 // CHECK3-NEXT:  entry:
2313 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2314 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2315 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2316 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2317 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2318 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2319 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2320 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2321 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2322 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2323 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2324 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2325 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2326 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2327 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2328 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2329 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
2330 // CHECK3-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2331 // CHECK3-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2332 // CHECK3-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2333 // CHECK3-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2334 // CHECK3-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2335 // CHECK3-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
2336 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2337 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2338 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2339 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
2340 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2341 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2342 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2343 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2344 // CHECK3:       cond.true:
2345 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2346 // CHECK3:       cond.false:
2347 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2348 // CHECK3-NEXT:    br label [[COND_END]]
2349 // CHECK3:       cond.end:
2350 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2351 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2352 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2353 // CHECK3-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
2354 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2355 // CHECK3:       omp.inner.for.cond:
2356 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29:![0-9]+]]
2357 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP29]]
2358 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2359 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2360 // CHECK3:       omp.inner.for.body:
2361 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
2362 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2363 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2364 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP29]]
2365 // CHECK3-NEXT:    call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP29]]
2366 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2367 // CHECK3:       omp.body.continue:
2368 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2369 // CHECK3:       omp.inner.for.inc:
2370 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
2371 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2372 // CHECK3-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
2373 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
2374 // CHECK3:       omp.inner.for.end:
2375 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2376 // CHECK3:       omp.loop.exit:
2377 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
2378 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2379 // CHECK3-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2380 // CHECK3-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2381 // CHECK3:       .omp.final.then:
2382 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
2383 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2384 // CHECK3:       .omp.final.done:
2385 // CHECK3-NEXT:    ret void
2386 //
2387 //
2388 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90
2389 // CHECK3-SAME: () #[[ATTR1]] {
2390 // CHECK3-NEXT:  entry:
2391 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined)
2392 // CHECK3-NEXT:    ret void
2393 //
2394 //
2395 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined
2396 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
2397 // CHECK3-NEXT:  entry:
2398 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2399 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2400 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2401 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2402 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2403 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2404 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2405 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2406 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2407 // CHECK3-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2408 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2409 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2410 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2411 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
2412 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2413 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2414 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2415 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2416 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2417 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2418 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
2419 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2420 // CHECK3:       cond.true:
2421 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2422 // CHECK3:       cond.false:
2423 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2424 // CHECK3-NEXT:    br label [[COND_END]]
2425 // CHECK3:       cond.end:
2426 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2427 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2428 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2429 // CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2430 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2431 // CHECK3:       omp.inner.for.cond:
2432 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2433 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2434 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2435 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2436 // CHECK3:       omp.inner.for.body:
2437 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2438 // CHECK3-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
2439 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2440 // CHECK3-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
2441 // CHECK3-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]])
2442 // CHECK3-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2443 // CHECK3-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4
2444 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
2445 // CHECK3-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]])
2446 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2447 // CHECK3:       omp.inner.for.inc:
2448 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2449 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2450 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2451 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2452 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]
2453 // CHECK3:       omp.inner.for.end:
2454 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2455 // CHECK3:       omp.loop.exit:
2456 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
2457 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2458 // CHECK3-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2459 // CHECK3-NEXT:    br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2460 // CHECK3:       .omp.final.then:
2461 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
2462 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2463 // CHECK3:       .omp.final.done:
2464 // CHECK3-NEXT:    ret void
2465 //
2466 //
2467 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined.omp_outlined
2468 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
2469 // CHECK3-NEXT:  entry:
2470 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2471 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2472 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2473 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2474 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2475 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2476 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2477 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2478 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2479 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2480 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2481 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2482 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2483 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2484 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2485 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2486 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
2487 // CHECK3-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2488 // CHECK3-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2489 // CHECK3-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2490 // CHECK3-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2491 // CHECK3-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2492 // CHECK3-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
2493 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2494 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2495 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2496 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
2497 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2498 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2499 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2500 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2501 // CHECK3:       cond.true:
2502 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2503 // CHECK3:       cond.false:
2504 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2505 // CHECK3-NEXT:    br label [[COND_END]]
2506 // CHECK3:       cond.end:
2507 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2508 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2509 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2510 // CHECK3-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
2511 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2512 // CHECK3:       omp.inner.for.cond:
2513 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2514 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2515 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2516 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2517 // CHECK3:       omp.inner.for.body:
2518 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2519 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
2520 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2521 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2522 // CHECK3-NEXT:    call void @_Z3fn5v()
2523 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2524 // CHECK3:       omp.body.continue:
2525 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2526 // CHECK3:       omp.inner.for.inc:
2527 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2528 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
2529 // CHECK3-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
2530 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
2531 // CHECK3:       omp.inner.for.end:
2532 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2533 // CHECK3:       omp.loop.exit:
2534 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
2535 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2536 // CHECK3-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2537 // CHECK3-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2538 // CHECK3:       .omp.final.then:
2539 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
2540 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2541 // CHECK3:       .omp.final.done:
2542 // CHECK3-NEXT:    ret void
2543 //
2544 //
2545 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99
2546 // CHECK3-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
2547 // CHECK3-NEXT:  entry:
2548 // CHECK3-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
2549 // CHECK3-NEXT:    store i64 [[ARG]], ptr [[ARG_ADDR]], align 8
2550 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined, ptr [[ARG_ADDR]])
2551 // CHECK3-NEXT:    ret void
2552 //
2553 //
2554 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined
2555 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] {
2556 // CHECK3-NEXT:  entry:
2557 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2558 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2559 // CHECK3-NEXT:    [[ARG_ADDR:%.*]] = alloca ptr, align 8
2560 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
2561 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2562 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2563 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2564 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2565 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2566 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2567 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2568 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
2569 // CHECK3-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
2570 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__CASTED11:%.*]] = alloca i64, align 8
2571 // CHECK3-NEXT:    [[DOTBOUND_ZERO_ADDR16:%.*]] = alloca i32, align 4
2572 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2573 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2574 // CHECK3-NEXT:    store ptr [[ARG]], ptr [[ARG_ADDR]], align 8
2575 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[ARG_ADDR]], align 8
2576 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2577 // CHECK3-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 0
2578 // CHECK3-NEXT:    [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
2579 // CHECK3-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
2580 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2581 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
2582 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2583 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2584 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2585 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
2586 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2587 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2588 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2589 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2590 // CHECK3:       cond.true:
2591 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2592 // CHECK3:       cond.false:
2593 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2594 // CHECK3-NEXT:    br label [[COND_END]]
2595 // CHECK3:       cond.end:
2596 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2597 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2598 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2599 // CHECK3-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
2600 // CHECK3-NEXT:    [[TMP7:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
2601 // CHECK3-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP7]] to i1
2602 // CHECK3-NEXT:    br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE6:%.*]]
2603 // CHECK3:       omp_if.then:
2604 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2605 // CHECK3:       omp.inner.for.cond:
2606 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35:![0-9]+]]
2607 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP35]]
2608 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2609 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2610 // CHECK3:       omp.inner.for.body:
2611 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP35]]
2612 // CHECK3-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2613 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP35]]
2614 // CHECK3-NEXT:    [[TMP13:%.*]] = zext i32 [[TMP12]] to i64
2615 // CHECK3-NEXT:    [[TMP14:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1, !llvm.access.group [[ACC_GRP35]]
2616 // CHECK3-NEXT:    [[LOADEDV2:%.*]] = trunc i8 [[TMP14]] to i1
2617 // CHECK3-NEXT:    [[STOREDV3:%.*]] = zext i1 [[LOADEDV2]] to i8
2618 // CHECK3-NEXT:    store i8 [[STOREDV3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1, !llvm.access.group [[ACC_GRP35]]
2619 // CHECK3-NEXT:    [[TMP15:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP35]]
2620 // CHECK3-NEXT:    [[TMP16:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1, !llvm.access.group [[ACC_GRP35]]
2621 // CHECK3-NEXT:    [[LOADEDV4:%.*]] = trunc i8 [[TMP16]] to i1
2622 // CHECK3-NEXT:    br i1 [[LOADEDV4]], label [[OMP_IF_THEN5:%.*]], label [[OMP_IF_ELSE:%.*]]
2623 // CHECK3:       omp_if.then5:
2624 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined, i64 [[TMP11]], i64 [[TMP13]], i64 [[TMP15]]), !llvm.access.group [[ACC_GRP35]]
2625 // CHECK3-NEXT:    br label [[OMP_IF_END:%.*]]
2626 // CHECK3:       omp_if.else:
2627 // CHECK3-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP3]]), !llvm.access.group [[ACC_GRP35]]
2628 // CHECK3-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP35]]
2629 // CHECK3-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP35]]
2630 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined(ptr [[TMP17]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP11]], i64 [[TMP13]], i64 [[TMP15]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP35]]
2631 // CHECK3-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP3]]), !llvm.access.group [[ACC_GRP35]]
2632 // CHECK3-NEXT:    br label [[OMP_IF_END]]
2633 // CHECK3:       omp_if.end:
2634 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2635 // CHECK3:       omp.inner.for.inc:
2636 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
2637 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP35]]
2638 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
2639 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
2640 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
2641 // CHECK3:       omp.inner.for.end:
2642 // CHECK3-NEXT:    br label [[OMP_IF_END21:%.*]]
2643 // CHECK3:       omp_if.else6:
2644 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
2645 // CHECK3:       omp.inner.for.cond7:
2646 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2647 // CHECK3-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2648 // CHECK3-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
2649 // CHECK3-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END20:%.*]]
2650 // CHECK3:       omp.inner.for.body9:
2651 // CHECK3-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2652 // CHECK3-NEXT:    [[TMP23:%.*]] = zext i32 [[TMP22]] to i64
2653 // CHECK3-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2654 // CHECK3-NEXT:    [[TMP25:%.*]] = zext i32 [[TMP24]] to i64
2655 // CHECK3-NEXT:    [[TMP26:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
2656 // CHECK3-NEXT:    [[LOADEDV10:%.*]] = trunc i8 [[TMP26]] to i1
2657 // CHECK3-NEXT:    [[STOREDV12:%.*]] = zext i1 [[LOADEDV10]] to i8
2658 // CHECK3-NEXT:    store i8 [[STOREDV12]], ptr [[DOTCAPTURE_EXPR__CASTED11]], align 1
2659 // CHECK3-NEXT:    [[TMP27:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED11]], align 8
2660 // CHECK3-NEXT:    [[TMP28:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
2661 // CHECK3-NEXT:    [[LOADEDV13:%.*]] = trunc i8 [[TMP28]] to i1
2662 // CHECK3-NEXT:    br i1 [[LOADEDV13]], label [[OMP_IF_THEN14:%.*]], label [[OMP_IF_ELSE15:%.*]]
2663 // CHECK3:       omp_if.then14:
2664 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined.1, i64 [[TMP23]], i64 [[TMP25]], i64 [[TMP27]])
2665 // CHECK3-NEXT:    br label [[OMP_IF_END17:%.*]]
2666 // CHECK3:       omp_if.else15:
2667 // CHECK3-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP3]])
2668 // CHECK3-NEXT:    [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2669 // CHECK3-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR16]], align 4
2670 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined.1(ptr [[TMP29]], ptr [[DOTBOUND_ZERO_ADDR16]], i64 [[TMP23]], i64 [[TMP25]], i64 [[TMP27]]) #[[ATTR2]]
2671 // CHECK3-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP3]])
2672 // CHECK3-NEXT:    br label [[OMP_IF_END17]]
2673 // CHECK3:       omp_if.end17:
2674 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC18:%.*]]
2675 // CHECK3:       omp.inner.for.inc18:
2676 // CHECK3-NEXT:    [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2677 // CHECK3-NEXT:    [[TMP31:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2678 // CHECK3-NEXT:    [[ADD19:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
2679 // CHECK3-NEXT:    store i32 [[ADD19]], ptr [[DOTOMP_IV]], align 4
2680 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP38:![0-9]+]]
2681 // CHECK3:       omp.inner.for.end20:
2682 // CHECK3-NEXT:    br label [[OMP_IF_END21]]
2683 // CHECK3:       omp_if.end21:
2684 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2685 // CHECK3:       omp.loop.exit:
2686 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])
2687 // CHECK3-NEXT:    [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2688 // CHECK3-NEXT:    [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
2689 // CHECK3-NEXT:    br i1 [[TMP33]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2690 // CHECK3:       .omp.final.then:
2691 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
2692 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2693 // CHECK3:       .omp.final.done:
2694 // CHECK3-NEXT:    ret void
2695 //
2696 //
2697 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined
2698 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
2699 // CHECK3-NEXT:  entry:
2700 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2701 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2702 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2703 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2704 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2705 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2706 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2707 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2708 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2709 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2710 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2711 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2712 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2713 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2714 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2715 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2716 // CHECK3-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
2717 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2718 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
2719 // CHECK3-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2720 // CHECK3-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2721 // CHECK3-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2722 // CHECK3-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2723 // CHECK3-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2724 // CHECK3-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
2725 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2726 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2727 // CHECK3-NEXT:    [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
2728 // CHECK3-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
2729 // CHECK3-NEXT:    br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2730 // CHECK3:       omp_if.then:
2731 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2732 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
2733 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2734 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2735 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99
2736 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2737 // CHECK3:       cond.true:
2738 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2739 // CHECK3:       cond.false:
2740 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2741 // CHECK3-NEXT:    br label [[COND_END]]
2742 // CHECK3:       cond.end:
2743 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2744 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2745 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2746 // CHECK3-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
2747 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2748 // CHECK3:       omp.inner.for.cond:
2749 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39:![0-9]+]]
2750 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP39]]
2751 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2752 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2753 // CHECK3:       omp.inner.for.body:
2754 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
2755 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2756 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2757 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP39]]
2758 // CHECK3-NEXT:    call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP39]]
2759 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2760 // CHECK3:       omp.body.continue:
2761 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2762 // CHECK3:       omp.inner.for.inc:
2763 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
2764 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP11]], 1
2765 // CHECK3-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
2766 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
2767 // CHECK3:       omp.inner.for.end:
2768 // CHECK3-NEXT:    br label [[OMP_IF_END:%.*]]
2769 // CHECK3:       omp_if.else:
2770 // CHECK3-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2771 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
2772 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP13]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2773 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2774 // CHECK3-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP14]], 99
2775 // CHECK3-NEXT:    br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
2776 // CHECK3:       cond.true5:
2777 // CHECK3-NEXT:    br label [[COND_END7:%.*]]
2778 // CHECK3:       cond.false6:
2779 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2780 // CHECK3-NEXT:    br label [[COND_END7]]
2781 // CHECK3:       cond.end7:
2782 // CHECK3-NEXT:    [[COND8:%.*]] = phi i32 [ 99, [[COND_TRUE5]] ], [ [[TMP15]], [[COND_FALSE6]] ]
2783 // CHECK3-NEXT:    store i32 [[COND8]], ptr [[DOTOMP_UB]], align 4
2784 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2785 // CHECK3-NEXT:    store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4
2786 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND9:%.*]]
2787 // CHECK3:       omp.inner.for.cond9:
2788 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2789 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2790 // CHECK3-NEXT:    [[CMP10:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
2791 // CHECK3-NEXT:    br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY11:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
2792 // CHECK3:       omp.inner.for.body11:
2793 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2794 // CHECK3-NEXT:    [[MUL12:%.*]] = mul nsw i32 [[TMP19]], 1
2795 // CHECK3-NEXT:    [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
2796 // CHECK3-NEXT:    store i32 [[ADD13]], ptr [[I]], align 4
2797 // CHECK3-NEXT:    call void @_Z3fn6v()
2798 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE14:%.*]]
2799 // CHECK3:       omp.body.continue14:
2800 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC15:%.*]]
2801 // CHECK3:       omp.inner.for.inc15:
2802 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2803 // CHECK3-NEXT:    [[ADD16:%.*]] = add nsw i32 [[TMP20]], 1
2804 // CHECK3-NEXT:    store i32 [[ADD16]], ptr [[DOTOMP_IV]], align 4
2805 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND9]], !llvm.loop [[LOOP42:![0-9]+]]
2806 // CHECK3:       omp.inner.for.end17:
2807 // CHECK3-NEXT:    br label [[OMP_IF_END]]
2808 // CHECK3:       omp_if.end:
2809 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2810 // CHECK3:       omp.loop.exit:
2811 // CHECK3-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2812 // CHECK3-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
2813 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])
2814 // CHECK3-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2815 // CHECK3-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2816 // CHECK3-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2817 // CHECK3:       .omp.final.then:
2818 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
2819 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2820 // CHECK3:       .omp.final.done:
2821 // CHECK3-NEXT:    ret void
2822 //
2823 //
2824 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined.1
2825 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
2826 // CHECK3-NEXT:  entry:
2827 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2828 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2829 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2830 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2831 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2832 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2833 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2834 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2835 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2836 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2837 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2838 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2839 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2840 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2841 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2842 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2843 // CHECK3-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
2844 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2845 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
2846 // CHECK3-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2847 // CHECK3-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
2848 // CHECK3-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2849 // CHECK3-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
2850 // CHECK3-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2851 // CHECK3-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
2852 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2853 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2854 // CHECK3-NEXT:    [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
2855 // CHECK3-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
2856 // CHECK3-NEXT:    br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
2857 // CHECK3:       omp_if.then:
2858 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2859 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
2860 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2861 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2862 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99
2863 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2864 // CHECK3:       cond.true:
2865 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2866 // CHECK3:       cond.false:
2867 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2868 // CHECK3-NEXT:    br label [[COND_END]]
2869 // CHECK3:       cond.end:
2870 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2871 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2872 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2873 // CHECK3-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
2874 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2875 // CHECK3:       omp.inner.for.cond:
2876 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43:![0-9]+]]
2877 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP43]]
2878 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2879 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2880 // CHECK3:       omp.inner.for.body:
2881 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]
2882 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2883 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2884 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP43]]
2885 // CHECK3-NEXT:    call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP43]]
2886 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2887 // CHECK3:       omp.body.continue:
2888 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2889 // CHECK3:       omp.inner.for.inc:
2890 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]
2891 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP11]], 1
2892 // CHECK3-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]
2893 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]
2894 // CHECK3:       omp.inner.for.end:
2895 // CHECK3-NEXT:    br label [[OMP_IF_END:%.*]]
2896 // CHECK3:       omp_if.else:
2897 // CHECK3-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2898 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
2899 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP13]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2900 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2901 // CHECK3-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP14]], 99
2902 // CHECK3-NEXT:    br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
2903 // CHECK3:       cond.true5:
2904 // CHECK3-NEXT:    br label [[COND_END7:%.*]]
2905 // CHECK3:       cond.false6:
2906 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2907 // CHECK3-NEXT:    br label [[COND_END7]]
2908 // CHECK3:       cond.end7:
2909 // CHECK3-NEXT:    [[COND8:%.*]] = phi i32 [ 99, [[COND_TRUE5]] ], [ [[TMP15]], [[COND_FALSE6]] ]
2910 // CHECK3-NEXT:    store i32 [[COND8]], ptr [[DOTOMP_UB]], align 4
2911 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2912 // CHECK3-NEXT:    store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4
2913 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND9:%.*]]
2914 // CHECK3:       omp.inner.for.cond9:
2915 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2916 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2917 // CHECK3-NEXT:    [[CMP10:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
2918 // CHECK3-NEXT:    br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY11:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
2919 // CHECK3:       omp.inner.for.body11:
2920 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2921 // CHECK3-NEXT:    [[MUL12:%.*]] = mul nsw i32 [[TMP19]], 1
2922 // CHECK3-NEXT:    [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
2923 // CHECK3-NEXT:    store i32 [[ADD13]], ptr [[I]], align 4
2924 // CHECK3-NEXT:    call void @_Z3fn6v()
2925 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE14:%.*]]
2926 // CHECK3:       omp.body.continue14:
2927 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC15:%.*]]
2928 // CHECK3:       omp.inner.for.inc15:
2929 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2930 // CHECK3-NEXT:    [[ADD16:%.*]] = add nsw i32 [[TMP20]], 1
2931 // CHECK3-NEXT:    store i32 [[ADD16]], ptr [[DOTOMP_IV]], align 4
2932 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND9]], !llvm.loop [[LOOP46:![0-9]+]]
2933 // CHECK3:       omp.inner.for.end17:
2934 // CHECK3-NEXT:    br label [[OMP_IF_END]]
2935 // CHECK3:       omp_if.end:
2936 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2937 // CHECK3:       omp.loop.exit:
2938 // CHECK3-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2939 // CHECK3-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
2940 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])
2941 // CHECK3-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2942 // CHECK3-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2943 // CHECK3-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2944 // CHECK3:       .omp.final.then:
2945 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
2946 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2947 // CHECK3:       .omp.final.done:
2948 // CHECK3-NEXT:    ret void
2949 //
2950 //
2951 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
2952 // CHECK3-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
2953 // CHECK3-NEXT:  entry:
2954 // CHECK3-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
2955 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2956 // CHECK3-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2957 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
2958 // CHECK3-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2959 // CHECK3-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
2960 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
2961 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
2962 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
2963 // CHECK3-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
2964 // CHECK3-NEXT:    [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2965 // CHECK3-NEXT:    store i32 [[ARG]], ptr [[ARG_ADDR]], align 4
2966 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
2967 // CHECK3-NEXT:    store i32 3, ptr [[TMP0]], align 4
2968 // CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
2969 // CHECK3-NEXT:    store i32 0, ptr [[TMP1]], align 4
2970 // CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
2971 // CHECK3-NEXT:    store ptr null, ptr [[TMP2]], align 8
2972 // CHECK3-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
2973 // CHECK3-NEXT:    store ptr null, ptr [[TMP3]], align 8
2974 // CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
2975 // CHECK3-NEXT:    store ptr null, ptr [[TMP4]], align 8
2976 // CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
2977 // CHECK3-NEXT:    store ptr null, ptr [[TMP5]], align 8
2978 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
2979 // CHECK3-NEXT:    store ptr null, ptr [[TMP6]], align 8
2980 // CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
2981 // CHECK3-NEXT:    store ptr null, ptr [[TMP7]], align 8
2982 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
2983 // CHECK3-NEXT:    store i64 100, ptr [[TMP8]], align 8
2984 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
2985 // CHECK3-NEXT:    store i64 0, ptr [[TMP9]], align 8
2986 // CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
2987 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
2988 // CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
2989 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
2990 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
2991 // CHECK3-NEXT:    store i32 0, ptr [[TMP12]], align 4
2992 // CHECK3-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.region_id, ptr [[KERNEL_ARGS]])
2993 // CHECK3-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
2994 // CHECK3-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2995 // CHECK3:       omp_offload.failed:
2996 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59() #[[ATTR2]]
2997 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2998 // CHECK3:       omp_offload.cont:
2999 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
3000 // CHECK3-NEXT:    store i32 3, ptr [[TMP15]], align 4
3001 // CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
3002 // CHECK3-NEXT:    store i32 0, ptr [[TMP16]], align 4
3003 // CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
3004 // CHECK3-NEXT:    store ptr null, ptr [[TMP17]], align 8
3005 // CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
3006 // CHECK3-NEXT:    store ptr null, ptr [[TMP18]], align 8
3007 // CHECK3-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
3008 // CHECK3-NEXT:    store ptr null, ptr [[TMP19]], align 8
3009 // CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
3010 // CHECK3-NEXT:    store ptr null, ptr [[TMP20]], align 8
3011 // CHECK3-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
3012 // CHECK3-NEXT:    store ptr null, ptr [[TMP21]], align 8
3013 // CHECK3-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
3014 // CHECK3-NEXT:    store ptr null, ptr [[TMP22]], align 8
3015 // CHECK3-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
3016 // CHECK3-NEXT:    store i64 100, ptr [[TMP23]], align 8
3017 // CHECK3-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
3018 // CHECK3-NEXT:    store i64 0, ptr [[TMP24]], align 8
3019 // CHECK3-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
3020 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
3021 // CHECK3-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
3022 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4
3023 // CHECK3-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
3024 // CHECK3-NEXT:    store i32 0, ptr [[TMP27]], align 4
3025 // CHECK3-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.region_id, ptr [[KERNEL_ARGS2]])
3026 // CHECK3-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
3027 // CHECK3-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
3028 // CHECK3:       omp_offload.failed3:
3029 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65() #[[ATTR2]]
3030 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
3031 // CHECK3:       omp_offload.cont4:
3032 // CHECK3-NEXT:    [[TMP30:%.*]] = load i32, ptr [[ARG_ADDR]], align 4
3033 // CHECK3-NEXT:    store i32 [[TMP30]], ptr [[ARG_CASTED]], align 4
3034 // CHECK3-NEXT:    [[TMP31:%.*]] = load i64, ptr [[ARG_CASTED]], align 8
3035 // CHECK3-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3036 // CHECK3-NEXT:    store i64 [[TMP31]], ptr [[TMP32]], align 8
3037 // CHECK3-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3038 // CHECK3-NEXT:    store i64 [[TMP31]], ptr [[TMP33]], align 8
3039 // CHECK3-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
3040 // CHECK3-NEXT:    store ptr null, ptr [[TMP34]], align 8
3041 // CHECK3-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3042 // CHECK3-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3043 // CHECK3-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 0
3044 // CHECK3-NEXT:    store i32 3, ptr [[TMP37]], align 4
3045 // CHECK3-NEXT:    [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 1
3046 // CHECK3-NEXT:    store i32 1, ptr [[TMP38]], align 4
3047 // CHECK3-NEXT:    [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 2
3048 // CHECK3-NEXT:    store ptr [[TMP35]], ptr [[TMP39]], align 8
3049 // CHECK3-NEXT:    [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 3
3050 // CHECK3-NEXT:    store ptr [[TMP36]], ptr [[TMP40]], align 8
3051 // CHECK3-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 4
3052 // CHECK3-NEXT:    store ptr @.offload_sizes.2, ptr [[TMP41]], align 8
3053 // CHECK3-NEXT:    [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 5
3054 // CHECK3-NEXT:    store ptr @.offload_maptypes.3, ptr [[TMP42]], align 8
3055 // CHECK3-NEXT:    [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 6
3056 // CHECK3-NEXT:    store ptr null, ptr [[TMP43]], align 8
3057 // CHECK3-NEXT:    [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 7
3058 // CHECK3-NEXT:    store ptr null, ptr [[TMP44]], align 8
3059 // CHECK3-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 8
3060 // CHECK3-NEXT:    store i64 100, ptr [[TMP45]], align 8
3061 // CHECK3-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 9
3062 // CHECK3-NEXT:    store i64 0, ptr [[TMP46]], align 8
3063 // CHECK3-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 10
3064 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP47]], align 4
3065 // CHECK3-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 11
3066 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP48]], align 4
3067 // CHECK3-NEXT:    [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 12
3068 // CHECK3-NEXT:    store i32 0, ptr [[TMP49]], align 4
3069 // CHECK3-NEXT:    [[TMP50:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.region_id, ptr [[KERNEL_ARGS6]])
3070 // CHECK3-NEXT:    [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 0
3071 // CHECK3-NEXT:    br i1 [[TMP51]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
3072 // CHECK3:       omp_offload.failed7:
3073 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71(i64 [[TMP31]]) #[[ATTR2]]
3074 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
3075 // CHECK3:       omp_offload.cont8:
3076 // CHECK3-NEXT:    ret i32 0
3077 //
3078 //
3079 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59
3080 // CHECK3-SAME: () #[[ATTR1]] {
3081 // CHECK3-NEXT:  entry:
3082 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined)
3083 // CHECK3-NEXT:    ret void
3084 //
3085 //
3086 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined
3087 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3088 // CHECK3-NEXT:  entry:
3089 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3090 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3091 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3092 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3093 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3094 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3095 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3096 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3097 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
3098 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3099 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3100 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3101 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
3102 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3103 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3104 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3105 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3106 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3107 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3108 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3109 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3110 // CHECK3:       cond.true:
3111 // CHECK3-NEXT:    br label [[COND_END:%.*]]
3112 // CHECK3:       cond.false:
3113 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3114 // CHECK3-NEXT:    br label [[COND_END]]
3115 // CHECK3:       cond.end:
3116 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3117 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3118 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3119 // CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
3120 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3121 // CHECK3:       omp.inner.for.cond:
3122 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47:![0-9]+]]
3123 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP47]]
3124 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3125 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3126 // CHECK3:       omp.inner.for.body:
3127 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP47]]
3128 // CHECK3-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3129 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP47]]
3130 // CHECK3-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3131 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP47]]
3132 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3133 // CHECK3:       omp.inner.for.inc:
3134 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
3135 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP47]]
3136 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
3137 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
3138 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
3139 // CHECK3:       omp.inner.for.end:
3140 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3141 // CHECK3:       omp.loop.exit:
3142 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
3143 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3144 // CHECK3-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
3145 // CHECK3-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3146 // CHECK3:       .omp.final.then:
3147 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
3148 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3149 // CHECK3:       .omp.final.done:
3150 // CHECK3-NEXT:    ret void
3151 //
3152 //
3153 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined.omp_outlined
3154 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3155 // CHECK3-NEXT:  entry:
3156 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3157 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3158 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3159 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3160 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3161 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3162 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3163 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3164 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3165 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3166 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
3167 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3168 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3169 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3170 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3171 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3172 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
3173 // CHECK3-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3174 // CHECK3-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3175 // CHECK3-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3176 // CHECK3-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3177 // CHECK3-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
3178 // CHECK3-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
3179 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3180 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3181 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3182 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
3183 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3184 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3185 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3186 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3187 // CHECK3:       cond.true:
3188 // CHECK3-NEXT:    br label [[COND_END:%.*]]
3189 // CHECK3:       cond.false:
3190 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3191 // CHECK3-NEXT:    br label [[COND_END]]
3192 // CHECK3:       cond.end:
3193 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3194 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3195 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3196 // CHECK3-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
3197 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3198 // CHECK3:       omp.inner.for.cond:
3199 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50:![0-9]+]]
3200 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP50]]
3201 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3202 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3203 // CHECK3:       omp.inner.for.body:
3204 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
3205 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3206 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3207 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP50]]
3208 // CHECK3-NEXT:    call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP50]]
3209 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3210 // CHECK3:       omp.body.continue:
3211 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3212 // CHECK3:       omp.inner.for.inc:
3213 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
3214 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3215 // CHECK3-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
3216 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
3217 // CHECK3:       omp.inner.for.end:
3218 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3219 // CHECK3:       omp.loop.exit:
3220 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
3221 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3222 // CHECK3-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3223 // CHECK3-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3224 // CHECK3:       .omp.final.then:
3225 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
3226 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3227 // CHECK3:       .omp.final.done:
3228 // CHECK3-NEXT:    ret void
3229 //
3230 //
3231 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65
3232 // CHECK3-SAME: () #[[ATTR1]] {
3233 // CHECK3-NEXT:  entry:
3234 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined)
3235 // CHECK3-NEXT:    ret void
3236 //
3237 //
3238 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined
3239 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
3240 // CHECK3-NEXT:  entry:
3241 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3242 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3243 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3244 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3245 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3246 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3247 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3248 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3249 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
3250 // CHECK3-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
3251 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3252 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3253 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3254 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
3255 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3256 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3257 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3258 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3259 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3260 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3261 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
3262 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3263 // CHECK3:       cond.true:
3264 // CHECK3-NEXT:    br label [[COND_END:%.*]]
3265 // CHECK3:       cond.false:
3266 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3267 // CHECK3-NEXT:    br label [[COND_END]]
3268 // CHECK3:       cond.end:
3269 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3270 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3271 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3272 // CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
3273 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3274 // CHECK3:       omp.inner.for.cond:
3275 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3276 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3277 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3278 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3279 // CHECK3:       omp.inner.for.body:
3280 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3281 // CHECK3-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
3282 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3283 // CHECK3-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
3284 // CHECK3-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]])
3285 // CHECK3-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3286 // CHECK3-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4
3287 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
3288 // CHECK3-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]])
3289 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3290 // CHECK3:       omp.inner.for.inc:
3291 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3292 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3293 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3294 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
3295 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]]
3296 // CHECK3:       omp.inner.for.end:
3297 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3298 // CHECK3:       omp.loop.exit:
3299 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
3300 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3301 // CHECK3-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
3302 // CHECK3-NEXT:    br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3303 // CHECK3:       .omp.final.then:
3304 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
3305 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3306 // CHECK3:       .omp.final.done:
3307 // CHECK3-NEXT:    ret void
3308 //
3309 //
3310 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined.omp_outlined
3311 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3312 // CHECK3-NEXT:  entry:
3313 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3314 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3315 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3316 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3317 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3318 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3319 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3320 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3321 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3322 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3323 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
3324 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3325 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3326 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3327 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3328 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3329 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
3330 // CHECK3-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3331 // CHECK3-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3332 // CHECK3-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3333 // CHECK3-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3334 // CHECK3-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
3335 // CHECK3-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
3336 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3337 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3338 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3339 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
3340 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3341 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3342 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3343 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3344 // CHECK3:       cond.true:
3345 // CHECK3-NEXT:    br label [[COND_END:%.*]]
3346 // CHECK3:       cond.false:
3347 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3348 // CHECK3-NEXT:    br label [[COND_END]]
3349 // CHECK3:       cond.end:
3350 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3351 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3352 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3353 // CHECK3-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
3354 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3355 // CHECK3:       omp.inner.for.cond:
3356 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3357 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3358 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3359 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3360 // CHECK3:       omp.inner.for.body:
3361 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3362 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3363 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3364 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
3365 // CHECK3-NEXT:    call void @_Z3fn2v()
3366 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3367 // CHECK3:       omp.body.continue:
3368 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3369 // CHECK3:       omp.inner.for.inc:
3370 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3371 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3372 // CHECK3-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
3373 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
3374 // CHECK3:       omp.inner.for.end:
3375 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3376 // CHECK3:       omp.loop.exit:
3377 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
3378 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3379 // CHECK3-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3380 // CHECK3-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3381 // CHECK3:       .omp.final.then:
3382 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
3383 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3384 // CHECK3:       .omp.final.done:
3385 // CHECK3-NEXT:    ret void
3386 //
3387 //
3388 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71
3389 // CHECK3-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
3390 // CHECK3-NEXT:  entry:
3391 // CHECK3-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
3392 // CHECK3-NEXT:    store i64 [[ARG]], ptr [[ARG_ADDR]], align 8
3393 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined, ptr [[ARG_ADDR]])
3394 // CHECK3-NEXT:    ret void
3395 //
3396 //
3397 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined
3398 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] {
3399 // CHECK3-NEXT:  entry:
3400 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3401 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3402 // CHECK3-NEXT:    [[ARG_ADDR:%.*]] = alloca ptr, align 8
3403 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3404 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3405 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3406 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3407 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3408 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3409 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
3410 // CHECK3-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
3411 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3412 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3413 // CHECK3-NEXT:    store ptr [[ARG]], ptr [[ARG_ADDR]], align 8
3414 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[ARG_ADDR]], align 8
3415 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3416 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
3417 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3418 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3419 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3420 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
3421 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3422 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3423 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
3424 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3425 // CHECK3:       cond.true:
3426 // CHECK3-NEXT:    br label [[COND_END:%.*]]
3427 // CHECK3:       cond.false:
3428 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3429 // CHECK3-NEXT:    br label [[COND_END]]
3430 // CHECK3:       cond.end:
3431 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3432 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3433 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3434 // CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
3435 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3436 // CHECK3:       omp.inner.for.cond:
3437 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55:![0-9]+]]
3438 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP55]]
3439 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3440 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3441 // CHECK3:       omp.inner.for.body:
3442 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP55]]
3443 // CHECK3-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
3444 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP55]]
3445 // CHECK3-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
3446 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP0]], align 4, !llvm.access.group [[ACC_GRP55]]
3447 // CHECK3-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0
3448 // CHECK3-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
3449 // CHECK3:       omp_if.then:
3450 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group [[ACC_GRP55]]
3451 // CHECK3-NEXT:    br label [[OMP_IF_END:%.*]]
3452 // CHECK3:       omp_if.else:
3453 // CHECK3-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP55]]
3454 // CHECK3-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP55]]
3455 // CHECK3-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP55]]
3456 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined.omp_outlined(ptr [[TMP13]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP55]]
3457 // CHECK3-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP55]]
3458 // CHECK3-NEXT:    br label [[OMP_IF_END]]
3459 // CHECK3:       omp_if.end:
3460 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3461 // CHECK3:       omp.inner.for.inc:
3462 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55]]
3463 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP55]]
3464 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
3465 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55]]
3466 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]]
3467 // CHECK3:       omp.inner.for.end:
3468 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3469 // CHECK3:       omp.loop.exit:
3470 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
3471 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3472 // CHECK3-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
3473 // CHECK3-NEXT:    br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3474 // CHECK3:       .omp.final.then:
3475 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
3476 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3477 // CHECK3:       .omp.final.done:
3478 // CHECK3-NEXT:    ret void
3479 //
3480 //
3481 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined.omp_outlined
3482 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
3483 // CHECK3-NEXT:  entry:
3484 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3485 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3486 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3487 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3488 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3489 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3490 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3491 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3492 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3493 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3494 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
3495 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3496 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3497 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3498 // CHECK3-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3499 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3500 // CHECK3-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
3501 // CHECK3-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3502 // CHECK3-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
3503 // CHECK3-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3504 // CHECK3-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
3505 // CHECK3-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
3506 // CHECK3-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
3507 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3508 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3509 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3510 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
3511 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3512 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3513 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
3514 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3515 // CHECK3:       cond.true:
3516 // CHECK3-NEXT:    br label [[COND_END:%.*]]
3517 // CHECK3:       cond.false:
3518 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3519 // CHECK3-NEXT:    br label [[COND_END]]
3520 // CHECK3:       cond.end:
3521 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3522 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3523 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3524 // CHECK3-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
3525 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3526 // CHECK3:       omp.inner.for.cond:
3527 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58:![0-9]+]]
3528 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP58]]
3529 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3530 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3531 // CHECK3:       omp.inner.for.body:
3532 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]
3533 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3534 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3535 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP58]]
3536 // CHECK3-NEXT:    call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP58]]
3537 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3538 // CHECK3:       omp.body.continue:
3539 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3540 // CHECK3:       omp.inner.for.inc:
3541 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]
3542 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
3543 // CHECK3-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]
3544 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]]
3545 // CHECK3:       omp.inner.for.end:
3546 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3547 // CHECK3:       omp.loop.exit:
3548 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
3549 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3550 // CHECK3-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3551 // CHECK3-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3552 // CHECK3:       .omp.final.then:
3553 // CHECK3-NEXT:    store i32 100, ptr [[I]], align 4
3554 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3555 // CHECK3:       .omp.final.done:
3556 // CHECK3-NEXT:    ret void
3557 //
3558 //
3559 // CHECK5-LABEL: define {{[^@]+}}@_Z9gtid_testv
3560 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
3561 // CHECK5-NEXT:  entry:
3562 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3563 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3564 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3565 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3566 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3567 // CHECK5-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
3568 // CHECK5-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3569 // CHECK5-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3570 // CHECK5-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3571 // CHECK5-NEXT:    [[I6:%.*]] = alloca i32, align 4
3572 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3573 // CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
3574 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3575 // CHECK5-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
3576 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3577 // CHECK5:       omp.inner.for.cond:
3578 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
3579 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]
3580 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3581 // CHECK5-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3582 // CHECK5:       omp.inner.for.body:
3583 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3584 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3585 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3586 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
3587 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3588 // CHECK5:       omp.body.continue:
3589 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3590 // CHECK5:       omp.inner.for.inc:
3591 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3592 // CHECK5-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
3593 // CHECK5-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3594 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
3595 // CHECK5:       omp.inner.for.end:
3596 // CHECK5-NEXT:    store i32 100, ptr [[I]], align 4
3597 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB3]], align 4
3598 // CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_UB4]], align 4
3599 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4
3600 // CHECK5-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4
3601 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
3602 // CHECK5:       omp.inner.for.cond7:
3603 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
3604 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP6]]
3605 // CHECK5-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3606 // CHECK5-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
3607 // CHECK5:       omp.inner.for.body9:
3608 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
3609 // CHECK5-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
3610 // CHECK5-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3611 // CHECK5-NEXT:    store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP6]]
3612 // CHECK5-NEXT:    call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP6]]
3613 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE12:%.*]]
3614 // CHECK5:       omp.body.continue12:
3615 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC13:%.*]]
3616 // CHECK5:       omp.inner.for.inc13:
3617 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
3618 // CHECK5-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
3619 // CHECK5-NEXT:    store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
3620 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
3621 // CHECK5:       omp.inner.for.end15:
3622 // CHECK5-NEXT:    store i32 100, ptr [[I6]], align 4
3623 // CHECK5-NEXT:    ret void
3624 //
3625 //
3626 // CHECK5-LABEL: define {{[^@]+}}@main
3627 // CHECK5-SAME: () #[[ATTR1:[0-9]+]] {
3628 // CHECK5-NEXT:  entry:
3629 // CHECK5-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3630 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3631 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3632 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3633 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3634 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3635 // CHECK5-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
3636 // CHECK5-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3637 // CHECK5-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3638 // CHECK5-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3639 // CHECK5-NEXT:    [[I6:%.*]] = alloca i32, align 4
3640 // CHECK5-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
3641 // CHECK5-NEXT:    [[DOTOMP_LB17:%.*]] = alloca i32, align 4
3642 // CHECK5-NEXT:    [[DOTOMP_UB18:%.*]] = alloca i32, align 4
3643 // CHECK5-NEXT:    [[DOTOMP_IV19:%.*]] = alloca i32, align 4
3644 // CHECK5-NEXT:    [[I20:%.*]] = alloca i32, align 4
3645 // CHECK5-NEXT:    store i32 0, ptr [[RETVAL]], align 4
3646 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3647 // CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
3648 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3649 // CHECK5-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
3650 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3651 // CHECK5:       omp.inner.for.cond:
3652 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
3653 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
3654 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3655 // CHECK5-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3656 // CHECK5:       omp.inner.for.body:
3657 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
3658 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3659 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3660 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
3661 // CHECK5-NEXT:    call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP9]]
3662 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3663 // CHECK5:       omp.body.continue:
3664 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3665 // CHECK5:       omp.inner.for.inc:
3666 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
3667 // CHECK5-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
3668 // CHECK5-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
3669 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
3670 // CHECK5:       omp.inner.for.end:
3671 // CHECK5-NEXT:    store i32 100, ptr [[I]], align 4
3672 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB3]], align 4
3673 // CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_UB4]], align 4
3674 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4
3675 // CHECK5-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4
3676 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
3677 // CHECK5:       omp.inner.for.cond7:
3678 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]
3679 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP12]]
3680 // CHECK5-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3681 // CHECK5-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
3682 // CHECK5:       omp.inner.for.body9:
3683 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
3684 // CHECK5-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
3685 // CHECK5-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3686 // CHECK5-NEXT:    store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP12]]
3687 // CHECK5-NEXT:    call void @_Z3fn5v(), !llvm.access.group [[ACC_GRP12]]
3688 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE12:%.*]]
3689 // CHECK5:       omp.body.continue12:
3690 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC13:%.*]]
3691 // CHECK5:       omp.inner.for.inc13:
3692 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
3693 // CHECK5-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
3694 // CHECK5-NEXT:    store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
3695 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]
3696 // CHECK5:       omp.inner.for.end15:
3697 // CHECK5-NEXT:    store i32 100, ptr [[I6]], align 4
3698 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB17]], align 4
3699 // CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_UB18]], align 4
3700 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4
3701 // CHECK5-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV19]], align 4
3702 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND21:%.*]]
3703 // CHECK5:       omp.inner.for.cond21:
3704 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
3705 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP15]]
3706 // CHECK5-NEXT:    [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
3707 // CHECK5-NEXT:    br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
3708 // CHECK5:       omp.inner.for.body23:
3709 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
3710 // CHECK5-NEXT:    [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1
3711 // CHECK5-NEXT:    [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
3712 // CHECK5-NEXT:    store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP15]]
3713 // CHECK5-NEXT:    call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP15]]
3714 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE26:%.*]]
3715 // CHECK5:       omp.body.continue26:
3716 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC27:%.*]]
3717 // CHECK5:       omp.inner.for.inc27:
3718 // CHECK5-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
3719 // CHECK5-NEXT:    [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1
3720 // CHECK5-NEXT:    store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
3721 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP16:![0-9]+]]
3722 // CHECK5:       omp.inner.for.end29:
3723 // CHECK5-NEXT:    store i32 100, ptr [[I20]], align 4
3724 // CHECK5-NEXT:    [[TMP15:%.*]] = load i32, ptr @Arg, align 4
3725 // CHECK5-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP15]])
3726 // CHECK5-NEXT:    ret i32 [[CALL]]
3727 //
3728 //
3729 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
3730 // CHECK5-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
3731 // CHECK5-NEXT:  entry:
3732 // CHECK5-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
3733 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3734 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3735 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3736 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3737 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3738 // CHECK5-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
3739 // CHECK5-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3740 // CHECK5-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3741 // CHECK5-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3742 // CHECK5-NEXT:    [[I6:%.*]] = alloca i32, align 4
3743 // CHECK5-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
3744 // CHECK5-NEXT:    [[DOTOMP_LB17:%.*]] = alloca i32, align 4
3745 // CHECK5-NEXT:    [[DOTOMP_UB18:%.*]] = alloca i32, align 4
3746 // CHECK5-NEXT:    [[DOTOMP_IV19:%.*]] = alloca i32, align 4
3747 // CHECK5-NEXT:    [[I20:%.*]] = alloca i32, align 4
3748 // CHECK5-NEXT:    store i32 [[ARG]], ptr [[ARG_ADDR]], align 4
3749 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3750 // CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
3751 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3752 // CHECK5-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
3753 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3754 // CHECK5:       omp.inner.for.cond:
3755 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
3756 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
3757 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3758 // CHECK5-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3759 // CHECK5:       omp.inner.for.body:
3760 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
3761 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3762 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3763 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]
3764 // CHECK5-NEXT:    call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP18]]
3765 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3766 // CHECK5:       omp.body.continue:
3767 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3768 // CHECK5:       omp.inner.for.inc:
3769 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
3770 // CHECK5-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
3771 // CHECK5-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
3772 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
3773 // CHECK5:       omp.inner.for.end:
3774 // CHECK5-NEXT:    store i32 100, ptr [[I]], align 4
3775 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB3]], align 4
3776 // CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_UB4]], align 4
3777 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4
3778 // CHECK5-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4
3779 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
3780 // CHECK5:       omp.inner.for.cond7:
3781 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]
3782 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP21]]
3783 // CHECK5-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3784 // CHECK5-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
3785 // CHECK5:       omp.inner.for.body9:
3786 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
3787 // CHECK5-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
3788 // CHECK5-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3789 // CHECK5-NEXT:    store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP21]]
3790 // CHECK5-NEXT:    call void @_Z3fn2v(), !llvm.access.group [[ACC_GRP21]]
3791 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE12:%.*]]
3792 // CHECK5:       omp.body.continue12:
3793 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC13:%.*]]
3794 // CHECK5:       omp.inner.for.inc13:
3795 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
3796 // CHECK5-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
3797 // CHECK5-NEXT:    store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
3798 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]
3799 // CHECK5:       omp.inner.for.end15:
3800 // CHECK5-NEXT:    store i32 100, ptr [[I6]], align 4
3801 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB17]], align 4
3802 // CHECK5-NEXT:    store i32 99, ptr [[DOTOMP_UB18]], align 4
3803 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4
3804 // CHECK5-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV19]], align 4
3805 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND21:%.*]]
3806 // CHECK5:       omp.inner.for.cond21:
3807 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]
3808 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP24]]
3809 // CHECK5-NEXT:    [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
3810 // CHECK5-NEXT:    br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
3811 // CHECK5:       omp.inner.for.body23:
3812 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
3813 // CHECK5-NEXT:    [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1
3814 // CHECK5-NEXT:    [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
3815 // CHECK5-NEXT:    store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP24]]
3816 // CHECK5-NEXT:    call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP24]]
3817 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE26:%.*]]
3818 // CHECK5:       omp.body.continue26:
3819 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC27:%.*]]
3820 // CHECK5:       omp.inner.for.inc27:
3821 // CHECK5-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
3822 // CHECK5-NEXT:    [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1
3823 // CHECK5-NEXT:    store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
3824 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP25:![0-9]+]]
3825 // CHECK5:       omp.inner.for.end29:
3826 // CHECK5-NEXT:    store i32 100, ptr [[I20]], align 4
3827 // CHECK5-NEXT:    ret i32 0
3828 //
3829 //
3830 // CHECK7-LABEL: define {{[^@]+}}@_Z9gtid_testv
3831 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
3832 // CHECK7-NEXT:  entry:
3833 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3834 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3835 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3836 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3837 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
3838 // CHECK7-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
3839 // CHECK7-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3840 // CHECK7-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3841 // CHECK7-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3842 // CHECK7-NEXT:    [[I6:%.*]] = alloca i32, align 4
3843 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3844 // CHECK7-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
3845 // CHECK7-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3846 // CHECK7-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
3847 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3848 // CHECK7:       omp.inner.for.cond:
3849 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
3850 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]
3851 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3852 // CHECK7-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3853 // CHECK7:       omp.inner.for.body:
3854 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3855 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3856 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3857 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
3858 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3859 // CHECK7:       omp.body.continue:
3860 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3861 // CHECK7:       omp.inner.for.inc:
3862 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3863 // CHECK7-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
3864 // CHECK7-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3865 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
3866 // CHECK7:       omp.inner.for.end:
3867 // CHECK7-NEXT:    store i32 100, ptr [[I]], align 4
3868 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB3]], align 4
3869 // CHECK7-NEXT:    store i32 99, ptr [[DOTOMP_UB4]], align 4
3870 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4
3871 // CHECK7-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4
3872 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
3873 // CHECK7:       omp.inner.for.cond7:
3874 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
3875 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP6]]
3876 // CHECK7-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3877 // CHECK7-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
3878 // CHECK7:       omp.inner.for.body9:
3879 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
3880 // CHECK7-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
3881 // CHECK7-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3882 // CHECK7-NEXT:    store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP6]]
3883 // CHECK7-NEXT:    call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP6]]
3884 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE12:%.*]]
3885 // CHECK7:       omp.body.continue12:
3886 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC13:%.*]]
3887 // CHECK7:       omp.inner.for.inc13:
3888 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
3889 // CHECK7-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
3890 // CHECK7-NEXT:    store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
3891 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
3892 // CHECK7:       omp.inner.for.end15:
3893 // CHECK7-NEXT:    store i32 100, ptr [[I6]], align 4
3894 // CHECK7-NEXT:    ret void
3895 //
3896 //
3897 // CHECK7-LABEL: define {{[^@]+}}@main
3898 // CHECK7-SAME: () #[[ATTR1:[0-9]+]] {
3899 // CHECK7-NEXT:  entry:
3900 // CHECK7-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3901 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3902 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3903 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3904 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3905 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
3906 // CHECK7-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
3907 // CHECK7-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3908 // CHECK7-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3909 // CHECK7-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3910 // CHECK7-NEXT:    [[I6:%.*]] = alloca i32, align 4
3911 // CHECK7-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
3912 // CHECK7-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
3913 // CHECK7-NEXT:    [[DOTOMP_LB17:%.*]] = alloca i32, align 4
3914 // CHECK7-NEXT:    [[DOTOMP_UB18:%.*]] = alloca i32, align 4
3915 // CHECK7-NEXT:    [[DOTOMP_IV19:%.*]] = alloca i32, align 4
3916 // CHECK7-NEXT:    [[I20:%.*]] = alloca i32, align 4
3917 // CHECK7-NEXT:    store i32 0, ptr [[RETVAL]], align 4
3918 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3919 // CHECK7-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
3920 // CHECK7-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3921 // CHECK7-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
3922 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3923 // CHECK7:       omp.inner.for.cond:
3924 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
3925 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
3926 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3927 // CHECK7-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3928 // CHECK7:       omp.inner.for.body:
3929 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
3930 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3931 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3932 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
3933 // CHECK7-NEXT:    call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP9]]
3934 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3935 // CHECK7:       omp.body.continue:
3936 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3937 // CHECK7:       omp.inner.for.inc:
3938 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
3939 // CHECK7-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
3940 // CHECK7-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
3941 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
3942 // CHECK7:       omp.inner.for.end:
3943 // CHECK7-NEXT:    store i32 100, ptr [[I]], align 4
3944 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB3]], align 4
3945 // CHECK7-NEXT:    store i32 99, ptr [[DOTOMP_UB4]], align 4
3946 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4
3947 // CHECK7-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4
3948 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
3949 // CHECK7:       omp.inner.for.cond7:
3950 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4
3951 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4
3952 // CHECK7-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3953 // CHECK7-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
3954 // CHECK7:       omp.inner.for.body9:
3955 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4
3956 // CHECK7-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
3957 // CHECK7-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3958 // CHECK7-NEXT:    store i32 [[ADD11]], ptr [[I6]], align 4
3959 // CHECK7-NEXT:    call void @_Z3fn5v()
3960 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE12:%.*]]
3961 // CHECK7:       omp.body.continue12:
3962 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC13:%.*]]
3963 // CHECK7:       omp.inner.for.inc13:
3964 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4
3965 // CHECK7-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
3966 // CHECK7-NEXT:    store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4
3967 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP12:![0-9]+]]
3968 // CHECK7:       omp.inner.for.end15:
3969 // CHECK7-NEXT:    store i32 100, ptr [[I6]], align 4
3970 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr @Arg, align 4
3971 // CHECK7-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
3972 // CHECK7-NEXT:    [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
3973 // CHECK7-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
3974 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB17]], align 4
3975 // CHECK7-NEXT:    store i32 99, ptr [[DOTOMP_UB18]], align 4
3976 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4
3977 // CHECK7-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV19]], align 4
3978 // CHECK7-NEXT:    [[TMP12:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
3979 // CHECK7-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP12]] to i1
3980 // CHECK7-NEXT:    br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
3981 // CHECK7:       omp_if.then:
3982 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND21:%.*]]
3983 // CHECK7:       omp.inner.for.cond21:
3984 // CHECK7-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]
3985 // CHECK7-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP14]]
3986 // CHECK7-NEXT:    [[CMP22:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
3987 // CHECK7-NEXT:    br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
3988 // CHECK7:       omp.inner.for.body23:
3989 // CHECK7-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]
3990 // CHECK7-NEXT:    [[MUL24:%.*]] = mul nsw i32 [[TMP15]], 1
3991 // CHECK7-NEXT:    [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
3992 // CHECK7-NEXT:    store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP14]]
3993 // CHECK7-NEXT:    call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP14]]
3994 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE26:%.*]]
3995 // CHECK7:       omp.body.continue26:
3996 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC27:%.*]]
3997 // CHECK7:       omp.inner.for.inc27:
3998 // CHECK7-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]
3999 // CHECK7-NEXT:    [[ADD28:%.*]] = add nsw i32 [[TMP16]], 1
4000 // CHECK7-NEXT:    store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]
4001 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP15:![0-9]+]]
4002 // CHECK7:       omp.inner.for.end29:
4003 // CHECK7-NEXT:    br label [[OMP_IF_END:%.*]]
4004 // CHECK7:       omp_if.else:
4005 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND30:%.*]]
4006 // CHECK7:       omp.inner.for.cond30:
4007 // CHECK7-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4
4008 // CHECK7-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4
4009 // CHECK7-NEXT:    [[CMP31:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
4010 // CHECK7-NEXT:    br i1 [[CMP31]], label [[OMP_INNER_FOR_BODY32:%.*]], label [[OMP_INNER_FOR_END38:%.*]]
4011 // CHECK7:       omp.inner.for.body32:
4012 // CHECK7-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4
4013 // CHECK7-NEXT:    [[MUL33:%.*]] = mul nsw i32 [[TMP19]], 1
4014 // CHECK7-NEXT:    [[ADD34:%.*]] = add nsw i32 0, [[MUL33]]
4015 // CHECK7-NEXT:    store i32 [[ADD34]], ptr [[I20]], align 4
4016 // CHECK7-NEXT:    call void @_Z3fn6v()
4017 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE35:%.*]]
4018 // CHECK7:       omp.body.continue35:
4019 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC36:%.*]]
4020 // CHECK7:       omp.inner.for.inc36:
4021 // CHECK7-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4
4022 // CHECK7-NEXT:    [[ADD37:%.*]] = add nsw i32 [[TMP20]], 1
4023 // CHECK7-NEXT:    store i32 [[ADD37]], ptr [[DOTOMP_IV19]], align 4
4024 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND30]], !llvm.loop [[LOOP17:![0-9]+]]
4025 // CHECK7:       omp.inner.for.end38:
4026 // CHECK7-NEXT:    br label [[OMP_IF_END]]
4027 // CHECK7:       omp_if.end:
4028 // CHECK7-NEXT:    store i32 100, ptr [[I20]], align 4
4029 // CHECK7-NEXT:    [[TMP21:%.*]] = load i32, ptr @Arg, align 4
4030 // CHECK7-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP21]])
4031 // CHECK7-NEXT:    ret i32 [[CALL]]
4032 //
4033 //
4034 // CHECK7-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
4035 // CHECK7-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
4036 // CHECK7-NEXT:  entry:
4037 // CHECK7-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
4038 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4039 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4040 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4041 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4042 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
4043 // CHECK7-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
4044 // CHECK7-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
4045 // CHECK7-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
4046 // CHECK7-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
4047 // CHECK7-NEXT:    [[I6:%.*]] = alloca i32, align 4
4048 // CHECK7-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
4049 // CHECK7-NEXT:    [[DOTOMP_LB17:%.*]] = alloca i32, align 4
4050 // CHECK7-NEXT:    [[DOTOMP_UB18:%.*]] = alloca i32, align 4
4051 // CHECK7-NEXT:    [[DOTOMP_IV19:%.*]] = alloca i32, align 4
4052 // CHECK7-NEXT:    [[I20:%.*]] = alloca i32, align 4
4053 // CHECK7-NEXT:    store i32 [[ARG]], ptr [[ARG_ADDR]], align 4
4054 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
4055 // CHECK7-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
4056 // CHECK7-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4057 // CHECK7-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
4058 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4059 // CHECK7:       omp.inner.for.cond:
4060 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
4061 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
4062 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
4063 // CHECK7-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4064 // CHECK7:       omp.inner.for.body:
4065 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
4066 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
4067 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4068 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]
4069 // CHECK7-NEXT:    call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP18]]
4070 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4071 // CHECK7:       omp.body.continue:
4072 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4073 // CHECK7:       omp.inner.for.inc:
4074 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
4075 // CHECK7-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
4076 // CHECK7-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
4077 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
4078 // CHECK7:       omp.inner.for.end:
4079 // CHECK7-NEXT:    store i32 100, ptr [[I]], align 4
4080 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB3]], align 4
4081 // CHECK7-NEXT:    store i32 99, ptr [[DOTOMP_UB4]], align 4
4082 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4
4083 // CHECK7-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4
4084 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
4085 // CHECK7:       omp.inner.for.cond7:
4086 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4
4087 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4
4088 // CHECK7-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4089 // CHECK7-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
4090 // CHECK7:       omp.inner.for.body9:
4091 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4
4092 // CHECK7-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
4093 // CHECK7-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
4094 // CHECK7-NEXT:    store i32 [[ADD11]], ptr [[I6]], align 4
4095 // CHECK7-NEXT:    call void @_Z3fn2v()
4096 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE12:%.*]]
4097 // CHECK7:       omp.body.continue12:
4098 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC13:%.*]]
4099 // CHECK7:       omp.inner.for.inc13:
4100 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4
4101 // CHECK7-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
4102 // CHECK7-NEXT:    store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4
4103 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP21:![0-9]+]]
4104 // CHECK7:       omp.inner.for.end15:
4105 // CHECK7-NEXT:    store i32 100, ptr [[I6]], align 4
4106 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB17]], align 4
4107 // CHECK7-NEXT:    store i32 99, ptr [[DOTOMP_UB18]], align 4
4108 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4
4109 // CHECK7-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV19]], align 4
4110 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND21:%.*]]
4111 // CHECK7:       omp.inner.for.cond21:
4112 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]]
4113 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP22]]
4114 // CHECK7-NEXT:    [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
4115 // CHECK7-NEXT:    br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
4116 // CHECK7:       omp.inner.for.body23:
4117 // CHECK7-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]
4118 // CHECK7-NEXT:    [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1
4119 // CHECK7-NEXT:    [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
4120 // CHECK7-NEXT:    store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP22]]
4121 // CHECK7-NEXT:    call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP22]]
4122 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE26:%.*]]
4123 // CHECK7:       omp.body.continue26:
4124 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC27:%.*]]
4125 // CHECK7:       omp.inner.for.inc27:
4126 // CHECK7-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]
4127 // CHECK7-NEXT:    [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1
4128 // CHECK7-NEXT:    store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]
4129 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP23:![0-9]+]]
4130 // CHECK7:       omp.inner.for.end29:
4131 // CHECK7-NEXT:    store i32 100, ptr [[I20]], align 4
4132 // CHECK7-NEXT:    ret i32 0
4133 //
4134 //
4135 // CHECK9-LABEL: define {{[^@]+}}@_Z9gtid_testv
4136 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
4137 // CHECK9-NEXT:  entry:
4138 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4139 // CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
4140 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
4141 // CHECK9-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4142 // CHECK9-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
4143 // CHECK9-NEXT:    store i32 3, ptr [[TMP0]], align 4
4144 // CHECK9-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
4145 // CHECK9-NEXT:    store i32 0, ptr [[TMP1]], align 4
4146 // CHECK9-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
4147 // CHECK9-NEXT:    store ptr null, ptr [[TMP2]], align 8
4148 // CHECK9-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
4149 // CHECK9-NEXT:    store ptr null, ptr [[TMP3]], align 8
4150 // CHECK9-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
4151 // CHECK9-NEXT:    store ptr null, ptr [[TMP4]], align 8
4152 // CHECK9-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
4153 // CHECK9-NEXT:    store ptr null, ptr [[TMP5]], align 8
4154 // CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
4155 // CHECK9-NEXT:    store ptr null, ptr [[TMP6]], align 8
4156 // CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
4157 // CHECK9-NEXT:    store ptr null, ptr [[TMP7]], align 8
4158 // CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
4159 // CHECK9-NEXT:    store i64 100, ptr [[TMP8]], align 8
4160 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
4161 // CHECK9-NEXT:    store i64 0, ptr [[TMP9]], align 8
4162 // CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
4163 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
4164 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
4165 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
4166 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
4167 // CHECK9-NEXT:    store i32 0, ptr [[TMP12]], align 4
4168 // CHECK9-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.region_id, ptr [[KERNEL_ARGS]])
4169 // CHECK9-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
4170 // CHECK9-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4171 // CHECK9:       omp_offload.failed:
4172 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43() #[[ATTR2:[0-9]+]]
4173 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4174 // CHECK9:       omp_offload.cont:
4175 // CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
4176 // CHECK9-NEXT:    store i32 3, ptr [[TMP15]], align 4
4177 // CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
4178 // CHECK9-NEXT:    store i32 0, ptr [[TMP16]], align 4
4179 // CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
4180 // CHECK9-NEXT:    store ptr null, ptr [[TMP17]], align 8
4181 // CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
4182 // CHECK9-NEXT:    store ptr null, ptr [[TMP18]], align 8
4183 // CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
4184 // CHECK9-NEXT:    store ptr null, ptr [[TMP19]], align 8
4185 // CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
4186 // CHECK9-NEXT:    store ptr null, ptr [[TMP20]], align 8
4187 // CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
4188 // CHECK9-NEXT:    store ptr null, ptr [[TMP21]], align 8
4189 // CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
4190 // CHECK9-NEXT:    store ptr null, ptr [[TMP22]], align 8
4191 // CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
4192 // CHECK9-NEXT:    store i64 100, ptr [[TMP23]], align 8
4193 // CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
4194 // CHECK9-NEXT:    store i64 0, ptr [[TMP24]], align 8
4195 // CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
4196 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
4197 // CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
4198 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4
4199 // CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
4200 // CHECK9-NEXT:    store i32 0, ptr [[TMP27]], align 4
4201 // CHECK9-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, ptr [[KERNEL_ARGS2]])
4202 // CHECK9-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
4203 // CHECK9-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
4204 // CHECK9:       omp_offload.failed3:
4205 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2]]
4206 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
4207 // CHECK9:       omp_offload.cont4:
4208 // CHECK9-NEXT:    ret void
4209 //
4210 //
4211 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43
4212 // CHECK9-SAME: () #[[ATTR1:[0-9]+]] {
4213 // CHECK9-NEXT:  entry:
4214 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined)
4215 // CHECK9-NEXT:    ret void
4216 //
4217 //
4218 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined
4219 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4220 // CHECK9-NEXT:  entry:
4221 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4222 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4223 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4224 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4225 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4226 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4227 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4228 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4229 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
4230 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4231 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4232 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
4233 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
4234 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4235 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4236 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4237 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4238 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4239 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4240 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4241 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4242 // CHECK9:       cond.true:
4243 // CHECK9-NEXT:    br label [[COND_END:%.*]]
4244 // CHECK9:       cond.false:
4245 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4246 // CHECK9-NEXT:    br label [[COND_END]]
4247 // CHECK9:       cond.end:
4248 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4249 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
4250 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4251 // CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
4252 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4253 // CHECK9:       omp.inner.for.cond:
4254 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]
4255 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
4256 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4257 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4258 // CHECK9:       omp.inner.for.body:
4259 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP11]]
4260 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4261 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
4262 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4263 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP11]]
4264 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4265 // CHECK9:       omp.inner.for.inc:
4266 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
4267 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP11]]
4268 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4269 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
4270 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
4271 // CHECK9:       omp.inner.for.end:
4272 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4273 // CHECK9:       omp.loop.exit:
4274 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
4275 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
4276 // CHECK9-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
4277 // CHECK9-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4278 // CHECK9:       .omp.final.then:
4279 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
4280 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
4281 // CHECK9:       .omp.final.done:
4282 // CHECK9-NEXT:    ret void
4283 //
4284 //
4285 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined.omp_outlined
4286 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4287 // CHECK9-NEXT:  entry:
4288 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4289 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4290 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4291 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4292 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4293 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4294 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4295 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4296 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4297 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4298 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
4299 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4300 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4301 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4302 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4303 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
4304 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
4305 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4306 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4307 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4308 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4309 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
4310 // CHECK9-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
4311 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4312 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4313 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4314 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
4315 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4316 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4317 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4318 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4319 // CHECK9:       cond.true:
4320 // CHECK9-NEXT:    br label [[COND_END:%.*]]
4321 // CHECK9:       cond.false:
4322 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4323 // CHECK9-NEXT:    br label [[COND_END]]
4324 // CHECK9:       cond.end:
4325 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4326 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
4327 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4328 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
4329 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4330 // CHECK9:       omp.inner.for.cond:
4331 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
4332 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
4333 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4334 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4335 // CHECK9:       omp.inner.for.body:
4336 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
4337 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4338 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4339 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]
4340 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4341 // CHECK9:       omp.body.continue:
4342 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4343 // CHECK9:       omp.inner.for.inc:
4344 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
4345 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4346 // CHECK9-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
4347 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
4348 // CHECK9:       omp.inner.for.end:
4349 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4350 // CHECK9:       omp.loop.exit:
4351 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
4352 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
4353 // CHECK9-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4354 // CHECK9-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4355 // CHECK9:       .omp.final.then:
4356 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
4357 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
4358 // CHECK9:       .omp.final.done:
4359 // CHECK9-NEXT:    ret void
4360 //
4361 //
4362 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48
4363 // CHECK9-SAME: () #[[ATTR1]] {
4364 // CHECK9-NEXT:  entry:
4365 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined)
4366 // CHECK9-NEXT:    ret void
4367 //
4368 //
4369 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined
4370 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4371 // CHECK9-NEXT:  entry:
4372 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4373 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4374 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4375 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4376 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4377 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4378 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4379 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4380 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
4381 // CHECK9-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4382 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4383 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4384 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
4385 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
4386 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4387 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4388 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4389 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4390 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4391 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4392 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4393 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4394 // CHECK9:       cond.true:
4395 // CHECK9-NEXT:    br label [[COND_END:%.*]]
4396 // CHECK9:       cond.false:
4397 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4398 // CHECK9-NEXT:    br label [[COND_END]]
4399 // CHECK9:       cond.end:
4400 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4401 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
4402 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4403 // CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
4404 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4405 // CHECK9:       omp.inner.for.cond:
4406 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20:![0-9]+]]
4407 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
4408 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4409 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4410 // CHECK9:       omp.inner.for.body:
4411 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP20]]
4412 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4413 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
4414 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4415 // CHECK9-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
4416 // CHECK9-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP20]]
4417 // CHECK9-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP20]]
4418 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP20]]
4419 // CHECK9-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
4420 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4421 // CHECK9:       omp.inner.for.inc:
4422 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
4423 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP20]]
4424 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4425 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
4426 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
4427 // CHECK9:       omp.inner.for.end:
4428 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4429 // CHECK9:       omp.loop.exit:
4430 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
4431 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
4432 // CHECK9-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
4433 // CHECK9-NEXT:    br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4434 // CHECK9:       .omp.final.then:
4435 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
4436 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
4437 // CHECK9:       .omp.final.done:
4438 // CHECK9-NEXT:    ret void
4439 //
4440 //
4441 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined.omp_outlined
4442 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4443 // CHECK9-NEXT:  entry:
4444 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4445 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4446 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4447 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4448 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4449 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4450 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4451 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4452 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4453 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4454 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
4455 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4456 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4457 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4458 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4459 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
4460 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
4461 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4462 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4463 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4464 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4465 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
4466 // CHECK9-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
4467 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4468 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4469 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4470 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
4471 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4472 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4473 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4474 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4475 // CHECK9:       cond.true:
4476 // CHECK9-NEXT:    br label [[COND_END:%.*]]
4477 // CHECK9:       cond.false:
4478 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4479 // CHECK9-NEXT:    br label [[COND_END]]
4480 // CHECK9:       cond.end:
4481 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4482 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
4483 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4484 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
4485 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4486 // CHECK9:       omp.inner.for.cond:
4487 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]]
4488 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP23]]
4489 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4490 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4491 // CHECK9:       omp.inner.for.body:
4492 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
4493 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4494 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4495 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP23]]
4496 // CHECK9-NEXT:    call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP23]]
4497 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4498 // CHECK9:       omp.body.continue:
4499 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4500 // CHECK9:       omp.inner.for.inc:
4501 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
4502 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4503 // CHECK9-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
4504 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
4505 // CHECK9:       omp.inner.for.end:
4506 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4507 // CHECK9:       omp.loop.exit:
4508 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
4509 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
4510 // CHECK9-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4511 // CHECK9-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4512 // CHECK9:       .omp.final.then:
4513 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
4514 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
4515 // CHECK9:       .omp.final.done:
4516 // CHECK9-NEXT:    ret void
4517 //
4518 //
4519 // CHECK9-LABEL: define {{[^@]+}}@main
4520 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] {
4521 // CHECK9-NEXT:  entry:
4522 // CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
4523 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4524 // CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
4525 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
4526 // CHECK9-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4527 // CHECK9-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
4528 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
4529 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
4530 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
4531 // CHECK9-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
4532 // CHECK9-NEXT:    [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4533 // CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 4
4534 // CHECK9-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
4535 // CHECK9-NEXT:    store i32 3, ptr [[TMP0]], align 4
4536 // CHECK9-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
4537 // CHECK9-NEXT:    store i32 0, ptr [[TMP1]], align 4
4538 // CHECK9-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
4539 // CHECK9-NEXT:    store ptr null, ptr [[TMP2]], align 8
4540 // CHECK9-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
4541 // CHECK9-NEXT:    store ptr null, ptr [[TMP3]], align 8
4542 // CHECK9-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
4543 // CHECK9-NEXT:    store ptr null, ptr [[TMP4]], align 8
4544 // CHECK9-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
4545 // CHECK9-NEXT:    store ptr null, ptr [[TMP5]], align 8
4546 // CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
4547 // CHECK9-NEXT:    store ptr null, ptr [[TMP6]], align 8
4548 // CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
4549 // CHECK9-NEXT:    store ptr null, ptr [[TMP7]], align 8
4550 // CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
4551 // CHECK9-NEXT:    store i64 100, ptr [[TMP8]], align 8
4552 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
4553 // CHECK9-NEXT:    store i64 0, ptr [[TMP9]], align 8
4554 // CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
4555 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
4556 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
4557 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
4558 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
4559 // CHECK9-NEXT:    store i32 0, ptr [[TMP12]], align 4
4560 // CHECK9-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, ptr [[KERNEL_ARGS]])
4561 // CHECK9-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
4562 // CHECK9-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4563 // CHECK9:       omp_offload.failed:
4564 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]]
4565 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4566 // CHECK9:       omp_offload.cont:
4567 // CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
4568 // CHECK9-NEXT:    store i32 3, ptr [[TMP15]], align 4
4569 // CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
4570 // CHECK9-NEXT:    store i32 0, ptr [[TMP16]], align 4
4571 // CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
4572 // CHECK9-NEXT:    store ptr null, ptr [[TMP17]], align 8
4573 // CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
4574 // CHECK9-NEXT:    store ptr null, ptr [[TMP18]], align 8
4575 // CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
4576 // CHECK9-NEXT:    store ptr null, ptr [[TMP19]], align 8
4577 // CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
4578 // CHECK9-NEXT:    store ptr null, ptr [[TMP20]], align 8
4579 // CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
4580 // CHECK9-NEXT:    store ptr null, ptr [[TMP21]], align 8
4581 // CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
4582 // CHECK9-NEXT:    store ptr null, ptr [[TMP22]], align 8
4583 // CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
4584 // CHECK9-NEXT:    store i64 100, ptr [[TMP23]], align 8
4585 // CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
4586 // CHECK9-NEXT:    store i64 0, ptr [[TMP24]], align 8
4587 // CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
4588 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
4589 // CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
4590 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4
4591 // CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
4592 // CHECK9-NEXT:    store i32 0, ptr [[TMP27]], align 4
4593 // CHECK9-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.region_id, ptr [[KERNEL_ARGS2]])
4594 // CHECK9-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
4595 // CHECK9-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
4596 // CHECK9:       omp_offload.failed3:
4597 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90() #[[ATTR2]]
4598 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
4599 // CHECK9:       omp_offload.cont4:
4600 // CHECK9-NEXT:    [[TMP30:%.*]] = load i32, ptr @Arg, align 4
4601 // CHECK9-NEXT:    store i32 [[TMP30]], ptr [[ARG_CASTED]], align 4
4602 // CHECK9-NEXT:    [[TMP31:%.*]] = load i64, ptr [[ARG_CASTED]], align 8
4603 // CHECK9-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4604 // CHECK9-NEXT:    store i64 [[TMP31]], ptr [[TMP32]], align 8
4605 // CHECK9-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4606 // CHECK9-NEXT:    store i64 [[TMP31]], ptr [[TMP33]], align 8
4607 // CHECK9-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
4608 // CHECK9-NEXT:    store ptr null, ptr [[TMP34]], align 8
4609 // CHECK9-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4610 // CHECK9-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4611 // CHECK9-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 0
4612 // CHECK9-NEXT:    store i32 3, ptr [[TMP37]], align 4
4613 // CHECK9-NEXT:    [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 1
4614 // CHECK9-NEXT:    store i32 1, ptr [[TMP38]], align 4
4615 // CHECK9-NEXT:    [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 2
4616 // CHECK9-NEXT:    store ptr [[TMP35]], ptr [[TMP39]], align 8
4617 // CHECK9-NEXT:    [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 3
4618 // CHECK9-NEXT:    store ptr [[TMP36]], ptr [[TMP40]], align 8
4619 // CHECK9-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 4
4620 // CHECK9-NEXT:    store ptr @.offload_sizes, ptr [[TMP41]], align 8
4621 // CHECK9-NEXT:    [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 5
4622 // CHECK9-NEXT:    store ptr @.offload_maptypes, ptr [[TMP42]], align 8
4623 // CHECK9-NEXT:    [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 6
4624 // CHECK9-NEXT:    store ptr null, ptr [[TMP43]], align 8
4625 // CHECK9-NEXT:    [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 7
4626 // CHECK9-NEXT:    store ptr null, ptr [[TMP44]], align 8
4627 // CHECK9-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 8
4628 // CHECK9-NEXT:    store i64 100, ptr [[TMP45]], align 8
4629 // CHECK9-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 9
4630 // CHECK9-NEXT:    store i64 0, ptr [[TMP46]], align 8
4631 // CHECK9-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 10
4632 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP47]], align 4
4633 // CHECK9-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 11
4634 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP48]], align 4
4635 // CHECK9-NEXT:    [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 12
4636 // CHECK9-NEXT:    store i32 0, ptr [[TMP49]], align 4
4637 // CHECK9-NEXT:    [[TMP50:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.region_id, ptr [[KERNEL_ARGS6]])
4638 // CHECK9-NEXT:    [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 0
4639 // CHECK9-NEXT:    br i1 [[TMP51]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
4640 // CHECK9:       omp_offload.failed7:
4641 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99(i64 [[TMP31]]) #[[ATTR2]]
4642 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
4643 // CHECK9:       omp_offload.cont8:
4644 // CHECK9-NEXT:    [[TMP52:%.*]] = load i32, ptr @Arg, align 4
4645 // CHECK9-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP52]])
4646 // CHECK9-NEXT:    ret i32 [[CALL]]
4647 //
4648 //
4649 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
4650 // CHECK9-SAME: () #[[ATTR1]] {
4651 // CHECK9-NEXT:  entry:
4652 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined)
4653 // CHECK9-NEXT:    ret void
4654 //
4655 //
4656 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined
4657 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4658 // CHECK9-NEXT:  entry:
4659 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4660 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4661 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4662 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4663 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4664 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4665 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4666 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4667 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
4668 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4669 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4670 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
4671 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
4672 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4673 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4674 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4675 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4676 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4677 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4678 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4679 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4680 // CHECK9:       cond.true:
4681 // CHECK9-NEXT:    br label [[COND_END:%.*]]
4682 // CHECK9:       cond.false:
4683 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4684 // CHECK9-NEXT:    br label [[COND_END]]
4685 // CHECK9:       cond.end:
4686 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4687 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
4688 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4689 // CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
4690 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4691 // CHECK9:       omp.inner.for.cond:
4692 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26:![0-9]+]]
4693 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
4694 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4695 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4696 // CHECK9:       omp.inner.for.body:
4697 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP26]]
4698 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4699 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
4700 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4701 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP26]]
4702 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4703 // CHECK9:       omp.inner.for.inc:
4704 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
4705 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP26]]
4706 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
4707 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
4708 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
4709 // CHECK9:       omp.inner.for.end:
4710 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4711 // CHECK9:       omp.loop.exit:
4712 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
4713 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
4714 // CHECK9-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
4715 // CHECK9-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4716 // CHECK9:       .omp.final.then:
4717 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
4718 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
4719 // CHECK9:       .omp.final.done:
4720 // CHECK9-NEXT:    ret void
4721 //
4722 //
4723 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined.omp_outlined
4724 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4725 // CHECK9-NEXT:  entry:
4726 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4727 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4728 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4729 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4730 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4731 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4732 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4733 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4734 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4735 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4736 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
4737 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4738 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4739 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4740 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4741 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
4742 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
4743 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4744 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4745 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4746 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4747 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
4748 // CHECK9-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
4749 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4750 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4751 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4752 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
4753 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4754 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4755 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4756 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4757 // CHECK9:       cond.true:
4758 // CHECK9-NEXT:    br label [[COND_END:%.*]]
4759 // CHECK9:       cond.false:
4760 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4761 // CHECK9-NEXT:    br label [[COND_END]]
4762 // CHECK9:       cond.end:
4763 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4764 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
4765 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4766 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
4767 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4768 // CHECK9:       omp.inner.for.cond:
4769 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29:![0-9]+]]
4770 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP29]]
4771 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4772 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4773 // CHECK9:       omp.inner.for.body:
4774 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
4775 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4776 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4777 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP29]]
4778 // CHECK9-NEXT:    call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP29]]
4779 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4780 // CHECK9:       omp.body.continue:
4781 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4782 // CHECK9:       omp.inner.for.inc:
4783 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
4784 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4785 // CHECK9-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
4786 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
4787 // CHECK9:       omp.inner.for.end:
4788 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4789 // CHECK9:       omp.loop.exit:
4790 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
4791 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
4792 // CHECK9-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4793 // CHECK9-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4794 // CHECK9:       .omp.final.then:
4795 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
4796 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
4797 // CHECK9:       .omp.final.done:
4798 // CHECK9-NEXT:    ret void
4799 //
4800 //
4801 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90
4802 // CHECK9-SAME: () #[[ATTR1]] {
4803 // CHECK9-NEXT:  entry:
4804 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined)
4805 // CHECK9-NEXT:    ret void
4806 //
4807 //
4808 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined
4809 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
4810 // CHECK9-NEXT:  entry:
4811 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4812 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4813 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4814 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4815 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4816 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4817 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4818 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4819 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
4820 // CHECK9-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4821 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4822 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4823 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
4824 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
4825 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4826 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4827 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4828 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4829 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4830 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4831 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
4832 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4833 // CHECK9:       cond.true:
4834 // CHECK9-NEXT:    br label [[COND_END:%.*]]
4835 // CHECK9:       cond.false:
4836 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4837 // CHECK9-NEXT:    br label [[COND_END]]
4838 // CHECK9:       cond.end:
4839 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4840 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
4841 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4842 // CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
4843 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4844 // CHECK9:       omp.inner.for.cond:
4845 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32:![0-9]+]]
4846 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP32]]
4847 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4848 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4849 // CHECK9:       omp.inner.for.body:
4850 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP32]]
4851 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
4852 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP32]]
4853 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
4854 // CHECK9-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP32]]
4855 // CHECK9-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP32]]
4856 // CHECK9-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP32]]
4857 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP32]]
4858 // CHECK9-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP32]]
4859 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4860 // CHECK9:       omp.inner.for.inc:
4861 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]]
4862 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP32]]
4863 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
4864 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP32]]
4865 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP33:![0-9]+]]
4866 // CHECK9:       omp.inner.for.end:
4867 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4868 // CHECK9:       omp.loop.exit:
4869 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
4870 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
4871 // CHECK9-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
4872 // CHECK9-NEXT:    br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4873 // CHECK9:       .omp.final.then:
4874 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
4875 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
4876 // CHECK9:       .omp.final.done:
4877 // CHECK9-NEXT:    ret void
4878 //
4879 //
4880 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined.omp_outlined
4881 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
4882 // CHECK9-NEXT:  entry:
4883 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4884 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4885 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4886 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4887 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4888 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4889 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4890 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4891 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4892 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4893 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
4894 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4895 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4896 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4897 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4898 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
4899 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
4900 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4901 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
4902 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4903 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
4904 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
4905 // CHECK9-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
4906 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4907 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4908 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4909 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
4910 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4911 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4912 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
4913 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4914 // CHECK9:       cond.true:
4915 // CHECK9-NEXT:    br label [[COND_END:%.*]]
4916 // CHECK9:       cond.false:
4917 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4918 // CHECK9-NEXT:    br label [[COND_END]]
4919 // CHECK9:       cond.end:
4920 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
4921 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
4922 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4923 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
4924 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4925 // CHECK9:       omp.inner.for.cond:
4926 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35:![0-9]+]]
4927 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP35]]
4928 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
4929 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4930 // CHECK9:       omp.inner.for.body:
4931 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
4932 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
4933 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4934 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP35]]
4935 // CHECK9-NEXT:    call void @_Z3fn5v(), !llvm.access.group [[ACC_GRP35]]
4936 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4937 // CHECK9:       omp.body.continue:
4938 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4939 // CHECK9:       omp.inner.for.inc:
4940 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
4941 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
4942 // CHECK9-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
4943 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
4944 // CHECK9:       omp.inner.for.end:
4945 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4946 // CHECK9:       omp.loop.exit:
4947 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
4948 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
4949 // CHECK9-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
4950 // CHECK9-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
4951 // CHECK9:       .omp.final.then:
4952 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
4953 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
4954 // CHECK9:       .omp.final.done:
4955 // CHECK9-NEXT:    ret void
4956 //
4957 //
4958 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99
4959 // CHECK9-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
4960 // CHECK9-NEXT:  entry:
4961 // CHECK9-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
4962 // CHECK9-NEXT:    store i64 [[ARG]], ptr [[ARG_ADDR]], align 8
4963 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined, ptr [[ARG_ADDR]])
4964 // CHECK9-NEXT:    ret void
4965 //
4966 //
4967 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined
4968 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] {
4969 // CHECK9-NEXT:  entry:
4970 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4971 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4972 // CHECK9-NEXT:    [[ARG_ADDR:%.*]] = alloca ptr, align 8
4973 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4974 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4975 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4976 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4977 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4978 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4979 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
4980 // CHECK9-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
4981 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4982 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4983 // CHECK9-NEXT:    store ptr [[ARG]], ptr [[ARG_ADDR]], align 8
4984 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[ARG_ADDR]], align 8
4985 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
4986 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
4987 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4988 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4989 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4990 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
4991 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4992 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4993 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
4994 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4995 // CHECK9:       cond.true:
4996 // CHECK9-NEXT:    br label [[COND_END:%.*]]
4997 // CHECK9:       cond.false:
4998 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4999 // CHECK9-NEXT:    br label [[COND_END]]
5000 // CHECK9:       cond.end:
5001 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5002 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
5003 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5004 // CHECK9-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
5005 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5006 // CHECK9:       omp.inner.for.cond:
5007 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38:![0-9]+]]
5008 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP38]]
5009 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5010 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5011 // CHECK9:       omp.inner.for.body:
5012 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP38]]
5013 // CHECK9-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
5014 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP38]]
5015 // CHECK9-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
5016 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP0]], align 4, !llvm.access.group [[ACC_GRP38]]
5017 // CHECK9-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0
5018 // CHECK9-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5019 // CHECK9:       omp_if.then:
5020 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group [[ACC_GRP38]]
5021 // CHECK9-NEXT:    br label [[OMP_IF_END:%.*]]
5022 // CHECK9:       omp_if.else:
5023 // CHECK9-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP38]]
5024 // CHECK9-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP38]]
5025 // CHECK9-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP38]]
5026 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined(ptr [[TMP13]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP38]]
5027 // CHECK9-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP38]]
5028 // CHECK9-NEXT:    br label [[OMP_IF_END]]
5029 // CHECK9:       omp_if.end:
5030 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5031 // CHECK9:       omp.inner.for.inc:
5032 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]]
5033 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP38]]
5034 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
5035 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP38]]
5036 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP39:![0-9]+]]
5037 // CHECK9:       omp.inner.for.end:
5038 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5039 // CHECK9:       omp.loop.exit:
5040 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
5041 // CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
5042 // CHECK9-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
5043 // CHECK9-NEXT:    br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5044 // CHECK9:       .omp.final.then:
5045 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
5046 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5047 // CHECK9:       .omp.final.done:
5048 // CHECK9-NEXT:    ret void
5049 //
5050 //
5051 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined
5052 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5053 // CHECK9-NEXT:  entry:
5054 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5055 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5056 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5057 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5058 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5059 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5060 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5061 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5062 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5063 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5064 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
5065 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5066 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5067 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5068 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5069 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
5070 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
5071 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5072 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5073 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5074 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5075 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
5076 // CHECK9-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
5077 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5078 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5079 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5080 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
5081 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5082 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5083 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5084 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5085 // CHECK9:       cond.true:
5086 // CHECK9-NEXT:    br label [[COND_END:%.*]]
5087 // CHECK9:       cond.false:
5088 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5089 // CHECK9-NEXT:    br label [[COND_END]]
5090 // CHECK9:       cond.end:
5091 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5092 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
5093 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5094 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
5095 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5096 // CHECK9:       omp.inner.for.cond:
5097 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41:![0-9]+]]
5098 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP41]]
5099 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5100 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5101 // CHECK9:       omp.inner.for.body:
5102 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]
5103 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5104 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5105 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP41]]
5106 // CHECK9-NEXT:    call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP41]]
5107 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5108 // CHECK9:       omp.body.continue:
5109 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5110 // CHECK9:       omp.inner.for.inc:
5111 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]
5112 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5113 // CHECK9-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP41]]
5114 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP42:![0-9]+]]
5115 // CHECK9:       omp.inner.for.end:
5116 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5117 // CHECK9:       omp.loop.exit:
5118 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
5119 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
5120 // CHECK9-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5121 // CHECK9-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5122 // CHECK9:       .omp.final.then:
5123 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
5124 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5125 // CHECK9:       .omp.final.done:
5126 // CHECK9-NEXT:    ret void
5127 //
5128 //
5129 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
5130 // CHECK9-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
5131 // CHECK9-NEXT:  entry:
5132 // CHECK9-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
5133 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5134 // CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
5135 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
5136 // CHECK9-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5137 // CHECK9-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
5138 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
5139 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
5140 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
5141 // CHECK9-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
5142 // CHECK9-NEXT:    [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5143 // CHECK9-NEXT:    store i32 [[ARG]], ptr [[ARG_ADDR]], align 4
5144 // CHECK9-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
5145 // CHECK9-NEXT:    store i32 3, ptr [[TMP0]], align 4
5146 // CHECK9-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
5147 // CHECK9-NEXT:    store i32 0, ptr [[TMP1]], align 4
5148 // CHECK9-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
5149 // CHECK9-NEXT:    store ptr null, ptr [[TMP2]], align 8
5150 // CHECK9-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
5151 // CHECK9-NEXT:    store ptr null, ptr [[TMP3]], align 8
5152 // CHECK9-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
5153 // CHECK9-NEXT:    store ptr null, ptr [[TMP4]], align 8
5154 // CHECK9-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
5155 // CHECK9-NEXT:    store ptr null, ptr [[TMP5]], align 8
5156 // CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
5157 // CHECK9-NEXT:    store ptr null, ptr [[TMP6]], align 8
5158 // CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
5159 // CHECK9-NEXT:    store ptr null, ptr [[TMP7]], align 8
5160 // CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
5161 // CHECK9-NEXT:    store i64 100, ptr [[TMP8]], align 8
5162 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
5163 // CHECK9-NEXT:    store i64 0, ptr [[TMP9]], align 8
5164 // CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
5165 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
5166 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
5167 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
5168 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
5169 // CHECK9-NEXT:    store i32 0, ptr [[TMP12]], align 4
5170 // CHECK9-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.region_id, ptr [[KERNEL_ARGS]])
5171 // CHECK9-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
5172 // CHECK9-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5173 // CHECK9:       omp_offload.failed:
5174 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59() #[[ATTR2]]
5175 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
5176 // CHECK9:       omp_offload.cont:
5177 // CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
5178 // CHECK9-NEXT:    store i32 3, ptr [[TMP15]], align 4
5179 // CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
5180 // CHECK9-NEXT:    store i32 0, ptr [[TMP16]], align 4
5181 // CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
5182 // CHECK9-NEXT:    store ptr null, ptr [[TMP17]], align 8
5183 // CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
5184 // CHECK9-NEXT:    store ptr null, ptr [[TMP18]], align 8
5185 // CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
5186 // CHECK9-NEXT:    store ptr null, ptr [[TMP19]], align 8
5187 // CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
5188 // CHECK9-NEXT:    store ptr null, ptr [[TMP20]], align 8
5189 // CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
5190 // CHECK9-NEXT:    store ptr null, ptr [[TMP21]], align 8
5191 // CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
5192 // CHECK9-NEXT:    store ptr null, ptr [[TMP22]], align 8
5193 // CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
5194 // CHECK9-NEXT:    store i64 100, ptr [[TMP23]], align 8
5195 // CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
5196 // CHECK9-NEXT:    store i64 0, ptr [[TMP24]], align 8
5197 // CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
5198 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
5199 // CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
5200 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4
5201 // CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
5202 // CHECK9-NEXT:    store i32 0, ptr [[TMP27]], align 4
5203 // CHECK9-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.region_id, ptr [[KERNEL_ARGS2]])
5204 // CHECK9-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
5205 // CHECK9-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
5206 // CHECK9:       omp_offload.failed3:
5207 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65() #[[ATTR2]]
5208 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
5209 // CHECK9:       omp_offload.cont4:
5210 // CHECK9-NEXT:    [[TMP30:%.*]] = load i32, ptr [[ARG_ADDR]], align 4
5211 // CHECK9-NEXT:    store i32 [[TMP30]], ptr [[ARG_CASTED]], align 4
5212 // CHECK9-NEXT:    [[TMP31:%.*]] = load i64, ptr [[ARG_CASTED]], align 8
5213 // CHECK9-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5214 // CHECK9-NEXT:    store i64 [[TMP31]], ptr [[TMP32]], align 8
5215 // CHECK9-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5216 // CHECK9-NEXT:    store i64 [[TMP31]], ptr [[TMP33]], align 8
5217 // CHECK9-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
5218 // CHECK9-NEXT:    store ptr null, ptr [[TMP34]], align 8
5219 // CHECK9-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5220 // CHECK9-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5221 // CHECK9-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 0
5222 // CHECK9-NEXT:    store i32 3, ptr [[TMP37]], align 4
5223 // CHECK9-NEXT:    [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 1
5224 // CHECK9-NEXT:    store i32 1, ptr [[TMP38]], align 4
5225 // CHECK9-NEXT:    [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 2
5226 // CHECK9-NEXT:    store ptr [[TMP35]], ptr [[TMP39]], align 8
5227 // CHECK9-NEXT:    [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 3
5228 // CHECK9-NEXT:    store ptr [[TMP36]], ptr [[TMP40]], align 8
5229 // CHECK9-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 4
5230 // CHECK9-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP41]], align 8
5231 // CHECK9-NEXT:    [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 5
5232 // CHECK9-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP42]], align 8
5233 // CHECK9-NEXT:    [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 6
5234 // CHECK9-NEXT:    store ptr null, ptr [[TMP43]], align 8
5235 // CHECK9-NEXT:    [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 7
5236 // CHECK9-NEXT:    store ptr null, ptr [[TMP44]], align 8
5237 // CHECK9-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 8
5238 // CHECK9-NEXT:    store i64 100, ptr [[TMP45]], align 8
5239 // CHECK9-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 9
5240 // CHECK9-NEXT:    store i64 0, ptr [[TMP46]], align 8
5241 // CHECK9-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 10
5242 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP47]], align 4
5243 // CHECK9-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 11
5244 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP48]], align 4
5245 // CHECK9-NEXT:    [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 12
5246 // CHECK9-NEXT:    store i32 0, ptr [[TMP49]], align 4
5247 // CHECK9-NEXT:    [[TMP50:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.region_id, ptr [[KERNEL_ARGS6]])
5248 // CHECK9-NEXT:    [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 0
5249 // CHECK9-NEXT:    br i1 [[TMP51]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
5250 // CHECK9:       omp_offload.failed7:
5251 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71(i64 [[TMP31]]) #[[ATTR2]]
5252 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
5253 // CHECK9:       omp_offload.cont8:
5254 // CHECK9-NEXT:    ret i32 0
5255 //
5256 //
5257 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59
5258 // CHECK9-SAME: () #[[ATTR1]] {
5259 // CHECK9-NEXT:  entry:
5260 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined)
5261 // CHECK9-NEXT:    ret void
5262 //
5263 //
5264 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined
5265 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5266 // CHECK9-NEXT:  entry:
5267 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5268 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5269 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5270 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5271 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5272 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5273 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5274 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5275 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
5276 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5277 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5278 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
5279 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
5280 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5281 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5282 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5283 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5284 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5285 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5286 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5287 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5288 // CHECK9:       cond.true:
5289 // CHECK9-NEXT:    br label [[COND_END:%.*]]
5290 // CHECK9:       cond.false:
5291 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5292 // CHECK9-NEXT:    br label [[COND_END]]
5293 // CHECK9:       cond.end:
5294 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5295 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
5296 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5297 // CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
5298 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5299 // CHECK9:       omp.inner.for.cond:
5300 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44:![0-9]+]]
5301 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP44]]
5302 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5303 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5304 // CHECK9:       omp.inner.for.body:
5305 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP44]]
5306 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5307 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP44]]
5308 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5309 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP44]]
5310 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5311 // CHECK9:       omp.inner.for.inc:
5312 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]]
5313 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP44]]
5314 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
5315 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP44]]
5316 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP45:![0-9]+]]
5317 // CHECK9:       omp.inner.for.end:
5318 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5319 // CHECK9:       omp.loop.exit:
5320 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
5321 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
5322 // CHECK9-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
5323 // CHECK9-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5324 // CHECK9:       .omp.final.then:
5325 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
5326 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5327 // CHECK9:       .omp.final.done:
5328 // CHECK9-NEXT:    ret void
5329 //
5330 //
5331 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined.omp_outlined
5332 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5333 // CHECK9-NEXT:  entry:
5334 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5335 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5336 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5337 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5338 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5339 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5340 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5341 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5342 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5343 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5344 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
5345 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5346 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5347 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5348 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5349 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
5350 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
5351 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5352 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5353 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5354 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5355 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
5356 // CHECK9-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
5357 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5358 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5359 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5360 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
5361 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5362 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5363 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5364 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5365 // CHECK9:       cond.true:
5366 // CHECK9-NEXT:    br label [[COND_END:%.*]]
5367 // CHECK9:       cond.false:
5368 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5369 // CHECK9-NEXT:    br label [[COND_END]]
5370 // CHECK9:       cond.end:
5371 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5372 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
5373 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5374 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
5375 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5376 // CHECK9:       omp.inner.for.cond:
5377 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47:![0-9]+]]
5378 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP47]]
5379 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5380 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5381 // CHECK9:       omp.inner.for.body:
5382 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
5383 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5384 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5385 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP47]]
5386 // CHECK9-NEXT:    call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP47]]
5387 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5388 // CHECK9:       omp.body.continue:
5389 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5390 // CHECK9:       omp.inner.for.inc:
5391 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
5392 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5393 // CHECK9-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
5394 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
5395 // CHECK9:       omp.inner.for.end:
5396 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5397 // CHECK9:       omp.loop.exit:
5398 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
5399 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
5400 // CHECK9-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5401 // CHECK9-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5402 // CHECK9:       .omp.final.then:
5403 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
5404 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5405 // CHECK9:       .omp.final.done:
5406 // CHECK9-NEXT:    ret void
5407 //
5408 //
5409 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65
5410 // CHECK9-SAME: () #[[ATTR1]] {
5411 // CHECK9-NEXT:  entry:
5412 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined)
5413 // CHECK9-NEXT:    ret void
5414 //
5415 //
5416 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined
5417 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5418 // CHECK9-NEXT:  entry:
5419 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5420 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5421 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5422 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5423 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5424 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5425 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5426 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5427 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
5428 // CHECK9-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5429 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5430 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5431 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
5432 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
5433 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5434 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5435 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5436 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5437 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5438 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5439 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5440 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5441 // CHECK9:       cond.true:
5442 // CHECK9-NEXT:    br label [[COND_END:%.*]]
5443 // CHECK9:       cond.false:
5444 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5445 // CHECK9-NEXT:    br label [[COND_END]]
5446 // CHECK9:       cond.end:
5447 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5448 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
5449 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5450 // CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
5451 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5452 // CHECK9:       omp.inner.for.cond:
5453 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50:![0-9]+]]
5454 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP50]]
5455 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5456 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5457 // CHECK9:       omp.inner.for.body:
5458 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP50]]
5459 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5460 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP50]]
5461 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5462 // CHECK9-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP50]]
5463 // CHECK9-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP50]]
5464 // CHECK9-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP50]]
5465 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP50]]
5466 // CHECK9-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP50]]
5467 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5468 // CHECK9:       omp.inner.for.inc:
5469 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
5470 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP50]]
5471 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
5472 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
5473 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
5474 // CHECK9:       omp.inner.for.end:
5475 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5476 // CHECK9:       omp.loop.exit:
5477 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
5478 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
5479 // CHECK9-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
5480 // CHECK9-NEXT:    br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5481 // CHECK9:       .omp.final.then:
5482 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
5483 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5484 // CHECK9:       .omp.final.done:
5485 // CHECK9-NEXT:    ret void
5486 //
5487 //
5488 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined.omp_outlined
5489 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5490 // CHECK9-NEXT:  entry:
5491 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5492 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5493 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5494 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5495 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5496 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5497 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5498 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5499 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5500 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5501 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
5502 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5503 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5504 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5505 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5506 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
5507 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
5508 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5509 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5510 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5511 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5512 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
5513 // CHECK9-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
5514 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5515 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5516 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5517 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
5518 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5519 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5520 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5521 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5522 // CHECK9:       cond.true:
5523 // CHECK9-NEXT:    br label [[COND_END:%.*]]
5524 // CHECK9:       cond.false:
5525 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5526 // CHECK9-NEXT:    br label [[COND_END]]
5527 // CHECK9:       cond.end:
5528 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5529 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
5530 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5531 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
5532 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5533 // CHECK9:       omp.inner.for.cond:
5534 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53:![0-9]+]]
5535 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP53]]
5536 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5537 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5538 // CHECK9:       omp.inner.for.body:
5539 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]
5540 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5541 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5542 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP53]]
5543 // CHECK9-NEXT:    call void @_Z3fn2v(), !llvm.access.group [[ACC_GRP53]]
5544 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5545 // CHECK9:       omp.body.continue:
5546 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5547 // CHECK9:       omp.inner.for.inc:
5548 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]
5549 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5550 // CHECK9-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP53]]
5551 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
5552 // CHECK9:       omp.inner.for.end:
5553 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5554 // CHECK9:       omp.loop.exit:
5555 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
5556 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
5557 // CHECK9-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5558 // CHECK9-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5559 // CHECK9:       .omp.final.then:
5560 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
5561 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5562 // CHECK9:       .omp.final.done:
5563 // CHECK9-NEXT:    ret void
5564 //
5565 //
5566 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71
5567 // CHECK9-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
5568 // CHECK9-NEXT:  entry:
5569 // CHECK9-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
5570 // CHECK9-NEXT:    store i64 [[ARG]], ptr [[ARG_ADDR]], align 8
5571 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined, ptr [[ARG_ADDR]])
5572 // CHECK9-NEXT:    ret void
5573 //
5574 //
5575 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined
5576 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] {
5577 // CHECK9-NEXT:  entry:
5578 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5579 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5580 // CHECK9-NEXT:    [[ARG_ADDR:%.*]] = alloca ptr, align 8
5581 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5582 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5583 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5584 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5585 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5586 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5587 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
5588 // CHECK9-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5589 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5590 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5591 // CHECK9-NEXT:    store ptr [[ARG]], ptr [[ARG_ADDR]], align 8
5592 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[ARG_ADDR]], align 8
5593 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
5594 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
5595 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5596 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5597 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5598 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
5599 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5600 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5601 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
5602 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5603 // CHECK9:       cond.true:
5604 // CHECK9-NEXT:    br label [[COND_END:%.*]]
5605 // CHECK9:       cond.false:
5606 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5607 // CHECK9-NEXT:    br label [[COND_END]]
5608 // CHECK9:       cond.end:
5609 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
5610 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
5611 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5612 // CHECK9-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
5613 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5614 // CHECK9:       omp.inner.for.cond:
5615 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56:![0-9]+]]
5616 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP56]]
5617 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
5618 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5619 // CHECK9:       omp.inner.for.body:
5620 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP56]]
5621 // CHECK9-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
5622 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP56]]
5623 // CHECK9-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
5624 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP0]], align 4, !llvm.access.group [[ACC_GRP56]]
5625 // CHECK9-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0
5626 // CHECK9-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
5627 // CHECK9:       omp_if.then:
5628 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group [[ACC_GRP56]]
5629 // CHECK9-NEXT:    br label [[OMP_IF_END:%.*]]
5630 // CHECK9:       omp_if.else:
5631 // CHECK9-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP56]]
5632 // CHECK9-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP56]]
5633 // CHECK9-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP56]]
5634 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined.omp_outlined(ptr [[TMP13]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP56]]
5635 // CHECK9-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP56]]
5636 // CHECK9-NEXT:    br label [[OMP_IF_END]]
5637 // CHECK9:       omp_if.end:
5638 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5639 // CHECK9:       omp.inner.for.inc:
5640 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56]]
5641 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP56]]
5642 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
5643 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP56]]
5644 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP57:![0-9]+]]
5645 // CHECK9:       omp.inner.for.end:
5646 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5647 // CHECK9:       omp.loop.exit:
5648 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
5649 // CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
5650 // CHECK9-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
5651 // CHECK9-NEXT:    br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5652 // CHECK9:       .omp.final.then:
5653 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
5654 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5655 // CHECK9:       .omp.final.done:
5656 // CHECK9-NEXT:    ret void
5657 //
5658 //
5659 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined.omp_outlined
5660 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5661 // CHECK9-NEXT:  entry:
5662 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5663 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5664 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5665 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5666 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5667 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5668 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5669 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5670 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5671 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5672 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
5673 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5674 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5675 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5676 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5677 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
5678 // CHECK9-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
5679 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5680 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5681 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5682 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5683 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
5684 // CHECK9-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
5685 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5686 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5687 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5688 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
5689 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5690 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5691 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5692 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5693 // CHECK9:       cond.true:
5694 // CHECK9-NEXT:    br label [[COND_END:%.*]]
5695 // CHECK9:       cond.false:
5696 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5697 // CHECK9-NEXT:    br label [[COND_END]]
5698 // CHECK9:       cond.end:
5699 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5700 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
5701 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5702 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
5703 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5704 // CHECK9:       omp.inner.for.cond:
5705 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59:![0-9]+]]
5706 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP59]]
5707 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5708 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5709 // CHECK9:       omp.inner.for.body:
5710 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]
5711 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5712 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5713 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP59]]
5714 // CHECK9-NEXT:    call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP59]]
5715 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5716 // CHECK9:       omp.body.continue:
5717 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5718 // CHECK9:       omp.inner.for.inc:
5719 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]
5720 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5721 // CHECK9-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP59]]
5722 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP60:![0-9]+]]
5723 // CHECK9:       omp.inner.for.end:
5724 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5725 // CHECK9:       omp.loop.exit:
5726 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
5727 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
5728 // CHECK9-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5729 // CHECK9-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5730 // CHECK9:       .omp.final.then:
5731 // CHECK9-NEXT:    store i32 100, ptr [[I]], align 4
5732 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5733 // CHECK9:       .omp.final.done:
5734 // CHECK9-NEXT:    ret void
5735 //
5736 //
5737 // CHECK11-LABEL: define {{[^@]+}}@_Z9gtid_testv
5738 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
5739 // CHECK11-NEXT:  entry:
5740 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5741 // CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
5742 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
5743 // CHECK11-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5744 // CHECK11-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
5745 // CHECK11-NEXT:    store i32 3, ptr [[TMP0]], align 4
5746 // CHECK11-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
5747 // CHECK11-NEXT:    store i32 0, ptr [[TMP1]], align 4
5748 // CHECK11-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
5749 // CHECK11-NEXT:    store ptr null, ptr [[TMP2]], align 8
5750 // CHECK11-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
5751 // CHECK11-NEXT:    store ptr null, ptr [[TMP3]], align 8
5752 // CHECK11-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
5753 // CHECK11-NEXT:    store ptr null, ptr [[TMP4]], align 8
5754 // CHECK11-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
5755 // CHECK11-NEXT:    store ptr null, ptr [[TMP5]], align 8
5756 // CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
5757 // CHECK11-NEXT:    store ptr null, ptr [[TMP6]], align 8
5758 // CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
5759 // CHECK11-NEXT:    store ptr null, ptr [[TMP7]], align 8
5760 // CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
5761 // CHECK11-NEXT:    store i64 100, ptr [[TMP8]], align 8
5762 // CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
5763 // CHECK11-NEXT:    store i64 0, ptr [[TMP9]], align 8
5764 // CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
5765 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
5766 // CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
5767 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
5768 // CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
5769 // CHECK11-NEXT:    store i32 0, ptr [[TMP12]], align 4
5770 // CHECK11-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.region_id, ptr [[KERNEL_ARGS]])
5771 // CHECK11-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
5772 // CHECK11-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5773 // CHECK11:       omp_offload.failed:
5774 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43() #[[ATTR2:[0-9]+]]
5775 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]
5776 // CHECK11:       omp_offload.cont:
5777 // CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
5778 // CHECK11-NEXT:    store i32 3, ptr [[TMP15]], align 4
5779 // CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
5780 // CHECK11-NEXT:    store i32 0, ptr [[TMP16]], align 4
5781 // CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
5782 // CHECK11-NEXT:    store ptr null, ptr [[TMP17]], align 8
5783 // CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
5784 // CHECK11-NEXT:    store ptr null, ptr [[TMP18]], align 8
5785 // CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
5786 // CHECK11-NEXT:    store ptr null, ptr [[TMP19]], align 8
5787 // CHECK11-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
5788 // CHECK11-NEXT:    store ptr null, ptr [[TMP20]], align 8
5789 // CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
5790 // CHECK11-NEXT:    store ptr null, ptr [[TMP21]], align 8
5791 // CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
5792 // CHECK11-NEXT:    store ptr null, ptr [[TMP22]], align 8
5793 // CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
5794 // CHECK11-NEXT:    store i64 100, ptr [[TMP23]], align 8
5795 // CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
5796 // CHECK11-NEXT:    store i64 0, ptr [[TMP24]], align 8
5797 // CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
5798 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
5799 // CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
5800 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4
5801 // CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
5802 // CHECK11-NEXT:    store i32 0, ptr [[TMP27]], align 4
5803 // CHECK11-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.region_id, ptr [[KERNEL_ARGS2]])
5804 // CHECK11-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
5805 // CHECK11-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
5806 // CHECK11:       omp_offload.failed3:
5807 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48() #[[ATTR2]]
5808 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
5809 // CHECK11:       omp_offload.cont4:
5810 // CHECK11-NEXT:    ret void
5811 //
5812 //
5813 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43
5814 // CHECK11-SAME: () #[[ATTR1:[0-9]+]] {
5815 // CHECK11-NEXT:  entry:
5816 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined)
5817 // CHECK11-NEXT:    ret void
5818 //
5819 //
5820 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined
5821 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5822 // CHECK11-NEXT:  entry:
5823 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5824 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5825 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5826 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5827 // CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5828 // CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5829 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5830 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5831 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
5832 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5833 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5834 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
5835 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
5836 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5837 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5838 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5839 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5840 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5841 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5842 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5843 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5844 // CHECK11:       cond.true:
5845 // CHECK11-NEXT:    br label [[COND_END:%.*]]
5846 // CHECK11:       cond.false:
5847 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5848 // CHECK11-NEXT:    br label [[COND_END]]
5849 // CHECK11:       cond.end:
5850 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5851 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
5852 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5853 // CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
5854 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5855 // CHECK11:       omp.inner.for.cond:
5856 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]
5857 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
5858 // CHECK11-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5859 // CHECK11-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5860 // CHECK11:       omp.inner.for.body:
5861 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP11]]
5862 // CHECK11-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
5863 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
5864 // CHECK11-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
5865 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP11]]
5866 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5867 // CHECK11:       omp.inner.for.inc:
5868 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
5869 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP11]]
5870 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
5871 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
5872 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
5873 // CHECK11:       omp.inner.for.end:
5874 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5875 // CHECK11:       omp.loop.exit:
5876 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
5877 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
5878 // CHECK11-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
5879 // CHECK11-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5880 // CHECK11:       .omp.final.then:
5881 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
5882 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5883 // CHECK11:       .omp.final.done:
5884 // CHECK11-NEXT:    ret void
5885 //
5886 //
5887 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l43.omp_outlined.omp_outlined
5888 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
5889 // CHECK11-NEXT:  entry:
5890 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5891 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5892 // CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5893 // CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5894 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5895 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5896 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5897 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5898 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5899 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5900 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
5901 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5902 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5903 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5904 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5905 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
5906 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
5907 // CHECK11-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5908 // CHECK11-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
5909 // CHECK11-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5910 // CHECK11-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
5911 // CHECK11-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
5912 // CHECK11-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
5913 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5914 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5915 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5916 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
5917 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5918 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5919 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
5920 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5921 // CHECK11:       cond.true:
5922 // CHECK11-NEXT:    br label [[COND_END:%.*]]
5923 // CHECK11:       cond.false:
5924 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5925 // CHECK11-NEXT:    br label [[COND_END]]
5926 // CHECK11:       cond.end:
5927 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
5928 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
5929 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5930 // CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
5931 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5932 // CHECK11:       omp.inner.for.cond:
5933 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
5934 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
5935 // CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
5936 // CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5937 // CHECK11:       omp.inner.for.body:
5938 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
5939 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
5940 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5941 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]
5942 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5943 // CHECK11:       omp.body.continue:
5944 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5945 // CHECK11:       omp.inner.for.inc:
5946 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
5947 // CHECK11-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
5948 // CHECK11-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
5949 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
5950 // CHECK11:       omp.inner.for.end:
5951 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5952 // CHECK11:       omp.loop.exit:
5953 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
5954 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
5955 // CHECK11-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
5956 // CHECK11-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
5957 // CHECK11:       .omp.final.then:
5958 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
5959 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
5960 // CHECK11:       .omp.final.done:
5961 // CHECK11-NEXT:    ret void
5962 //
5963 //
5964 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48
5965 // CHECK11-SAME: () #[[ATTR1]] {
5966 // CHECK11-NEXT:  entry:
5967 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined)
5968 // CHECK11-NEXT:    ret void
5969 //
5970 //
5971 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined
5972 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
5973 // CHECK11-NEXT:  entry:
5974 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5975 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5976 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5977 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5978 // CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5979 // CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5980 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5981 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5982 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
5983 // CHECK11-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
5984 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5985 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5986 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
5987 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
5988 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5989 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5990 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5991 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5992 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5993 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5994 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
5995 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5996 // CHECK11:       cond.true:
5997 // CHECK11-NEXT:    br label [[COND_END:%.*]]
5998 // CHECK11:       cond.false:
5999 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6000 // CHECK11-NEXT:    br label [[COND_END]]
6001 // CHECK11:       cond.end:
6002 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6003 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
6004 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6005 // CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
6006 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6007 // CHECK11:       omp.inner.for.cond:
6008 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20:![0-9]+]]
6009 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
6010 // CHECK11-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6011 // CHECK11-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6012 // CHECK11:       omp.inner.for.body:
6013 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP20]]
6014 // CHECK11-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6015 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
6016 // CHECK11-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6017 // CHECK11-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
6018 // CHECK11-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP20]]
6019 // CHECK11-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP20]]
6020 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP20]]
6021 // CHECK11-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]]), !llvm.access.group [[ACC_GRP20]]
6022 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6023 // CHECK11:       omp.inner.for.inc:
6024 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
6025 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP20]]
6026 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
6027 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
6028 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
6029 // CHECK11:       omp.inner.for.end:
6030 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6031 // CHECK11:       omp.loop.exit:
6032 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
6033 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
6034 // CHECK11-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
6035 // CHECK11-NEXT:    br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6036 // CHECK11:       .omp.final.then:
6037 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
6038 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6039 // CHECK11:       .omp.final.done:
6040 // CHECK11-NEXT:    ret void
6041 //
6042 //
6043 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9gtid_testv_l48.omp_outlined.omp_outlined
6044 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6045 // CHECK11-NEXT:  entry:
6046 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6047 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6048 // CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6049 // CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6050 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6051 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6052 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6053 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6054 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6055 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6056 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
6057 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6058 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6059 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6060 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6061 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
6062 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
6063 // CHECK11-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6064 // CHECK11-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6065 // CHECK11-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6066 // CHECK11-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6067 // CHECK11-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
6068 // CHECK11-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
6069 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6070 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6071 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6072 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
6073 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6074 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6075 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6076 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6077 // CHECK11:       cond.true:
6078 // CHECK11-NEXT:    br label [[COND_END:%.*]]
6079 // CHECK11:       cond.false:
6080 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6081 // CHECK11-NEXT:    br label [[COND_END]]
6082 // CHECK11:       cond.end:
6083 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6084 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
6085 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6086 // CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
6087 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6088 // CHECK11:       omp.inner.for.cond:
6089 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]]
6090 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP23]]
6091 // CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6092 // CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6093 // CHECK11:       omp.inner.for.body:
6094 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
6095 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6096 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6097 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP23]]
6098 // CHECK11-NEXT:    call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP23]]
6099 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6100 // CHECK11:       omp.body.continue:
6101 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6102 // CHECK11:       omp.inner.for.inc:
6103 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
6104 // CHECK11-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6105 // CHECK11-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
6106 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
6107 // CHECK11:       omp.inner.for.end:
6108 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6109 // CHECK11:       omp.loop.exit:
6110 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
6111 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
6112 // CHECK11-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
6113 // CHECK11-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6114 // CHECK11:       .omp.final.then:
6115 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
6116 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6117 // CHECK11:       .omp.final.done:
6118 // CHECK11-NEXT:    ret void
6119 //
6120 //
6121 // CHECK11-LABEL: define {{[^@]+}}@main
6122 // CHECK11-SAME: () #[[ATTR3:[0-9]+]] {
6123 // CHECK11-NEXT:  entry:
6124 // CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
6125 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6126 // CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
6127 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
6128 // CHECK11-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6129 // CHECK11-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
6130 // CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
6131 // CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
6132 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
6133 // CHECK11-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
6134 // CHECK11-NEXT:    [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6135 // CHECK11-NEXT:    store i32 0, ptr [[RETVAL]], align 4
6136 // CHECK11-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
6137 // CHECK11-NEXT:    store i32 3, ptr [[TMP0]], align 4
6138 // CHECK11-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
6139 // CHECK11-NEXT:    store i32 0, ptr [[TMP1]], align 4
6140 // CHECK11-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
6141 // CHECK11-NEXT:    store ptr null, ptr [[TMP2]], align 8
6142 // CHECK11-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
6143 // CHECK11-NEXT:    store ptr null, ptr [[TMP3]], align 8
6144 // CHECK11-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
6145 // CHECK11-NEXT:    store ptr null, ptr [[TMP4]], align 8
6146 // CHECK11-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
6147 // CHECK11-NEXT:    store ptr null, ptr [[TMP5]], align 8
6148 // CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
6149 // CHECK11-NEXT:    store ptr null, ptr [[TMP6]], align 8
6150 // CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
6151 // CHECK11-NEXT:    store ptr null, ptr [[TMP7]], align 8
6152 // CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
6153 // CHECK11-NEXT:    store i64 100, ptr [[TMP8]], align 8
6154 // CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
6155 // CHECK11-NEXT:    store i64 0, ptr [[TMP9]], align 8
6156 // CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
6157 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
6158 // CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
6159 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
6160 // CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
6161 // CHECK11-NEXT:    store i32 0, ptr [[TMP12]], align 4
6162 // CHECK11-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.region_id, ptr [[KERNEL_ARGS]])
6163 // CHECK11-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
6164 // CHECK11-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
6165 // CHECK11:       omp_offload.failed:
6166 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81() #[[ATTR2]]
6167 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]
6168 // CHECK11:       omp_offload.cont:
6169 // CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
6170 // CHECK11-NEXT:    store i32 3, ptr [[TMP15]], align 4
6171 // CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
6172 // CHECK11-NEXT:    store i32 0, ptr [[TMP16]], align 4
6173 // CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
6174 // CHECK11-NEXT:    store ptr null, ptr [[TMP17]], align 8
6175 // CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
6176 // CHECK11-NEXT:    store ptr null, ptr [[TMP18]], align 8
6177 // CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
6178 // CHECK11-NEXT:    store ptr null, ptr [[TMP19]], align 8
6179 // CHECK11-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
6180 // CHECK11-NEXT:    store ptr null, ptr [[TMP20]], align 8
6181 // CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
6182 // CHECK11-NEXT:    store ptr null, ptr [[TMP21]], align 8
6183 // CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
6184 // CHECK11-NEXT:    store ptr null, ptr [[TMP22]], align 8
6185 // CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
6186 // CHECK11-NEXT:    store i64 100, ptr [[TMP23]], align 8
6187 // CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
6188 // CHECK11-NEXT:    store i64 0, ptr [[TMP24]], align 8
6189 // CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
6190 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
6191 // CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
6192 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4
6193 // CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
6194 // CHECK11-NEXT:    store i32 0, ptr [[TMP27]], align 4
6195 // CHECK11-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.region_id, ptr [[KERNEL_ARGS2]])
6196 // CHECK11-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
6197 // CHECK11-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
6198 // CHECK11:       omp_offload.failed3:
6199 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90() #[[ATTR2]]
6200 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
6201 // CHECK11:       omp_offload.cont4:
6202 // CHECK11-NEXT:    [[TMP30:%.*]] = load i32, ptr @Arg, align 4
6203 // CHECK11-NEXT:    store i32 [[TMP30]], ptr [[ARG_CASTED]], align 4
6204 // CHECK11-NEXT:    [[TMP31:%.*]] = load i64, ptr [[ARG_CASTED]], align 8
6205 // CHECK11-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6206 // CHECK11-NEXT:    store i64 [[TMP31]], ptr [[TMP32]], align 8
6207 // CHECK11-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6208 // CHECK11-NEXT:    store i64 [[TMP31]], ptr [[TMP33]], align 8
6209 // CHECK11-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
6210 // CHECK11-NEXT:    store ptr null, ptr [[TMP34]], align 8
6211 // CHECK11-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6212 // CHECK11-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6213 // CHECK11-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 0
6214 // CHECK11-NEXT:    store i32 3, ptr [[TMP37]], align 4
6215 // CHECK11-NEXT:    [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 1
6216 // CHECK11-NEXT:    store i32 1, ptr [[TMP38]], align 4
6217 // CHECK11-NEXT:    [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 2
6218 // CHECK11-NEXT:    store ptr [[TMP35]], ptr [[TMP39]], align 8
6219 // CHECK11-NEXT:    [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 3
6220 // CHECK11-NEXT:    store ptr [[TMP36]], ptr [[TMP40]], align 8
6221 // CHECK11-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 4
6222 // CHECK11-NEXT:    store ptr @.offload_sizes, ptr [[TMP41]], align 8
6223 // CHECK11-NEXT:    [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 5
6224 // CHECK11-NEXT:    store ptr @.offload_maptypes, ptr [[TMP42]], align 8
6225 // CHECK11-NEXT:    [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 6
6226 // CHECK11-NEXT:    store ptr null, ptr [[TMP43]], align 8
6227 // CHECK11-NEXT:    [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 7
6228 // CHECK11-NEXT:    store ptr null, ptr [[TMP44]], align 8
6229 // CHECK11-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 8
6230 // CHECK11-NEXT:    store i64 100, ptr [[TMP45]], align 8
6231 // CHECK11-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 9
6232 // CHECK11-NEXT:    store i64 0, ptr [[TMP46]], align 8
6233 // CHECK11-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 10
6234 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP47]], align 4
6235 // CHECK11-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 11
6236 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP48]], align 4
6237 // CHECK11-NEXT:    [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 12
6238 // CHECK11-NEXT:    store i32 0, ptr [[TMP49]], align 4
6239 // CHECK11-NEXT:    [[TMP50:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.region_id, ptr [[KERNEL_ARGS6]])
6240 // CHECK11-NEXT:    [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 0
6241 // CHECK11-NEXT:    br i1 [[TMP51]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
6242 // CHECK11:       omp_offload.failed7:
6243 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99(i64 [[TMP31]]) #[[ATTR2]]
6244 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
6245 // CHECK11:       omp_offload.cont8:
6246 // CHECK11-NEXT:    [[TMP52:%.*]] = load i32, ptr @Arg, align 4
6247 // CHECK11-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP52]])
6248 // CHECK11-NEXT:    ret i32 [[CALL]]
6249 //
6250 //
6251 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81
6252 // CHECK11-SAME: () #[[ATTR1]] {
6253 // CHECK11-NEXT:  entry:
6254 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined)
6255 // CHECK11-NEXT:    ret void
6256 //
6257 //
6258 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined
6259 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6260 // CHECK11-NEXT:  entry:
6261 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6262 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6263 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6264 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6265 // CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6266 // CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6267 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6268 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6269 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
6270 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6271 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6272 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
6273 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
6274 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6275 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6276 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6277 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
6278 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6279 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6280 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6281 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6282 // CHECK11:       cond.true:
6283 // CHECK11-NEXT:    br label [[COND_END:%.*]]
6284 // CHECK11:       cond.false:
6285 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6286 // CHECK11-NEXT:    br label [[COND_END]]
6287 // CHECK11:       cond.end:
6288 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6289 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
6290 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6291 // CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
6292 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6293 // CHECK11:       omp.inner.for.cond:
6294 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26:![0-9]+]]
6295 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
6296 // CHECK11-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6297 // CHECK11-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6298 // CHECK11:       omp.inner.for.body:
6299 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP26]]
6300 // CHECK11-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6301 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP26]]
6302 // CHECK11-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6303 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP26]]
6304 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6305 // CHECK11:       omp.inner.for.inc:
6306 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
6307 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP26]]
6308 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
6309 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP26]]
6310 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP27:![0-9]+]]
6311 // CHECK11:       omp.inner.for.end:
6312 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6313 // CHECK11:       omp.loop.exit:
6314 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
6315 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
6316 // CHECK11-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
6317 // CHECK11-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6318 // CHECK11:       .omp.final.then:
6319 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
6320 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6321 // CHECK11:       .omp.final.done:
6322 // CHECK11-NEXT:    ret void
6323 //
6324 //
6325 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l81.omp_outlined.omp_outlined
6326 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6327 // CHECK11-NEXT:  entry:
6328 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6329 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6330 // CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6331 // CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6332 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6333 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6334 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6335 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6336 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6337 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6338 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
6339 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6340 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6341 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6342 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6343 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
6344 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
6345 // CHECK11-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6346 // CHECK11-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6347 // CHECK11-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6348 // CHECK11-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6349 // CHECK11-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
6350 // CHECK11-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
6351 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6352 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6353 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6354 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
6355 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6356 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6357 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6358 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6359 // CHECK11:       cond.true:
6360 // CHECK11-NEXT:    br label [[COND_END:%.*]]
6361 // CHECK11:       cond.false:
6362 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6363 // CHECK11-NEXT:    br label [[COND_END]]
6364 // CHECK11:       cond.end:
6365 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6366 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
6367 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6368 // CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
6369 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6370 // CHECK11:       omp.inner.for.cond:
6371 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29:![0-9]+]]
6372 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP29]]
6373 // CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6374 // CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6375 // CHECK11:       omp.inner.for.body:
6376 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
6377 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6378 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6379 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP29]]
6380 // CHECK11-NEXT:    call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP29]]
6381 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6382 // CHECK11:       omp.body.continue:
6383 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6384 // CHECK11:       omp.inner.for.inc:
6385 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
6386 // CHECK11-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6387 // CHECK11-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP29]]
6388 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP30:![0-9]+]]
6389 // CHECK11:       omp.inner.for.end:
6390 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6391 // CHECK11:       omp.loop.exit:
6392 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
6393 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
6394 // CHECK11-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
6395 // CHECK11-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6396 // CHECK11:       .omp.final.then:
6397 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
6398 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6399 // CHECK11:       .omp.final.done:
6400 // CHECK11-NEXT:    ret void
6401 //
6402 //
6403 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90
6404 // CHECK11-SAME: () #[[ATTR1]] {
6405 // CHECK11-NEXT:  entry:
6406 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined)
6407 // CHECK11-NEXT:    ret void
6408 //
6409 //
6410 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined
6411 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
6412 // CHECK11-NEXT:  entry:
6413 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6414 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6415 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6416 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6417 // CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6418 // CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6419 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6420 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6421 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
6422 // CHECK11-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
6423 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6424 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6425 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
6426 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
6427 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6428 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6429 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6430 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
6431 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6432 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6433 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
6434 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6435 // CHECK11:       cond.true:
6436 // CHECK11-NEXT:    br label [[COND_END:%.*]]
6437 // CHECK11:       cond.false:
6438 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6439 // CHECK11-NEXT:    br label [[COND_END]]
6440 // CHECK11:       cond.end:
6441 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6442 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
6443 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6444 // CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
6445 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6446 // CHECK11:       omp.inner.for.cond:
6447 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6448 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6449 // CHECK11-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6450 // CHECK11-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6451 // CHECK11:       omp.inner.for.body:
6452 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6453 // CHECK11-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
6454 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6455 // CHECK11-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
6456 // CHECK11-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]])
6457 // CHECK11-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6458 // CHECK11-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4
6459 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
6460 // CHECK11-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]])
6461 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6462 // CHECK11:       omp.inner.for.inc:
6463 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6464 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6465 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
6466 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
6467 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP32:![0-9]+]]
6468 // CHECK11:       omp.inner.for.end:
6469 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6470 // CHECK11:       omp.loop.exit:
6471 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
6472 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
6473 // CHECK11-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
6474 // CHECK11-NEXT:    br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6475 // CHECK11:       .omp.final.then:
6476 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
6477 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6478 // CHECK11:       .omp.final.done:
6479 // CHECK11-NEXT:    ret void
6480 //
6481 //
6482 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l90.omp_outlined.omp_outlined
6483 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
6484 // CHECK11-NEXT:  entry:
6485 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6486 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6487 // CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6488 // CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6489 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6490 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6491 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6492 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6493 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6494 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6495 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
6496 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6497 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6498 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6499 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6500 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
6501 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
6502 // CHECK11-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6503 // CHECK11-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6504 // CHECK11-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6505 // CHECK11-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6506 // CHECK11-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
6507 // CHECK11-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
6508 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6509 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6510 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6511 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
6512 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6513 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6514 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6515 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6516 // CHECK11:       cond.true:
6517 // CHECK11-NEXT:    br label [[COND_END:%.*]]
6518 // CHECK11:       cond.false:
6519 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6520 // CHECK11-NEXT:    br label [[COND_END]]
6521 // CHECK11:       cond.end:
6522 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6523 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
6524 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6525 // CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
6526 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6527 // CHECK11:       omp.inner.for.cond:
6528 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6529 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6530 // CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
6531 // CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6532 // CHECK11:       omp.inner.for.body:
6533 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6534 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
6535 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6536 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
6537 // CHECK11-NEXT:    call void @_Z3fn5v()
6538 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6539 // CHECK11:       omp.body.continue:
6540 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6541 // CHECK11:       omp.inner.for.inc:
6542 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6543 // CHECK11-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
6544 // CHECK11-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
6545 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP34:![0-9]+]]
6546 // CHECK11:       omp.inner.for.end:
6547 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6548 // CHECK11:       omp.loop.exit:
6549 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
6550 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
6551 // CHECK11-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
6552 // CHECK11-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6553 // CHECK11:       .omp.final.then:
6554 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
6555 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6556 // CHECK11:       .omp.final.done:
6557 // CHECK11-NEXT:    ret void
6558 //
6559 //
6560 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99
6561 // CHECK11-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
6562 // CHECK11-NEXT:  entry:
6563 // CHECK11-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
6564 // CHECK11-NEXT:    store i64 [[ARG]], ptr [[ARG_ADDR]], align 8
6565 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined, ptr [[ARG_ADDR]])
6566 // CHECK11-NEXT:    ret void
6567 //
6568 //
6569 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined
6570 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] {
6571 // CHECK11-NEXT:  entry:
6572 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6573 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6574 // CHECK11-NEXT:    [[ARG_ADDR:%.*]] = alloca ptr, align 8
6575 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
6576 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6577 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6578 // CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6579 // CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6580 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6581 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6582 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
6583 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6584 // CHECK11-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
6585 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR__CASTED11:%.*]] = alloca i64, align 8
6586 // CHECK11-NEXT:    [[DOTBOUND_ZERO_ADDR16:%.*]] = alloca i32, align 4
6587 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6588 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6589 // CHECK11-NEXT:    store ptr [[ARG]], ptr [[ARG_ADDR]], align 8
6590 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[ARG_ADDR]], align 8
6591 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
6592 // CHECK11-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP1]], 0
6593 // CHECK11-NEXT:    [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
6594 // CHECK11-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
6595 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
6596 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
6597 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6598 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6599 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6600 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
6601 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6602 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6603 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
6604 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6605 // CHECK11:       cond.true:
6606 // CHECK11-NEXT:    br label [[COND_END:%.*]]
6607 // CHECK11:       cond.false:
6608 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6609 // CHECK11-NEXT:    br label [[COND_END]]
6610 // CHECK11:       cond.end:
6611 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
6612 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
6613 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6614 // CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
6615 // CHECK11-NEXT:    [[TMP7:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
6616 // CHECK11-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP7]] to i1
6617 // CHECK11-NEXT:    br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE6:%.*]]
6618 // CHECK11:       omp_if.then:
6619 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6620 // CHECK11:       omp.inner.for.cond:
6621 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35:![0-9]+]]
6622 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP35]]
6623 // CHECK11-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6624 // CHECK11-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6625 // CHECK11:       omp.inner.for.body:
6626 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP35]]
6627 // CHECK11-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
6628 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP35]]
6629 // CHECK11-NEXT:    [[TMP13:%.*]] = zext i32 [[TMP12]] to i64
6630 // CHECK11-NEXT:    [[TMP14:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1, !llvm.access.group [[ACC_GRP35]]
6631 // CHECK11-NEXT:    [[LOADEDV2:%.*]] = trunc i8 [[TMP14]] to i1
6632 // CHECK11-NEXT:    [[STOREDV3:%.*]] = zext i1 [[LOADEDV2]] to i8
6633 // CHECK11-NEXT:    store i8 [[STOREDV3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 1, !llvm.access.group [[ACC_GRP35]]
6634 // CHECK11-NEXT:    [[TMP15:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8, !llvm.access.group [[ACC_GRP35]]
6635 // CHECK11-NEXT:    [[TMP16:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1, !llvm.access.group [[ACC_GRP35]]
6636 // CHECK11-NEXT:    [[LOADEDV4:%.*]] = trunc i8 [[TMP16]] to i1
6637 // CHECK11-NEXT:    br i1 [[LOADEDV4]], label [[OMP_IF_THEN5:%.*]], label [[OMP_IF_ELSE:%.*]]
6638 // CHECK11:       omp_if.then5:
6639 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined, i64 [[TMP11]], i64 [[TMP13]], i64 [[TMP15]]), !llvm.access.group [[ACC_GRP35]]
6640 // CHECK11-NEXT:    br label [[OMP_IF_END:%.*]]
6641 // CHECK11:       omp_if.else:
6642 // CHECK11-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP3]]), !llvm.access.group [[ACC_GRP35]]
6643 // CHECK11-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP35]]
6644 // CHECK11-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP35]]
6645 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined(ptr [[TMP17]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP11]], i64 [[TMP13]], i64 [[TMP15]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP35]]
6646 // CHECK11-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP3]]), !llvm.access.group [[ACC_GRP35]]
6647 // CHECK11-NEXT:    br label [[OMP_IF_END]]
6648 // CHECK11:       omp_if.end:
6649 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6650 // CHECK11:       omp.inner.for.inc:
6651 // CHECK11-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
6652 // CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP35]]
6653 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
6654 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP35]]
6655 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP36:![0-9]+]]
6656 // CHECK11:       omp.inner.for.end:
6657 // CHECK11-NEXT:    br label [[OMP_IF_END21:%.*]]
6658 // CHECK11:       omp_if.else6:
6659 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
6660 // CHECK11:       omp.inner.for.cond7:
6661 // CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6662 // CHECK11-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6663 // CHECK11-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP20]], [[TMP21]]
6664 // CHECK11-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END20:%.*]]
6665 // CHECK11:       omp.inner.for.body9:
6666 // CHECK11-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6667 // CHECK11-NEXT:    [[TMP23:%.*]] = zext i32 [[TMP22]] to i64
6668 // CHECK11-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6669 // CHECK11-NEXT:    [[TMP25:%.*]] = zext i32 [[TMP24]] to i64
6670 // CHECK11-NEXT:    [[TMP26:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
6671 // CHECK11-NEXT:    [[LOADEDV10:%.*]] = trunc i8 [[TMP26]] to i1
6672 // CHECK11-NEXT:    [[STOREDV12:%.*]] = zext i1 [[LOADEDV10]] to i8
6673 // CHECK11-NEXT:    store i8 [[STOREDV12]], ptr [[DOTCAPTURE_EXPR__CASTED11]], align 1
6674 // CHECK11-NEXT:    [[TMP27:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED11]], align 8
6675 // CHECK11-NEXT:    [[TMP28:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
6676 // CHECK11-NEXT:    [[LOADEDV13:%.*]] = trunc i8 [[TMP28]] to i1
6677 // CHECK11-NEXT:    br i1 [[LOADEDV13]], label [[OMP_IF_THEN14:%.*]], label [[OMP_IF_ELSE15:%.*]]
6678 // CHECK11:       omp_if.then14:
6679 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined.1, i64 [[TMP23]], i64 [[TMP25]], i64 [[TMP27]])
6680 // CHECK11-NEXT:    br label [[OMP_IF_END17:%.*]]
6681 // CHECK11:       omp_if.else15:
6682 // CHECK11-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP3]])
6683 // CHECK11-NEXT:    [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6684 // CHECK11-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR16]], align 4
6685 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined.1(ptr [[TMP29]], ptr [[DOTBOUND_ZERO_ADDR16]], i64 [[TMP23]], i64 [[TMP25]], i64 [[TMP27]]) #[[ATTR2]]
6686 // CHECK11-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP3]])
6687 // CHECK11-NEXT:    br label [[OMP_IF_END17]]
6688 // CHECK11:       omp_if.end17:
6689 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC18:%.*]]
6690 // CHECK11:       omp.inner.for.inc18:
6691 // CHECK11-NEXT:    [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6692 // CHECK11-NEXT:    [[TMP31:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6693 // CHECK11-NEXT:    [[ADD19:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
6694 // CHECK11-NEXT:    store i32 [[ADD19]], ptr [[DOTOMP_IV]], align 4
6695 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP38:![0-9]+]]
6696 // CHECK11:       omp.inner.for.end20:
6697 // CHECK11-NEXT:    br label [[OMP_IF_END21]]
6698 // CHECK11:       omp_if.end21:
6699 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6700 // CHECK11:       omp.loop.exit:
6701 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])
6702 // CHECK11-NEXT:    [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
6703 // CHECK11-NEXT:    [[TMP33:%.*]] = icmp ne i32 [[TMP32]], 0
6704 // CHECK11-NEXT:    br i1 [[TMP33]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6705 // CHECK11:       .omp.final.then:
6706 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
6707 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6708 // CHECK11:       .omp.final.done:
6709 // CHECK11-NEXT:    ret void
6710 //
6711 //
6712 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined
6713 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
6714 // CHECK11-NEXT:  entry:
6715 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6716 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6717 // CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6718 // CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6719 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6720 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6721 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6722 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6723 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6724 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6725 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6726 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
6727 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6728 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6729 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6730 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6731 // CHECK11-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
6732 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
6733 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
6734 // CHECK11-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6735 // CHECK11-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6736 // CHECK11-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6737 // CHECK11-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6738 // CHECK11-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
6739 // CHECK11-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
6740 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6741 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6742 // CHECK11-NEXT:    [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
6743 // CHECK11-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
6744 // CHECK11-NEXT:    br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
6745 // CHECK11:       omp_if.then:
6746 // CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6747 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
6748 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6749 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6750 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99
6751 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6752 // CHECK11:       cond.true:
6753 // CHECK11-NEXT:    br label [[COND_END:%.*]]
6754 // CHECK11:       cond.false:
6755 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6756 // CHECK11-NEXT:    br label [[COND_END]]
6757 // CHECK11:       cond.end:
6758 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6759 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
6760 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6761 // CHECK11-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
6762 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6763 // CHECK11:       omp.inner.for.cond:
6764 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39:![0-9]+]]
6765 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP39]]
6766 // CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6767 // CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6768 // CHECK11:       omp.inner.for.body:
6769 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
6770 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6771 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6772 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP39]]
6773 // CHECK11-NEXT:    call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP39]]
6774 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6775 // CHECK11:       omp.body.continue:
6776 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6777 // CHECK11:       omp.inner.for.inc:
6778 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
6779 // CHECK11-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP11]], 1
6780 // CHECK11-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP39]]
6781 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP40:![0-9]+]]
6782 // CHECK11:       omp.inner.for.end:
6783 // CHECK11-NEXT:    br label [[OMP_IF_END:%.*]]
6784 // CHECK11:       omp_if.else:
6785 // CHECK11-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6786 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
6787 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP13]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6788 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6789 // CHECK11-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP14]], 99
6790 // CHECK11-NEXT:    br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
6791 // CHECK11:       cond.true5:
6792 // CHECK11-NEXT:    br label [[COND_END7:%.*]]
6793 // CHECK11:       cond.false6:
6794 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6795 // CHECK11-NEXT:    br label [[COND_END7]]
6796 // CHECK11:       cond.end7:
6797 // CHECK11-NEXT:    [[COND8:%.*]] = phi i32 [ 99, [[COND_TRUE5]] ], [ [[TMP15]], [[COND_FALSE6]] ]
6798 // CHECK11-NEXT:    store i32 [[COND8]], ptr [[DOTOMP_UB]], align 4
6799 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6800 // CHECK11-NEXT:    store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4
6801 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND9:%.*]]
6802 // CHECK11:       omp.inner.for.cond9:
6803 // CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6804 // CHECK11-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6805 // CHECK11-NEXT:    [[CMP10:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
6806 // CHECK11-NEXT:    br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY11:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
6807 // CHECK11:       omp.inner.for.body11:
6808 // CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6809 // CHECK11-NEXT:    [[MUL12:%.*]] = mul nsw i32 [[TMP19]], 1
6810 // CHECK11-NEXT:    [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
6811 // CHECK11-NEXT:    store i32 [[ADD13]], ptr [[I]], align 4
6812 // CHECK11-NEXT:    call void @_Z3fn6v()
6813 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE14:%.*]]
6814 // CHECK11:       omp.body.continue14:
6815 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC15:%.*]]
6816 // CHECK11:       omp.inner.for.inc15:
6817 // CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6818 // CHECK11-NEXT:    [[ADD16:%.*]] = add nsw i32 [[TMP20]], 1
6819 // CHECK11-NEXT:    store i32 [[ADD16]], ptr [[DOTOMP_IV]], align 4
6820 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND9]], !llvm.loop [[LOOP42:![0-9]+]]
6821 // CHECK11:       omp.inner.for.end17:
6822 // CHECK11-NEXT:    br label [[OMP_IF_END]]
6823 // CHECK11:       omp_if.end:
6824 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6825 // CHECK11:       omp.loop.exit:
6826 // CHECK11-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6827 // CHECK11-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
6828 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])
6829 // CHECK11-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
6830 // CHECK11-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
6831 // CHECK11-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6832 // CHECK11:       .omp.final.then:
6833 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
6834 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6835 // CHECK11:       .omp.final.done:
6836 // CHECK11-NEXT:    ret void
6837 //
6838 //
6839 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l99.omp_outlined.omp_outlined.1
6840 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR1]] {
6841 // CHECK11-NEXT:  entry:
6842 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6843 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6844 // CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6845 // CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6846 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6847 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6848 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6849 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6850 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6851 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6852 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6853 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
6854 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6855 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6856 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6857 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6858 // CHECK11-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
6859 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
6860 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
6861 // CHECK11-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6862 // CHECK11-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
6863 // CHECK11-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6864 // CHECK11-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
6865 // CHECK11-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
6866 // CHECK11-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
6867 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6868 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6869 // CHECK11-NEXT:    [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR__ADDR]], align 1
6870 // CHECK11-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP2]] to i1
6871 // CHECK11-NEXT:    br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
6872 // CHECK11:       omp_if.then:
6873 // CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6874 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
6875 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6876 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6877 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 99
6878 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6879 // CHECK11:       cond.true:
6880 // CHECK11-NEXT:    br label [[COND_END:%.*]]
6881 // CHECK11:       cond.false:
6882 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6883 // CHECK11-NEXT:    br label [[COND_END]]
6884 // CHECK11:       cond.end:
6885 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6886 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
6887 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6888 // CHECK11-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
6889 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6890 // CHECK11:       omp.inner.for.cond:
6891 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43:![0-9]+]]
6892 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP43]]
6893 // CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6894 // CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6895 // CHECK11:       omp.inner.for.body:
6896 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]
6897 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6898 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6899 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP43]]
6900 // CHECK11-NEXT:    call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP43]]
6901 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6902 // CHECK11:       omp.body.continue:
6903 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6904 // CHECK11:       omp.inner.for.inc:
6905 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]
6906 // CHECK11-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP11]], 1
6907 // CHECK11-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP43]]
6908 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP44:![0-9]+]]
6909 // CHECK11:       omp.inner.for.end:
6910 // CHECK11-NEXT:    br label [[OMP_IF_END:%.*]]
6911 // CHECK11:       omp_if.else:
6912 // CHECK11-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6913 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
6914 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP13]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6915 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6916 // CHECK11-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP14]], 99
6917 // CHECK11-NEXT:    br i1 [[CMP4]], label [[COND_TRUE5:%.*]], label [[COND_FALSE6:%.*]]
6918 // CHECK11:       cond.true5:
6919 // CHECK11-NEXT:    br label [[COND_END7:%.*]]
6920 // CHECK11:       cond.false6:
6921 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6922 // CHECK11-NEXT:    br label [[COND_END7]]
6923 // CHECK11:       cond.end7:
6924 // CHECK11-NEXT:    [[COND8:%.*]] = phi i32 [ 99, [[COND_TRUE5]] ], [ [[TMP15]], [[COND_FALSE6]] ]
6925 // CHECK11-NEXT:    store i32 [[COND8]], ptr [[DOTOMP_UB]], align 4
6926 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6927 // CHECK11-NEXT:    store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4
6928 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND9:%.*]]
6929 // CHECK11:       omp.inner.for.cond9:
6930 // CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6931 // CHECK11-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6932 // CHECK11-NEXT:    [[CMP10:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
6933 // CHECK11-NEXT:    br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY11:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
6934 // CHECK11:       omp.inner.for.body11:
6935 // CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6936 // CHECK11-NEXT:    [[MUL12:%.*]] = mul nsw i32 [[TMP19]], 1
6937 // CHECK11-NEXT:    [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
6938 // CHECK11-NEXT:    store i32 [[ADD13]], ptr [[I]], align 4
6939 // CHECK11-NEXT:    call void @_Z3fn6v()
6940 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE14:%.*]]
6941 // CHECK11:       omp.body.continue14:
6942 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC15:%.*]]
6943 // CHECK11:       omp.inner.for.inc15:
6944 // CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6945 // CHECK11-NEXT:    [[ADD16:%.*]] = add nsw i32 [[TMP20]], 1
6946 // CHECK11-NEXT:    store i32 [[ADD16]], ptr [[DOTOMP_IV]], align 4
6947 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND9]], !llvm.loop [[LOOP46:![0-9]+]]
6948 // CHECK11:       omp.inner.for.end17:
6949 // CHECK11-NEXT:    br label [[OMP_IF_END]]
6950 // CHECK11:       omp_if.end:
6951 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6952 // CHECK11:       omp.loop.exit:
6953 // CHECK11-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6954 // CHECK11-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
6955 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP22]])
6956 // CHECK11-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
6957 // CHECK11-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
6958 // CHECK11-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
6959 // CHECK11:       .omp.final.then:
6960 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
6961 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
6962 // CHECK11:       .omp.final.done:
6963 // CHECK11-NEXT:    ret void
6964 //
6965 //
6966 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
6967 // CHECK11-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
6968 // CHECK11-NEXT:  entry:
6969 // CHECK11-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
6970 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6971 // CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
6972 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
6973 // CHECK11-NEXT:    [[KERNEL_ARGS2:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6974 // CHECK11-NEXT:    [[ARG_CASTED:%.*]] = alloca i64, align 8
6975 // CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
6976 // CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
6977 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
6978 // CHECK11-NEXT:    [[_TMP5:%.*]] = alloca i32, align 4
6979 // CHECK11-NEXT:    [[KERNEL_ARGS6:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6980 // CHECK11-NEXT:    store i32 [[ARG]], ptr [[ARG_ADDR]], align 4
6981 // CHECK11-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
6982 // CHECK11-NEXT:    store i32 3, ptr [[TMP0]], align 4
6983 // CHECK11-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
6984 // CHECK11-NEXT:    store i32 0, ptr [[TMP1]], align 4
6985 // CHECK11-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
6986 // CHECK11-NEXT:    store ptr null, ptr [[TMP2]], align 8
6987 // CHECK11-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
6988 // CHECK11-NEXT:    store ptr null, ptr [[TMP3]], align 8
6989 // CHECK11-NEXT:    [[TMP4:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
6990 // CHECK11-NEXT:    store ptr null, ptr [[TMP4]], align 8
6991 // CHECK11-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
6992 // CHECK11-NEXT:    store ptr null, ptr [[TMP5]], align 8
6993 // CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
6994 // CHECK11-NEXT:    store ptr null, ptr [[TMP6]], align 8
6995 // CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
6996 // CHECK11-NEXT:    store ptr null, ptr [[TMP7]], align 8
6997 // CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
6998 // CHECK11-NEXT:    store i64 100, ptr [[TMP8]], align 8
6999 // CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
7000 // CHECK11-NEXT:    store i64 0, ptr [[TMP9]], align 8
7001 // CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
7002 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
7003 // CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
7004 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
7005 // CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
7006 // CHECK11-NEXT:    store i32 0, ptr [[TMP12]], align 4
7007 // CHECK11-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.region_id, ptr [[KERNEL_ARGS]])
7008 // CHECK11-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
7009 // CHECK11-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
7010 // CHECK11:       omp_offload.failed:
7011 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59() #[[ATTR2]]
7012 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]
7013 // CHECK11:       omp_offload.cont:
7014 // CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 0
7015 // CHECK11-NEXT:    store i32 3, ptr [[TMP15]], align 4
7016 // CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 1
7017 // CHECK11-NEXT:    store i32 0, ptr [[TMP16]], align 4
7018 // CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 2
7019 // CHECK11-NEXT:    store ptr null, ptr [[TMP17]], align 8
7020 // CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 3
7021 // CHECK11-NEXT:    store ptr null, ptr [[TMP18]], align 8
7022 // CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 4
7023 // CHECK11-NEXT:    store ptr null, ptr [[TMP19]], align 8
7024 // CHECK11-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 5
7025 // CHECK11-NEXT:    store ptr null, ptr [[TMP20]], align 8
7026 // CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 6
7027 // CHECK11-NEXT:    store ptr null, ptr [[TMP21]], align 8
7028 // CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 7
7029 // CHECK11-NEXT:    store ptr null, ptr [[TMP22]], align 8
7030 // CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 8
7031 // CHECK11-NEXT:    store i64 100, ptr [[TMP23]], align 8
7032 // CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 9
7033 // CHECK11-NEXT:    store i64 0, ptr [[TMP24]], align 8
7034 // CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 10
7035 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP25]], align 4
7036 // CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 11
7037 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP26]], align 4
7038 // CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS2]], i32 0, i32 12
7039 // CHECK11-NEXT:    store i32 0, ptr [[TMP27]], align 4
7040 // CHECK11-NEXT:    [[TMP28:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.region_id, ptr [[KERNEL_ARGS2]])
7041 // CHECK11-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
7042 // CHECK11-NEXT:    br i1 [[TMP29]], label [[OMP_OFFLOAD_FAILED3:%.*]], label [[OMP_OFFLOAD_CONT4:%.*]]
7043 // CHECK11:       omp_offload.failed3:
7044 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65() #[[ATTR2]]
7045 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT4]]
7046 // CHECK11:       omp_offload.cont4:
7047 // CHECK11-NEXT:    [[TMP30:%.*]] = load i32, ptr [[ARG_ADDR]], align 4
7048 // CHECK11-NEXT:    store i32 [[TMP30]], ptr [[ARG_CASTED]], align 4
7049 // CHECK11-NEXT:    [[TMP31:%.*]] = load i64, ptr [[ARG_CASTED]], align 8
7050 // CHECK11-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7051 // CHECK11-NEXT:    store i64 [[TMP31]], ptr [[TMP32]], align 8
7052 // CHECK11-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7053 // CHECK11-NEXT:    store i64 [[TMP31]], ptr [[TMP33]], align 8
7054 // CHECK11-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
7055 // CHECK11-NEXT:    store ptr null, ptr [[TMP34]], align 8
7056 // CHECK11-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7057 // CHECK11-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7058 // CHECK11-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 0
7059 // CHECK11-NEXT:    store i32 3, ptr [[TMP37]], align 4
7060 // CHECK11-NEXT:    [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 1
7061 // CHECK11-NEXT:    store i32 1, ptr [[TMP38]], align 4
7062 // CHECK11-NEXT:    [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 2
7063 // CHECK11-NEXT:    store ptr [[TMP35]], ptr [[TMP39]], align 8
7064 // CHECK11-NEXT:    [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 3
7065 // CHECK11-NEXT:    store ptr [[TMP36]], ptr [[TMP40]], align 8
7066 // CHECK11-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 4
7067 // CHECK11-NEXT:    store ptr @.offload_sizes.2, ptr [[TMP41]], align 8
7068 // CHECK11-NEXT:    [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 5
7069 // CHECK11-NEXT:    store ptr @.offload_maptypes.3, ptr [[TMP42]], align 8
7070 // CHECK11-NEXT:    [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 6
7071 // CHECK11-NEXT:    store ptr null, ptr [[TMP43]], align 8
7072 // CHECK11-NEXT:    [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 7
7073 // CHECK11-NEXT:    store ptr null, ptr [[TMP44]], align 8
7074 // CHECK11-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 8
7075 // CHECK11-NEXT:    store i64 100, ptr [[TMP45]], align 8
7076 // CHECK11-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 9
7077 // CHECK11-NEXT:    store i64 0, ptr [[TMP46]], align 8
7078 // CHECK11-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 10
7079 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP47]], align 4
7080 // CHECK11-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 11
7081 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP48]], align 4
7082 // CHECK11-NEXT:    [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS6]], i32 0, i32 12
7083 // CHECK11-NEXT:    store i32 0, ptr [[TMP49]], align 4
7084 // CHECK11-NEXT:    [[TMP50:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.region_id, ptr [[KERNEL_ARGS6]])
7085 // CHECK11-NEXT:    [[TMP51:%.*]] = icmp ne i32 [[TMP50]], 0
7086 // CHECK11-NEXT:    br i1 [[TMP51]], label [[OMP_OFFLOAD_FAILED7:%.*]], label [[OMP_OFFLOAD_CONT8:%.*]]
7087 // CHECK11:       omp_offload.failed7:
7088 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71(i64 [[TMP31]]) #[[ATTR2]]
7089 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT8]]
7090 // CHECK11:       omp_offload.cont8:
7091 // CHECK11-NEXT:    ret i32 0
7092 //
7093 //
7094 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59
7095 // CHECK11-SAME: () #[[ATTR1]] {
7096 // CHECK11-NEXT:  entry:
7097 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined)
7098 // CHECK11-NEXT:    ret void
7099 //
7100 //
7101 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined
7102 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7103 // CHECK11-NEXT:  entry:
7104 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7105 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7106 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7107 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7108 // CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7109 // CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7110 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7111 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7112 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
7113 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7114 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7115 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
7116 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
7117 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7118 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7119 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7120 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7121 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7122 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7123 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7124 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7125 // CHECK11:       cond.true:
7126 // CHECK11-NEXT:    br label [[COND_END:%.*]]
7127 // CHECK11:       cond.false:
7128 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7129 // CHECK11-NEXT:    br label [[COND_END]]
7130 // CHECK11:       cond.end:
7131 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7132 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
7133 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
7134 // CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
7135 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7136 // CHECK11:       omp.inner.for.cond:
7137 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47:![0-9]+]]
7138 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP47]]
7139 // CHECK11-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7140 // CHECK11-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7141 // CHECK11:       omp.inner.for.body:
7142 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP47]]
7143 // CHECK11-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7144 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP47]]
7145 // CHECK11-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7146 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP47]]
7147 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7148 // CHECK11:       omp.inner.for.inc:
7149 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
7150 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP47]]
7151 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
7152 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP47]]
7153 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP48:![0-9]+]]
7154 // CHECK11:       omp.inner.for.end:
7155 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7156 // CHECK11:       omp.loop.exit:
7157 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
7158 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
7159 // CHECK11-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
7160 // CHECK11-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7161 // CHECK11:       .omp.final.then:
7162 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
7163 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7164 // CHECK11:       .omp.final.done:
7165 // CHECK11-NEXT:    ret void
7166 //
7167 //
7168 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l59.omp_outlined.omp_outlined
7169 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
7170 // CHECK11-NEXT:  entry:
7171 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7172 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7173 // CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7174 // CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7175 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7176 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7177 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7178 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7179 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7180 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7181 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
7182 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7183 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7184 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
7185 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
7186 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
7187 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
7188 // CHECK11-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
7189 // CHECK11-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7190 // CHECK11-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
7191 // CHECK11-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7192 // CHECK11-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
7193 // CHECK11-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
7194 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7195 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7196 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7197 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
7198 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7199 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7200 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7201 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7202 // CHECK11:       cond.true:
7203 // CHECK11-NEXT:    br label [[COND_END:%.*]]
7204 // CHECK11:       cond.false:
7205 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7206 // CHECK11-NEXT:    br label [[COND_END]]
7207 // CHECK11:       cond.end:
7208 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7209 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
7210 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7211 // CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
7212 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7213 // CHECK11:       omp.inner.for.cond:
7214 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50:![0-9]+]]
7215 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP50]]
7216 // CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7217 // CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7218 // CHECK11:       omp.inner.for.body:
7219 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
7220 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7221 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7222 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP50]]
7223 // CHECK11-NEXT:    call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP50]]
7224 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7225 // CHECK11:       omp.body.continue:
7226 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7227 // CHECK11:       omp.inner.for.inc:
7228 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
7229 // CHECK11-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7230 // CHECK11-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP50]]
7231 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP51:![0-9]+]]
7232 // CHECK11:       omp.inner.for.end:
7233 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7234 // CHECK11:       omp.loop.exit:
7235 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
7236 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
7237 // CHECK11-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
7238 // CHECK11-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7239 // CHECK11:       .omp.final.then:
7240 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
7241 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7242 // CHECK11:       .omp.final.done:
7243 // CHECK11-NEXT:    ret void
7244 //
7245 //
7246 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65
7247 // CHECK11-SAME: () #[[ATTR1]] {
7248 // CHECK11-NEXT:  entry:
7249 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined)
7250 // CHECK11-NEXT:    ret void
7251 //
7252 //
7253 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined
7254 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1]] {
7255 // CHECK11-NEXT:  entry:
7256 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7257 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7258 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7259 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7260 // CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7261 // CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7262 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7263 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7264 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
7265 // CHECK11-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
7266 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7267 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7268 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
7269 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
7270 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7271 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7272 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7273 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7274 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7275 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7276 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 99
7277 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7278 // CHECK11:       cond.true:
7279 // CHECK11-NEXT:    br label [[COND_END:%.*]]
7280 // CHECK11:       cond.false:
7281 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7282 // CHECK11-NEXT:    br label [[COND_END]]
7283 // CHECK11:       cond.end:
7284 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7285 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
7286 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
7287 // CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
7288 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7289 // CHECK11:       omp.inner.for.cond:
7290 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7291 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7292 // CHECK11-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7293 // CHECK11-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7294 // CHECK11:       omp.inner.for.body:
7295 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
7296 // CHECK11-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
7297 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7298 // CHECK11-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
7299 // CHECK11-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]])
7300 // CHECK11-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7301 // CHECK11-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4
7302 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined.omp_outlined(ptr [[TMP11]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR2]]
7303 // CHECK11-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP1]])
7304 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7305 // CHECK11:       omp.inner.for.inc:
7306 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7307 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
7308 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
7309 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
7310 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP53:![0-9]+]]
7311 // CHECK11:       omp.inner.for.end:
7312 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7313 // CHECK11:       omp.loop.exit:
7314 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
7315 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
7316 // CHECK11-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
7317 // CHECK11-NEXT:    br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7318 // CHECK11:       .omp.final.then:
7319 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
7320 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7321 // CHECK11:       .omp.final.done:
7322 // CHECK11-NEXT:    ret void
7323 //
7324 //
7325 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l65.omp_outlined.omp_outlined
7326 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
7327 // CHECK11-NEXT:  entry:
7328 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7329 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7330 // CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7331 // CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7332 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7333 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7334 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7335 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7336 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7337 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7338 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
7339 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7340 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7341 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
7342 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
7343 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
7344 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
7345 // CHECK11-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
7346 // CHECK11-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7347 // CHECK11-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
7348 // CHECK11-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7349 // CHECK11-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
7350 // CHECK11-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
7351 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7352 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7353 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7354 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
7355 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7356 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7357 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7358 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7359 // CHECK11:       cond.true:
7360 // CHECK11-NEXT:    br label [[COND_END:%.*]]
7361 // CHECK11:       cond.false:
7362 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7363 // CHECK11-NEXT:    br label [[COND_END]]
7364 // CHECK11:       cond.end:
7365 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7366 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
7367 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7368 // CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
7369 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7370 // CHECK11:       omp.inner.for.cond:
7371 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7372 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7373 // CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7374 // CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7375 // CHECK11:       omp.inner.for.body:
7376 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7377 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7378 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7379 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
7380 // CHECK11-NEXT:    call void @_Z3fn2v()
7381 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7382 // CHECK11:       omp.body.continue:
7383 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7384 // CHECK11:       omp.inner.for.inc:
7385 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7386 // CHECK11-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7387 // CHECK11-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
7388 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP54:![0-9]+]]
7389 // CHECK11:       omp.inner.for.end:
7390 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7391 // CHECK11:       omp.loop.exit:
7392 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
7393 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
7394 // CHECK11-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
7395 // CHECK11-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7396 // CHECK11:       .omp.final.then:
7397 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
7398 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7399 // CHECK11:       .omp.final.done:
7400 // CHECK11-NEXT:    ret void
7401 //
7402 //
7403 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71
7404 // CHECK11-SAME: (i64 noundef [[ARG:%.*]]) #[[ATTR1]] {
7405 // CHECK11-NEXT:  entry:
7406 // CHECK11-NEXT:    [[ARG_ADDR:%.*]] = alloca i64, align 8
7407 // CHECK11-NEXT:    store i64 [[ARG]], ptr [[ARG_ADDR]], align 8
7408 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined, ptr [[ARG_ADDR]])
7409 // CHECK11-NEXT:    ret void
7410 //
7411 //
7412 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined
7413 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[ARG:%.*]]) #[[ATTR1]] {
7414 // CHECK11-NEXT:  entry:
7415 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7416 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7417 // CHECK11-NEXT:    [[ARG_ADDR:%.*]] = alloca ptr, align 8
7418 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7419 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7420 // CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7421 // CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7422 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7423 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7424 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
7425 // CHECK11-NEXT:    [[DOTBOUND_ZERO_ADDR:%.*]] = alloca i32, align 4
7426 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7427 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7428 // CHECK11-NEXT:    store ptr [[ARG]], ptr [[ARG_ADDR]], align 8
7429 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[ARG_ADDR]], align 8
7430 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
7431 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_COMB_UB]], align 4
7432 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7433 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7434 // CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7435 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
7436 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7437 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7438 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 99
7439 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7440 // CHECK11:       cond.true:
7441 // CHECK11-NEXT:    br label [[COND_END:%.*]]
7442 // CHECK11:       cond.false:
7443 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7444 // CHECK11-NEXT:    br label [[COND_END]]
7445 // CHECK11:       cond.end:
7446 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
7447 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
7448 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
7449 // CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
7450 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7451 // CHECK11:       omp.inner.for.cond:
7452 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55:![0-9]+]]
7453 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP55]]
7454 // CHECK11-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7455 // CHECK11-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7456 // CHECK11:       omp.inner.for.body:
7457 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP55]]
7458 // CHECK11-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
7459 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP55]]
7460 // CHECK11-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
7461 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP0]], align 4, !llvm.access.group [[ACC_GRP55]]
7462 // CHECK11-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP12]], 0
7463 // CHECK11-NEXT:    br i1 [[TOBOOL]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
7464 // CHECK11:       omp_if.then:
7465 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]]), !llvm.access.group [[ACC_GRP55]]
7466 // CHECK11-NEXT:    br label [[OMP_IF_END:%.*]]
7467 // CHECK11:       omp_if.else:
7468 // CHECK11-NEXT:    call void @__kmpc_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP55]]
7469 // CHECK11-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8, !llvm.access.group [[ACC_GRP55]]
7470 // CHECK11-NEXT:    store i32 0, ptr [[DOTBOUND_ZERO_ADDR]], align 4, !llvm.access.group [[ACC_GRP55]]
7471 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined.omp_outlined(ptr [[TMP13]], ptr [[DOTBOUND_ZERO_ADDR]], i64 [[TMP9]], i64 [[TMP11]]) #[[ATTR2]], !llvm.access.group [[ACC_GRP55]]
7472 // CHECK11-NEXT:    call void @__kmpc_end_serialized_parallel(ptr @[[GLOB3]], i32 [[TMP2]]), !llvm.access.group [[ACC_GRP55]]
7473 // CHECK11-NEXT:    br label [[OMP_IF_END]]
7474 // CHECK11:       omp_if.end:
7475 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7476 // CHECK11:       omp.inner.for.inc:
7477 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55]]
7478 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP55]]
7479 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
7480 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP55]]
7481 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP56:![0-9]+]]
7482 // CHECK11:       omp.inner.for.end:
7483 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7484 // CHECK11:       omp.loop.exit:
7485 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
7486 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
7487 // CHECK11-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
7488 // CHECK11-NEXT:    br i1 [[TMP17]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7489 // CHECK11:       .omp.final.then:
7490 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
7491 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7492 // CHECK11:       .omp.final.done:
7493 // CHECK11-NEXT:    ret void
7494 //
7495 //
7496 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiEiT__l71.omp_outlined.omp_outlined
7497 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR1]] {
7498 // CHECK11-NEXT:  entry:
7499 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7500 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7501 // CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
7502 // CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
7503 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7504 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7505 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7506 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7507 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7508 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7509 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
7510 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7511 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7512 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
7513 // CHECK11-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
7514 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
7515 // CHECK11-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
7516 // CHECK11-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
7517 // CHECK11-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
7518 // CHECK11-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
7519 // CHECK11-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP1]] to i32
7520 // CHECK11-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
7521 // CHECK11-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
7522 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7523 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7524 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7525 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
7526 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7527 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7528 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
7529 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7530 // CHECK11:       cond.true:
7531 // CHECK11-NEXT:    br label [[COND_END:%.*]]
7532 // CHECK11:       cond.false:
7533 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7534 // CHECK11-NEXT:    br label [[COND_END]]
7535 // CHECK11:       cond.end:
7536 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
7537 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
7538 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7539 // CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
7540 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7541 // CHECK11:       omp.inner.for.cond:
7542 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58:![0-9]+]]
7543 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP58]]
7544 // CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
7545 // CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7546 // CHECK11:       omp.inner.for.body:
7547 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]
7548 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
7549 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7550 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP58]]
7551 // CHECK11-NEXT:    call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP58]]
7552 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7553 // CHECK11:       omp.body.continue:
7554 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7555 // CHECK11:       omp.inner.for.inc:
7556 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]
7557 // CHECK11-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP10]], 1
7558 // CHECK11-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP58]]
7559 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP59:![0-9]+]]
7560 // CHECK11:       omp.inner.for.end:
7561 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7562 // CHECK11:       omp.loop.exit:
7563 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP3]])
7564 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
7565 // CHECK11-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
7566 // CHECK11-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
7567 // CHECK11:       .omp.final.then:
7568 // CHECK11-NEXT:    store i32 100, ptr [[I]], align 4
7569 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
7570 // CHECK11:       .omp.final.done:
7571 // CHECK11-NEXT:    ret void
7572 //
7573 //
7574 // CHECK13-LABEL: define {{[^@]+}}@_Z9gtid_testv
7575 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] {
7576 // CHECK13-NEXT:  entry:
7577 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7578 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7579 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7580 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7581 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
7582 // CHECK13-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
7583 // CHECK13-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7584 // CHECK13-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7585 // CHECK13-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7586 // CHECK13-NEXT:    [[I6:%.*]] = alloca i32, align 4
7587 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
7588 // CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
7589 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7590 // CHECK13-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
7591 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7592 // CHECK13:       omp.inner.for.cond:
7593 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
7594 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]
7595 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7596 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7597 // CHECK13:       omp.inner.for.body:
7598 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
7599 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7600 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7601 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
7602 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7603 // CHECK13:       omp.body.continue:
7604 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7605 // CHECK13:       omp.inner.for.inc:
7606 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
7607 // CHECK13-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7608 // CHECK13-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
7609 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
7610 // CHECK13:       omp.inner.for.end:
7611 // CHECK13-NEXT:    store i32 100, ptr [[I]], align 4
7612 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB3]], align 4
7613 // CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_UB4]], align 4
7614 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4
7615 // CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4
7616 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
7617 // CHECK13:       omp.inner.for.cond7:
7618 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
7619 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP6]]
7620 // CHECK13-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7621 // CHECK13-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7622 // CHECK13:       omp.inner.for.body9:
7623 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
7624 // CHECK13-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7625 // CHECK13-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7626 // CHECK13-NEXT:    store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP6]]
7627 // CHECK13-NEXT:    call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP6]]
7628 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE12:%.*]]
7629 // CHECK13:       omp.body.continue12:
7630 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC13:%.*]]
7631 // CHECK13:       omp.inner.for.inc13:
7632 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
7633 // CHECK13-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7634 // CHECK13-NEXT:    store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
7635 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
7636 // CHECK13:       omp.inner.for.end15:
7637 // CHECK13-NEXT:    store i32 100, ptr [[I6]], align 4
7638 // CHECK13-NEXT:    ret void
7639 //
7640 //
7641 // CHECK13-LABEL: define {{[^@]+}}@main
7642 // CHECK13-SAME: () #[[ATTR1:[0-9]+]] {
7643 // CHECK13-NEXT:  entry:
7644 // CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
7645 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7646 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7647 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7648 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7649 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
7650 // CHECK13-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
7651 // CHECK13-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7652 // CHECK13-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7653 // CHECK13-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7654 // CHECK13-NEXT:    [[I6:%.*]] = alloca i32, align 4
7655 // CHECK13-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
7656 // CHECK13-NEXT:    [[DOTOMP_LB17:%.*]] = alloca i32, align 4
7657 // CHECK13-NEXT:    [[DOTOMP_UB18:%.*]] = alloca i32, align 4
7658 // CHECK13-NEXT:    [[DOTOMP_IV19:%.*]] = alloca i32, align 4
7659 // CHECK13-NEXT:    [[I20:%.*]] = alloca i32, align 4
7660 // CHECK13-NEXT:    store i32 0, ptr [[RETVAL]], align 4
7661 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
7662 // CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
7663 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7664 // CHECK13-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
7665 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7666 // CHECK13:       omp.inner.for.cond:
7667 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
7668 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
7669 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7670 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7671 // CHECK13:       omp.inner.for.body:
7672 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
7673 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7674 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7675 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
7676 // CHECK13-NEXT:    call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP9]]
7677 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7678 // CHECK13:       omp.body.continue:
7679 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7680 // CHECK13:       omp.inner.for.inc:
7681 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
7682 // CHECK13-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7683 // CHECK13-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
7684 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
7685 // CHECK13:       omp.inner.for.end:
7686 // CHECK13-NEXT:    store i32 100, ptr [[I]], align 4
7687 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB3]], align 4
7688 // CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_UB4]], align 4
7689 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4
7690 // CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4
7691 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
7692 // CHECK13:       omp.inner.for.cond7:
7693 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]
7694 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP12]]
7695 // CHECK13-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7696 // CHECK13-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7697 // CHECK13:       omp.inner.for.body9:
7698 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
7699 // CHECK13-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7700 // CHECK13-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7701 // CHECK13-NEXT:    store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP12]]
7702 // CHECK13-NEXT:    call void @_Z3fn5v(), !llvm.access.group [[ACC_GRP12]]
7703 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE12:%.*]]
7704 // CHECK13:       omp.body.continue12:
7705 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC13:%.*]]
7706 // CHECK13:       omp.inner.for.inc13:
7707 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
7708 // CHECK13-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7709 // CHECK13-NEXT:    store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP12]]
7710 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP13:![0-9]+]]
7711 // CHECK13:       omp.inner.for.end15:
7712 // CHECK13-NEXT:    store i32 100, ptr [[I6]], align 4
7713 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB17]], align 4
7714 // CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_UB18]], align 4
7715 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4
7716 // CHECK13-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV19]], align 4
7717 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND21:%.*]]
7718 // CHECK13:       omp.inner.for.cond21:
7719 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
7720 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP15]]
7721 // CHECK13-NEXT:    [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
7722 // CHECK13-NEXT:    br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
7723 // CHECK13:       omp.inner.for.body23:
7724 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
7725 // CHECK13-NEXT:    [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1
7726 // CHECK13-NEXT:    [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
7727 // CHECK13-NEXT:    store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP15]]
7728 // CHECK13-NEXT:    call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP15]]
7729 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE26:%.*]]
7730 // CHECK13:       omp.body.continue26:
7731 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC27:%.*]]
7732 // CHECK13:       omp.inner.for.inc27:
7733 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
7734 // CHECK13-NEXT:    [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1
7735 // CHECK13-NEXT:    store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP15]]
7736 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP16:![0-9]+]]
7737 // CHECK13:       omp.inner.for.end29:
7738 // CHECK13-NEXT:    store i32 100, ptr [[I20]], align 4
7739 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr @Arg, align 4
7740 // CHECK13-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP15]])
7741 // CHECK13-NEXT:    ret i32 [[CALL]]
7742 //
7743 //
7744 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
7745 // CHECK13-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
7746 // CHECK13-NEXT:  entry:
7747 // CHECK13-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
7748 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7749 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7750 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7751 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7752 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
7753 // CHECK13-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
7754 // CHECK13-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7755 // CHECK13-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7756 // CHECK13-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7757 // CHECK13-NEXT:    [[I6:%.*]] = alloca i32, align 4
7758 // CHECK13-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
7759 // CHECK13-NEXT:    [[DOTOMP_LB17:%.*]] = alloca i32, align 4
7760 // CHECK13-NEXT:    [[DOTOMP_UB18:%.*]] = alloca i32, align 4
7761 // CHECK13-NEXT:    [[DOTOMP_IV19:%.*]] = alloca i32, align 4
7762 // CHECK13-NEXT:    [[I20:%.*]] = alloca i32, align 4
7763 // CHECK13-NEXT:    store i32 [[ARG]], ptr [[ARG_ADDR]], align 4
7764 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
7765 // CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
7766 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7767 // CHECK13-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
7768 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7769 // CHECK13:       omp.inner.for.cond:
7770 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
7771 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
7772 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7773 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7774 // CHECK13:       omp.inner.for.body:
7775 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
7776 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7777 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7778 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]
7779 // CHECK13-NEXT:    call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP18]]
7780 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7781 // CHECK13:       omp.body.continue:
7782 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7783 // CHECK13:       omp.inner.for.inc:
7784 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
7785 // CHECK13-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7786 // CHECK13-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
7787 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
7788 // CHECK13:       omp.inner.for.end:
7789 // CHECK13-NEXT:    store i32 100, ptr [[I]], align 4
7790 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB3]], align 4
7791 // CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_UB4]], align 4
7792 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4
7793 // CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4
7794 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
7795 // CHECK13:       omp.inner.for.cond7:
7796 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]
7797 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP21]]
7798 // CHECK13-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7799 // CHECK13-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7800 // CHECK13:       omp.inner.for.body9:
7801 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
7802 // CHECK13-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7803 // CHECK13-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7804 // CHECK13-NEXT:    store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP21]]
7805 // CHECK13-NEXT:    call void @_Z3fn2v(), !llvm.access.group [[ACC_GRP21]]
7806 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE12:%.*]]
7807 // CHECK13:       omp.body.continue12:
7808 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC13:%.*]]
7809 // CHECK13:       omp.inner.for.inc13:
7810 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
7811 // CHECK13-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7812 // CHECK13-NEXT:    store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP21]]
7813 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP22:![0-9]+]]
7814 // CHECK13:       omp.inner.for.end15:
7815 // CHECK13-NEXT:    store i32 100, ptr [[I6]], align 4
7816 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB17]], align 4
7817 // CHECK13-NEXT:    store i32 99, ptr [[DOTOMP_UB18]], align 4
7818 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4
7819 // CHECK13-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV19]], align 4
7820 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND21:%.*]]
7821 // CHECK13:       omp.inner.for.cond21:
7822 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]
7823 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP24]]
7824 // CHECK13-NEXT:    [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
7825 // CHECK13-NEXT:    br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
7826 // CHECK13:       omp.inner.for.body23:
7827 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
7828 // CHECK13-NEXT:    [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1
7829 // CHECK13-NEXT:    [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
7830 // CHECK13-NEXT:    store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP24]]
7831 // CHECK13-NEXT:    call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP24]]
7832 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE26:%.*]]
7833 // CHECK13:       omp.body.continue26:
7834 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC27:%.*]]
7835 // CHECK13:       omp.inner.for.inc27:
7836 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
7837 // CHECK13-NEXT:    [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1
7838 // CHECK13-NEXT:    store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP24]]
7839 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP25:![0-9]+]]
7840 // CHECK13:       omp.inner.for.end29:
7841 // CHECK13-NEXT:    store i32 100, ptr [[I20]], align 4
7842 // CHECK13-NEXT:    ret i32 0
7843 //
7844 //
7845 // CHECK15-LABEL: define {{[^@]+}}@_Z9gtid_testv
7846 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] {
7847 // CHECK15-NEXT:  entry:
7848 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7849 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7850 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7851 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7852 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
7853 // CHECK15-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
7854 // CHECK15-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7855 // CHECK15-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7856 // CHECK15-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7857 // CHECK15-NEXT:    [[I6:%.*]] = alloca i32, align 4
7858 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
7859 // CHECK15-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
7860 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7861 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
7862 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7863 // CHECK15:       omp.inner.for.cond:
7864 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
7865 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]
7866 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7867 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7868 // CHECK15:       omp.inner.for.body:
7869 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
7870 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7871 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7872 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
7873 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7874 // CHECK15:       omp.body.continue:
7875 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7876 // CHECK15:       omp.inner.for.inc:
7877 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
7878 // CHECK15-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7879 // CHECK15-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
7880 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
7881 // CHECK15:       omp.inner.for.end:
7882 // CHECK15-NEXT:    store i32 100, ptr [[I]], align 4
7883 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB3]], align 4
7884 // CHECK15-NEXT:    store i32 99, ptr [[DOTOMP_UB4]], align 4
7885 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4
7886 // CHECK15-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4
7887 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
7888 // CHECK15:       omp.inner.for.cond7:
7889 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
7890 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP6]]
7891 // CHECK15-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7892 // CHECK15-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7893 // CHECK15:       omp.inner.for.body9:
7894 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
7895 // CHECK15-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7896 // CHECK15-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7897 // CHECK15-NEXT:    store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP6]]
7898 // CHECK15-NEXT:    call void @_Z9gtid_testv(), !llvm.access.group [[ACC_GRP6]]
7899 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE12:%.*]]
7900 // CHECK15:       omp.body.continue12:
7901 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC13:%.*]]
7902 // CHECK15:       omp.inner.for.inc13:
7903 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
7904 // CHECK15-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7905 // CHECK15-NEXT:    store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP6]]
7906 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP7:![0-9]+]]
7907 // CHECK15:       omp.inner.for.end15:
7908 // CHECK15-NEXT:    store i32 100, ptr [[I6]], align 4
7909 // CHECK15-NEXT:    ret void
7910 //
7911 //
7912 // CHECK15-LABEL: define {{[^@]+}}@main
7913 // CHECK15-SAME: () #[[ATTR1:[0-9]+]] {
7914 // CHECK15-NEXT:  entry:
7915 // CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
7916 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7917 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7918 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7919 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7920 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
7921 // CHECK15-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
7922 // CHECK15-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
7923 // CHECK15-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
7924 // CHECK15-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
7925 // CHECK15-NEXT:    [[I6:%.*]] = alloca i32, align 4
7926 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
7927 // CHECK15-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
7928 // CHECK15-NEXT:    [[DOTOMP_LB17:%.*]] = alloca i32, align 4
7929 // CHECK15-NEXT:    [[DOTOMP_UB18:%.*]] = alloca i32, align 4
7930 // CHECK15-NEXT:    [[DOTOMP_IV19:%.*]] = alloca i32, align 4
7931 // CHECK15-NEXT:    [[I20:%.*]] = alloca i32, align 4
7932 // CHECK15-NEXT:    store i32 0, ptr [[RETVAL]], align 4
7933 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
7934 // CHECK15-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
7935 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7936 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
7937 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7938 // CHECK15:       omp.inner.for.cond:
7939 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
7940 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
7941 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
7942 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7943 // CHECK15:       omp.inner.for.body:
7944 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
7945 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
7946 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7947 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
7948 // CHECK15-NEXT:    call void @_Z3fn4v(), !llvm.access.group [[ACC_GRP9]]
7949 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7950 // CHECK15:       omp.body.continue:
7951 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7952 // CHECK15:       omp.inner.for.inc:
7953 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
7954 // CHECK15-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
7955 // CHECK15-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
7956 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
7957 // CHECK15:       omp.inner.for.end:
7958 // CHECK15-NEXT:    store i32 100, ptr [[I]], align 4
7959 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB3]], align 4
7960 // CHECK15-NEXT:    store i32 99, ptr [[DOTOMP_UB4]], align 4
7961 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4
7962 // CHECK15-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4
7963 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
7964 // CHECK15:       omp.inner.for.cond7:
7965 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4
7966 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4
7967 // CHECK15-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
7968 // CHECK15-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
7969 // CHECK15:       omp.inner.for.body9:
7970 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4
7971 // CHECK15-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
7972 // CHECK15-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
7973 // CHECK15-NEXT:    store i32 [[ADD11]], ptr [[I6]], align 4
7974 // CHECK15-NEXT:    call void @_Z3fn5v()
7975 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE12:%.*]]
7976 // CHECK15:       omp.body.continue12:
7977 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC13:%.*]]
7978 // CHECK15:       omp.inner.for.inc13:
7979 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4
7980 // CHECK15-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
7981 // CHECK15-NEXT:    store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4
7982 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP12:![0-9]+]]
7983 // CHECK15:       omp.inner.for.end15:
7984 // CHECK15-NEXT:    store i32 100, ptr [[I6]], align 4
7985 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr @Arg, align 4
7986 // CHECK15-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP10]], 0
7987 // CHECK15-NEXT:    [[STOREDV:%.*]] = zext i1 [[TOBOOL]] to i8
7988 // CHECK15-NEXT:    store i8 [[STOREDV]], ptr [[DOTCAPTURE_EXPR_]], align 1
7989 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB17]], align 4
7990 // CHECK15-NEXT:    store i32 99, ptr [[DOTOMP_UB18]], align 4
7991 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4
7992 // CHECK15-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV19]], align 4
7993 // CHECK15-NEXT:    [[TMP12:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
7994 // CHECK15-NEXT:    [[LOADEDV:%.*]] = trunc i8 [[TMP12]] to i1
7995 // CHECK15-NEXT:    br i1 [[LOADEDV]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_ELSE:%.*]]
7996 // CHECK15:       omp_if.then:
7997 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND21:%.*]]
7998 // CHECK15:       omp.inner.for.cond21:
7999 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]
8000 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP14]]
8001 // CHECK15-NEXT:    [[CMP22:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
8002 // CHECK15-NEXT:    br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
8003 // CHECK15:       omp.inner.for.body23:
8004 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]
8005 // CHECK15-NEXT:    [[MUL24:%.*]] = mul nsw i32 [[TMP15]], 1
8006 // CHECK15-NEXT:    [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
8007 // CHECK15-NEXT:    store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP14]]
8008 // CHECK15-NEXT:    call void @_Z3fn6v(), !llvm.access.group [[ACC_GRP14]]
8009 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE26:%.*]]
8010 // CHECK15:       omp.body.continue26:
8011 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC27:%.*]]
8012 // CHECK15:       omp.inner.for.inc27:
8013 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]
8014 // CHECK15-NEXT:    [[ADD28:%.*]] = add nsw i32 [[TMP16]], 1
8015 // CHECK15-NEXT:    store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP14]]
8016 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP15:![0-9]+]]
8017 // CHECK15:       omp.inner.for.end29:
8018 // CHECK15-NEXT:    br label [[OMP_IF_END:%.*]]
8019 // CHECK15:       omp_if.else:
8020 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND30:%.*]]
8021 // CHECK15:       omp.inner.for.cond30:
8022 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4
8023 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4
8024 // CHECK15-NEXT:    [[CMP31:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
8025 // CHECK15-NEXT:    br i1 [[CMP31]], label [[OMP_INNER_FOR_BODY32:%.*]], label [[OMP_INNER_FOR_END38:%.*]]
8026 // CHECK15:       omp.inner.for.body32:
8027 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4
8028 // CHECK15-NEXT:    [[MUL33:%.*]] = mul nsw i32 [[TMP19]], 1
8029 // CHECK15-NEXT:    [[ADD34:%.*]] = add nsw i32 0, [[MUL33]]
8030 // CHECK15-NEXT:    store i32 [[ADD34]], ptr [[I20]], align 4
8031 // CHECK15-NEXT:    call void @_Z3fn6v()
8032 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE35:%.*]]
8033 // CHECK15:       omp.body.continue35:
8034 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC36:%.*]]
8035 // CHECK15:       omp.inner.for.inc36:
8036 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4
8037 // CHECK15-NEXT:    [[ADD37:%.*]] = add nsw i32 [[TMP20]], 1
8038 // CHECK15-NEXT:    store i32 [[ADD37]], ptr [[DOTOMP_IV19]], align 4
8039 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND30]], !llvm.loop [[LOOP17:![0-9]+]]
8040 // CHECK15:       omp.inner.for.end38:
8041 // CHECK15-NEXT:    br label [[OMP_IF_END]]
8042 // CHECK15:       omp_if.end:
8043 // CHECK15-NEXT:    store i32 100, ptr [[I20]], align 4
8044 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, ptr @Arg, align 4
8045 // CHECK15-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiEiT_(i32 noundef [[TMP21]])
8046 // CHECK15-NEXT:    ret i32 [[CALL]]
8047 //
8048 //
8049 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiEiT_
8050 // CHECK15-SAME: (i32 noundef [[ARG:%.*]]) #[[ATTR0]] comdat {
8051 // CHECK15-NEXT:  entry:
8052 // CHECK15-NEXT:    [[ARG_ADDR:%.*]] = alloca i32, align 4
8053 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8054 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8055 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8056 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8057 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
8058 // CHECK15-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
8059 // CHECK15-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
8060 // CHECK15-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
8061 // CHECK15-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
8062 // CHECK15-NEXT:    [[I6:%.*]] = alloca i32, align 4
8063 // CHECK15-NEXT:    [[_TMP16:%.*]] = alloca i32, align 4
8064 // CHECK15-NEXT:    [[DOTOMP_LB17:%.*]] = alloca i32, align 4
8065 // CHECK15-NEXT:    [[DOTOMP_UB18:%.*]] = alloca i32, align 4
8066 // CHECK15-NEXT:    [[DOTOMP_IV19:%.*]] = alloca i32, align 4
8067 // CHECK15-NEXT:    [[I20:%.*]] = alloca i32, align 4
8068 // CHECK15-NEXT:    store i32 [[ARG]], ptr [[ARG_ADDR]], align 4
8069 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
8070 // CHECK15-NEXT:    store i32 99, ptr [[DOTOMP_UB]], align 4
8071 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8072 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
8073 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8074 // CHECK15:       omp.inner.for.cond:
8075 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
8076 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
8077 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
8078 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8079 // CHECK15:       omp.inner.for.body:
8080 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
8081 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
8082 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8083 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]
8084 // CHECK15-NEXT:    call void @_Z3fn1v(), !llvm.access.group [[ACC_GRP18]]
8085 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8086 // CHECK15:       omp.body.continue:
8087 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8088 // CHECK15:       omp.inner.for.inc:
8089 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
8090 // CHECK15-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
8091 // CHECK15-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
8092 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
8093 // CHECK15:       omp.inner.for.end:
8094 // CHECK15-NEXT:    store i32 100, ptr [[I]], align 4
8095 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB3]], align 4
8096 // CHECK15-NEXT:    store i32 99, ptr [[DOTOMP_UB4]], align 4
8097 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4
8098 // CHECK15-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV5]], align 4
8099 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
8100 // CHECK15:       omp.inner.for.cond7:
8101 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4
8102 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4
8103 // CHECK15-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
8104 // CHECK15-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END15:%.*]]
8105 // CHECK15:       omp.inner.for.body9:
8106 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4
8107 // CHECK15-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP8]], 1
8108 // CHECK15-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
8109 // CHECK15-NEXT:    store i32 [[ADD11]], ptr [[I6]], align 4
8110 // CHECK15-NEXT:    call void @_Z3fn2v()
8111 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE12:%.*]]
8112 // CHECK15:       omp.body.continue12:
8113 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC13:%.*]]
8114 // CHECK15:       omp.inner.for.inc13:
8115 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4
8116 // CHECK15-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP9]], 1
8117 // CHECK15-NEXT:    store i32 [[ADD14]], ptr [[DOTOMP_IV5]], align 4
8118 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP21:![0-9]+]]
8119 // CHECK15:       omp.inner.for.end15:
8120 // CHECK15-NEXT:    store i32 100, ptr [[I6]], align 4
8121 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB17]], align 4
8122 // CHECK15-NEXT:    store i32 99, ptr [[DOTOMP_UB18]], align 4
8123 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB17]], align 4
8124 // CHECK15-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV19]], align 4
8125 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND21:%.*]]
8126 // CHECK15:       omp.inner.for.cond21:
8127 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]]
8128 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB18]], align 4, !llvm.access.group [[ACC_GRP22]]
8129 // CHECK15-NEXT:    [[CMP22:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
8130 // CHECK15-NEXT:    br i1 [[CMP22]], label [[OMP_INNER_FOR_BODY23:%.*]], label [[OMP_INNER_FOR_END29:%.*]]
8131 // CHECK15:       omp.inner.for.body23:
8132 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]
8133 // CHECK15-NEXT:    [[MUL24:%.*]] = mul nsw i32 [[TMP13]], 1
8134 // CHECK15-NEXT:    [[ADD25:%.*]] = add nsw i32 0, [[MUL24]]
8135 // CHECK15-NEXT:    store i32 [[ADD25]], ptr [[I20]], align 4, !llvm.access.group [[ACC_GRP22]]
8136 // CHECK15-NEXT:    call void @_Z3fn3v(), !llvm.access.group [[ACC_GRP22]]
8137 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE26:%.*]]
8138 // CHECK15:       omp.body.continue26:
8139 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC27:%.*]]
8140 // CHECK15:       omp.inner.for.inc27:
8141 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]
8142 // CHECK15-NEXT:    [[ADD28:%.*]] = add nsw i32 [[TMP14]], 1
8143 // CHECK15-NEXT:    store i32 [[ADD28]], ptr [[DOTOMP_IV19]], align 4, !llvm.access.group [[ACC_GRP22]]
8144 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND21]], !llvm.loop [[LOOP23:![0-9]+]]
8145 // CHECK15:       omp.inner.for.end29:
8146 // CHECK15-NEXT:    store i32 100, ptr [[I20]], align 4
8147 // CHECK15-NEXT:    ret i32 0
8148 //