clang/test/OpenMP/for_lastprivate_codegen.cpp

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
   2 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
   3 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s
   4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
   5 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
   6 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK4
   7 // RUN: %clang_cc1 -verify -fopenmp -DOMP5 -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
   8 // RUN: %clang_cc1 -fopenmp -DOMP5 -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s
   9 // RUN: %clang_cc1 -fopenmp -DOMP5 -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5
  10 // RUN: %clang_cc1 -verify -fopenmp -DOMP5 -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
  11 // RUN: %clang_cc1 -verify -fopenmp -DOMP5 -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK4
  12
  13 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  14 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s
  15 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  16 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  17 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  18 // RUN: %clang_cc1 -verify -fopenmp-simd -DOMP5 -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  19 // RUN: %clang_cc1 -fopenmp-simd -DOMP5 -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s
  20 // RUN: %clang_cc1 -fopenmp-simd -DOMP5 -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  21 // RUN: %clang_cc1 -verify -fopenmp-simd -DOMP5 -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  22 // RUN: %clang_cc1 -verify -fopenmp-simd -DOMP5 -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  23 // expected-no-diagnostics
  24 #ifndef HEADER
  25 #define HEADER
  26
  27 #ifdef OMP5
  28 #define CONDITIONAL conditional :
  29 #else
  30 #define CONDITIONAL
  31 #endif //OMP5
  32
  33 enum omp_allocator_handle_t {
  34   omp_null_allocator = 0,
  35   omp_default_mem_alloc = 1,
  36   omp_large_cap_mem_alloc = 2,
  37   omp_const_mem_alloc = 3,
  38   omp_high_bw_mem_alloc = 4,
  39   omp_low_lat_mem_alloc = 5,
  40   omp_cgroup_mem_alloc = 6,
  41   omp_pteam_mem_alloc = 7,
  42   omp_thread_mem_alloc = 8,
  43   KMP_ALLOCATOR_MAX_HANDLE = __UINTPTR_MAX__
  44 };
  45
  46 struct SS {
  47   int a;
  48   char e[4];
  49   int b : 4;
  50   int &c;
  51   SS(int &d) : a(0), b(0), c(d) {
  52 #pragma omp parallel
  53 #pragma omp for firstprivate(e) lastprivate(a, b, c, e)
  54     for (int i = 0; i < 2; ++i)
  55 #ifdef LAMBDA
  56       [&]() {
  57         ++this->a, --b, (this)->c /= 1;
  58 #pragma omp parallel
  59 #pragma omp for lastprivate(a, b, c)
  60         for (int i = 0; i < 2; ++i)
  61           ++(this)->a, --b, this->c /= 1;
  62       }();
  63 #elif defined(BLOCKS)
  64       ^{
  65         ++a;
  66         --this->b;
  67         (this)->c /= 1;
  68 #pragma omp parallel
  69 #pragma omp for lastprivate(a, b, c)
  70         for (int i = 0; i < 2; ++i)
  71           ++(this)->a, --b, this->c /= 1;
  72       }();
  73 #else
  74       ++this->a, --b, c /= 1;
  75 #endif
  76 #pragma omp for
  77     for (a = 0; a < 2; ++a)
  78 #ifdef LAMBDA
  79       [&]() {
  80         --this->a, ++b, (this)->c *= 2;
  81 #pragma omp parallel
  82 #pragma omp for lastprivate(b)
  83         for (b = 0; b < 2; ++b)
  84           ++(this)->a, --b, this->c /= 1;
  85       }();
  86 #elif defined(BLOCKS)
  87       ^{
  88         ++a;
  89         --this->b;
  90         (this)->c /= 1;
  91 #pragma omp parallel
  92 #pragma omp for
  93         for (c = 0; c < 2; ++c)
  94           ++(this)->a, --b, this->c /= 1;
  95       }();
  96 #else
  97       ++this->a, --b, c /= 1;
  98 #endif
  99   }
 100 };
 101
 102 template <typename T>
 103 struct SST {
 104   T a;
 105   SST() : a(T()) {
 106 #pragma omp parallel
 107 #pragma omp for lastprivate(a)
 108     for (int i = 0; i < 2; ++i)
 109 #ifdef LAMBDA
 110       [&]() {
 111         [&]() {
 112           ++this->a;
 113 #pragma omp parallel
 114 #pragma omp for lastprivate(a)
 115           for (int i = 0; i < 2; ++i)
 116             ++(this)->a;
 117         }();
 118       }();
 119 #elif defined(BLOCKS)
 120       ^{
 121         ^{
 122           ++a;
 123 #pragma omp parallel
 124 #pragma omp for lastprivate(a)
 125           for (int i = 0; i < 2; ++i)
 126             ++(this)->a;
 127         }();
 128       }();
 129 #else
 130       ++(this)->a;
 131 #endif
 132 #pragma omp for
 133     for (a = 0; a < 2; ++a)
 134 #ifdef LAMBDA
 135       [&]() {
 136         ++this->a;
 137 #pragma omp parallel
 138 #pragma omp for
 139         for (a = 0; a < 2; ++(this)->a)
 140           ++(this)->a;
 141       }();
 142 #elif defined(BLOCKS)
 143       ^{
 144         ++a;
 145 #pragma omp parallel
 146 #pragma omp for
 147         for (this->a = 0; a < 2; ++a)
 148           ++(this)->a;
 149       }();
 150 #else
 151       ++(this)->a;
 152 #endif
 153   }
 154 };
 155
 156 template <class T>
 157 struct S {
 158   T f;
 159   S(T a) : f(a) {}
 160   S() : f() {}
 161   S<T> &operator=(const S<T> &);
 162   operator T() { return T(); }
 163   ~S() {}
 164 };
 165
 166 volatile int g __attribute__((aligned(128)))= 1212;
 167 volatile int &g1 = g;
 168 float f;
 169 char cnt;
 170
 171
 172 template <typename T>
 173 T tmain() {
 174   S<T> test;
 175   SST<T> sst;
 176   T t_var __attribute__((aligned(128))) = T();
 177   T vec[] __attribute__((aligned(128))) = {1, 2};
 178   S<T> s_arr[] __attribute__((aligned(128))) = {1, 2};
 179   S<T> &var __attribute__((aligned(128))) = test;
 180 #pragma omp parallel
 181 #pragma omp for lastprivate(t_var, vec, s_arr, var)
 182   for (int i = 0; i < 2; ++i) {
 183     vec[i] = t_var;
 184     s_arr[i] = var;
 185   }
 186   return T();
 187 }
 188
 189 namespace A {
 190 double x;
 191 }
 192 namespace B {
 193 using A::x;
 194 }
 195
 196 int main() {
 197   static int sivar;
 198   SS ss(sivar);
 199 #ifdef LAMBDA
 200   // FIXME: The outer lambda should not capture 'sivar'; that capture is not
 201   // used for anything.
 202   [&]() {
 203 #pragma omp parallel
 204 #pragma omp for lastprivate(g, g1, sivar)
 205   for (int i = 0; i < 2; ++i) {
 206
 207
 208
 209
 210
 211
 212     g = 1;
 213     g1 = 1;
 214     sivar = 2;
 215     // Check for final copying of private values back to original vars.
 216     // Actual copying.
 217
 218     // original g=private_g;
 219
 220     // original sivar=private_sivar;
 221     [&]() {
 222       g = 2;
 223       g1 = 2;
 224       sivar = 4;
 225     }();
 226   }
 227   }();
 228   return 0;
 229 #elif defined(BLOCKS)
 230   ^{
 231 #pragma omp parallel
 232 #pragma omp for lastprivate(g, g1, sivar)
 233   for (int i = 0; i < 2; ++i) {
 234     g = 1;
 235     g1 = 1;
 236     sivar = 2;
 237     // Check for final copying of private values back to original vars.
 238     // Actual copying.
 239
 240     // original g=private_g;
 241     g = 1;
 242     g1 = 1;
 243     ^{
 244       g = 2;
 245       g1 = 1;
 246       sivar = 4;
 247     }();
 248   }
 249   }();
 250   return 0;
 251
 252
 253 #else
 254   S<float> test;
 255   int t_var = 0;
 256   int vec[] = {1, 2};
 257   S<float> s_arr[] = {1, 2};
 258   S<float> var(3);
 259 #pragma omp parallel
 260 #pragma omp for lastprivate(t_var, vec, s_arr, var, sivar)
 261   for (int i = 0; i < 2; ++i) {
 262     vec[i] = t_var;
 263     s_arr[i] = var;
 264     sivar += i;
 265   }
 266 #pragma omp parallel
 267 #pragma omp for lastprivate(A::x, B::x) firstprivate(f) lastprivate(f)
 268   for (int i = 0; i < 2; ++i) {
 269     A::x++;
 270   }
 271 #pragma omp parallel
 272 #pragma omp for allocate(omp_const_mem_alloc: f) firstprivate(f) lastprivate(f)
 273   for (int i = 0; i < 2; ++i) {
 274     A::x++;
 275   }
 276 #pragma omp parallel
 277 #pragma omp for allocate(omp_const_mem_alloc :cnt) lastprivate(cnt) lastprivate(CONDITIONAL f)
 278   for (cnt = 0; cnt < 2; ++cnt) {
 279     A::x++;
 280     f = 0;
 281   }
 282   return tmain<int>();
 283 #endif
 284 }
 285
 286
 287
 288
 289 // Check for default initialization.
 290 // <Skip loop body>
 291
 292 // Check for final copying of private values back to original vars.
 293 // Actual copying.
 294
 295 // original t_var=private_t_var;
 296
 297 // original vec[]=private_vec[];
 298
 299 // original s_arr[]=private_s_arr[];
 300
 301 // original var=private_var;
 302
 303
 304 // Check for default initialization.
 305
 306 // <Skip loop body>
 307
 308 // Check for final copying of private values back to original vars.
 309 // Actual copying.
 310
 311 // original x=private_x;
 312
 313 // original f=private_f;
 314
 315
 316
 317
 318 // Check for default initialization.
 319
 320 // <Skip loop body>
 321
 322 // Check for final copying of private values back to original vars.
 323 // Actual copying.
 324
 325 // original f=private_f;
 326
 327
 328
 329
 330 // UB = min(UB, GlobalUB)
 331 // <Skip loop body>
 332
 333
 334
 335 // Check for final copying of private values back to original vars.
 336
 337 // Calculate private cnt value.
 338 // original cnt=private_cnt;
 339
 340
 341
 342
 343
 344
 345
 346
 347 // Check for default initialization.
 348 // <Skip loop body>
 349
 350 // Check for final copying of private values back to original vars.
 351 // Actual copying.
 352
 353 // original t_var=private_t_var;
 354
 355 // original vec[]=private_vec[];
 356
 357 // original s_arr[]=private_s_arr[];
 358
 359 // original var=private_var;
 360 #endif
 361
 362 // CHECK1-LABEL: define {{[^@]+}}@main
 363 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
 364 // CHECK1-NEXT:  entry:
 365 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 366 // CHECK1-NEXT:    [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
 367 // CHECK1-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
 368 // CHECK1-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
 369 // CHECK1-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
 370 // CHECK1-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
 371 // CHECK1-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S]], align 4
 372 // CHECK1-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 373 // CHECK1-NEXT:    call void @_ZN2SSC1ERi(ptr noundef nonnull align 8 dereferenceable(24) [[SS]], ptr noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar)
 374 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
 375 // CHECK1-NEXT:    store i32 0, ptr [[T_VAR]], align 4
 376 // CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)
 377 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)
 378 // CHECK1-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 1
 379 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
 380 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]], float noundef 3.000000e+00)
 381 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3:[0-9]+]], i32 5, ptr @main.omp_outlined, ptr [[T_VAR]], ptr [[VEC]], ptr [[S_ARR]], ptr [[VAR]], ptr @_ZZ4mainE5sivar)
 382 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 0, ptr @main.omp_outlined.1)
 383 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 0, ptr @main.omp_outlined.2)
 384 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 0, ptr @main.omp_outlined.3)
 385 // CHECK1-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
 386 // CHECK1-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
 387 // CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4:[0-9]+]]
 388 // CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
 389 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
 390 // CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
 391 // CHECK1:       arraydestroy.body:
 392 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP0]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
 393 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
 394 // CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
 395 // CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
 396 // CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
 397 // CHECK1:       arraydestroy.done1:
 398 // CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
 399 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[RETVAL]], align 4
 400 // CHECK1-NEXT:    ret i32 [[TMP1]]
 401 //
 402 //
 403 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC1ERi
 404 // CHECK1-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {
 405 // CHECK1-NEXT:  entry:
 406 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 407 // CHECK1-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 8
 408 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 409 // CHECK1-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 8
 410 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 411 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8
 412 // CHECK1-NEXT:    call void @_ZN2SSC2ERi(ptr noundef nonnull align 8 dereferenceable(24) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]])
 413 // CHECK1-NEXT:    ret void
 414 //
 415 //
 416 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
 417 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
 418 // CHECK1-NEXT:  entry:
 419 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 420 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 421 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 422 // CHECK1-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
 423 // CHECK1-NEXT:    ret void
 424 //
 425 //
 426 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
 427 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
 428 // CHECK1-NEXT:  entry:
 429 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 430 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
 431 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 432 // CHECK1-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
 433 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 434 // CHECK1-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
 435 // CHECK1-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
 436 // CHECK1-NEXT:    ret void
 437 //
 438 //
 439 // CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
 440 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
 441 // CHECK1-NEXT:  entry:
 442 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 443 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 444 // CHECK1-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 8
 445 // CHECK1-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8
 446 // CHECK1-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
 447 // CHECK1-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8
 448 // CHECK1-NEXT:    [[SIVAR_ADDR:%.*]] = alloca ptr, align 8
 449 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 450 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 451 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 452 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 453 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 454 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 455 // CHECK1-NEXT:    [[T_VAR1:%.*]] = alloca i32, align 4
 456 // CHECK1-NEXT:    [[VEC2:%.*]] = alloca [2 x i32], align 4
 457 // CHECK1-NEXT:    [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4
 458 // CHECK1-NEXT:    [[VAR4:%.*]] = alloca [[STRUCT_S:%.*]], align 4
 459 // CHECK1-NEXT:    [[SIVAR5:%.*]] = alloca i32, align 4
 460 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 461 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 462 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 463 // CHECK1-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
 464 // CHECK1-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
 465 // CHECK1-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
 466 // CHECK1-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
 467 // CHECK1-NEXT:    store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8
 468 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8
 469 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
 470 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
 471 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
 472 // CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8
 473 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 474 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
 475 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 476 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 477 // CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR3]], i32 0, i32 0
 478 // CHECK1-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
 479 // CHECK1-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
 480 // CHECK1:       arrayctor.loop:
 481 // CHECK1-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
 482 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
 483 // CHECK1-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1
 484 // CHECK1-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
 485 // CHECK1-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
 486 // CHECK1:       arrayctor.cont:
 487 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR4]])
 488 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 489 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
 490 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 491 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 492 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1
 493 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 494 // CHECK1:       cond.true:
 495 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 496 // CHECK1:       cond.false:
 497 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 498 // CHECK1-NEXT:    br label [[COND_END]]
 499 // CHECK1:       cond.end:
 500 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
 501 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 502 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 503 // CHECK1-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
 504 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 505 // CHECK1:       omp.inner.for.cond:
 506 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 507 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 508 // CHECK1-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
 509 // CHECK1-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
 510 // CHECK1:       omp.inner.for.cond.cleanup:
 511 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
 512 // CHECK1:       omp.inner.for.body:
 513 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 514 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
 515 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 516 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
 517 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[T_VAR1]], align 4
 518 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[I]], align 4
 519 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64
 520 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC2]], i64 0, i64 [[IDXPROM]]
 521 // CHECK1-NEXT:    store i32 [[TMP13]], ptr [[ARRAYIDX]], align 4
 522 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4
 523 // CHECK1-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP15]] to i64
 524 // CHECK1-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR3]], i64 0, i64 [[IDXPROM7]]
 525 // CHECK1-NEXT:    [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIfEaSERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYIDX8]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR4]])
 526 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 4
 527 // CHECK1-NEXT:    [[TMP17:%.*]] = load i32, ptr [[SIVAR5]], align 4
 528 // CHECK1-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP17]], [[TMP16]]
 529 // CHECK1-NEXT:    store i32 [[ADD9]], ptr [[SIVAR5]], align 4
 530 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 531 // CHECK1:       omp.body.continue:
 532 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 533 // CHECK1:       omp.inner.for.inc:
 534 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 535 // CHECK1-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP18]], 1
 536 // CHECK1-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4
 537 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 538 // CHECK1:       omp.inner.for.end:
 539 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 540 // CHECK1:       omp.loop.exit:
 541 // CHECK1-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 542 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
 543 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])
 544 // CHECK1-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 545 // CHECK1-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
 546 // CHECK1-NEXT:    br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
 547 // CHECK1:       .omp.lastprivate.then:
 548 // CHECK1-NEXT:    [[TMP23:%.*]] = load i32, ptr [[T_VAR1]], align 4
 549 // CHECK1-NEXT:    store i32 [[TMP23]], ptr [[TMP0]], align 4
 550 // CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP1]], ptr align 4 [[VEC2]], i64 8, i1 false)
 551 // CHECK1-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i32 0, i32 0
 552 // CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i64 2
 553 // CHECK1-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP24]]
 554 // CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
 555 // CHECK1:       omp.arraycpy.body:
 556 // CHECK1-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR3]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
 557 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
 558 // CHECK1-NEXT:    [[CALL12:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIfEaSERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]])
 559 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
 560 // CHECK1-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
 561 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP24]]
 562 // CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
 563 // CHECK1:       omp.arraycpy.done13:
 564 // CHECK1-NEXT:    [[CALL14:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIfEaSERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[TMP3]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR4]])
 565 // CHECK1-NEXT:    [[TMP25:%.*]] = load i32, ptr [[SIVAR5]], align 4
 566 // CHECK1-NEXT:    store i32 [[TMP25]], ptr [[TMP4]], align 4
 567 // CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
 568 // CHECK1:       .omp.lastprivate.done:
 569 // CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4]]
 570 // CHECK1-NEXT:    [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR3]], i32 0, i32 0
 571 // CHECK1-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN15]], i64 2
 572 // CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
 573 // CHECK1:       arraydestroy.body:
 574 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP26]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
 575 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
 576 // CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
 577 // CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]]
 578 // CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]]
 579 // CHECK1:       arraydestroy.done16:
 580 // CHECK1-NEXT:    [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 581 // CHECK1-NEXT:    [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 4
 582 // CHECK1-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP28]])
 583 // CHECK1-NEXT:    ret void
 584 //
 585 //
 586 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
 587 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
 588 // CHECK1-NEXT:  entry:
 589 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 590 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 591 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 592 // CHECK1-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
 593 // CHECK1-NEXT:    ret void
 594 //
 595 //
 596 // CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.1
 597 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
 598 // CHECK1-NEXT:  entry:
 599 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 600 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 601 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 602 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 603 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 604 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 605 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 606 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 607 // CHECK1-NEXT:    [[F:%.*]] = alloca float, align 4
 608 // CHECK1-NEXT:    [[X:%.*]] = alloca double, align 8
 609 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 610 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 611 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 612 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 613 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
 614 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 615 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 616 // CHECK1-NEXT:    [[TMP0:%.*]] = load float, ptr @f, align 4
 617 // CHECK1-NEXT:    store float [[TMP0]], ptr [[F]], align 4
 618 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 619 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
 620 // CHECK1-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
 621 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 622 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 623 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
 624 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 625 // CHECK1:       cond.true:
 626 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 627 // CHECK1:       cond.false:
 628 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 629 // CHECK1-NEXT:    br label [[COND_END]]
 630 // CHECK1:       cond.end:
 631 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
 632 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 633 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 634 // CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
 635 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 636 // CHECK1:       omp.inner.for.cond:
 637 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 638 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 639 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
 640 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 641 // CHECK1:       omp.inner.for.body:
 642 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 643 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
 644 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 645 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
 646 // CHECK1-NEXT:    [[TMP9:%.*]] = load double, ptr [[X]], align 8
 647 // CHECK1-NEXT:    [[INC:%.*]] = fadd double [[TMP9]], 1.000000e+00
 648 // CHECK1-NEXT:    store double [[INC]], ptr [[X]], align 8
 649 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 650 // CHECK1:       omp.body.continue:
 651 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 652 // CHECK1:       omp.inner.for.inc:
 653 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 654 // CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
 655 // CHECK1-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
 656 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 657 // CHECK1:       omp.inner.for.end:
 658 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 659 // CHECK1:       omp.loop.exit:
 660 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
 661 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 662 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
 663 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
 664 // CHECK1:       .omp.lastprivate.then:
 665 // CHECK1-NEXT:    [[TMP13:%.*]] = load double, ptr [[X]], align 8
 666 // CHECK1-NEXT:    store double [[TMP13]], ptr @_ZN1A1xE, align 8
 667 // CHECK1-NEXT:    [[TMP14:%.*]] = load float, ptr [[F]], align 4
 668 // CHECK1-NEXT:    store float [[TMP14]], ptr @f, align 4
 669 // CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
 670 // CHECK1:       .omp.lastprivate.done:
 671 // CHECK1-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
 672 // CHECK1-NEXT:    ret void
 673 //
 674 //
 675 // CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.2
 676 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
 677 // CHECK1-NEXT:  entry:
 678 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 679 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 680 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 681 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 682 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 683 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 684 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 685 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 686 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 687 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 688 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 689 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 690 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
 691 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 692 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 693 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 694 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 695 // CHECK1-NEXT:    [[DOTF__VOID_ADDR:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP1]], i64 4, ptr inttoptr (i64 3 to ptr))
 696 // CHECK1-NEXT:    [[TMP2:%.*]] = load float, ptr @f, align 4
 697 // CHECK1-NEXT:    store float [[TMP2]], ptr [[DOTF__VOID_ADDR]], align 4
 698 // CHECK1-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP1]])
 699 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 700 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 701 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
 702 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 703 // CHECK1:       cond.true:
 704 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 705 // CHECK1:       cond.false:
 706 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 707 // CHECK1-NEXT:    br label [[COND_END]]
 708 // CHECK1:       cond.end:
 709 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
 710 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 711 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 712 // CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
 713 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 714 // CHECK1:       omp.inner.for.cond:
 715 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 716 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 717 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
 718 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
 719 // CHECK1:       omp.inner.for.cond.cleanup:
 720 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
 721 // CHECK1:       omp.inner.for.body:
 722 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 723 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
 724 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 725 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
 726 // CHECK1-NEXT:    [[TMP9:%.*]] = load double, ptr @_ZN1A1xE, align 8
 727 // CHECK1-NEXT:    [[INC:%.*]] = fadd double [[TMP9]], 1.000000e+00
 728 // CHECK1-NEXT:    store double [[INC]], ptr @_ZN1A1xE, align 8
 729 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 730 // CHECK1:       omp.body.continue:
 731 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 732 // CHECK1:       omp.inner.for.inc:
 733 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 734 // CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
 735 // CHECK1-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
 736 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 737 // CHECK1:       omp.inner.for.end:
 738 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 739 // CHECK1:       omp.loop.exit:
 740 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
 741 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 742 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
 743 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
 744 // CHECK1:       .omp.lastprivate.then:
 745 // CHECK1-NEXT:    [[TMP13:%.*]] = load float, ptr [[DOTF__VOID_ADDR]], align 4
 746 // CHECK1-NEXT:    store float [[TMP13]], ptr @f, align 4
 747 // CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
 748 // CHECK1:       .omp.lastprivate.done:
 749 // CHECK1-NEXT:    call void @__kmpc_free(i32 [[TMP1]], ptr [[DOTF__VOID_ADDR]], ptr inttoptr (i64 3 to ptr))
 750 // CHECK1-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP1]])
 751 // CHECK1-NEXT:    ret void
 752 //
 753 //
 754 // CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.3
 755 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
 756 // CHECK1-NEXT:  entry:
 757 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 758 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 759 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 760 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i8, align 1
 761 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 762 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 763 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 764 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 765 // CHECK1-NEXT:    [[F:%.*]] = alloca float, align 4
 766 // CHECK1-NEXT:    [[CNT:%.*]] = alloca i8, align 1
 767 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 768 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 769 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 770 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
 771 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 772 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 773 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 774 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 775 // CHECK1-NEXT:    [[DOTCNT__VOID_ADDR:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP1]], i64 1, ptr inttoptr (i64 3 to ptr))
 776 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 777 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 778 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
 779 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 780 // CHECK1:       cond.true:
 781 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 782 // CHECK1:       cond.false:
 783 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 784 // CHECK1-NEXT:    br label [[COND_END]]
 785 // CHECK1:       cond.end:
 786 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
 787 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 788 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 789 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
 790 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 791 // CHECK1:       omp.inner.for.cond:
 792 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 793 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 794 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
 795 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
 796 // CHECK1:       omp.inner.for.cond.cleanup:
 797 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
 798 // CHECK1:       omp.inner.for.body:
 799 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 800 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
 801 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 802 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i32 [[ADD]] to i8
 803 // CHECK1-NEXT:    store i8 [[CONV]], ptr [[DOTCNT__VOID_ADDR]], align 1
 804 // CHECK1-NEXT:    [[TMP8:%.*]] = load double, ptr @_ZN1A1xE, align 8
 805 // CHECK1-NEXT:    [[INC:%.*]] = fadd double [[TMP8]], 1.000000e+00
 806 // CHECK1-NEXT:    store double [[INC]], ptr @_ZN1A1xE, align 8
 807 // CHECK1-NEXT:    store float 0.000000e+00, ptr [[F]], align 4
 808 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 809 // CHECK1:       omp.body.continue:
 810 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 811 // CHECK1:       omp.inner.for.inc:
 812 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 813 // CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1
 814 // CHECK1-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
 815 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 816 // CHECK1:       omp.inner.for.end:
 817 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 818 // CHECK1:       omp.loop.exit:
 819 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
 820 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 821 // CHECK1-NEXT:    [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
 822 // CHECK1-NEXT:    br i1 [[TMP11]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
 823 // CHECK1:       .omp.lastprivate.then:
 824 // CHECK1-NEXT:    store i8 2, ptr [[DOTCNT__VOID_ADDR]], align 1
 825 // CHECK1-NEXT:    [[TMP12:%.*]] = load i8, ptr [[DOTCNT__VOID_ADDR]], align 1
 826 // CHECK1-NEXT:    store i8 [[TMP12]], ptr @cnt, align 1
 827 // CHECK1-NEXT:    [[TMP13:%.*]] = load float, ptr [[F]], align 4
 828 // CHECK1-NEXT:    store float [[TMP13]], ptr @f, align 4
 829 // CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
 830 // CHECK1:       .omp.lastprivate.done:
 831 // CHECK1-NEXT:    call void @__kmpc_free(i32 [[TMP1]], ptr [[DOTCNT__VOID_ADDR]], ptr inttoptr (i64 3 to ptr))
 832 // CHECK1-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP1]])
 833 // CHECK1-NEXT:    ret void
 834 //
 835 //
 836 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
 837 // CHECK1-SAME: () #[[ATTR1]] {
 838 // CHECK1-NEXT:  entry:
 839 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 840 // CHECK1-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
 841 // CHECK1-NEXT:    [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4
 842 // CHECK1-NEXT:    [[T_VAR:%.*]] = alloca i32, align 128
 843 // CHECK1-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 128
 844 // CHECK1-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128
 845 // CHECK1-NEXT:    [[VAR:%.*]] = alloca ptr, align 128
 846 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
 847 // CHECK1-NEXT:    call void @_ZN3SSTIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[SST]])
 848 // CHECK1-NEXT:    store i32 0, ptr [[T_VAR]], align 128
 849 // CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 128 [[VEC]], ptr align 128 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)
 850 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1)
 851 // CHECK1-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1
 852 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)
 853 // CHECK1-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 128
 854 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 128
 855 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @_Z5tmainIiET_v.omp_outlined, ptr [[T_VAR]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP0]])
 856 // CHECK1-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 857 // CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
 858 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
 859 // CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
 860 // CHECK1:       arraydestroy.body:
 861 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
 862 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
 863 // CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
 864 // CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
 865 // CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
 866 // CHECK1:       arraydestroy.done1:
 867 // CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
 868 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[RETVAL]], align 4
 869 // CHECK1-NEXT:    ret i32 [[TMP2]]
 870 //
 871 //
 872 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC2ERi
 873 // CHECK1-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
 874 // CHECK1-NEXT:  entry:
 875 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 876 // CHECK1-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 8
 877 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 878 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 879 // CHECK1-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 8
 880 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 881 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 882 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 883 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 884 // CHECK1-NEXT:    [[A3:%.*]] = alloca i32, align 4
 885 // CHECK1-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 8
 886 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB3]])
 887 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 888 // CHECK1-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 8
 889 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 890 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0
 891 // CHECK1-NEXT:    store i32 0, ptr [[A]], align 8
 892 // CHECK1-NEXT:    [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 2
 893 // CHECK1-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 8
 894 // CHECK1-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
 895 // CHECK1-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
 896 // CHECK1-NEXT:    store i8 [[BF_SET]], ptr [[B]], align 8
 897 // CHECK1-NEXT:    [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 3
 898 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[D_ADDR]], align 8
 899 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[C]], align 8
 900 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 1, ptr @_ZN2SSC2ERi.omp_outlined, ptr [[THIS1]])
 901 // CHECK1-NEXT:    store ptr [[TMP]], ptr [[_TMP2]], align 8
 902 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 903 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
 904 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 905 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 906 // CHECK1-NEXT:    store ptr [[A3]], ptr [[_TMP4]], align 8
 907 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 908 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 909 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
 910 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 911 // CHECK1:       cond.true:
 912 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 913 // CHECK1:       cond.false:
 914 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 915 // CHECK1-NEXT:    br label [[COND_END]]
 916 // CHECK1:       cond.end:
 917 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
 918 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 919 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 920 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
 921 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 922 // CHECK1:       omp.inner.for.cond:
 923 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 924 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 925 // CHECK1-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
 926 // CHECK1-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 927 // CHECK1:       omp.inner.for.body:
 928 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 929 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
 930 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 931 // CHECK1-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[_TMP4]], align 8
 932 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[TMP8]], align 4
 933 // CHECK1-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[_TMP4]], align 8
 934 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
 935 // CHECK1-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP10]], 1
 936 // CHECK1-NEXT:    store i32 [[INC]], ptr [[TMP9]], align 4
 937 // CHECK1-NEXT:    [[B6:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 2
 938 // CHECK1-NEXT:    [[BF_LOAD7:%.*]] = load i8, ptr [[B6]], align 8
 939 // CHECK1-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD7]], 4
 940 // CHECK1-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4
 941 // CHECK1-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32
 942 // CHECK1-NEXT:    [[DEC:%.*]] = add nsw i32 [[BF_CAST]], -1
 943 // CHECK1-NEXT:    [[TMP11:%.*]] = trunc i32 [[DEC]] to i8
 944 // CHECK1-NEXT:    [[BF_LOAD8:%.*]] = load i8, ptr [[B6]], align 8
 945 // CHECK1-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP11]], 15
 946 // CHECK1-NEXT:    [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16
 947 // CHECK1-NEXT:    [[BF_SET10:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]]
 948 // CHECK1-NEXT:    store i8 [[BF_SET10]], ptr [[B6]], align 8
 949 // CHECK1-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4
 950 // CHECK1-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4
 951 // CHECK1-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32
 952 // CHECK1-NEXT:    [[C11:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 3
 953 // CHECK1-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[C11]], align 8
 954 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
 955 // CHECK1-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP13]], 1
 956 // CHECK1-NEXT:    store i32 [[DIV]], ptr [[TMP12]], align 4
 957 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 958 // CHECK1:       omp.body.continue:
 959 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 960 // CHECK1:       omp.inner.for.inc:
 961 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 962 // CHECK1-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP14]], 1
 963 // CHECK1-NEXT:    store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4
 964 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 965 // CHECK1:       omp.inner.for.end:
 966 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 967 // CHECK1:       omp.loop.exit:
 968 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP0]])
 969 // CHECK1-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP0]])
 970 // CHECK1-NEXT:    ret void
 971 //
 972 //
 973 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined
 974 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR3]] {
 975 // CHECK1-NEXT:  entry:
 976 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 977 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 978 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 979 // CHECK1-NEXT:    [[E:%.*]] = alloca ptr, align 8
 980 // CHECK1-NEXT:    [[A:%.*]] = alloca ptr, align 8
 981 // CHECK1-NEXT:    [[B:%.*]] = alloca i32, align 4
 982 // CHECK1-NEXT:    [[C:%.*]] = alloca ptr, align 8
 983 // CHECK1-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
 984 // CHECK1-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 8
 985 // CHECK1-NEXT:    [[_TMP5:%.*]] = alloca ptr, align 8
 986 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 987 // CHECK1-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
 988 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 989 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 990 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 991 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 992 // CHECK1-NEXT:    [[E7:%.*]] = alloca [4 x i8], align 1
 993 // CHECK1-NEXT:    [[_TMP8:%.*]] = alloca ptr, align 8
 994 // CHECK1-NEXT:    [[A9:%.*]] = alloca i32, align 4
 995 // CHECK1-NEXT:    [[_TMP10:%.*]] = alloca ptr, align 8
 996 // CHECK1-NEXT:    [[B11:%.*]] = alloca i32, align 4
 997 // CHECK1-NEXT:    [[C12:%.*]] = alloca i32, align 4
 998 // CHECK1-NEXT:    [[_TMP13:%.*]] = alloca ptr, align 8
 999 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1000 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1001 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1002 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1003 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1004 // CHECK1-NEXT:    [[E1:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 1
1005 // CHECK1-NEXT:    store ptr [[E1]], ptr [[E]], align 8
1006 // CHECK1-NEXT:    [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 0
1007 // CHECK1-NEXT:    store ptr [[A2]], ptr [[A]], align 8
1008 // CHECK1-NEXT:    [[C3:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 3
1009 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[C3]], align 8
1010 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[C]], align 8
1011 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A]], align 8
1012 // CHECK1-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 8
1013 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C]], align 8
1014 // CHECK1-NEXT:    store ptr [[TMP3]], ptr [[_TMP4]], align 8
1015 // CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[E]], align 8
1016 // CHECK1-NEXT:    store ptr [[TMP4]], ptr [[_TMP5]], align 8
1017 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1018 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
1019 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1020 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1021 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP5]], align 8
1022 // CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[E7]], ptr align 1 [[TMP5]], i64 4, i1 false)
1023 // CHECK1-NEXT:    store ptr [[E7]], ptr [[_TMP8]], align 8
1024 // CHECK1-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1025 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
1026 // CHECK1-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP7]])
1027 // CHECK1-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[TMP]], align 8
1028 // CHECK1-NEXT:    store ptr [[A9]], ptr [[_TMP10]], align 8
1029 // CHECK1-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[_TMP4]], align 8
1030 // CHECK1-NEXT:    store ptr [[C12]], ptr [[_TMP13]], align 8
1031 // CHECK1-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[_TMP5]], align 8
1032 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1033 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1034 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 1
1035 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1036 // CHECK1:       cond.true:
1037 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1038 // CHECK1:       cond.false:
1039 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1040 // CHECK1-NEXT:    br label [[COND_END]]
1041 // CHECK1:       cond.end:
1042 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
1043 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1044 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1045 // CHECK1-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
1046 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1047 // CHECK1:       omp.inner.for.cond:
1048 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1049 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1050 // CHECK1-NEXT:    [[CMP14:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
1051 // CHECK1-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1052 // CHECK1:       omp.inner.for.body:
1053 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1054 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
1055 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1056 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
1057 // CHECK1-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[_TMP10]], align 8
1058 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 4
1059 // CHECK1-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP18]], 1
1060 // CHECK1-NEXT:    store i32 [[INC]], ptr [[TMP17]], align 4
1061 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32, ptr [[B11]], align 4
1062 // CHECK1-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP19]], -1
1063 // CHECK1-NEXT:    store i32 [[DEC]], ptr [[B11]], align 4
1064 // CHECK1-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[_TMP13]], align 8
1065 // CHECK1-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
1066 // CHECK1-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP21]], 1
1067 // CHECK1-NEXT:    store i32 [[DIV]], ptr [[TMP20]], align 4
1068 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1069 // CHECK1:       omp.body.continue:
1070 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1071 // CHECK1:       omp.inner.for.inc:
1072 // CHECK1-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1073 // CHECK1-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP22]], 1
1074 // CHECK1-NEXT:    store i32 [[ADD15]], ptr [[DOTOMP_IV]], align 4
1075 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
1076 // CHECK1:       omp.inner.for.end:
1077 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1078 // CHECK1:       omp.loop.exit:
1079 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP7]])
1080 // CHECK1-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1081 // CHECK1-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
1082 // CHECK1-NEXT:    br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1083 // CHECK1:       .omp.lastprivate.then:
1084 // CHECK1-NEXT:    [[TMP25:%.*]] = load ptr, ptr [[_TMP10]], align 8
1085 // CHECK1-NEXT:    [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4
1086 // CHECK1-NEXT:    store i32 [[TMP26]], ptr [[TMP8]], align 4
1087 // CHECK1-NEXT:    [[TMP27:%.*]] = load i32, ptr [[B11]], align 4
1088 // CHECK1-NEXT:    store i32 [[TMP27]], ptr [[B]], align 4
1089 // CHECK1-NEXT:    [[TMP28:%.*]] = load ptr, ptr [[_TMP13]], align 8
1090 // CHECK1-NEXT:    [[TMP29:%.*]] = load i32, ptr [[TMP28]], align 4
1091 // CHECK1-NEXT:    store i32 [[TMP29]], ptr [[TMP9]], align 4
1092 // CHECK1-NEXT:    [[TMP30:%.*]] = load ptr, ptr [[_TMP8]], align 8
1093 // CHECK1-NEXT:    [[TMP31:%.*]] = load [4 x i8], ptr [[TMP30]], align 1
1094 // CHECK1-NEXT:    store [4 x i8] [[TMP31]], ptr [[TMP10]], align 1
1095 // CHECK1-NEXT:    [[TMP32:%.*]] = load i32, ptr [[B11]], align 4
1096 // CHECK1-NEXT:    [[B16:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 2
1097 // CHECK1-NEXT:    [[TMP33:%.*]] = trunc i32 [[TMP32]] to i8
1098 // CHECK1-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B16]], align 8
1099 // CHECK1-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP33]], 15
1100 // CHECK1-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
1101 // CHECK1-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
1102 // CHECK1-NEXT:    store i8 [[BF_SET]], ptr [[B16]], align 8
1103 // CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
1104 // CHECK1:       .omp.lastprivate.done:
1105 // CHECK1-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP7]])
1106 // CHECK1-NEXT:    ret void
1107 //
1108 //
1109 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
1110 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1111 // CHECK1-NEXT:  entry:
1112 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1113 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1114 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1115 // CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
1116 // CHECK1-NEXT:    store float 0.000000e+00, ptr [[F]], align 4
1117 // CHECK1-NEXT:    ret void
1118 //
1119 //
1120 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1121 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1122 // CHECK1-NEXT:  entry:
1123 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1124 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1125 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1126 // CHECK1-NEXT:    ret void
1127 //
1128 //
1129 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
1130 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1131 // CHECK1-NEXT:  entry:
1132 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1133 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
1134 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1135 // CHECK1-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
1136 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1137 // CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
1138 // CHECK1-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
1139 // CHECK1-NEXT:    store float [[TMP0]], ptr [[F]], align 4
1140 // CHECK1-NEXT:    ret void
1141 //
1142 //
1143 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1144 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1145 // CHECK1-NEXT:  entry:
1146 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1147 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1148 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1149 // CHECK1-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1150 // CHECK1-NEXT:    ret void
1151 //
1152 //
1153 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev
1154 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1155 // CHECK1-NEXT:  entry:
1156 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1157 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1158 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1159 // CHECK1-NEXT:    call void @_ZN3SSTIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1160 // CHECK1-NEXT:    ret void
1161 //
1162 //
1163 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1164 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1165 // CHECK1-NEXT:  entry:
1166 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1167 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1168 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1169 // CHECK1-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
1170 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1171 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
1172 // CHECK1-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
1173 // CHECK1-NEXT:    ret void
1174 //
1175 //
1176 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined
1177 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1178 // CHECK1-NEXT:  entry:
1179 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1180 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1181 // CHECK1-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 8
1182 // CHECK1-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8
1183 // CHECK1-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
1184 // CHECK1-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8
1185 // CHECK1-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
1186 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
1187 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1188 // CHECK1-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
1189 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1190 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1191 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1192 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1193 // CHECK1-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 128
1194 // CHECK1-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 128
1195 // CHECK1-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 128
1196 // CHECK1-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 128
1197 // CHECK1-NEXT:    [[_TMP7:%.*]] = alloca ptr, align 8
1198 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1199 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1200 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1201 // CHECK1-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
1202 // CHECK1-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
1203 // CHECK1-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
1204 // CHECK1-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
1205 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8
1206 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
1207 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
1208 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
1209 // CHECK1-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 8
1210 // CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8
1211 // CHECK1-NEXT:    store ptr [[TMP4]], ptr [[_TMP1]], align 8
1212 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1213 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
1214 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1215 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1216 // CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0
1217 // CHECK1-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
1218 // CHECK1-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1219 // CHECK1:       arrayctor.loop:
1220 // CHECK1-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1221 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1222 // CHECK1-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1
1223 // CHECK1-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1224 // CHECK1-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1225 // CHECK1:       arrayctor.cont:
1226 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 8
1227 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])
1228 // CHECK1-NEXT:    store ptr [[VAR6]], ptr [[_TMP7]], align 8
1229 // CHECK1-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1230 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
1231 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1232 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1233 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
1234 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1235 // CHECK1:       cond.true:
1236 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1237 // CHECK1:       cond.false:
1238 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1239 // CHECK1-NEXT:    br label [[COND_END]]
1240 // CHECK1:       cond.end:
1241 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
1242 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1243 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1244 // CHECK1-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4
1245 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1246 // CHECK1:       omp.inner.for.cond:
1247 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1248 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1249 // CHECK1-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
1250 // CHECK1-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1251 // CHECK1:       omp.inner.for.cond.cleanup:
1252 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1253 // CHECK1:       omp.inner.for.body:
1254 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1255 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
1256 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1257 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
1258 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[T_VAR3]], align 128
1259 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4
1260 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
1261 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i64 0, i64 [[IDXPROM]]
1262 // CHECK1-NEXT:    store i32 [[TMP14]], ptr [[ARRAYIDX]], align 4
1263 // CHECK1-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP7]], align 8
1264 // CHECK1-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I]], align 4
1265 // CHECK1-NEXT:    [[IDXPROM9:%.*]] = sext i32 [[TMP17]] to i64
1266 // CHECK1-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i64 0, i64 [[IDXPROM9]]
1267 // CHECK1-NEXT:    [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIiEaSERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYIDX10]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP16]])
1268 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1269 // CHECK1:       omp.body.continue:
1270 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1271 // CHECK1:       omp.inner.for.inc:
1272 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1273 // CHECK1-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP18]], 1
1274 // CHECK1-NEXT:    store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4
1275 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
1276 // CHECK1:       omp.inner.for.end:
1277 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1278 // CHECK1:       omp.loop.exit:
1279 // CHECK1-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1280 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
1281 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])
1282 // CHECK1-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1283 // CHECK1-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
1284 // CHECK1-NEXT:    br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1285 // CHECK1:       .omp.lastprivate.then:
1286 // CHECK1-NEXT:    [[TMP23:%.*]] = load i32, ptr [[T_VAR3]], align 128
1287 // CHECK1-NEXT:    store i32 [[TMP23]], ptr [[TMP0]], align 128
1288 // CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 128 [[TMP1]], ptr align 128 [[VEC4]], i64 8, i1 false)
1289 // CHECK1-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP2]], i32 0, i32 0
1290 // CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i64 2
1291 // CHECK1-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN12]], [[TMP24]]
1292 // CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1293 // CHECK1:       omp.arraycpy.body:
1294 // CHECK1-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1295 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1296 // CHECK1-NEXT:    [[CALL13:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIiEaSERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]])
1297 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1298 // CHECK1-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1299 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP24]]
1300 // CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]]
1301 // CHECK1:       omp.arraycpy.done14:
1302 // CHECK1-NEXT:    [[TMP25:%.*]] = load ptr, ptr [[_TMP7]], align 8
1303 // CHECK1-NEXT:    [[CALL15:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIiEaSERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[TMP5]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP25]])
1304 // CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
1305 // CHECK1:       .omp.lastprivate.done:
1306 // CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
1307 // CHECK1-NEXT:    [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0
1308 // CHECK1-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN16]], i64 2
1309 // CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1310 // CHECK1:       arraydestroy.body:
1311 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP26]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1312 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1313 // CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1314 // CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN16]]
1315 // CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE17:%.*]], label [[ARRAYDESTROY_BODY]]
1316 // CHECK1:       arraydestroy.done17:
1317 // CHECK1-NEXT:    [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1318 // CHECK1-NEXT:    [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 4
1319 // CHECK1-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP28]])
1320 // CHECK1-NEXT:    ret void
1321 //
1322 //
1323 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
1324 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1325 // CHECK1-NEXT:  entry:
1326 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1327 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1328 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1329 // CHECK1-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1330 // CHECK1-NEXT:    ret void
1331 //
1332 //
1333 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
1334 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1335 // CHECK1-NEXT:  entry:
1336 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1337 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1338 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1339 // CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
1340 // CHECK1-NEXT:    store i32 0, ptr [[F]], align 4
1341 // CHECK1-NEXT:    ret void
1342 //
1343 //
1344 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev
1345 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1346 // CHECK1-NEXT:  entry:
1347 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1348 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1349 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1350 // CHECK1-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 8
1351 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1352 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1353 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1354 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1355 // CHECK1-NEXT:    [[A3:%.*]] = alloca i32, align 4
1356 // CHECK1-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 8
1357 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB3]])
1358 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1359 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1360 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SST:%.*]], ptr [[THIS1]], i32 0, i32 0
1361 // CHECK1-NEXT:    store i32 0, ptr [[A]], align 4
1362 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 1, ptr @_ZN3SSTIiEC2Ev.omp_outlined, ptr [[THIS1]])
1363 // CHECK1-NEXT:    store ptr [[TMP]], ptr [[_TMP2]], align 8
1364 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1365 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
1366 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1367 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1368 // CHECK1-NEXT:    store ptr [[A3]], ptr [[_TMP4]], align 8
1369 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1370 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1371 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP1]], 1
1372 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1373 // CHECK1:       cond.true:
1374 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1375 // CHECK1:       cond.false:
1376 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1377 // CHECK1-NEXT:    br label [[COND_END]]
1378 // CHECK1:       cond.end:
1379 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP2]], [[COND_FALSE]] ]
1380 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1381 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1382 // CHECK1-NEXT:    store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
1383 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1384 // CHECK1:       omp.inner.for.cond:
1385 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1386 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1387 // CHECK1-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
1388 // CHECK1-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1389 // CHECK1:       omp.inner.for.body:
1390 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1391 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
1392 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1393 // CHECK1-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[_TMP4]], align 8
1394 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[TMP7]], align 4
1395 // CHECK1-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[_TMP4]], align 8
1396 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
1397 // CHECK1-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP9]], 1
1398 // CHECK1-NEXT:    store i32 [[INC]], ptr [[TMP8]], align 4
1399 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1400 // CHECK1:       omp.body.continue:
1401 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1402 // CHECK1:       omp.inner.for.inc:
1403 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1404 // CHECK1-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1
1405 // CHECK1-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
1406 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
1407 // CHECK1:       omp.inner.for.end:
1408 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1409 // CHECK1:       omp.loop.exit:
1410 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP0]])
1411 // CHECK1-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP0]])
1412 // CHECK1-NEXT:    ret void
1413 //
1414 //
1415 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev.omp_outlined
1416 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR3]] {
1417 // CHECK1-NEXT:  entry:
1418 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1419 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1420 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1421 // CHECK1-NEXT:    [[A:%.*]] = alloca ptr, align 8
1422 // CHECK1-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
1423 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1424 // CHECK1-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
1425 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1426 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1427 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1428 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1429 // CHECK1-NEXT:    [[A3:%.*]] = alloca i32, align 4
1430 // CHECK1-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 8
1431 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1432 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1433 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1434 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1435 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1436 // CHECK1-NEXT:    [[A1:%.*]] = getelementptr inbounds nuw [[STRUCT_SST:%.*]], ptr [[TMP0]], i32 0, i32 0
1437 // CHECK1-NEXT:    store ptr [[A1]], ptr [[A]], align 8
1438 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A]], align 8
1439 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 8
1440 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1441 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
1442 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1443 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1444 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8
1445 // CHECK1-NEXT:    store ptr [[A3]], ptr [[_TMP4]], align 8
1446 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1447 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
1448 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1449 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1450 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
1451 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1452 // CHECK1:       cond.true:
1453 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1454 // CHECK1:       cond.false:
1455 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1456 // CHECK1-NEXT:    br label [[COND_END]]
1457 // CHECK1:       cond.end:
1458 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1459 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1460 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1461 // CHECK1-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
1462 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1463 // CHECK1:       omp.inner.for.cond:
1464 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1465 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1466 // CHECK1-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1467 // CHECK1-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1468 // CHECK1:       omp.inner.for.body:
1469 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1470 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1471 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1472 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
1473 // CHECK1-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP4]], align 8
1474 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
1475 // CHECK1-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP12]], 1
1476 // CHECK1-NEXT:    store i32 [[INC]], ptr [[TMP11]], align 4
1477 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1478 // CHECK1:       omp.body.continue:
1479 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1480 // CHECK1:       omp.inner.for.inc:
1481 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1482 // CHECK1-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP13]], 1
1483 // CHECK1-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
1484 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
1485 // CHECK1:       omp.inner.for.end:
1486 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1487 // CHECK1:       omp.loop.exit:
1488 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
1489 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1490 // CHECK1-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
1491 // CHECK1-NEXT:    br i1 [[TMP15]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1492 // CHECK1:       .omp.lastprivate.then:
1493 // CHECK1-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP4]], align 8
1494 // CHECK1-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 4
1495 // CHECK1-NEXT:    store i32 [[TMP17]], ptr [[TMP2]], align 4
1496 // CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
1497 // CHECK1:       .omp.lastprivate.done:
1498 // CHECK1-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP4]])
1499 // CHECK1-NEXT:    ret void
1500 //
1501 //
1502 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
1503 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1504 // CHECK1-NEXT:  entry:
1505 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1506 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1507 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1508 // CHECK1-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
1509 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1510 // CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
1511 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
1512 // CHECK1-NEXT:    store i32 [[TMP0]], ptr [[F]], align 4
1513 // CHECK1-NEXT:    ret void
1514 //
1515 //
1516 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1517 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1518 // CHECK1-NEXT:  entry:
1519 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1520 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1521 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1522 // CHECK1-NEXT:    ret void
1523 //
1524 //
1525 // CHECK3-LABEL: define {{[^@]+}}@main
1526 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
1527 // CHECK3-NEXT:  entry:
1528 // CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1529 // CHECK3-NEXT:    [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
1530 // CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
1531 // CHECK3-NEXT:    store i32 0, ptr [[RETVAL]], align 4
1532 // CHECK3-NEXT:    call void @_ZN2SSC1ERi(ptr noundef nonnull align 8 dereferenceable(24) [[SS]], ptr noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar)
1533 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0
1534 // CHECK3-NEXT:    store ptr @_ZZ4mainE5sivar, ptr [[TMP0]], align 8
1535 // CHECK3-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[REF_TMP]])
1536 // CHECK3-NEXT:    ret i32 0
1537 //
1538 //
1539 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC1ERi
1540 // CHECK3-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {
1541 // CHECK3-NEXT:  entry:
1542 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1543 // CHECK3-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 8
1544 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1545 // CHECK3-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 8
1546 // CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1547 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8
1548 // CHECK3-NEXT:    call void @_ZN2SSC2ERi(ptr noundef nonnull align 8 dereferenceable(24) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]])
1549 // CHECK3-NEXT:    ret void
1550 //
1551 //
1552 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC2ERi
1553 // CHECK3-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1554 // CHECK3-NEXT:  entry:
1555 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1556 // CHECK3-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 8
1557 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1558 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1559 // CHECK3-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 8
1560 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1561 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1562 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1563 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1564 // CHECK3-NEXT:    [[A3:%.*]] = alloca i32, align 4
1565 // CHECK3-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 8
1566 // CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_1:%.*]], align 8
1567 // CHECK3-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB3:[0-9]+]])
1568 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1569 // CHECK3-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 8
1570 // CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1571 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0
1572 // CHECK3-NEXT:    store i32 0, ptr [[A]], align 8
1573 // CHECK3-NEXT:    [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 2
1574 // CHECK3-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 8
1575 // CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
1576 // CHECK3-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
1577 // CHECK3-NEXT:    store i8 [[BF_SET]], ptr [[B]], align 8
1578 // CHECK3-NEXT:    [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 3
1579 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[D_ADDR]], align 8
1580 // CHECK3-NEXT:    store ptr [[TMP1]], ptr [[C]], align 8
1581 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 1, ptr @_ZN2SSC2ERi.omp_outlined, ptr [[THIS1]])
1582 // CHECK3-NEXT:    store ptr [[TMP]], ptr [[_TMP2]], align 8
1583 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1584 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
1585 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1586 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1587 // CHECK3-NEXT:    store ptr [[A3]], ptr [[_TMP4]], align 8
1588 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1589 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1590 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
1591 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1592 // CHECK3:       cond.true:
1593 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1594 // CHECK3:       cond.false:
1595 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1596 // CHECK3-NEXT:    br label [[COND_END]]
1597 // CHECK3:       cond.end:
1598 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1599 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1600 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1601 // CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
1602 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1603 // CHECK3:       omp.inner.for.cond:
1604 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1605 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1606 // CHECK3-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1607 // CHECK3-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1608 // CHECK3:       omp.inner.for.body:
1609 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1610 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
1611 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1612 // CHECK3-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[_TMP4]], align 8
1613 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[TMP8]], align 4
1614 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_1]], ptr [[REF_TMP]], i32 0, i32 0
1615 // CHECK3-NEXT:    store ptr [[THIS1]], ptr [[TMP9]], align 8
1616 // CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_1]], ptr [[REF_TMP]], i32 0, i32 1
1617 // CHECK3-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP4]], align 8
1618 // CHECK3-NEXT:    store ptr [[TMP11]], ptr [[TMP10]], align 8
1619 // CHECK3-NEXT:    call void @_ZZN2SSC1ERiENKUlvE0_clEv(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])
1620 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1621 // CHECK3:       omp.body.continue:
1622 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1623 // CHECK3:       omp.inner.for.inc:
1624 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1625 // CHECK3-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP12]], 1
1626 // CHECK3-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
1627 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
1628 // CHECK3:       omp.inner.for.end:
1629 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1630 // CHECK3:       omp.loop.exit:
1631 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP0]])
1632 // CHECK3-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB1:[0-9]+]], i32 [[TMP0]])
1633 // CHECK3-NEXT:    ret void
1634 //
1635 //
1636 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined
1637 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2:[0-9]+]] {
1638 // CHECK3-NEXT:  entry:
1639 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1640 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1641 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1642 // CHECK3-NEXT:    [[E:%.*]] = alloca ptr, align 8
1643 // CHECK3-NEXT:    [[A:%.*]] = alloca ptr, align 8
1644 // CHECK3-NEXT:    [[B:%.*]] = alloca i32, align 4
1645 // CHECK3-NEXT:    [[C:%.*]] = alloca ptr, align 8
1646 // CHECK3-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
1647 // CHECK3-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 8
1648 // CHECK3-NEXT:    [[_TMP5:%.*]] = alloca ptr, align 8
1649 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1650 // CHECK3-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
1651 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1652 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1653 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1654 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1655 // CHECK3-NEXT:    [[E7:%.*]] = alloca [4 x i8], align 1
1656 // CHECK3-NEXT:    [[_TMP8:%.*]] = alloca ptr, align 8
1657 // CHECK3-NEXT:    [[A9:%.*]] = alloca i32, align 4
1658 // CHECK3-NEXT:    [[_TMP10:%.*]] = alloca ptr, align 8
1659 // CHECK3-NEXT:    [[B11:%.*]] = alloca i32, align 4
1660 // CHECK3-NEXT:    [[C12:%.*]] = alloca i32, align 4
1661 // CHECK3-NEXT:    [[_TMP13:%.*]] = alloca ptr, align 8
1662 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1663 // CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
1664 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1665 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1666 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1667 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1668 // CHECK3-NEXT:    [[E1:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 1
1669 // CHECK3-NEXT:    store ptr [[E1]], ptr [[E]], align 8
1670 // CHECK3-NEXT:    [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 0
1671 // CHECK3-NEXT:    store ptr [[A2]], ptr [[A]], align 8
1672 // CHECK3-NEXT:    [[C3:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 3
1673 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[C3]], align 8
1674 // CHECK3-NEXT:    store ptr [[TMP1]], ptr [[C]], align 8
1675 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A]], align 8
1676 // CHECK3-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 8
1677 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C]], align 8
1678 // CHECK3-NEXT:    store ptr [[TMP3]], ptr [[_TMP4]], align 8
1679 // CHECK3-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[E]], align 8
1680 // CHECK3-NEXT:    store ptr [[TMP4]], ptr [[_TMP5]], align 8
1681 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1682 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
1683 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1684 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1685 // CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP5]], align 8
1686 // CHECK3-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[E7]], ptr align 1 [[TMP5]], i64 4, i1 false)
1687 // CHECK3-NEXT:    store ptr [[E7]], ptr [[_TMP8]], align 8
1688 // CHECK3-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1689 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
1690 // CHECK3-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP7]])
1691 // CHECK3-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[TMP]], align 8
1692 // CHECK3-NEXT:    store ptr [[A9]], ptr [[_TMP10]], align 8
1693 // CHECK3-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[_TMP4]], align 8
1694 // CHECK3-NEXT:    store ptr [[C12]], ptr [[_TMP13]], align 8
1695 // CHECK3-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[_TMP5]], align 8
1696 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP7]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1697 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1698 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 1
1699 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1700 // CHECK3:       cond.true:
1701 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1702 // CHECK3:       cond.false:
1703 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1704 // CHECK3-NEXT:    br label [[COND_END]]
1705 // CHECK3:       cond.end:
1706 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
1707 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1708 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1709 // CHECK3-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
1710 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1711 // CHECK3:       omp.inner.for.cond:
1712 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1713 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1714 // CHECK3-NEXT:    [[CMP14:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
1715 // CHECK3-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1716 // CHECK3:       omp.inner.for.body:
1717 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1718 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
1719 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1720 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
1721 // CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0
1722 // CHECK3-NEXT:    store ptr [[TMP0]], ptr [[TMP17]], align 8
1723 // CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1
1724 // CHECK3-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[_TMP10]], align 8
1725 // CHECK3-NEXT:    store ptr [[TMP19]], ptr [[TMP18]], align 8
1726 // CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2
1727 // CHECK3-NEXT:    store ptr [[B11]], ptr [[TMP20]], align 8
1728 // CHECK3-NEXT:    [[TMP21:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3
1729 // CHECK3-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[_TMP13]], align 8
1730 // CHECK3-NEXT:    store ptr [[TMP22]], ptr [[TMP21]], align 8
1731 // CHECK3-NEXT:    call void @_ZZN2SSC1ERiENKUlvE_clEv(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]])
1732 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1733 // CHECK3:       omp.body.continue:
1734 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1735 // CHECK3:       omp.inner.for.inc:
1736 // CHECK3-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1737 // CHECK3-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP23]], 1
1738 // CHECK3-NEXT:    store i32 [[ADD15]], ptr [[DOTOMP_IV]], align 4
1739 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
1740 // CHECK3:       omp.inner.for.end:
1741 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1742 // CHECK3:       omp.loop.exit:
1743 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP7]])
1744 // CHECK3-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1745 // CHECK3-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
1746 // CHECK3-NEXT:    br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1747 // CHECK3:       .omp.lastprivate.then:
1748 // CHECK3-NEXT:    [[TMP26:%.*]] = load ptr, ptr [[_TMP10]], align 8
1749 // CHECK3-NEXT:    [[TMP27:%.*]] = load i32, ptr [[TMP26]], align 4
1750 // CHECK3-NEXT:    store i32 [[TMP27]], ptr [[TMP8]], align 4
1751 // CHECK3-NEXT:    [[TMP28:%.*]] = load i32, ptr [[B11]], align 4
1752 // CHECK3-NEXT:    store i32 [[TMP28]], ptr [[B]], align 4
1753 // CHECK3-NEXT:    [[TMP29:%.*]] = load ptr, ptr [[_TMP13]], align 8
1754 // CHECK3-NEXT:    [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 4
1755 // CHECK3-NEXT:    store i32 [[TMP30]], ptr [[TMP9]], align 4
1756 // CHECK3-NEXT:    [[TMP31:%.*]] = load ptr, ptr [[_TMP8]], align 8
1757 // CHECK3-NEXT:    [[TMP32:%.*]] = load [4 x i8], ptr [[TMP31]], align 1
1758 // CHECK3-NEXT:    store [4 x i8] [[TMP32]], ptr [[TMP10]], align 1
1759 // CHECK3-NEXT:    [[TMP33:%.*]] = load i32, ptr [[B11]], align 4
1760 // CHECK3-NEXT:    [[B16:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 2
1761 // CHECK3-NEXT:    [[TMP34:%.*]] = trunc i32 [[TMP33]] to i8
1762 // CHECK3-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B16]], align 8
1763 // CHECK3-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP34]], 15
1764 // CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
1765 // CHECK3-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
1766 // CHECK3-NEXT:    store i8 [[BF_SET]], ptr [[B16]], align 8
1767 // CHECK3-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
1768 // CHECK3:       .omp.lastprivate.done:
1769 // CHECK3-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP7]])
1770 // CHECK3-NEXT:    ret void
1771 //
1772 //
1773 // CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv
1774 // CHECK3-SAME: (ptr noundef nonnull align 8 dereferenceable(32) [[THIS:%.*]]) #[[ATTR1]] align 2 {
1775 // CHECK3-NEXT:  entry:
1776 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1777 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1778 // CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1779 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0:%.*]], ptr [[THIS1]], i32 0, i32 0
1780 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[TMP0]], align 8
1781 // CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 1
1782 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP2]], align 8
1783 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
1784 // CHECK3-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP4]], 1
1785 // CHECK3-NEXT:    store i32 [[INC]], ptr [[TMP3]], align 4
1786 // CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 2
1787 // CHECK3-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP5]], align 8
1788 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
1789 // CHECK3-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP7]], -1
1790 // CHECK3-NEXT:    store i32 [[DEC]], ptr [[TMP6]], align 4
1791 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 3
1792 // CHECK3-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8
1793 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
1794 // CHECK3-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP10]], 1
1795 // CHECK3-NEXT:    store i32 [[DIV]], ptr [[TMP9]], align 4
1796 // CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 1
1797 // CHECK3-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8
1798 // CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 2
1799 // CHECK3-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[TMP13]], align 8
1800 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 3
1801 // CHECK3-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[TMP15]], align 8
1802 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @_ZZN2SSC1ERiENKUlvE_clEv.omp_outlined, ptr [[TMP1]], ptr [[TMP12]], ptr [[TMP14]], ptr [[TMP16]])
1803 // CHECK3-NEXT:    ret void
1804 //
1805 //
1806 // CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE0_clEv
1807 // CHECK3-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]]) #[[ATTR1]] align 2 {
1808 // CHECK3-NEXT:  entry:
1809 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1810 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1811 // CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1812 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_1:%.*]], ptr [[THIS1]], i32 0, i32 0
1813 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[TMP0]], align 8
1814 // CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_1]], ptr [[THIS1]], i32 0, i32 1
1815 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP2]], align 8
1816 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
1817 // CHECK3-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP4]], -1
1818 // CHECK3-NEXT:    store i32 [[DEC]], ptr [[TMP3]], align 4
1819 // CHECK3-NEXT:    [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP1]], i32 0, i32 2
1820 // CHECK3-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 8
1821 // CHECK3-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD]], 4
1822 // CHECK3-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4
1823 // CHECK3-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32
1824 // CHECK3-NEXT:    [[INC:%.*]] = add nsw i32 [[BF_CAST]], 1
1825 // CHECK3-NEXT:    [[TMP5:%.*]] = trunc i32 [[INC]] to i8
1826 // CHECK3-NEXT:    [[BF_LOAD2:%.*]] = load i8, ptr [[B]], align 8
1827 // CHECK3-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP5]], 15
1828 // CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD2]], -16
1829 // CHECK3-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
1830 // CHECK3-NEXT:    store i8 [[BF_SET]], ptr [[B]], align 8
1831 // CHECK3-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4
1832 // CHECK3-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4
1833 // CHECK3-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32
1834 // CHECK3-NEXT:    [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP1]], i32 0, i32 3
1835 // CHECK3-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[C]], align 8
1836 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
1837 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 2
1838 // CHECK3-NEXT:    store i32 [[MUL]], ptr [[TMP6]], align 4
1839 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_1]], ptr [[THIS1]], i32 0, i32 1
1840 // CHECK3-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8
1841 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @_ZZN2SSC1ERiENKUlvE0_clEv.omp_outlined, ptr [[TMP1]], ptr [[TMP9]])
1842 // CHECK3-NEXT:    ret void
1843 //
1844 //
1845 // CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv.omp_outlined
1846 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] {
1847 // CHECK3-NEXT:  entry:
1848 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1849 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1850 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1851 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
1852 // CHECK3-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 8
1853 // CHECK3-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 8
1854 // CHECK3-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
1855 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
1856 // CHECK3-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 8
1857 // CHECK3-NEXT:    [[_TMP3:%.*]] = alloca ptr, align 8
1858 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1859 // CHECK3-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
1860 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1861 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1862 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1863 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1864 // CHECK3-NEXT:    [[A5:%.*]] = alloca i32, align 4
1865 // CHECK3-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 8
1866 // CHECK3-NEXT:    [[B7:%.*]] = alloca i32, align 4
1867 // CHECK3-NEXT:    [[C8:%.*]] = alloca i32, align 4
1868 // CHECK3-NEXT:    [[_TMP9:%.*]] = alloca ptr, align 8
1869 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1870 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1871 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1872 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1873 // CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
1874 // CHECK3-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 8
1875 // CHECK3-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 8
1876 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1877 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1878 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8
1879 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8
1880 // CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 8
1881 // CHECK3-NEXT:    store ptr [[TMP3]], ptr [[_TMP1]], align 8
1882 // CHECK3-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8
1883 // CHECK3-NEXT:    store ptr [[TMP4]], ptr [[_TMP2]], align 8
1884 // CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 8
1885 // CHECK3-NEXT:    store ptr [[TMP5]], ptr [[_TMP3]], align 8
1886 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1887 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
1888 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1889 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1890 // CHECK3-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP2]], align 8
1891 // CHECK3-NEXT:    store ptr [[A5]], ptr [[_TMP6]], align 8
1892 // CHECK3-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[_TMP3]], align 8
1893 // CHECK3-NEXT:    store ptr [[C8]], ptr [[_TMP9]], align 8
1894 // CHECK3-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1895 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
1896 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1897 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1898 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 1
1899 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1900 // CHECK3:       cond.true:
1901 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1902 // CHECK3:       cond.false:
1903 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1904 // CHECK3-NEXT:    br label [[COND_END]]
1905 // CHECK3:       cond.end:
1906 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
1907 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1908 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1909 // CHECK3-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
1910 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1911 // CHECK3:       omp.inner.for.cond:
1912 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1913 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1914 // CHECK3-NEXT:    [[CMP10:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
1915 // CHECK3-NEXT:    br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1916 // CHECK3:       omp.inner.for.body:
1917 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1918 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
1919 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1920 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
1921 // CHECK3-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP6]], align 8
1922 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 4
1923 // CHECK3-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP17]], 1
1924 // CHECK3-NEXT:    store i32 [[INC]], ptr [[TMP16]], align 4
1925 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, ptr [[B7]], align 4
1926 // CHECK3-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP18]], -1
1927 // CHECK3-NEXT:    store i32 [[DEC]], ptr [[B7]], align 4
1928 // CHECK3-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[_TMP9]], align 8
1929 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
1930 // CHECK3-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP20]], 1
1931 // CHECK3-NEXT:    store i32 [[DIV]], ptr [[TMP19]], align 4
1932 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1933 // CHECK3:       omp.body.continue:
1934 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1935 // CHECK3:       omp.inner.for.inc:
1936 // CHECK3-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1937 // CHECK3-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP21]], 1
1938 // CHECK3-NEXT:    store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4
1939 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
1940 // CHECK3:       omp.inner.for.end:
1941 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1942 // CHECK3:       omp.loop.exit:
1943 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP9]])
1944 // CHECK3-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1945 // CHECK3-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
1946 // CHECK3-NEXT:    br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1947 // CHECK3:       .omp.lastprivate.then:
1948 // CHECK3-NEXT:    [[TMP24:%.*]] = load ptr, ptr [[_TMP6]], align 8
1949 // CHECK3-NEXT:    [[TMP25:%.*]] = load i32, ptr [[TMP24]], align 4
1950 // CHECK3-NEXT:    store i32 [[TMP25]], ptr [[TMP6]], align 4
1951 // CHECK3-NEXT:    [[TMP26:%.*]] = load i32, ptr [[B7]], align 4
1952 // CHECK3-NEXT:    store i32 [[TMP26]], ptr [[TMP2]], align 4
1953 // CHECK3-NEXT:    [[TMP27:%.*]] = load ptr, ptr [[_TMP9]], align 8
1954 // CHECK3-NEXT:    [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 4
1955 // CHECK3-NEXT:    store i32 [[TMP28]], ptr [[TMP7]], align 4
1956 // CHECK3-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
1957 // CHECK3:       .omp.lastprivate.done:
1958 // CHECK3-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP9]])
1959 // CHECK3-NEXT:    ret void
1960 //
1961 //
1962 // CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE0_clEv.omp_outlined
1963 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1964 // CHECK3-NEXT:  entry:
1965 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1966 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1967 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1968 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
1969 // CHECK3-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
1970 // CHECK3-NEXT:    [[B:%.*]] = alloca i32, align 4
1971 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
1972 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1973 // CHECK3-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
1974 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1975 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1976 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1977 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1978 // CHECK3-NEXT:    [[B3:%.*]] = alloca i32, align 4
1979 // CHECK3-NEXT:    [[B4:%.*]] = alloca i32, align 4
1980 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1981 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1982 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1983 // CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
1984 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1985 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1986 // CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 8
1987 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8
1988 // CHECK3-NEXT:    store ptr [[TMP2]], ptr [[_TMP1]], align 8
1989 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1990 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
1991 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1992 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1993 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1994 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
1995 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1996 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1997 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
1998 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1999 // CHECK3:       cond.true:
2000 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2001 // CHECK3:       cond.false:
2002 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2003 // CHECK3-NEXT:    br label [[COND_END]]
2004 // CHECK3:       cond.end:
2005 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2006 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2007 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2008 // CHECK3-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
2009 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2010 // CHECK3:       omp.inner.for.cond:
2011 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2012 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2013 // CHECK3-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2014 // CHECK3-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2015 // CHECK3:       omp.inner.for.body:
2016 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2017 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2018 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2019 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[B3]], align 4
2020 // CHECK3-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP1]], align 8
2021 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
2022 // CHECK3-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP12]], 1
2023 // CHECK3-NEXT:    store i32 [[INC]], ptr [[TMP11]], align 4
2024 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[B3]], align 4
2025 // CHECK3-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP13]], -1
2026 // CHECK3-NEXT:    store i32 [[DEC]], ptr [[B3]], align 4
2027 // CHECK3-NEXT:    [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 3
2028 // CHECK3-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[C]], align 8
2029 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4
2030 // CHECK3-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP15]], 1
2031 // CHECK3-NEXT:    store i32 [[DIV]], ptr [[TMP14]], align 4
2032 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2033 // CHECK3:       omp.body.continue:
2034 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2035 // CHECK3:       omp.inner.for.inc:
2036 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2037 // CHECK3-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1
2038 // CHECK3-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
2039 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2040 // CHECK3:       omp.inner.for.end:
2041 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2042 // CHECK3:       omp.loop.exit:
2043 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]])
2044 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2045 // CHECK3-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
2046 // CHECK3-NEXT:    br i1 [[TMP18]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2047 // CHECK3:       .omp.lastprivate.then:
2048 // CHECK3-NEXT:    store i32 2, ptr [[B3]], align 4
2049 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, ptr [[B3]], align 4
2050 // CHECK3-NEXT:    store i32 [[TMP19]], ptr [[B]], align 4
2051 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[B3]], align 4
2052 // CHECK3-NEXT:    [[B7:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 2
2053 // CHECK3-NEXT:    [[TMP21:%.*]] = trunc i32 [[TMP20]] to i8
2054 // CHECK3-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B7]], align 8
2055 // CHECK3-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP21]], 15
2056 // CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
2057 // CHECK3-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
2058 // CHECK3-NEXT:    store i8 [[BF_SET]], ptr [[B7]], align 8
2059 // CHECK3-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
2060 // CHECK3:       .omp.lastprivate.done:
2061 // CHECK3-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP4]])
2062 // CHECK3-NEXT:    ret void
2063 //
2064 //
2065 // CHECK4-LABEL: define {{[^@]+}}@main
2066 // CHECK4-SAME: () #[[ATTR0:[0-9]+]] {
2067 // CHECK4-NEXT:  entry:
2068 // CHECK4-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2069 // CHECK4-NEXT:    [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
2070 // CHECK4-NEXT:    [[BLOCK:%.*]] = alloca <{ ptr, i32, i32, ptr, ptr, i32 }>, align 8
2071 // CHECK4-NEXT:    store i32 0, ptr [[RETVAL]], align 4
2072 // CHECK4-NEXT:    call void @_ZN2SSC1ERi(ptr noundef nonnull align 8 dereferenceable(24) [[SS]], ptr noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar)
2073 // CHECK4-NEXT:    [[BLOCK_ISA:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 0
2074 // CHECK4-NEXT:    store ptr @_NSConcreteStackBlock, ptr [[BLOCK_ISA]], align 8
2075 // CHECK4-NEXT:    [[BLOCK_FLAGS:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 1
2076 // CHECK4-NEXT:    store i32 1073741824, ptr [[BLOCK_FLAGS]], align 8
2077 // CHECK4-NEXT:    [[BLOCK_RESERVED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 2
2078 // CHECK4-NEXT:    store i32 0, ptr [[BLOCK_RESERVED]], align 4
2079 // CHECK4-NEXT:    [[BLOCK_INVOKE:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 3
2080 // CHECK4-NEXT:    store ptr @__main_block_invoke, ptr [[BLOCK_INVOKE]], align 8
2081 // CHECK4-NEXT:    [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 4
2082 // CHECK4-NEXT:    store ptr @__block_descriptor_tmp.1, ptr [[BLOCK_DESCRIPTOR]], align 8
2083 // CHECK4-NEXT:    [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 5
2084 // CHECK4-NEXT:    [[TMP0:%.*]] = load i32, ptr @_ZZ4mainE5sivar, align 4
2085 // CHECK4-NEXT:    store i32 [[TMP0]], ptr [[BLOCK_CAPTURED]], align 8
2086 // CHECK4-NEXT:    [[TMP1:%.*]] = getelementptr inbounds nuw [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr [[BLOCK]], i32 0, i32 3
2087 // CHECK4-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP1]], align 8
2088 // CHECK4-NEXT:    call void [[TMP2]](ptr noundef [[BLOCK]])
2089 // CHECK4-NEXT:    ret i32 0
2090 //
2091 //
2092 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC1ERi
2093 // CHECK4-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {
2094 // CHECK4-NEXT:  entry:
2095 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2096 // CHECK4-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 8
2097 // CHECK4-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2098 // CHECK4-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 8
2099 // CHECK4-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2100 // CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8
2101 // CHECK4-NEXT:    call void @_ZN2SSC2ERi(ptr noundef nonnull align 8 dereferenceable(24) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]])
2102 // CHECK4-NEXT:    ret void
2103 //
2104 //
2105 // CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke
2106 // CHECK4-SAME: (ptr noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2:[0-9]+]] {
2107 // CHECK4-NEXT:  entry:
2108 // CHECK4-NEXT:    [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca ptr, align 8
2109 // CHECK4-NEXT:    [[BLOCK_ADDR:%.*]] = alloca ptr, align 8
2110 // CHECK4-NEXT:    store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
2111 // CHECK4-NEXT:    store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[BLOCK_ADDR]], align 8
2112 // CHECK4-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3:[0-9]+]], i32 1, ptr @__main_block_invoke.omp_outlined, ptr @_ZZ4mainE5sivar)
2113 // CHECK4-NEXT:    ret void
2114 //
2115 //
2116 // CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke.omp_outlined
2117 // CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
2118 // CHECK4-NEXT:  entry:
2119 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2120 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2121 // CHECK4-NEXT:    [[SIVAR_ADDR:%.*]] = alloca ptr, align 8
2122 // CHECK4-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
2123 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2124 // CHECK4-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
2125 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2126 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2127 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2128 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2129 // CHECK4-NEXT:    [[G:%.*]] = alloca i32, align 128
2130 // CHECK4-NEXT:    [[G1:%.*]] = alloca i32, align 4
2131 // CHECK4-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 8
2132 // CHECK4-NEXT:    [[SIVAR3:%.*]] = alloca i32, align 4
2133 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
2134 // CHECK4-NEXT:    [[BLOCK:%.*]] = alloca <{ ptr, i32, i32, ptr, ptr, ptr, i32, [84 x i8], i32 }>, align 128
2135 // CHECK4-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2136 // CHECK4-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2137 // CHECK4-NEXT:    store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8
2138 // CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8
2139 // CHECK4-NEXT:    [[TMP1:%.*]] = load ptr, ptr @g1, align 8
2140 // CHECK4-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 8
2141 // CHECK4-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2142 // CHECK4-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
2143 // CHECK4-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2144 // CHECK4-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2145 // CHECK4-NEXT:    [[TMP2:%.*]] = load ptr, ptr @g1, align 8
2146 // CHECK4-NEXT:    store ptr [[G1]], ptr [[_TMP2]], align 8
2147 // CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2148 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
2149 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2150 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2151 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
2152 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2153 // CHECK4:       cond.true:
2154 // CHECK4-NEXT:    br label [[COND_END:%.*]]
2155 // CHECK4:       cond.false:
2156 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2157 // CHECK4-NEXT:    br label [[COND_END]]
2158 // CHECK4:       cond.end:
2159 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2160 // CHECK4-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2161 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2162 // CHECK4-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
2163 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2164 // CHECK4:       omp.inner.for.cond:
2165 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2166 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2167 // CHECK4-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2168 // CHECK4-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2169 // CHECK4:       omp.inner.for.body:
2170 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2171 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2172 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2173 // CHECK4-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2174 // CHECK4-NEXT:    store i32 1, ptr [[G]], align 128
2175 // CHECK4-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP2]], align 8
2176 // CHECK4-NEXT:    store volatile i32 1, ptr [[TMP11]], align 4
2177 // CHECK4-NEXT:    store i32 2, ptr [[SIVAR3]], align 4
2178 // CHECK4-NEXT:    store i32 1, ptr [[G]], align 128
2179 // CHECK4-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[_TMP2]], align 8
2180 // CHECK4-NEXT:    store volatile i32 1, ptr [[TMP12]], align 4
2181 // CHECK4-NEXT:    [[BLOCK_ISA:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32, [84 x i8], i32 }>, ptr [[BLOCK]], i32 0, i32 0
2182 // CHECK4-NEXT:    store ptr @_NSConcreteStackBlock, ptr [[BLOCK_ISA]], align 128
2183 // CHECK4-NEXT:    [[BLOCK_FLAGS:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32, [84 x i8], i32 }>, ptr [[BLOCK]], i32 0, i32 1
2184 // CHECK4-NEXT:    store i32 1073741824, ptr [[BLOCK_FLAGS]], align 8
2185 // CHECK4-NEXT:    [[BLOCK_RESERVED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32, [84 x i8], i32 }>, ptr [[BLOCK]], i32 0, i32 2
2186 // CHECK4-NEXT:    store i32 0, ptr [[BLOCK_RESERVED]], align 4
2187 // CHECK4-NEXT:    [[BLOCK_INVOKE:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32, [84 x i8], i32 }>, ptr [[BLOCK]], i32 0, i32 3
2188 // CHECK4-NEXT:    store ptr @g1_block_invoke, ptr [[BLOCK_INVOKE]], align 16
2189 // CHECK4-NEXT:    [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32, [84 x i8], i32 }>, ptr [[BLOCK]], i32 0, i32 4
2190 // CHECK4-NEXT:    store ptr @__block_descriptor_tmp, ptr [[BLOCK_DESCRIPTOR]], align 8
2191 // CHECK4-NEXT:    [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32, [84 x i8], i32 }>, ptr [[BLOCK]], i32 0, i32 8
2192 // CHECK4-NEXT:    [[TMP13:%.*]] = load volatile i32, ptr [[G]], align 128
2193 // CHECK4-NEXT:    store volatile i32 [[TMP13]], ptr [[BLOCK_CAPTURED]], align 128
2194 // CHECK4-NEXT:    [[BLOCK_CAPTURED5:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32, [84 x i8], i32 }>, ptr [[BLOCK]], i32 0, i32 5
2195 // CHECK4-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[_TMP2]], align 8
2196 // CHECK4-NEXT:    store ptr [[TMP14]], ptr [[BLOCK_CAPTURED5]], align 32
2197 // CHECK4-NEXT:    [[BLOCK_CAPTURED6:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32, [84 x i8], i32 }>, ptr [[BLOCK]], i32 0, i32 6
2198 // CHECK4-NEXT:    [[TMP15:%.*]] = load i32, ptr [[SIVAR3]], align 4
2199 // CHECK4-NEXT:    store i32 [[TMP15]], ptr [[BLOCK_CAPTURED6]], align 8
2200 // CHECK4-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr [[BLOCK]], i32 0, i32 3
2201 // CHECK4-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[TMP16]], align 8
2202 // CHECK4-NEXT:    call void [[TMP17]](ptr noundef [[BLOCK]])
2203 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2204 // CHECK4:       omp.body.continue:
2205 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2206 // CHECK4:       omp.inner.for.inc:
2207 // CHECK4-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2208 // CHECK4-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP18]], 1
2209 // CHECK4-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
2210 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
2211 // CHECK4:       omp.inner.for.end:
2212 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2213 // CHECK4:       omp.loop.exit:
2214 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
2215 // CHECK4-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2216 // CHECK4-NEXT:    [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
2217 // CHECK4-NEXT:    br i1 [[TMP20]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2218 // CHECK4:       .omp.lastprivate.then:
2219 // CHECK4-NEXT:    [[TMP21:%.*]] = load i32, ptr [[G]], align 128
2220 // CHECK4-NEXT:    store volatile i32 [[TMP21]], ptr @g, align 128
2221 // CHECK4-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[_TMP2]], align 8
2222 // CHECK4-NEXT:    [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4
2223 // CHECK4-NEXT:    store volatile i32 [[TMP23]], ptr [[TMP2]], align 4
2224 // CHECK4-NEXT:    [[TMP24:%.*]] = load i32, ptr [[SIVAR3]], align 4
2225 // CHECK4-NEXT:    store i32 [[TMP24]], ptr [[TMP0]], align 4
2226 // CHECK4-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
2227 // CHECK4:       .omp.lastprivate.done:
2228 // CHECK4-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]])
2229 // CHECK4-NEXT:    ret void
2230 //
2231 //
2232 // CHECK4-LABEL: define {{[^@]+}}@g1_block_invoke
2233 // CHECK4-SAME: (ptr noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] {
2234 // CHECK4-NEXT:  entry:
2235 // CHECK4-NEXT:    [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca ptr, align 8
2236 // CHECK4-NEXT:    [[BLOCK_ADDR:%.*]] = alloca ptr, align 8
2237 // CHECK4-NEXT:    store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
2238 // CHECK4-NEXT:    store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[BLOCK_ADDR]], align 8
2239 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32, [84 x i8], i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 8
2240 // CHECK4-NEXT:    store i32 2, ptr [[BLOCK_CAPTURE_ADDR]], align 128
2241 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32, [84 x i8], i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 5
2242 // CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR1]], align 32
2243 // CHECK4-NEXT:    store i32 1, ptr [[TMP0]], align 4
2244 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32, [84 x i8], i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 6
2245 // CHECK4-NEXT:    store i32 4, ptr [[BLOCK_CAPTURE_ADDR2]], align 8
2246 // CHECK4-NEXT:    ret void
2247 //
2248 //
2249 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi
2250 // CHECK4-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2251 // CHECK4-NEXT:  entry:
2252 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2253 // CHECK4-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 8
2254 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2255 // CHECK4-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2256 // CHECK4-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 8
2257 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2258 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2259 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2260 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2261 // CHECK4-NEXT:    [[A3:%.*]] = alloca i32, align 4
2262 // CHECK4-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 8
2263 // CHECK4-NEXT:    [[BLOCK:%.*]] = alloca <{ ptr, i32, i32, ptr, ptr, ptr, ptr }>, align 8
2264 // CHECK4-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB3]])
2265 // CHECK4-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2266 // CHECK4-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 8
2267 // CHECK4-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2268 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0
2269 // CHECK4-NEXT:    store i32 0, ptr [[A]], align 8
2270 // CHECK4-NEXT:    [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 2
2271 // CHECK4-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 8
2272 // CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
2273 // CHECK4-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
2274 // CHECK4-NEXT:    store i8 [[BF_SET]], ptr [[B]], align 8
2275 // CHECK4-NEXT:    [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 3
2276 // CHECK4-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[D_ADDR]], align 8
2277 // CHECK4-NEXT:    store ptr [[TMP1]], ptr [[C]], align 8
2278 // CHECK4-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 1, ptr @_ZN2SSC2ERi.omp_outlined, ptr [[THIS1]])
2279 // CHECK4-NEXT:    store ptr [[TMP]], ptr [[_TMP2]], align 8
2280 // CHECK4-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2281 // CHECK4-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
2282 // CHECK4-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2283 // CHECK4-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2284 // CHECK4-NEXT:    store ptr [[A3]], ptr [[_TMP4]], align 8
2285 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2286 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2287 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
2288 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2289 // CHECK4:       cond.true:
2290 // CHECK4-NEXT:    br label [[COND_END:%.*]]
2291 // CHECK4:       cond.false:
2292 // CHECK4-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2293 // CHECK4-NEXT:    br label [[COND_END]]
2294 // CHECK4:       cond.end:
2295 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2296 // CHECK4-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2297 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2298 // CHECK4-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2299 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2300 // CHECK4:       omp.inner.for.cond:
2301 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2302 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2303 // CHECK4-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2304 // CHECK4-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2305 // CHECK4:       omp.inner.for.body:
2306 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2307 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
2308 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2309 // CHECK4-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[_TMP4]], align 8
2310 // CHECK4-NEXT:    store i32 [[ADD]], ptr [[TMP8]], align 4
2311 // CHECK4-NEXT:    [[BLOCK_ISA:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr }>, ptr [[BLOCK]], i32 0, i32 0
2312 // CHECK4-NEXT:    store ptr @_NSConcreteStackBlock, ptr [[BLOCK_ISA]], align 8
2313 // CHECK4-NEXT:    [[BLOCK_FLAGS:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr }>, ptr [[BLOCK]], i32 0, i32 1
2314 // CHECK4-NEXT:    store i32 1073741824, ptr [[BLOCK_FLAGS]], align 8
2315 // CHECK4-NEXT:    [[BLOCK_RESERVED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr }>, ptr [[BLOCK]], i32 0, i32 2
2316 // CHECK4-NEXT:    store i32 0, ptr [[BLOCK_RESERVED]], align 4
2317 // CHECK4-NEXT:    [[BLOCK_INVOKE:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr }>, ptr [[BLOCK]], i32 0, i32 3
2318 // CHECK4-NEXT:    store ptr @___ZN2SSC2ERi_block_invoke, ptr [[BLOCK_INVOKE]], align 8
2319 // CHECK4-NEXT:    [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr }>, ptr [[BLOCK]], i32 0, i32 4
2320 // CHECK4-NEXT:    store ptr @__block_descriptor_tmp.3, ptr [[BLOCK_DESCRIPTOR]], align 8
2321 // CHECK4-NEXT:    [[BLOCK_CAPTURED_THIS_ADDR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr }>, ptr [[BLOCK]], i32 0, i32 5
2322 // CHECK4-NEXT:    store ptr [[THIS1]], ptr [[BLOCK_CAPTURED_THIS_ADDR]], align 8
2323 // CHECK4-NEXT:    [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr }>, ptr [[BLOCK]], i32 0, i32 6
2324 // CHECK4-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[_TMP4]], align 8
2325 // CHECK4-NEXT:    store ptr [[TMP9]], ptr [[BLOCK_CAPTURED]], align 8
2326 // CHECK4-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr [[BLOCK]], i32 0, i32 3
2327 // CHECK4-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 8
2328 // CHECK4-NEXT:    call void [[TMP11]](ptr noundef [[BLOCK]])
2329 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2330 // CHECK4:       omp.body.continue:
2331 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2332 // CHECK4:       omp.inner.for.inc:
2333 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2334 // CHECK4-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP12]], 1
2335 // CHECK4-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
2336 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
2337 // CHECK4:       omp.inner.for.end:
2338 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2339 // CHECK4:       omp.loop.exit:
2340 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP0]])
2341 // CHECK4-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP0]])
2342 // CHECK4-NEXT:    ret void
2343 //
2344 //
2345 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined
2346 // CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR3]] {
2347 // CHECK4-NEXT:  entry:
2348 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2349 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2350 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2351 // CHECK4-NEXT:    [[E:%.*]] = alloca ptr, align 8
2352 // CHECK4-NEXT:    [[A:%.*]] = alloca ptr, align 8
2353 // CHECK4-NEXT:    [[B:%.*]] = alloca i32, align 4
2354 // CHECK4-NEXT:    [[C:%.*]] = alloca ptr, align 8
2355 // CHECK4-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
2356 // CHECK4-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 8
2357 // CHECK4-NEXT:    [[_TMP5:%.*]] = alloca ptr, align 8
2358 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2359 // CHECK4-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
2360 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2361 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2362 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2363 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2364 // CHECK4-NEXT:    [[E7:%.*]] = alloca [4 x i8], align 1
2365 // CHECK4-NEXT:    [[_TMP8:%.*]] = alloca ptr, align 8
2366 // CHECK4-NEXT:    [[A9:%.*]] = alloca i32, align 4
2367 // CHECK4-NEXT:    [[_TMP10:%.*]] = alloca ptr, align 8
2368 // CHECK4-NEXT:    [[B11:%.*]] = alloca i32, align 4
2369 // CHECK4-NEXT:    [[C12:%.*]] = alloca i32, align 4
2370 // CHECK4-NEXT:    [[_TMP13:%.*]] = alloca ptr, align 8
2371 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
2372 // CHECK4-NEXT:    [[BLOCK:%.*]] = alloca <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, align 8
2373 // CHECK4-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2374 // CHECK4-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2375 // CHECK4-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2376 // CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2377 // CHECK4-NEXT:    [[E1:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 1
2378 // CHECK4-NEXT:    store ptr [[E1]], ptr [[E]], align 8
2379 // CHECK4-NEXT:    [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 0
2380 // CHECK4-NEXT:    store ptr [[A2]], ptr [[A]], align 8
2381 // CHECK4-NEXT:    [[C3:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 3
2382 // CHECK4-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[C3]], align 8
2383 // CHECK4-NEXT:    store ptr [[TMP1]], ptr [[C]], align 8
2384 // CHECK4-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A]], align 8
2385 // CHECK4-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 8
2386 // CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C]], align 8
2387 // CHECK4-NEXT:    store ptr [[TMP3]], ptr [[_TMP4]], align 8
2388 // CHECK4-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[E]], align 8
2389 // CHECK4-NEXT:    store ptr [[TMP4]], ptr [[_TMP5]], align 8
2390 // CHECK4-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2391 // CHECK4-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
2392 // CHECK4-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2393 // CHECK4-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2394 // CHECK4-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP5]], align 8
2395 // CHECK4-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[E7]], ptr align 1 [[TMP5]], i64 4, i1 false)
2396 // CHECK4-NEXT:    store ptr [[E7]], ptr [[_TMP8]], align 8
2397 // CHECK4-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2398 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
2399 // CHECK4-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP7]])
2400 // CHECK4-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[TMP]], align 8
2401 // CHECK4-NEXT:    store ptr [[A9]], ptr [[_TMP10]], align 8
2402 // CHECK4-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[_TMP4]], align 8
2403 // CHECK4-NEXT:    store ptr [[C12]], ptr [[_TMP13]], align 8
2404 // CHECK4-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[_TMP5]], align 8
2405 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2406 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2407 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 1
2408 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2409 // CHECK4:       cond.true:
2410 // CHECK4-NEXT:    br label [[COND_END:%.*]]
2411 // CHECK4:       cond.false:
2412 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2413 // CHECK4-NEXT:    br label [[COND_END]]
2414 // CHECK4:       cond.end:
2415 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
2416 // CHECK4-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2417 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2418 // CHECK4-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
2419 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2420 // CHECK4:       omp.inner.for.cond:
2421 // CHECK4-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2422 // CHECK4-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2423 // CHECK4-NEXT:    [[CMP14:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
2424 // CHECK4-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2425 // CHECK4:       omp.inner.for.body:
2426 // CHECK4-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2427 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
2428 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2429 // CHECK4-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2430 // CHECK4-NEXT:    [[BLOCK_ISA:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 0
2431 // CHECK4-NEXT:    store ptr @_NSConcreteStackBlock, ptr [[BLOCK_ISA]], align 8
2432 // CHECK4-NEXT:    [[BLOCK_FLAGS:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 1
2433 // CHECK4-NEXT:    store i32 1073741824, ptr [[BLOCK_FLAGS]], align 8
2434 // CHECK4-NEXT:    [[BLOCK_RESERVED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 2
2435 // CHECK4-NEXT:    store i32 0, ptr [[BLOCK_RESERVED]], align 4
2436 // CHECK4-NEXT:    [[BLOCK_INVOKE:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 3
2437 // CHECK4-NEXT:    store ptr @g1_block_invoke_2, ptr [[BLOCK_INVOKE]], align 8
2438 // CHECK4-NEXT:    [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 4
2439 // CHECK4-NEXT:    store ptr @__block_descriptor_tmp.2, ptr [[BLOCK_DESCRIPTOR]], align 8
2440 // CHECK4-NEXT:    [[BLOCK_CAPTURED_THIS_ADDR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 5
2441 // CHECK4-NEXT:    store ptr [[TMP0]], ptr [[BLOCK_CAPTURED_THIS_ADDR]], align 8
2442 // CHECK4-NEXT:    [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 6
2443 // CHECK4-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[_TMP10]], align 8
2444 // CHECK4-NEXT:    store ptr [[TMP17]], ptr [[BLOCK_CAPTURED]], align 8
2445 // CHECK4-NEXT:    [[BLOCK_CAPTURED15:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 8
2446 // CHECK4-NEXT:    [[TMP18:%.*]] = load i32, ptr [[B11]], align 4
2447 // CHECK4-NEXT:    store i32 [[TMP18]], ptr [[BLOCK_CAPTURED15]], align 8
2448 // CHECK4-NEXT:    [[BLOCK_CAPTURED16:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 7
2449 // CHECK4-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[_TMP13]], align 8
2450 // CHECK4-NEXT:    store ptr [[TMP19]], ptr [[BLOCK_CAPTURED16]], align 8
2451 // CHECK4-NEXT:    [[TMP20:%.*]] = getelementptr inbounds nuw [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr [[BLOCK]], i32 0, i32 3
2452 // CHECK4-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[TMP20]], align 8
2453 // CHECK4-NEXT:    call void [[TMP21]](ptr noundef [[BLOCK]])
2454 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2455 // CHECK4:       omp.body.continue:
2456 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2457 // CHECK4:       omp.inner.for.inc:
2458 // CHECK4-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2459 // CHECK4-NEXT:    [[ADD17:%.*]] = add nsw i32 [[TMP22]], 1
2460 // CHECK4-NEXT:    store i32 [[ADD17]], ptr [[DOTOMP_IV]], align 4
2461 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
2462 // CHECK4:       omp.inner.for.end:
2463 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2464 // CHECK4:       omp.loop.exit:
2465 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP7]])
2466 // CHECK4-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2467 // CHECK4-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2468 // CHECK4-NEXT:    br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2469 // CHECK4:       .omp.lastprivate.then:
2470 // CHECK4-NEXT:    [[TMP25:%.*]] = load ptr, ptr [[_TMP10]], align 8
2471 // CHECK4-NEXT:    [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4
2472 // CHECK4-NEXT:    store i32 [[TMP26]], ptr [[TMP8]], align 4
2473 // CHECK4-NEXT:    [[TMP27:%.*]] = load i32, ptr [[B11]], align 4
2474 // CHECK4-NEXT:    store i32 [[TMP27]], ptr [[B]], align 4
2475 // CHECK4-NEXT:    [[TMP28:%.*]] = load ptr, ptr [[_TMP13]], align 8
2476 // CHECK4-NEXT:    [[TMP29:%.*]] = load i32, ptr [[TMP28]], align 4
2477 // CHECK4-NEXT:    store i32 [[TMP29]], ptr [[TMP9]], align 4
2478 // CHECK4-NEXT:    [[TMP30:%.*]] = load ptr, ptr [[_TMP8]], align 8
2479 // CHECK4-NEXT:    [[TMP31:%.*]] = load [4 x i8], ptr [[TMP30]], align 1
2480 // CHECK4-NEXT:    store [4 x i8] [[TMP31]], ptr [[TMP10]], align 1
2481 // CHECK4-NEXT:    [[TMP32:%.*]] = load i32, ptr [[B11]], align 4
2482 // CHECK4-NEXT:    [[B18:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 2
2483 // CHECK4-NEXT:    [[TMP33:%.*]] = trunc i32 [[TMP32]] to i8
2484 // CHECK4-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B18]], align 8
2485 // CHECK4-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP33]], 15
2486 // CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
2487 // CHECK4-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
2488 // CHECK4-NEXT:    store i8 [[BF_SET]], ptr [[B18]], align 8
2489 // CHECK4-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
2490 // CHECK4:       .omp.lastprivate.done:
2491 // CHECK4-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP7]])
2492 // CHECK4-NEXT:    ret void
2493 //
2494 //
2495 // CHECK4-LABEL: define {{[^@]+}}@g1_block_invoke_2
2496 // CHECK4-SAME: (ptr noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] {
2497 // CHECK4-NEXT:  entry:
2498 // CHECK4-NEXT:    [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca ptr, align 8
2499 // CHECK4-NEXT:    [[BLOCK_ADDR:%.*]] = alloca ptr, align 8
2500 // CHECK4-NEXT:    store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
2501 // CHECK4-NEXT:    store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[BLOCK_ADDR]], align 8
2502 // CHECK4-NEXT:    [[BLOCK_CAPTURED_THIS:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 5
2503 // CHECK4-NEXT:    [[THIS:%.*]] = load ptr, ptr [[BLOCK_CAPTURED_THIS]], align 8
2504 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 6
2505 // CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR]], align 8
2506 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2507 // CHECK4-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
2508 // CHECK4-NEXT:    store i32 [[INC]], ptr [[TMP0]], align 4
2509 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 8
2510 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, ptr [[BLOCK_CAPTURE_ADDR1]], align 8
2511 // CHECK4-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP2]], -1
2512 // CHECK4-NEXT:    store i32 [[DEC]], ptr [[BLOCK_CAPTURE_ADDR1]], align 8
2513 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 7
2514 // CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR2]], align 8
2515 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
2516 // CHECK4-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP4]], 1
2517 // CHECK4-NEXT:    store i32 [[DIV]], ptr [[TMP3]], align 4
2518 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR3:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 6
2519 // CHECK4-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR3]], align 8
2520 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR4:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 8
2521 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR5:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 7
2522 // CHECK4-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR5]], align 8
2523 // CHECK4-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @g1_block_invoke_2.omp_outlined, ptr [[THIS]], ptr [[TMP5]], ptr [[BLOCK_CAPTURE_ADDR4]], ptr [[TMP6]])
2524 // CHECK4-NEXT:    ret void
2525 //
2526 //
2527 // CHECK4-LABEL: define {{[^@]+}}@g1_block_invoke_2.omp_outlined
2528 // CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR3]] {
2529 // CHECK4-NEXT:  entry:
2530 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2531 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2532 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2533 // CHECK4-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
2534 // CHECK4-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 8
2535 // CHECK4-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 8
2536 // CHECK4-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
2537 // CHECK4-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
2538 // CHECK4-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 8
2539 // CHECK4-NEXT:    [[_TMP3:%.*]] = alloca ptr, align 8
2540 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2541 // CHECK4-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
2542 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2543 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2544 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2545 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2546 // CHECK4-NEXT:    [[A5:%.*]] = alloca i32, align 4
2547 // CHECK4-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 8
2548 // CHECK4-NEXT:    [[B7:%.*]] = alloca i32, align 4
2549 // CHECK4-NEXT:    [[C8:%.*]] = alloca i32, align 4
2550 // CHECK4-NEXT:    [[_TMP9:%.*]] = alloca ptr, align 8
2551 // CHECK4-NEXT:    [[I:%.*]] = alloca i32, align 4
2552 // CHECK4-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2553 // CHECK4-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2554 // CHECK4-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2555 // CHECK4-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
2556 // CHECK4-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 8
2557 // CHECK4-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 8
2558 // CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2559 // CHECK4-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
2560 // CHECK4-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8
2561 // CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8
2562 // CHECK4-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 8
2563 // CHECK4-NEXT:    store ptr [[TMP3]], ptr [[_TMP1]], align 8
2564 // CHECK4-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8
2565 // CHECK4-NEXT:    store ptr [[TMP4]], ptr [[_TMP2]], align 8
2566 // CHECK4-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 8
2567 // CHECK4-NEXT:    store ptr [[TMP5]], ptr [[_TMP3]], align 8
2568 // CHECK4-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2569 // CHECK4-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
2570 // CHECK4-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2571 // CHECK4-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2572 // CHECK4-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP2]], align 8
2573 // CHECK4-NEXT:    store ptr [[A5]], ptr [[_TMP6]], align 8
2574 // CHECK4-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[_TMP3]], align 8
2575 // CHECK4-NEXT:    store ptr [[C8]], ptr [[_TMP9]], align 8
2576 // CHECK4-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2577 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
2578 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2579 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2580 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 1
2581 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2582 // CHECK4:       cond.true:
2583 // CHECK4-NEXT:    br label [[COND_END:%.*]]
2584 // CHECK4:       cond.false:
2585 // CHECK4-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2586 // CHECK4-NEXT:    br label [[COND_END]]
2587 // CHECK4:       cond.end:
2588 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
2589 // CHECK4-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2590 // CHECK4-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2591 // CHECK4-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
2592 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2593 // CHECK4:       omp.inner.for.cond:
2594 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2595 // CHECK4-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2596 // CHECK4-NEXT:    [[CMP10:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
2597 // CHECK4-NEXT:    br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2598 // CHECK4:       omp.inner.for.body:
2599 // CHECK4-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2600 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
2601 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2602 // CHECK4-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2603 // CHECK4-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP6]], align 8
2604 // CHECK4-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 4
2605 // CHECK4-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP17]], 1
2606 // CHECK4-NEXT:    store i32 [[INC]], ptr [[TMP16]], align 4
2607 // CHECK4-NEXT:    [[TMP18:%.*]] = load i32, ptr [[B7]], align 4
2608 // CHECK4-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP18]], -1
2609 // CHECK4-NEXT:    store i32 [[DEC]], ptr [[B7]], align 4
2610 // CHECK4-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[_TMP9]], align 8
2611 // CHECK4-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
2612 // CHECK4-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP20]], 1
2613 // CHECK4-NEXT:    store i32 [[DIV]], ptr [[TMP19]], align 4
2614 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2615 // CHECK4:       omp.body.continue:
2616 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2617 // CHECK4:       omp.inner.for.inc:
2618 // CHECK4-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2619 // CHECK4-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP21]], 1
2620 // CHECK4-NEXT:    store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4
2621 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
2622 // CHECK4:       omp.inner.for.end:
2623 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2624 // CHECK4:       omp.loop.exit:
2625 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP9]])
2626 // CHECK4-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2627 // CHECK4-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
2628 // CHECK4-NEXT:    br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2629 // CHECK4:       .omp.lastprivate.then:
2630 // CHECK4-NEXT:    [[TMP24:%.*]] = load ptr, ptr [[_TMP6]], align 8
2631 // CHECK4-NEXT:    [[TMP25:%.*]] = load i32, ptr [[TMP24]], align 4
2632 // CHECK4-NEXT:    store i32 [[TMP25]], ptr [[TMP6]], align 4
2633 // CHECK4-NEXT:    [[TMP26:%.*]] = load i32, ptr [[B7]], align 4
2634 // CHECK4-NEXT:    store i32 [[TMP26]], ptr [[TMP2]], align 4
2635 // CHECK4-NEXT:    [[TMP27:%.*]] = load ptr, ptr [[_TMP9]], align 8
2636 // CHECK4-NEXT:    [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 4
2637 // CHECK4-NEXT:    store i32 [[TMP28]], ptr [[TMP7]], align 4
2638 // CHECK4-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
2639 // CHECK4:       .omp.lastprivate.done:
2640 // CHECK4-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP9]])
2641 // CHECK4-NEXT:    ret void
2642 //
2643 //
2644 // CHECK4-LABEL: define {{[^@]+}}@___ZN2SSC2ERi_block_invoke
2645 // CHECK4-SAME: (ptr noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] {
2646 // CHECK4-NEXT:  entry:
2647 // CHECK4-NEXT:    [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca ptr, align 8
2648 // CHECK4-NEXT:    [[BLOCK_ADDR:%.*]] = alloca ptr, align 8
2649 // CHECK4-NEXT:    store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
2650 // CHECK4-NEXT:    store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[BLOCK_ADDR]], align 8
2651 // CHECK4-NEXT:    [[BLOCK_CAPTURED_THIS:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 5
2652 // CHECK4-NEXT:    [[THIS:%.*]] = load ptr, ptr [[BLOCK_CAPTURED_THIS]], align 8
2653 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 6
2654 // CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR]], align 8
2655 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2656 // CHECK4-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
2657 // CHECK4-NEXT:    store i32 [[INC]], ptr [[TMP0]], align 4
2658 // CHECK4-NEXT:    [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS]], i32 0, i32 2
2659 // CHECK4-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 8
2660 // CHECK4-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD]], 4
2661 // CHECK4-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4
2662 // CHECK4-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32
2663 // CHECK4-NEXT:    [[DEC:%.*]] = add nsw i32 [[BF_CAST]], -1
2664 // CHECK4-NEXT:    [[TMP2:%.*]] = trunc i32 [[DEC]] to i8
2665 // CHECK4-NEXT:    [[BF_LOAD1:%.*]] = load i8, ptr [[B]], align 8
2666 // CHECK4-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP2]], 15
2667 // CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD1]], -16
2668 // CHECK4-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
2669 // CHECK4-NEXT:    store i8 [[BF_SET]], ptr [[B]], align 8
2670 // CHECK4-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4
2671 // CHECK4-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4
2672 // CHECK4-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32
2673 // CHECK4-NEXT:    [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS]], i32 0, i32 3
2674 // CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C]], align 8
2675 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
2676 // CHECK4-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP4]], 1
2677 // CHECK4-NEXT:    store i32 [[DIV]], ptr [[TMP3]], align 4
2678 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 6
2679 // CHECK4-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR2]], align 8
2680 // CHECK4-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @___ZN2SSC2ERi_block_invoke.omp_outlined, ptr [[THIS]], ptr [[TMP5]])
2681 // CHECK4-NEXT:    ret void
2682 //
2683 //
2684 // CHECK4-LABEL: define {{[^@]+}}@___ZN2SSC2ERi_block_invoke.omp_outlined
2685 // CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
2686 // CHECK4-NEXT:  entry:
2687 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2688 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2689 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2690 // CHECK4-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
2691 // CHECK4-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
2692 // CHECK4-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
2693 // CHECK4-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2694 // CHECK4-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
2695 // CHECK4-NEXT:    [[_TMP3:%.*]] = alloca ptr, align 8
2696 // CHECK4-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2697 // CHECK4-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2698 // CHECK4-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2699 // CHECK4-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2700 // CHECK4-NEXT:    [[C:%.*]] = alloca i32, align 4
2701 // CHECK4-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 8
2702 // CHECK4-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2703 // CHECK4-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2704 // CHECK4-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2705 // CHECK4-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
2706 // CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2707 // CHECK4-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
2708 // CHECK4-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 8
2709 // CHECK4-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8
2710 // CHECK4-NEXT:    store ptr [[TMP2]], ptr [[_TMP1]], align 8
2711 // CHECK4-NEXT:    store ptr [[_TMP2]], ptr [[_TMP3]], align 8
2712 // CHECK4-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2713 // CHECK4-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
2714 // CHECK4-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2715 // CHECK4-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2716 // CHECK4-NEXT:    store ptr [[C]], ptr [[_TMP4]], align 8
2717 // CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2718 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
2719 // CHECK4-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2720 // CHECK4-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2721 // CHECK4-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
2722 // CHECK4-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2723 // CHECK4:       cond.true:
2724 // CHECK4-NEXT:    br label [[COND_END:%.*]]
2725 // CHECK4:       cond.false:
2726 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2727 // CHECK4-NEXT:    br label [[COND_END]]
2728 // CHECK4:       cond.end:
2729 // CHECK4-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2730 // CHECK4-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2731 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2732 // CHECK4-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
2733 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2734 // CHECK4:       omp.inner.for.cond:
2735 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2736 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2737 // CHECK4-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2738 // CHECK4-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2739 // CHECK4:       omp.inner.for.body:
2740 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2741 // CHECK4-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2742 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2743 // CHECK4-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP4]], align 8
2744 // CHECK4-NEXT:    store i32 [[ADD]], ptr [[TMP11]], align 4
2745 // CHECK4-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[_TMP1]], align 8
2746 // CHECK4-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
2747 // CHECK4-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP13]], 1
2748 // CHECK4-NEXT:    store i32 [[INC]], ptr [[TMP12]], align 4
2749 // CHECK4-NEXT:    [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 2
2750 // CHECK4-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 8
2751 // CHECK4-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD]], 4
2752 // CHECK4-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4
2753 // CHECK4-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32
2754 // CHECK4-NEXT:    [[DEC:%.*]] = add nsw i32 [[BF_CAST]], -1
2755 // CHECK4-NEXT:    [[TMP14:%.*]] = trunc i32 [[DEC]] to i8
2756 // CHECK4-NEXT:    [[BF_LOAD6:%.*]] = load i8, ptr [[B]], align 8
2757 // CHECK4-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP14]], 15
2758 // CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD6]], -16
2759 // CHECK4-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
2760 // CHECK4-NEXT:    store i8 [[BF_SET]], ptr [[B]], align 8
2761 // CHECK4-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4
2762 // CHECK4-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4
2763 // CHECK4-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32
2764 // CHECK4-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[_TMP4]], align 8
2765 // CHECK4-NEXT:    [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4
2766 // CHECK4-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP16]], 1
2767 // CHECK4-NEXT:    store i32 [[DIV]], ptr [[TMP15]], align 4
2768 // CHECK4-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2769 // CHECK4:       omp.body.continue:
2770 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2771 // CHECK4:       omp.inner.for.inc:
2772 // CHECK4-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2773 // CHECK4-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP17]], 1
2774 // CHECK4-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
2775 // CHECK4-NEXT:    br label [[OMP_INNER_FOR_COND]]
2776 // CHECK4:       omp.inner.for.end:
2777 // CHECK4-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2778 // CHECK4:       omp.loop.exit:
2779 // CHECK4-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
2780 // CHECK4-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP4]])
2781 // CHECK4-NEXT:    ret void
2782 //
2783 //
2784 // CHECK5-LABEL: define {{[^@]+}}@main
2785 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
2786 // CHECK5-NEXT:  entry:
2787 // CHECK5-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2788 // CHECK5-NEXT:    [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
2789 // CHECK5-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2790 // CHECK5-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
2791 // CHECK5-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
2792 // CHECK5-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
2793 // CHECK5-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S]], align 4
2794 // CHECK5-NEXT:    store i32 0, ptr [[RETVAL]], align 4
2795 // CHECK5-NEXT:    call void @_ZN2SSC1ERi(ptr noundef nonnull align 8 dereferenceable(24) [[SS]], ptr noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar)
2796 // CHECK5-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
2797 // CHECK5-NEXT:    store i32 0, ptr [[T_VAR]], align 4
2798 // CHECK5-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)
2799 // CHECK5-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], float noundef 1.000000e+00)
2800 // CHECK5-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[S_ARR]], i64 1
2801 // CHECK5-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
2802 // CHECK5-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]], float noundef 3.000000e+00)
2803 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3:[0-9]+]], i32 5, ptr @main.omp_outlined, ptr [[T_VAR]], ptr [[VEC]], ptr [[S_ARR]], ptr [[VAR]], ptr @_ZZ4mainE5sivar)
2804 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 0, ptr @main.omp_outlined.1)
2805 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 0, ptr @main.omp_outlined.2)
2806 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 0, ptr @main.omp_outlined.3)
2807 // CHECK5-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
2808 // CHECK5-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
2809 // CHECK5-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4:[0-9]+]]
2810 // CHECK5-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
2811 // CHECK5-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
2812 // CHECK5-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2813 // CHECK5:       arraydestroy.body:
2814 // CHECK5-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP0]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2815 // CHECK5-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2816 // CHECK5-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2817 // CHECK5-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2818 // CHECK5-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
2819 // CHECK5:       arraydestroy.done1:
2820 // CHECK5-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2821 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, ptr [[RETVAL]], align 4
2822 // CHECK5-NEXT:    ret i32 [[TMP1]]
2823 //
2824 //
2825 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSC1ERi
2826 // CHECK5-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {
2827 // CHECK5-NEXT:  entry:
2828 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2829 // CHECK5-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 8
2830 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2831 // CHECK5-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 8
2832 // CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2833 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8
2834 // CHECK5-NEXT:    call void @_ZN2SSC2ERi(ptr noundef nonnull align 8 dereferenceable(24) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]])
2835 // CHECK5-NEXT:    ret void
2836 //
2837 //
2838 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
2839 // CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2840 // CHECK5-NEXT:  entry:
2841 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2842 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2843 // CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2844 // CHECK5-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
2845 // CHECK5-NEXT:    ret void
2846 //
2847 //
2848 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
2849 // CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2850 // CHECK5-NEXT:  entry:
2851 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2852 // CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
2853 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2854 // CHECK5-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
2855 // CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2856 // CHECK5-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
2857 // CHECK5-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
2858 // CHECK5-NEXT:    ret void
2859 //
2860 //
2861 // CHECK5-LABEL: define {{[^@]+}}@main.omp_outlined
2862 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SIVAR:%.*]]) #[[ATTR3:[0-9]+]] {
2863 // CHECK5-NEXT:  entry:
2864 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2865 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2866 // CHECK5-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 8
2867 // CHECK5-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8
2868 // CHECK5-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
2869 // CHECK5-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8
2870 // CHECK5-NEXT:    [[SIVAR_ADDR:%.*]] = alloca ptr, align 8
2871 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2872 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2873 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2874 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2875 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2876 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2877 // CHECK5-NEXT:    [[T_VAR1:%.*]] = alloca i32, align 4
2878 // CHECK5-NEXT:    [[VEC2:%.*]] = alloca [2 x i32], align 4
2879 // CHECK5-NEXT:    [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4
2880 // CHECK5-NEXT:    [[VAR4:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2881 // CHECK5-NEXT:    [[SIVAR5:%.*]] = alloca i32, align 4
2882 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2883 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2884 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2885 // CHECK5-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
2886 // CHECK5-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
2887 // CHECK5-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
2888 // CHECK5-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
2889 // CHECK5-NEXT:    store ptr [[SIVAR]], ptr [[SIVAR_ADDR]], align 8
2890 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8
2891 // CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
2892 // CHECK5-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
2893 // CHECK5-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
2894 // CHECK5-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[SIVAR_ADDR]], align 8
2895 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2896 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
2897 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2898 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2899 // CHECK5-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR3]], i32 0, i32 0
2900 // CHECK5-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
2901 // CHECK5-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
2902 // CHECK5:       arrayctor.loop:
2903 // CHECK5-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2904 // CHECK5-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2905 // CHECK5-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1
2906 // CHECK5-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2907 // CHECK5-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2908 // CHECK5:       arrayctor.cont:
2909 // CHECK5-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR4]])
2910 // CHECK5-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2911 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
2912 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2913 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2914 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP7]], 1
2915 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2916 // CHECK5:       cond.true:
2917 // CHECK5-NEXT:    br label [[COND_END:%.*]]
2918 // CHECK5:       cond.false:
2919 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2920 // CHECK5-NEXT:    br label [[COND_END]]
2921 // CHECK5:       cond.end:
2922 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
2923 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2924 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2925 // CHECK5-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
2926 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2927 // CHECK5:       omp.inner.for.cond:
2928 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2929 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2930 // CHECK5-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
2931 // CHECK5-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2932 // CHECK5:       omp.inner.for.cond.cleanup:
2933 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2934 // CHECK5:       omp.inner.for.body:
2935 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2936 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
2937 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2938 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2939 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[T_VAR1]], align 4
2940 // CHECK5-NEXT:    [[TMP14:%.*]] = load i32, ptr [[I]], align 4
2941 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64
2942 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC2]], i64 0, i64 [[IDXPROM]]
2943 // CHECK5-NEXT:    store i32 [[TMP13]], ptr [[ARRAYIDX]], align 4
2944 // CHECK5-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4
2945 // CHECK5-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP15]] to i64
2946 // CHECK5-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR3]], i64 0, i64 [[IDXPROM7]]
2947 // CHECK5-NEXT:    [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIfEaSERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYIDX8]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR4]])
2948 // CHECK5-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 4
2949 // CHECK5-NEXT:    [[TMP17:%.*]] = load i32, ptr [[SIVAR5]], align 4
2950 // CHECK5-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP17]], [[TMP16]]
2951 // CHECK5-NEXT:    store i32 [[ADD9]], ptr [[SIVAR5]], align 4
2952 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2953 // CHECK5:       omp.body.continue:
2954 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2955 // CHECK5:       omp.inner.for.inc:
2956 // CHECK5-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2957 // CHECK5-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP18]], 1
2958 // CHECK5-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4
2959 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
2960 // CHECK5:       omp.inner.for.end:
2961 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2962 // CHECK5:       omp.loop.exit:
2963 // CHECK5-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2964 // CHECK5-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
2965 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])
2966 // CHECK5-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2967 // CHECK5-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
2968 // CHECK5-NEXT:    br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2969 // CHECK5:       .omp.lastprivate.then:
2970 // CHECK5-NEXT:    [[TMP23:%.*]] = load i32, ptr [[T_VAR1]], align 4
2971 // CHECK5-NEXT:    store i32 [[TMP23]], ptr [[TMP0]], align 4
2972 // CHECK5-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP1]], ptr align 4 [[VEC2]], i64 8, i1 false)
2973 // CHECK5-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i32 0, i32 0
2974 // CHECK5-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i64 2
2975 // CHECK5-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP24]]
2976 // CHECK5-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2977 // CHECK5:       omp.arraycpy.body:
2978 // CHECK5-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR3]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2979 // CHECK5-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2980 // CHECK5-NEXT:    [[CALL12:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIfEaSERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]])
2981 // CHECK5-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2982 // CHECK5-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2983 // CHECK5-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP24]]
2984 // CHECK5-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
2985 // CHECK5:       omp.arraycpy.done13:
2986 // CHECK5-NEXT:    [[CALL14:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIfEaSERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[TMP3]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR4]])
2987 // CHECK5-NEXT:    [[TMP25:%.*]] = load i32, ptr [[SIVAR5]], align 4
2988 // CHECK5-NEXT:    store i32 [[TMP25]], ptr [[TMP4]], align 4
2989 // CHECK5-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
2990 // CHECK5:       .omp.lastprivate.done:
2991 // CHECK5-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR4]]) #[[ATTR4]]
2992 // CHECK5-NEXT:    [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR3]], i32 0, i32 0
2993 // CHECK5-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN15]], i64 2
2994 // CHECK5-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2995 // CHECK5:       arraydestroy.body:
2996 // CHECK5-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP26]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2997 // CHECK5-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2998 // CHECK5-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2999 // CHECK5-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]]
3000 // CHECK5-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]]
3001 // CHECK5:       arraydestroy.done16:
3002 // CHECK5-NEXT:    [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3003 // CHECK5-NEXT:    [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 4
3004 // CHECK5-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP28]])
3005 // CHECK5-NEXT:    ret void
3006 //
3007 //
3008 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
3009 // CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
3010 // CHECK5-NEXT:  entry:
3011 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3012 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3013 // CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3014 // CHECK5-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
3015 // CHECK5-NEXT:    ret void
3016 //
3017 //
3018 // CHECK5-LABEL: define {{[^@]+}}@main.omp_outlined.1
3019 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
3020 // CHECK5-NEXT:  entry:
3021 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3022 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3023 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3024 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3025 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3026 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3027 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3028 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3029 // CHECK5-NEXT:    [[F:%.*]] = alloca float, align 4
3030 // CHECK5-NEXT:    [[X:%.*]] = alloca double, align 8
3031 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3032 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3033 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3034 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3035 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
3036 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3037 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3038 // CHECK5-NEXT:    [[TMP0:%.*]] = load float, ptr @f, align 4
3039 // CHECK5-NEXT:    store float [[TMP0]], ptr [[F]], align 4
3040 // CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3041 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
3042 // CHECK5-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
3043 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3044 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3045 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
3046 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3047 // CHECK5:       cond.true:
3048 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3049 // CHECK5:       cond.false:
3050 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3051 // CHECK5-NEXT:    br label [[COND_END]]
3052 // CHECK5:       cond.end:
3053 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3054 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3055 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3056 // CHECK5-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
3057 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3058 // CHECK5:       omp.inner.for.cond:
3059 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3060 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3061 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3062 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3063 // CHECK5:       omp.inner.for.body:
3064 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3065 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
3066 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3067 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
3068 // CHECK5-NEXT:    [[TMP9:%.*]] = load double, ptr [[X]], align 8
3069 // CHECK5-NEXT:    [[INC:%.*]] = fadd double [[TMP9]], 1.000000e+00
3070 // CHECK5-NEXT:    store double [[INC]], ptr [[X]], align 8
3071 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3072 // CHECK5:       omp.body.continue:
3073 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3074 // CHECK5:       omp.inner.for.inc:
3075 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3076 // CHECK5-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
3077 // CHECK5-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
3078 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3079 // CHECK5:       omp.inner.for.end:
3080 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3081 // CHECK5:       omp.loop.exit:
3082 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
3083 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3084 // CHECK5-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3085 // CHECK5-NEXT:    br i1 [[TMP12]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
3086 // CHECK5:       .omp.lastprivate.then:
3087 // CHECK5-NEXT:    [[TMP13:%.*]] = load double, ptr [[X]], align 8
3088 // CHECK5-NEXT:    store double [[TMP13]], ptr @_ZN1A1xE, align 8
3089 // CHECK5-NEXT:    [[TMP14:%.*]] = load float, ptr [[F]], align 4
3090 // CHECK5-NEXT:    store float [[TMP14]], ptr @f, align 4
3091 // CHECK5-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
3092 // CHECK5:       .omp.lastprivate.done:
3093 // CHECK5-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP2]])
3094 // CHECK5-NEXT:    ret void
3095 //
3096 //
3097 // CHECK5-LABEL: define {{[^@]+}}@main.omp_outlined.2
3098 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
3099 // CHECK5-NEXT:  entry:
3100 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3101 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3102 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3103 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3104 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3105 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3106 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3107 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3108 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3109 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3110 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3111 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3112 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
3113 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3114 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3115 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3116 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3117 // CHECK5-NEXT:    [[DOTF__VOID_ADDR:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP1]], i64 4, ptr inttoptr (i64 3 to ptr))
3118 // CHECK5-NEXT:    [[TMP2:%.*]] = load float, ptr @f, align 4
3119 // CHECK5-NEXT:    store float [[TMP2]], ptr [[DOTF__VOID_ADDR]], align 4
3120 // CHECK5-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP1]])
3121 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3122 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3123 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
3124 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3125 // CHECK5:       cond.true:
3126 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3127 // CHECK5:       cond.false:
3128 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3129 // CHECK5-NEXT:    br label [[COND_END]]
3130 // CHECK5:       cond.end:
3131 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3132 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3133 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3134 // CHECK5-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
3135 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3136 // CHECK5:       omp.inner.for.cond:
3137 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3138 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3139 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3140 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3141 // CHECK5:       omp.inner.for.cond.cleanup:
3142 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
3143 // CHECK5:       omp.inner.for.body:
3144 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3145 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
3146 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3147 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
3148 // CHECK5-NEXT:    [[TMP9:%.*]] = load double, ptr @_ZN1A1xE, align 8
3149 // CHECK5-NEXT:    [[INC:%.*]] = fadd double [[TMP9]], 1.000000e+00
3150 // CHECK5-NEXT:    store double [[INC]], ptr @_ZN1A1xE, align 8
3151 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3152 // CHECK5:       omp.body.continue:
3153 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3154 // CHECK5:       omp.inner.for.inc:
3155 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3156 // CHECK5-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
3157 // CHECK5-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
3158 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3159 // CHECK5:       omp.inner.for.end:
3160 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3161 // CHECK5:       omp.loop.exit:
3162 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
3163 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3164 // CHECK5-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3165 // CHECK5-NEXT:    br i1 [[TMP12]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
3166 // CHECK5:       .omp.lastprivate.then:
3167 // CHECK5-NEXT:    [[TMP13:%.*]] = load float, ptr [[DOTF__VOID_ADDR]], align 4
3168 // CHECK5-NEXT:    store float [[TMP13]], ptr @f, align 4
3169 // CHECK5-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
3170 // CHECK5:       .omp.lastprivate.done:
3171 // CHECK5-NEXT:    call void @__kmpc_free(i32 [[TMP1]], ptr [[DOTF__VOID_ADDR]], ptr inttoptr (i64 3 to ptr))
3172 // CHECK5-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP1]])
3173 // CHECK5-NEXT:    ret void
3174 //
3175 //
3176 // CHECK5-LABEL: define {{[^@]+}}@main.omp_outlined.3
3177 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
3178 // CHECK5-NEXT:  entry:
3179 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3180 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3181 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3182 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i8, align 1
3183 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3184 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3185 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3186 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3187 // CHECK5-NEXT:    [[F:%.*]] = alloca [[STRUCT_LASPRIVATE_CONDITIONAL:%.*]], align 4
3188 // CHECK5-NEXT:    [[CNT:%.*]] = alloca i8, align 1
3189 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3190 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3191 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3192 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
3193 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3194 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3195 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3196 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3197 // CHECK5-NEXT:    [[DOTCNT__VOID_ADDR:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP1]], i64 1, ptr inttoptr (i64 3 to ptr))
3198 // CHECK5-NEXT:    [[TMP2:%.*]] = getelementptr inbounds nuw [[STRUCT_LASPRIVATE_CONDITIONAL]], ptr [[F]], i32 0, i32 1
3199 // CHECK5-NEXT:    store i8 0, ptr [[TMP2]], align 4
3200 // CHECK5-NEXT:    [[TMP3:%.*]] = getelementptr inbounds nuw [[STRUCT_LASPRIVATE_CONDITIONAL]], ptr [[F]], i32 0, i32 0
3201 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3202 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3203 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
3204 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3205 // CHECK5:       cond.true:
3206 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3207 // CHECK5:       cond.false:
3208 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3209 // CHECK5-NEXT:    br label [[COND_END]]
3210 // CHECK5:       cond.end:
3211 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3212 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3213 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3214 // CHECK5-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
3215 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3216 // CHECK5:       omp.inner.for.cond:
3217 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3218 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3219 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3220 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3221 // CHECK5:       omp.inner.for.cond.cleanup:
3222 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
3223 // CHECK5:       omp.inner.for.body:
3224 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3225 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3226 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3227 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i32 [[ADD]] to i8
3228 // CHECK5-NEXT:    store i8 [[CONV]], ptr [[DOTCNT__VOID_ADDR]], align 1
3229 // CHECK5-NEXT:    [[TMP10:%.*]] = load double, ptr @_ZN1A1xE, align 8
3230 // CHECK5-NEXT:    [[INC:%.*]] = fadd double [[TMP10]], 1.000000e+00
3231 // CHECK5-NEXT:    store double [[INC]], ptr @_ZN1A1xE, align 8
3232 // CHECK5-NEXT:    store float 0.000000e+00, ptr [[TMP3]], align 4
3233 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3234 // CHECK5-NEXT:    call void @__kmpc_critical(ptr @[[GLOB3]], i32 [[TMP1]], ptr @.gomp_critical_user_{{pl_cond[.].+[.|,]}}var)
3235 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr @.{{pl_cond[.].+[.|,]}} align 4
3236 // CHECK5-NEXT:    [[TMP13:%.*]] = icmp sle i32 [[TMP12]], [[TMP11]]
3237 // CHECK5-NEXT:    br i1 [[TMP13]], label [[LP_COND_THEN:%.*]], label [[LP_COND_EXIT:%.*]]
3238 // CHECK5:       lp_cond_then:
3239 // CHECK5-NEXT:    store i32 [[TMP11]], ptr @.{{pl_cond[.].+[.|,]}} align 4
3240 // CHECK5-NEXT:    [[TMP14:%.*]] = load float, ptr [[TMP3]], align 4
3241 // CHECK5-NEXT:    store float [[TMP14]], ptr @{{pl_cond[.].+[.|,]}} align 4
3242 // CHECK5-NEXT:    br label [[LP_COND_EXIT]]
3243 // CHECK5:       lp_cond_exit:
3244 // CHECK5-NEXT:    call void @__kmpc_end_critical(ptr @[[GLOB3]], i32 [[TMP1]], ptr @.gomp_critical_user_{{pl_cond[.].+[.|,]}}var)
3245 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3246 // CHECK5:       omp.body.continue:
3247 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3248 // CHECK5:       omp.inner.for.inc:
3249 // CHECK5-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3250 // CHECK5-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP15]], 1
3251 // CHECK5-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
3252 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3253 // CHECK5:       omp.inner.for.end:
3254 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3255 // CHECK5:       omp.loop.exit:
3256 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
3257 // CHECK5-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3258 // CHECK5-NEXT:    [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
3259 // CHECK5-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP1]])
3260 // CHECK5-NEXT:    br i1 [[TMP17]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
3261 // CHECK5:       .omp.lastprivate.then:
3262 // CHECK5-NEXT:    store i8 2, ptr [[DOTCNT__VOID_ADDR]], align 1
3263 // CHECK5-NEXT:    [[TMP18:%.*]] = load i8, ptr [[DOTCNT__VOID_ADDR]], align 1
3264 // CHECK5-NEXT:    store i8 [[TMP18]], ptr @cnt, align 1
3265 // CHECK5-NEXT:    [[TMP19:%.*]] = load float, ptr @{{pl_cond[.].+[.|,]}} align 4
3266 // CHECK5-NEXT:    store float [[TMP19]], ptr [[TMP3]], align 4
3267 // CHECK5-NEXT:    [[TMP20:%.*]] = load float, ptr [[TMP3]], align 4
3268 // CHECK5-NEXT:    store float [[TMP20]], ptr @f, align 4
3269 // CHECK5-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
3270 // CHECK5:       .omp.lastprivate.done:
3271 // CHECK5-NEXT:    call void @__kmpc_free(i32 [[TMP1]], ptr [[DOTCNT__VOID_ADDR]], ptr inttoptr (i64 3 to ptr))
3272 // CHECK5-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP1]])
3273 // CHECK5-NEXT:    ret void
3274 //
3275 //
3276 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
3277 // CHECK5-SAME: () #[[ATTR1]] {
3278 // CHECK5-NEXT:  entry:
3279 // CHECK5-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3280 // CHECK5-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
3281 // CHECK5-NEXT:    [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4
3282 // CHECK5-NEXT:    [[T_VAR:%.*]] = alloca i32, align 128
3283 // CHECK5-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 128
3284 // CHECK5-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 128
3285 // CHECK5-NEXT:    [[VAR:%.*]] = alloca ptr, align 128
3286 // CHECK5-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
3287 // CHECK5-NEXT:    call void @_ZN3SSTIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[SST]])
3288 // CHECK5-NEXT:    store i32 0, ptr [[T_VAR]], align 128
3289 // CHECK5-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 128 [[VEC]], ptr align 128 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)
3290 // CHECK5-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[S_ARR]], i32 noundef 1)
3291 // CHECK5-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[S_ARR]], i64 1
3292 // CHECK5-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)
3293 // CHECK5-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 128
3294 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 128
3295 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @_Z5tmainIiET_v.omp_outlined, ptr [[T_VAR]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP0]])
3296 // CHECK5-NEXT:    store i32 0, ptr [[RETVAL]], align 4
3297 // CHECK5-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
3298 // CHECK5-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
3299 // CHECK5-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
3300 // CHECK5:       arraydestroy.body:
3301 // CHECK5-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP1]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3302 // CHECK5-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
3303 // CHECK5-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3304 // CHECK5-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
3305 // CHECK5-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
3306 // CHECK5:       arraydestroy.done1:
3307 // CHECK5-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
3308 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[RETVAL]], align 4
3309 // CHECK5-NEXT:    ret i32 [[TMP2]]
3310 //
3311 //
3312 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSC2ERi
3313 // CHECK5-SAME: (ptr noundef nonnull align 8 dereferenceable(24) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
3314 // CHECK5-NEXT:  entry:
3315 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3316 // CHECK5-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 8
3317 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3318 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3319 // CHECK5-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 8
3320 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3321 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3322 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3323 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3324 // CHECK5-NEXT:    [[A3:%.*]] = alloca i32, align 4
3325 // CHECK5-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 8
3326 // CHECK5-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB3]])
3327 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3328 // CHECK5-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 8
3329 // CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3330 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0
3331 // CHECK5-NEXT:    store i32 0, ptr [[A]], align 8
3332 // CHECK5-NEXT:    [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 2
3333 // CHECK5-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 8
3334 // CHECK5-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
3335 // CHECK5-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
3336 // CHECK5-NEXT:    store i8 [[BF_SET]], ptr [[B]], align 8
3337 // CHECK5-NEXT:    [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 3
3338 // CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[D_ADDR]], align 8
3339 // CHECK5-NEXT:    store ptr [[TMP1]], ptr [[C]], align 8
3340 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 1, ptr @_ZN2SSC2ERi.omp_outlined, ptr [[THIS1]])
3341 // CHECK5-NEXT:    store ptr [[TMP]], ptr [[_TMP2]], align 8
3342 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3343 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
3344 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3345 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3346 // CHECK5-NEXT:    store ptr [[A3]], ptr [[_TMP4]], align 8
3347 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3348 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3349 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
3350 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3351 // CHECK5:       cond.true:
3352 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3353 // CHECK5:       cond.false:
3354 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3355 // CHECK5-NEXT:    br label [[COND_END]]
3356 // CHECK5:       cond.end:
3357 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
3358 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3359 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3360 // CHECK5-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
3361 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3362 // CHECK5:       omp.inner.for.cond:
3363 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3364 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3365 // CHECK5-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
3366 // CHECK5-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3367 // CHECK5:       omp.inner.for.body:
3368 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3369 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
3370 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3371 // CHECK5-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[_TMP4]], align 8
3372 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[TMP8]], align 4
3373 // CHECK5-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[_TMP4]], align 8
3374 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
3375 // CHECK5-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP10]], 1
3376 // CHECK5-NEXT:    store i32 [[INC]], ptr [[TMP9]], align 4
3377 // CHECK5-NEXT:    [[B6:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 2
3378 // CHECK5-NEXT:    [[BF_LOAD7:%.*]] = load i8, ptr [[B6]], align 8
3379 // CHECK5-NEXT:    [[BF_SHL:%.*]] = shl i8 [[BF_LOAD7]], 4
3380 // CHECK5-NEXT:    [[BF_ASHR:%.*]] = ashr i8 [[BF_SHL]], 4
3381 // CHECK5-NEXT:    [[BF_CAST:%.*]] = sext i8 [[BF_ASHR]] to i32
3382 // CHECK5-NEXT:    [[DEC:%.*]] = add nsw i32 [[BF_CAST]], -1
3383 // CHECK5-NEXT:    [[TMP11:%.*]] = trunc i32 [[DEC]] to i8
3384 // CHECK5-NEXT:    [[BF_LOAD8:%.*]] = load i8, ptr [[B6]], align 8
3385 // CHECK5-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP11]], 15
3386 // CHECK5-NEXT:    [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16
3387 // CHECK5-NEXT:    [[BF_SET10:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]]
3388 // CHECK5-NEXT:    store i8 [[BF_SET10]], ptr [[B6]], align 8
3389 // CHECK5-NEXT:    [[BF_RESULT_SHL:%.*]] = shl i8 [[BF_VALUE]], 4
3390 // CHECK5-NEXT:    [[BF_RESULT_ASHR:%.*]] = ashr i8 [[BF_RESULT_SHL]], 4
3391 // CHECK5-NEXT:    [[BF_RESULT_CAST:%.*]] = sext i8 [[BF_RESULT_ASHR]] to i32
3392 // CHECK5-NEXT:    [[C11:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 3
3393 // CHECK5-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[C11]], align 8
3394 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
3395 // CHECK5-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP13]], 1
3396 // CHECK5-NEXT:    store i32 [[DIV]], ptr [[TMP12]], align 4
3397 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3398 // CHECK5:       omp.body.continue:
3399 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3400 // CHECK5:       omp.inner.for.inc:
3401 // CHECK5-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3402 // CHECK5-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP14]], 1
3403 // CHECK5-NEXT:    store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4
3404 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3405 // CHECK5:       omp.inner.for.end:
3406 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3407 // CHECK5:       omp.loop.exit:
3408 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP0]])
3409 // CHECK5-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP0]])
3410 // CHECK5-NEXT:    ret void
3411 //
3412 //
3413 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined
3414 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR3]] {
3415 // CHECK5-NEXT:  entry:
3416 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3417 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3418 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3419 // CHECK5-NEXT:    [[E:%.*]] = alloca ptr, align 8
3420 // CHECK5-NEXT:    [[A:%.*]] = alloca ptr, align 8
3421 // CHECK5-NEXT:    [[B:%.*]] = alloca i32, align 4
3422 // CHECK5-NEXT:    [[C:%.*]] = alloca ptr, align 8
3423 // CHECK5-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
3424 // CHECK5-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 8
3425 // CHECK5-NEXT:    [[_TMP5:%.*]] = alloca ptr, align 8
3426 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3427 // CHECK5-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
3428 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3429 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3430 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3431 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3432 // CHECK5-NEXT:    [[E7:%.*]] = alloca [4 x i8], align 1
3433 // CHECK5-NEXT:    [[_TMP8:%.*]] = alloca ptr, align 8
3434 // CHECK5-NEXT:    [[A9:%.*]] = alloca i32, align 4
3435 // CHECK5-NEXT:    [[_TMP10:%.*]] = alloca ptr, align 8
3436 // CHECK5-NEXT:    [[B11:%.*]] = alloca i32, align 4
3437 // CHECK5-NEXT:    [[C12:%.*]] = alloca i32, align 4
3438 // CHECK5-NEXT:    [[_TMP13:%.*]] = alloca ptr, align 8
3439 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3440 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3441 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3442 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3443 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3444 // CHECK5-NEXT:    [[E1:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 1
3445 // CHECK5-NEXT:    store ptr [[E1]], ptr [[E]], align 8
3446 // CHECK5-NEXT:    [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 0
3447 // CHECK5-NEXT:    store ptr [[A2]], ptr [[A]], align 8
3448 // CHECK5-NEXT:    [[C3:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 3
3449 // CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[C3]], align 8
3450 // CHECK5-NEXT:    store ptr [[TMP1]], ptr [[C]], align 8
3451 // CHECK5-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A]], align 8
3452 // CHECK5-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 8
3453 // CHECK5-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C]], align 8
3454 // CHECK5-NEXT:    store ptr [[TMP3]], ptr [[_TMP4]], align 8
3455 // CHECK5-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[E]], align 8
3456 // CHECK5-NEXT:    store ptr [[TMP4]], ptr [[_TMP5]], align 8
3457 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3458 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
3459 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3460 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3461 // CHECK5-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP5]], align 8
3462 // CHECK5-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 1 [[E7]], ptr align 1 [[TMP5]], i64 4, i1 false)
3463 // CHECK5-NEXT:    store ptr [[E7]], ptr [[_TMP8]], align 8
3464 // CHECK5-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3465 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
3466 // CHECK5-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP7]])
3467 // CHECK5-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[TMP]], align 8
3468 // CHECK5-NEXT:    store ptr [[A9]], ptr [[_TMP10]], align 8
3469 // CHECK5-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[_TMP4]], align 8
3470 // CHECK5-NEXT:    store ptr [[C12]], ptr [[_TMP13]], align 8
3471 // CHECK5-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[_TMP5]], align 8
3472 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3473 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3474 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 1
3475 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3476 // CHECK5:       cond.true:
3477 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3478 // CHECK5:       cond.false:
3479 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3480 // CHECK5-NEXT:    br label [[COND_END]]
3481 // CHECK5:       cond.end:
3482 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
3483 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3484 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3485 // CHECK5-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
3486 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3487 // CHECK5:       omp.inner.for.cond:
3488 // CHECK5-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3489 // CHECK5-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3490 // CHECK5-NEXT:    [[CMP14:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
3491 // CHECK5-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3492 // CHECK5:       omp.inner.for.body:
3493 // CHECK5-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3494 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
3495 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3496 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
3497 // CHECK5-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[_TMP10]], align 8
3498 // CHECK5-NEXT:    [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 4
3499 // CHECK5-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP18]], 1
3500 // CHECK5-NEXT:    store i32 [[INC]], ptr [[TMP17]], align 4
3501 // CHECK5-NEXT:    [[TMP19:%.*]] = load i32, ptr [[B11]], align 4
3502 // CHECK5-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP19]], -1
3503 // CHECK5-NEXT:    store i32 [[DEC]], ptr [[B11]], align 4
3504 // CHECK5-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[_TMP13]], align 8
3505 // CHECK5-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
3506 // CHECK5-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP21]], 1
3507 // CHECK5-NEXT:    store i32 [[DIV]], ptr [[TMP20]], align 4
3508 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3509 // CHECK5:       omp.body.continue:
3510 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3511 // CHECK5:       omp.inner.for.inc:
3512 // CHECK5-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3513 // CHECK5-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP22]], 1
3514 // CHECK5-NEXT:    store i32 [[ADD15]], ptr [[DOTOMP_IV]], align 4
3515 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3516 // CHECK5:       omp.inner.for.end:
3517 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3518 // CHECK5:       omp.loop.exit:
3519 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP7]])
3520 // CHECK5-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3521 // CHECK5-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
3522 // CHECK5-NEXT:    br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
3523 // CHECK5:       .omp.lastprivate.then:
3524 // CHECK5-NEXT:    [[TMP25:%.*]] = load ptr, ptr [[_TMP10]], align 8
3525 // CHECK5-NEXT:    [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4
3526 // CHECK5-NEXT:    store i32 [[TMP26]], ptr [[TMP8]], align 4
3527 // CHECK5-NEXT:    [[TMP27:%.*]] = load i32, ptr [[B11]], align 4
3528 // CHECK5-NEXT:    store i32 [[TMP27]], ptr [[B]], align 4
3529 // CHECK5-NEXT:    [[TMP28:%.*]] = load ptr, ptr [[_TMP13]], align 8
3530 // CHECK5-NEXT:    [[TMP29:%.*]] = load i32, ptr [[TMP28]], align 4
3531 // CHECK5-NEXT:    store i32 [[TMP29]], ptr [[TMP9]], align 4
3532 // CHECK5-NEXT:    [[TMP30:%.*]] = load ptr, ptr [[_TMP8]], align 8
3533 // CHECK5-NEXT:    [[TMP31:%.*]] = load [4 x i8], ptr [[TMP30]], align 1
3534 // CHECK5-NEXT:    store [4 x i8] [[TMP31]], ptr [[TMP10]], align 1
3535 // CHECK5-NEXT:    [[TMP32:%.*]] = load i32, ptr [[B11]], align 4
3536 // CHECK5-NEXT:    [[B16:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 2
3537 // CHECK5-NEXT:    [[TMP33:%.*]] = trunc i32 [[TMP32]] to i8
3538 // CHECK5-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B16]], align 8
3539 // CHECK5-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP33]], 15
3540 // CHECK5-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
3541 // CHECK5-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
3542 // CHECK5-NEXT:    store i8 [[BF_SET]], ptr [[B16]], align 8
3543 // CHECK5-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
3544 // CHECK5:       .omp.lastprivate.done:
3545 // CHECK5-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP7]])
3546 // CHECK5-NEXT:    ret void
3547 //
3548 //
3549 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
3550 // CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
3551 // CHECK5-NEXT:  entry:
3552 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3553 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3554 // CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3555 // CHECK5-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
3556 // CHECK5-NEXT:    store float 0.000000e+00, ptr [[F]], align 4
3557 // CHECK5-NEXT:    ret void
3558 //
3559 //
3560 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
3561 // CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
3562 // CHECK5-NEXT:  entry:
3563 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3564 // CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
3565 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3566 // CHECK5-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
3567 // CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3568 // CHECK5-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
3569 // CHECK5-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
3570 // CHECK5-NEXT:    store float [[TMP0]], ptr [[F]], align 4
3571 // CHECK5-NEXT:    ret void
3572 //
3573 //
3574 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
3575 // CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
3576 // CHECK5-NEXT:  entry:
3577 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3578 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3579 // CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3580 // CHECK5-NEXT:    ret void
3581 //
3582 //
3583 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
3584 // CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
3585 // CHECK5-NEXT:  entry:
3586 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3587 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3588 // CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3589 // CHECK5-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
3590 // CHECK5-NEXT:    ret void
3591 //
3592 //
3593 // CHECK5-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev
3594 // CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
3595 // CHECK5-NEXT:  entry:
3596 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3597 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3598 // CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3599 // CHECK5-NEXT:    call void @_ZN3SSTIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
3600 // CHECK5-NEXT:    ret void
3601 //
3602 //
3603 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
3604 // CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
3605 // CHECK5-NEXT:  entry:
3606 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3607 // CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
3608 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3609 // CHECK5-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
3610 // CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3611 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
3612 // CHECK5-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
3613 // CHECK5-NEXT:    ret void
3614 //
3615 //
3616 // CHECK5-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined
3617 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
3618 // CHECK5-NEXT:  entry:
3619 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3620 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3621 // CHECK5-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 8
3622 // CHECK5-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8
3623 // CHECK5-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
3624 // CHECK5-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8
3625 // CHECK5-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
3626 // CHECK5-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
3627 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3628 // CHECK5-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
3629 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3630 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3631 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3632 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3633 // CHECK5-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 128
3634 // CHECK5-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 128
3635 // CHECK5-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 128
3636 // CHECK5-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 128
3637 // CHECK5-NEXT:    [[_TMP7:%.*]] = alloca ptr, align 8
3638 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3639 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3640 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3641 // CHECK5-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
3642 // CHECK5-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
3643 // CHECK5-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
3644 // CHECK5-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
3645 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8
3646 // CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
3647 // CHECK5-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
3648 // CHECK5-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
3649 // CHECK5-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 8
3650 // CHECK5-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8
3651 // CHECK5-NEXT:    store ptr [[TMP4]], ptr [[_TMP1]], align 8
3652 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3653 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
3654 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3655 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3656 // CHECK5-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0
3657 // CHECK5-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
3658 // CHECK5-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
3659 // CHECK5:       arrayctor.loop:
3660 // CHECK5-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3661 // CHECK5-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
3662 // CHECK5-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1
3663 // CHECK5-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3664 // CHECK5-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3665 // CHECK5:       arrayctor.cont:
3666 // CHECK5-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 8
3667 // CHECK5-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])
3668 // CHECK5-NEXT:    store ptr [[VAR6]], ptr [[_TMP7]], align 8
3669 // CHECK5-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3670 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
3671 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3672 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3673 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
3674 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3675 // CHECK5:       cond.true:
3676 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3677 // CHECK5:       cond.false:
3678 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3679 // CHECK5-NEXT:    br label [[COND_END]]
3680 // CHECK5:       cond.end:
3681 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
3682 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3683 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3684 // CHECK5-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4
3685 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3686 // CHECK5:       omp.inner.for.cond:
3687 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3688 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3689 // CHECK5-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
3690 // CHECK5-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3691 // CHECK5:       omp.inner.for.cond.cleanup:
3692 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
3693 // CHECK5:       omp.inner.for.body:
3694 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3695 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
3696 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3697 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
3698 // CHECK5-NEXT:    [[TMP14:%.*]] = load i32, ptr [[T_VAR3]], align 128
3699 // CHECK5-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4
3700 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
3701 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i64 0, i64 [[IDXPROM]]
3702 // CHECK5-NEXT:    store i32 [[TMP14]], ptr [[ARRAYIDX]], align 4
3703 // CHECK5-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP7]], align 8
3704 // CHECK5-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I]], align 4
3705 // CHECK5-NEXT:    [[IDXPROM9:%.*]] = sext i32 [[TMP17]] to i64
3706 // CHECK5-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i64 0, i64 [[IDXPROM9]]
3707 // CHECK5-NEXT:    [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIiEaSERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYIDX10]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP16]])
3708 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3709 // CHECK5:       omp.body.continue:
3710 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3711 // CHECK5:       omp.inner.for.inc:
3712 // CHECK5-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3713 // CHECK5-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP18]], 1
3714 // CHECK5-NEXT:    store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4
3715 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3716 // CHECK5:       omp.inner.for.end:
3717 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3718 // CHECK5:       omp.loop.exit:
3719 // CHECK5-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3720 // CHECK5-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
3721 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])
3722 // CHECK5-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3723 // CHECK5-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
3724 // CHECK5-NEXT:    br i1 [[TMP22]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
3725 // CHECK5:       .omp.lastprivate.then:
3726 // CHECK5-NEXT:    [[TMP23:%.*]] = load i32, ptr [[T_VAR3]], align 128
3727 // CHECK5-NEXT:    store i32 [[TMP23]], ptr [[TMP0]], align 128
3728 // CHECK5-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 128 [[TMP1]], ptr align 128 [[VEC4]], i64 8, i1 false)
3729 // CHECK5-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP2]], i32 0, i32 0
3730 // CHECK5-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i64 2
3731 // CHECK5-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN12]], [[TMP24]]
3732 // CHECK5-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3733 // CHECK5:       omp.arraycpy.body:
3734 // CHECK5-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3735 // CHECK5-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3736 // CHECK5-NEXT:    [[CALL13:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIiEaSERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]])
3737 // CHECK5-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3738 // CHECK5-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3739 // CHECK5-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP24]]
3740 // CHECK5-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]]
3741 // CHECK5:       omp.arraycpy.done14:
3742 // CHECK5-NEXT:    [[TMP25:%.*]] = load ptr, ptr [[_TMP7]], align 8
3743 // CHECK5-NEXT:    [[CALL15:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIiEaSERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[TMP5]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP25]])
3744 // CHECK5-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
3745 // CHECK5:       .omp.lastprivate.done:
3746 // CHECK5-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
3747 // CHECK5-NEXT:    [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0
3748 // CHECK5-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN16]], i64 2
3749 // CHECK5-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
3750 // CHECK5:       arraydestroy.body:
3751 // CHECK5-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP26]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3752 // CHECK5-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
3753 // CHECK5-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3754 // CHECK5-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN16]]
3755 // CHECK5-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE17:%.*]], label [[ARRAYDESTROY_BODY]]
3756 // CHECK5:       arraydestroy.done17:
3757 // CHECK5-NEXT:    [[TMP27:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3758 // CHECK5-NEXT:    [[TMP28:%.*]] = load i32, ptr [[TMP27]], align 4
3759 // CHECK5-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP28]])
3760 // CHECK5-NEXT:    ret void
3761 //
3762 //
3763 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
3764 // CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
3765 // CHECK5-NEXT:  entry:
3766 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3767 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3768 // CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3769 // CHECK5-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
3770 // CHECK5-NEXT:    ret void
3771 //
3772 //
3773 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
3774 // CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
3775 // CHECK5-NEXT:  entry:
3776 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3777 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3778 // CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3779 // CHECK5-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
3780 // CHECK5-NEXT:    store i32 0, ptr [[F]], align 4
3781 // CHECK5-NEXT:    ret void
3782 //
3783 //
3784 // CHECK5-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev
3785 // CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
3786 // CHECK5-NEXT:  entry:
3787 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3788 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3789 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3790 // CHECK5-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 8
3791 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3792 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3793 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3794 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3795 // CHECK5-NEXT:    [[A3:%.*]] = alloca i32, align 4
3796 // CHECK5-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 8
3797 // CHECK5-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB3]])
3798 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3799 // CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3800 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SST:%.*]], ptr [[THIS1]], i32 0, i32 0
3801 // CHECK5-NEXT:    store i32 0, ptr [[A]], align 4
3802 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 1, ptr @_ZN3SSTIiEC2Ev.omp_outlined, ptr [[THIS1]])
3803 // CHECK5-NEXT:    store ptr [[TMP]], ptr [[_TMP2]], align 8
3804 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3805 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
3806 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3807 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3808 // CHECK5-NEXT:    store ptr [[A3]], ptr [[_TMP4]], align 8
3809 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP0]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3810 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3811 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP1]], 1
3812 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3813 // CHECK5:       cond.true:
3814 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3815 // CHECK5:       cond.false:
3816 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3817 // CHECK5-NEXT:    br label [[COND_END]]
3818 // CHECK5:       cond.end:
3819 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP2]], [[COND_FALSE]] ]
3820 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3821 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3822 // CHECK5-NEXT:    store i32 [[TMP3]], ptr [[DOTOMP_IV]], align 4
3823 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3824 // CHECK5:       omp.inner.for.cond:
3825 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3826 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3827 // CHECK5-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP4]], [[TMP5]]
3828 // CHECK5-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3829 // CHECK5:       omp.inner.for.body:
3830 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3831 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP6]], 1
3832 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3833 // CHECK5-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[_TMP4]], align 8
3834 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[TMP7]], align 4
3835 // CHECK5-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[_TMP4]], align 8
3836 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
3837 // CHECK5-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP9]], 1
3838 // CHECK5-NEXT:    store i32 [[INC]], ptr [[TMP8]], align 4
3839 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3840 // CHECK5:       omp.body.continue:
3841 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3842 // CHECK5:       omp.inner.for.inc:
3843 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3844 // CHECK5-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP10]], 1
3845 // CHECK5-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
3846 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3847 // CHECK5:       omp.inner.for.end:
3848 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3849 // CHECK5:       omp.loop.exit:
3850 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP0]])
3851 // CHECK5-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP0]])
3852 // CHECK5-NEXT:    ret void
3853 //
3854 //
3855 // CHECK5-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev.omp_outlined
3856 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR3]] {
3857 // CHECK5-NEXT:  entry:
3858 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3859 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3860 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3861 // CHECK5-NEXT:    [[A:%.*]] = alloca ptr, align 8
3862 // CHECK5-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
3863 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3864 // CHECK5-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
3865 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3866 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3867 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3868 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3869 // CHECK5-NEXT:    [[A3:%.*]] = alloca i32, align 4
3870 // CHECK5-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 8
3871 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3872 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3873 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3874 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3875 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3876 // CHECK5-NEXT:    [[A1:%.*]] = getelementptr inbounds nuw [[STRUCT_SST:%.*]], ptr [[TMP0]], i32 0, i32 0
3877 // CHECK5-NEXT:    store ptr [[A1]], ptr [[A]], align 8
3878 // CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A]], align 8
3879 // CHECK5-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 8
3880 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3881 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
3882 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3883 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3884 // CHECK5-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8
3885 // CHECK5-NEXT:    store ptr [[A3]], ptr [[_TMP4]], align 8
3886 // CHECK5-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3887 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
3888 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3889 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3890 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
3891 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3892 // CHECK5:       cond.true:
3893 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3894 // CHECK5:       cond.false:
3895 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3896 // CHECK5-NEXT:    br label [[COND_END]]
3897 // CHECK5:       cond.end:
3898 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
3899 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3900 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3901 // CHECK5-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
3902 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3903 // CHECK5:       omp.inner.for.cond:
3904 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3905 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3906 // CHECK5-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3907 // CHECK5-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3908 // CHECK5:       omp.inner.for.body:
3909 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3910 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3911 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3912 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
3913 // CHECK5-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP4]], align 8
3914 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
3915 // CHECK5-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP12]], 1
3916 // CHECK5-NEXT:    store i32 [[INC]], ptr [[TMP11]], align 4
3917 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3918 // CHECK5:       omp.body.continue:
3919 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3920 // CHECK5:       omp.inner.for.inc:
3921 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3922 // CHECK5-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP13]], 1
3923 // CHECK5-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
3924 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3925 // CHECK5:       omp.inner.for.end:
3926 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3927 // CHECK5:       omp.loop.exit:
3928 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
3929 // CHECK5-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3930 // CHECK5-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
3931 // CHECK5-NEXT:    br i1 [[TMP15]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
3932 // CHECK5:       .omp.lastprivate.then:
3933 // CHECK5-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP4]], align 8
3934 // CHECK5-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP16]], align 4
3935 // CHECK5-NEXT:    store i32 [[TMP17]], ptr [[TMP2]], align 4
3936 // CHECK5-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
3937 // CHECK5:       .omp.lastprivate.done:
3938 // CHECK5-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2]], i32 [[TMP4]])
3939 // CHECK5-NEXT:    ret void
3940 //
3941 //
3942 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
3943 // CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
3944 // CHECK5-NEXT:  entry:
3945 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3946 // CHECK5-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
3947 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3948 // CHECK5-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
3949 // CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3950 // CHECK5-NEXT:    [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
3951 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
3952 // CHECK5-NEXT:    store i32 [[TMP0]], ptr [[F]], align 4
3953 // CHECK5-NEXT:    ret void
3954 //
3955 //
3956 // CHECK5-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
3957 // CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
3958 // CHECK5-NEXT:  entry:
3959 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3960 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3961 // CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3962 // CHECK5-NEXT:    ret void
3963 //