?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
[clang] Implement lifetime analysis for lifetime_capture_by(X) (#115921)
[llvm-project.git] / clang / test / OpenMP / for_linear_codegen.cpp
blob5a21fe8509fd366daa60fbaa5cd24dc5a49e42e5
1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s
4 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
5 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -verify -fopenmp -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK4
7
8 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
9 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s
10 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
11 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
12 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
13 // expected-no-diagnostics
14 #ifndef HEADER
15 #define HEADER
16
17 enum omp_allocator_handle_t {
18 omp_null_allocator = 0,
19 omp_default_mem_alloc = 1,
20 omp_large_cap_mem_alloc = 2,
21 omp_const_mem_alloc = 3,
22 omp_high_bw_mem_alloc = 4,
23 omp_low_lat_mem_alloc = 5,
24 omp_cgroup_mem_alloc = 6,
25 omp_pteam_mem_alloc = 7,
26 omp_thread_mem_alloc = 8,
27 KMP_ALLOCATOR_MAX_HANDLE = __UINTPTR_MAX__
28 };
29
30 template <class T>
31 struct S {
32 T f;
33 S(T a) : f(a) {}
34 S() : f() {}
35 S<T> &operator=(const S<T> &);
36 operator T() { return T(); }
37 ~S() {}
38 };
39
40 volatile int g = 1212;
41 volatile int &g1 = g;
42 float f;
43 char cnt;
44
45 struct SS {
46 int a;
47 int b : 4;
48 int &c;
49 SS(int &d) : a(0), b(0), c(d) {
50 #pragma omp parallel
51 #pragma omp for linear(a, b, c)
52 for (int i = 0; i < 2; ++i)
53 #ifdef LAMBDA
54 [&]() {
55 ++this->a, --b, (this)->c /= 1;
56 #pragma omp parallel
57 #pragma omp for linear(a, b) linear(ref(c))
58 for (int i = 0; i < 2; ++i)
59 ++(this)->a, --b, this->c /= 1;
60 }();
61 #elif defined(BLOCKS)
62 ^{
63 ++a;
64 --this->b;
65 (this)->c /= 1;
66 #pragma omp parallel
67 #pragma omp for linear(a, b) linear(uval(c))
68 for (int i = 0; i < 2; ++i)
69 ++(this)->a, --b, this->c /= 1;
70 }();
71 #else
72 ++this->a, --b, c /= 1;
73 #endif
74 }
75 };
76
77 template <typename T>
78 struct SST {
79 T a;
80 SST() : a(T()) {
81 #pragma omp parallel
82 #pragma omp for linear(a)
83 for (int i = 0; i < 2; ++i)
84 #ifdef LAMBDA
85 [&]() {
86 [&]() {
87 ++this->a;
88 #pragma omp parallel
89 #pragma omp for linear(a)
90 for (int i = 0; i < 2; ++i)
91 ++(this)->a;
92 }();
93 }();
94 #elif defined(BLOCKS)
95 ^{
96 ^{
97 ++a;
98 #pragma omp parallel
99 #pragma omp for linear(a)
100 for (int i = 0; i < 2; ++i)
101 ++(this)->a;
102 }();
103 }();
104 #else
105 ++(this)->a;
106 #endif
107 }
108 };
109
110 template <typename T>
111 T tmain() {
112 S<T> test;
113 SST<T> sst;
114 T *pvar = &test.f;
115 T &lvar = test.f;
116 #pragma omp parallel
117 #pragma omp for linear(pvar, lvar)
118 for (int i = 0; i < 2; ++i) {
119 ++pvar, ++lvar;
120 }
121 return T();
122 }
123
124 int main() {
125 static int sivar;
126 SS ss(sivar);
127 #ifdef LAMBDA
128 [&]() {
129 #pragma omp parallel
130 #pragma omp for linear(g, g1:5)
131 for (int i = 0; i < 2; ++i) {
132
133
134
135 g += 5;
136 g1 += 5;
137 [&]() {
138 g = 2;
139 g1 = 2;
140 }();
141 }
142 }();
143 return 0;
144 #elif defined(BLOCKS)
145 ^{
146 #pragma omp parallel
147 #pragma omp for linear(g, g1:5)
148 for (int i = 0; i < 2; ++i) {
149 g += 5;
150 g1 += 5;
151 g = 1;
152 g1 = 5;
153 ^{
154 g = 2;
155 g1 = 2;
156 }();
157 }
158 }();
159 return 0;
160
161
162 #else
163 S<float> test;
164 float *pvar = &test.f;
165 long long lvar = 0;
166 #pragma omp parallel
167 #pragma omp for linear(pvar, lvar : 3) allocate(omp_low_lat_mem_alloc: lvar)
168 for (int i = 0; i < 2; ++i) {
169 pvar += 3, lvar += 3;
170 }
171 return tmain<int>();
172 #endif
173 }
174
175
176
177 // Check for default initialization.
178
179
180
181
182
183 // Check for default initialization.
184
185 #endif
186
187 // CHECK1-LABEL: define {{[^@]+}}@main
188 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
189 // CHECK1-NEXT: entry:
190 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
191 // CHECK1-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
192 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
193 // CHECK1-NEXT: [[PVAR:%.*]] = alloca ptr, align 8
194 // CHECK1-NEXT: [[LVAR:%.*]] = alloca i64, align 8
195 // CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4
196 // CHECK1-NEXT: call void @_ZN2SSC1ERi(ptr noundef nonnull align 8 dereferenceable(16) [[SS]], ptr noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar)
197 // CHECK1-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
198 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S]], ptr [[TEST]], i32 0, i32 0
199 // CHECK1-NEXT: store ptr [[F]], ptr [[PVAR]], align 8
200 // CHECK1-NEXT: store i64 0, ptr [[LVAR]], align 8
201 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3:[0-9]+]], i32 2, ptr @main.omp_outlined, ptr [[PVAR]], ptr [[LVAR]])
202 // CHECK1-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
203 // CHECK1-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4
204 // CHECK1-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4:[0-9]+]]
205 // CHECK1-NEXT: [[TMP0:%.*]] = load i32, ptr [[RETVAL]], align 4
206 // CHECK1-NEXT: ret i32 [[TMP0]]
207 //
208 //
209 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC1ERi
210 // CHECK1-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {
211 // CHECK1-NEXT: entry:
212 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
213 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8
214 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
215 // CHECK1-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
216 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
217 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8
218 // CHECK1-NEXT: call void @_ZN2SSC2ERi(ptr noundef nonnull align 8 dereferenceable(16) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]])
219 // CHECK1-NEXT: ret void
220 //
221 //
222 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
223 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
224 // CHECK1-NEXT: entry:
225 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
226 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
227 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
228 // CHECK1-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
229 // CHECK1-NEXT: ret void
230 //
231 //
232 // CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
233 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[PVAR:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[LVAR:%.*]]) #[[ATTR2:[0-9]+]] {
234 // CHECK1-NEXT: entry:
235 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
236 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
237 // CHECK1-NEXT: [[PVAR_ADDR:%.*]] = alloca ptr, align 8
238 // CHECK1-NEXT: [[LVAR_ADDR:%.*]] = alloca ptr, align 8
239 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
240 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
241 // CHECK1-NEXT: [[DOTLINEAR_START:%.*]] = alloca ptr, align 8
242 // CHECK1-NEXT: [[DOTLINEAR_START1:%.*]] = alloca i64, align 8
243 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
244 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
245 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
246 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
247 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
248 // CHECK1-NEXT: [[PVAR2:%.*]] = alloca ptr, align 8
249 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
250 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
251 // CHECK1-NEXT: store ptr [[PVAR]], ptr [[PVAR_ADDR]], align 8
252 // CHECK1-NEXT: store ptr [[LVAR]], ptr [[LVAR_ADDR]], align 8
253 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PVAR_ADDR]], align 8
254 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[LVAR_ADDR]], align 8
255 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP0]], align 8
256 // CHECK1-NEXT: store ptr [[TMP2]], ptr [[DOTLINEAR_START]], align 8
257 // CHECK1-NEXT: [[TMP3:%.*]] = load i64, ptr [[TMP1]], align 8
258 // CHECK1-NEXT: store i64 [[TMP3]], ptr [[DOTLINEAR_START1]], align 8
259 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
260 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4
261 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
262 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
263 // CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
264 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
265 // CHECK1-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1:[0-9]+]], i32 [[TMP5]])
266 // CHECK1-NEXT: [[DOTLVAR__VOID_ADDR:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP5]], i64 8, ptr inttoptr (i64 5 to ptr))
267 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
268 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
269 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1
270 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
271 // CHECK1: cond.true:
272 // CHECK1-NEXT: br label [[COND_END:%.*]]
273 // CHECK1: cond.false:
274 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
275 // CHECK1-NEXT: br label [[COND_END]]
276 // CHECK1: cond.end:
277 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
278 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
279 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
280 // CHECK1-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
281 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
282 // CHECK1: omp.inner.for.cond:
283 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
284 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
285 // CHECK1-NEXT: [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
286 // CHECK1-NEXT: br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
287 // CHECK1: omp.inner.for.cond.cleanup:
288 // CHECK1-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
289 // CHECK1: omp.inner.for.body:
290 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
291 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
292 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
293 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4
294 // CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTLINEAR_START]], align 8
295 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
296 // CHECK1-NEXT: [[MUL4:%.*]] = mul nsw i32 [[TMP13]], 3
297 // CHECK1-NEXT: [[IDX_EXT:%.*]] = sext i32 [[MUL4]] to i64
298 // CHECK1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds float, ptr [[TMP12]], i64 [[IDX_EXT]]
299 // CHECK1-NEXT: store ptr [[ADD_PTR]], ptr [[PVAR2]], align 8
300 // CHECK1-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTLINEAR_START1]], align 8
301 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
302 // CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP15]], 3
303 // CHECK1-NEXT: [[CONV:%.*]] = sext i32 [[MUL5]] to i64
304 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i64 [[TMP14]], [[CONV]]
305 // CHECK1-NEXT: store i64 [[ADD6]], ptr [[DOTLVAR__VOID_ADDR]], align 8
306 // CHECK1-NEXT: [[TMP16:%.*]] = load ptr, ptr [[PVAR2]], align 8
307 // CHECK1-NEXT: [[ADD_PTR7:%.*]] = getelementptr inbounds float, ptr [[TMP16]], i64 3
308 // CHECK1-NEXT: store ptr [[ADD_PTR7]], ptr [[PVAR2]], align 8
309 // CHECK1-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTLVAR__VOID_ADDR]], align 8
310 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i64 [[TMP17]], 3
311 // CHECK1-NEXT: store i64 [[ADD8]], ptr [[DOTLVAR__VOID_ADDR]], align 8
312 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
313 // CHECK1: omp.body.continue:
314 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
315 // CHECK1: omp.inner.for.inc:
316 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
317 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP18]], 1
318 // CHECK1-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4
319 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
320 // CHECK1: omp.inner.for.end:
321 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
322 // CHECK1: omp.loop.exit:
323 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP5]])
324 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
325 // CHECK1-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
326 // CHECK1-NEXT: br i1 [[TMP20]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
327 // CHECK1: .omp.linear.pu:
328 // CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[PVAR2]], align 8
329 // CHECK1-NEXT: store ptr [[TMP21]], ptr [[TMP0]], align 8
330 // CHECK1-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTLVAR__VOID_ADDR]], align 8
331 // CHECK1-NEXT: store i64 [[TMP22]], ptr [[TMP1]], align 8
332 // CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
333 // CHECK1: .omp.linear.pu.done:
334 // CHECK1-NEXT: call void @__kmpc_free(i32 [[TMP5]], ptr [[DOTLVAR__VOID_ADDR]], ptr inttoptr (i64 5 to ptr))
335 // CHECK1-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP5]])
336 // CHECK1-NEXT: ret void
337 //
338 //
339 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
340 // CHECK1-SAME: () #[[ATTR1]] {
341 // CHECK1-NEXT: entry:
342 // CHECK1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
343 // CHECK1-NEXT: [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4
344 // CHECK1-NEXT: [[PVAR:%.*]] = alloca ptr, align 8
345 // CHECK1-NEXT: [[LVAR:%.*]] = alloca ptr, align 8
346 // CHECK1-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
347 // CHECK1-NEXT: call void @_ZN3SSTIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[SST]])
348 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0]], ptr [[TEST]], i32 0, i32 0
349 // CHECK1-NEXT: store ptr [[F]], ptr [[PVAR]], align 8
350 // CHECK1-NEXT: [[F1:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0]], ptr [[TEST]], i32 0, i32 0
351 // CHECK1-NEXT: store ptr [[F1]], ptr [[LVAR]], align 8
352 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[LVAR]], align 8
353 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @_Z5tmainIiET_v.omp_outlined, ptr [[PVAR]], ptr [[TMP0]])
354 // CHECK1-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
355 // CHECK1-NEXT: ret i32 0
356 //
357 //
358 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
359 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
360 // CHECK1-NEXT: entry:
361 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
362 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
363 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
364 // CHECK1-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
365 // CHECK1-NEXT: ret void
366 //
367 //
368 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC2ERi
369 // CHECK1-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
370 // CHECK1-NEXT: entry:
371 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
372 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8
373 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
374 // CHECK1-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
375 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
376 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0
377 // CHECK1-NEXT: store i32 0, ptr [[A]], align 8
378 // CHECK1-NEXT: [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 1
379 // CHECK1-NEXT: [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 4
380 // CHECK1-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
381 // CHECK1-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
382 // CHECK1-NEXT: store i8 [[BF_SET]], ptr [[B]], align 4
383 // CHECK1-NEXT: [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 2
384 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8
385 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[C]], align 8
386 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 1, ptr @_ZN2SSC2ERi.omp_outlined, ptr [[THIS1]])
387 // CHECK1-NEXT: ret void
388 //
389 //
390 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined
391 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
392 // CHECK1-NEXT: entry:
393 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
394 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
395 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
396 // CHECK1-NEXT: [[A:%.*]] = alloca ptr, align 8
397 // CHECK1-NEXT: [[B:%.*]] = alloca i32, align 4
398 // CHECK1-NEXT: [[C:%.*]] = alloca ptr, align 8
399 // CHECK1-NEXT: [[TMP:%.*]] = alloca ptr, align 8
400 // CHECK1-NEXT: [[_TMP3:%.*]] = alloca ptr, align 8
401 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
402 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
403 // CHECK1-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
404 // CHECK1-NEXT: [[DOTLINEAR_START5:%.*]] = alloca i32, align 4
405 // CHECK1-NEXT: [[DOTLINEAR_START6:%.*]] = alloca i32, align 4
406 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
407 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
408 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
409 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
410 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
411 // CHECK1-NEXT: [[A7:%.*]] = alloca i32, align 4
412 // CHECK1-NEXT: [[_TMP8:%.*]] = alloca ptr, align 8
413 // CHECK1-NEXT: [[B9:%.*]] = alloca i32, align 4
414 // CHECK1-NEXT: [[C10:%.*]] = alloca i32, align 4
415 // CHECK1-NEXT: [[_TMP11:%.*]] = alloca ptr, align 8
416 // CHECK1-NEXT: [[_TMP20:%.*]] = alloca ptr, align 8
417 // CHECK1-NEXT: [[_TMP21:%.*]] = alloca ptr, align 8
418 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
419 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
420 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
421 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
422 // CHECK1-NEXT: [[A1:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
423 // CHECK1-NEXT: store ptr [[A1]], ptr [[A]], align 8
424 // CHECK1-NEXT: [[C2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 2
425 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[C2]], align 8
426 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[C]], align 8
427 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A]], align 8
428 // CHECK1-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8
429 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C]], align 8
430 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[_TMP3]], align 8
431 // CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8
432 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
433 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTLINEAR_START]], align 4
434 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[B]], align 4
435 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTLINEAR_START5]], align 4
436 // CHECK1-NEXT: [[TMP7:%.*]] = load ptr, ptr [[_TMP3]], align 8
437 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
438 // CHECK1-NEXT: store i32 [[TMP8]], ptr [[DOTLINEAR_START6]], align 4
439 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
440 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4
441 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
442 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
443 // CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
444 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
445 // CHECK1-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP10]])
446 // CHECK1-NEXT: store ptr [[A7]], ptr [[_TMP8]], align 8
447 // CHECK1-NEXT: store ptr [[C10]], ptr [[_TMP11]], align 8
448 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
449 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
450 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 1
451 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
452 // CHECK1: cond.true:
453 // CHECK1-NEXT: br label [[COND_END:%.*]]
454 // CHECK1: cond.false:
455 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
456 // CHECK1-NEXT: br label [[COND_END]]
457 // CHECK1: cond.end:
458 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
459 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
460 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
461 // CHECK1-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
462 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
463 // CHECK1: omp.inner.for.cond:
464 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
465 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
466 // CHECK1-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
467 // CHECK1-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
468 // CHECK1: omp.inner.for.body:
469 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
470 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
471 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
472 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4
473 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTLINEAR_START]], align 4
474 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
475 // CHECK1-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP18]], 1
476 // CHECK1-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP17]], [[MUL13]]
477 // CHECK1-NEXT: store i32 [[ADD14]], ptr [[A7]], align 4
478 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTLINEAR_START5]], align 4
479 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
480 // CHECK1-NEXT: [[MUL15:%.*]] = mul nsw i32 [[TMP20]], 1
481 // CHECK1-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP19]], [[MUL15]]
482 // CHECK1-NEXT: store i32 [[ADD16]], ptr [[B9]], align 4
483 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTLINEAR_START6]], align 4
484 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
485 // CHECK1-NEXT: [[MUL17:%.*]] = mul nsw i32 [[TMP22]], 1
486 // CHECK1-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP21]], [[MUL17]]
487 // CHECK1-NEXT: store i32 [[ADD18]], ptr [[C10]], align 4
488 // CHECK1-NEXT: [[TMP23:%.*]] = load ptr, ptr [[_TMP8]], align 8
489 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4
490 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP24]], 1
491 // CHECK1-NEXT: store i32 [[INC]], ptr [[TMP23]], align 4
492 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, ptr [[B9]], align 4
493 // CHECK1-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP25]], -1
494 // CHECK1-NEXT: store i32 [[DEC]], ptr [[B9]], align 4
495 // CHECK1-NEXT: [[TMP26:%.*]] = load ptr, ptr [[_TMP11]], align 8
496 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, ptr [[TMP26]], align 4
497 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP27]], 1
498 // CHECK1-NEXT: store i32 [[DIV]], ptr [[TMP26]], align 4
499 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
500 // CHECK1: omp.body.continue:
501 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
502 // CHECK1: omp.inner.for.inc:
503 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
504 // CHECK1-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP28]], 1
505 // CHECK1-NEXT: store i32 [[ADD19]], ptr [[DOTOMP_IV]], align 4
506 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
507 // CHECK1: omp.inner.for.end:
508 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
509 // CHECK1: omp.loop.exit:
510 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP10]])
511 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
512 // CHECK1-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
513 // CHECK1-NEXT: br i1 [[TMP30]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
514 // CHECK1: .omp.linear.pu:
515 // CHECK1-NEXT: [[TMP31:%.*]] = load ptr, ptr [[TMP]], align 8
516 // CHECK1-NEXT: store ptr [[TMP31]], ptr [[_TMP20]], align 8
517 // CHECK1-NEXT: [[TMP32:%.*]] = load i32, ptr [[A7]], align 4
518 // CHECK1-NEXT: [[TMP33:%.*]] = load ptr, ptr [[_TMP20]], align 8
519 // CHECK1-NEXT: store i32 [[TMP32]], ptr [[TMP33]], align 4
520 // CHECK1-NEXT: [[TMP34:%.*]] = load i32, ptr [[B9]], align 4
521 // CHECK1-NEXT: store i32 [[TMP34]], ptr [[B]], align 4
522 // CHECK1-NEXT: [[TMP35:%.*]] = load ptr, ptr [[_TMP3]], align 8
523 // CHECK1-NEXT: store ptr [[TMP35]], ptr [[_TMP21]], align 8
524 // CHECK1-NEXT: [[TMP36:%.*]] = load i32, ptr [[C10]], align 4
525 // CHECK1-NEXT: [[TMP37:%.*]] = load ptr, ptr [[_TMP21]], align 8
526 // CHECK1-NEXT: store i32 [[TMP36]], ptr [[TMP37]], align 4
527 // CHECK1-NEXT: [[TMP38:%.*]] = load i32, ptr [[B]], align 4
528 // CHECK1-NEXT: [[B22:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 1
529 // CHECK1-NEXT: [[TMP39:%.*]] = trunc i32 [[TMP38]] to i8
530 // CHECK1-NEXT: [[BF_LOAD:%.*]] = load i8, ptr [[B22]], align 4
531 // CHECK1-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP39]], 15
532 // CHECK1-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
533 // CHECK1-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
534 // CHECK1-NEXT: store i8 [[BF_SET]], ptr [[B22]], align 4
535 // CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
536 // CHECK1: .omp.linear.pu.done:
537 // CHECK1-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP10]])
538 // CHECK1-NEXT: ret void
539 //
540 //
541 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
542 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
543 // CHECK1-NEXT: entry:
544 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
545 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
546 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
547 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
548 // CHECK1-NEXT: store float 0.000000e+00, ptr [[F]], align 4
549 // CHECK1-NEXT: ret void
550 //
551 //
552 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
553 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
554 // CHECK1-NEXT: entry:
555 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
556 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
557 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
558 // CHECK1-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
559 // CHECK1-NEXT: ret void
560 //
561 //
562 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev
563 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
564 // CHECK1-NEXT: entry:
565 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
566 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
567 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
568 // CHECK1-NEXT: call void @_ZN3SSTIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
569 // CHECK1-NEXT: ret void
570 //
571 //
572 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined
573 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[PVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[LVAR:%.*]]) #[[ATTR2]] {
574 // CHECK1-NEXT: entry:
575 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
576 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
577 // CHECK1-NEXT: [[PVAR_ADDR:%.*]] = alloca ptr, align 8
578 // CHECK1-NEXT: [[LVAR_ADDR:%.*]] = alloca ptr, align 8
579 // CHECK1-NEXT: [[TMP:%.*]] = alloca ptr, align 8
580 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8
581 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
582 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
583 // CHECK1-NEXT: [[DOTLINEAR_START:%.*]] = alloca ptr, align 8
584 // CHECK1-NEXT: [[DOTLINEAR_START3:%.*]] = alloca i32, align 4
585 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
586 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
587 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
588 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
589 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
590 // CHECK1-NEXT: [[PVAR4:%.*]] = alloca ptr, align 8
591 // CHECK1-NEXT: [[LVAR5:%.*]] = alloca i32, align 4
592 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca ptr, align 8
593 // CHECK1-NEXT: [[_TMP12:%.*]] = alloca ptr, align 8
594 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
595 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
596 // CHECK1-NEXT: store ptr [[PVAR]], ptr [[PVAR_ADDR]], align 8
597 // CHECK1-NEXT: store ptr [[LVAR]], ptr [[LVAR_ADDR]], align 8
598 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[PVAR_ADDR]], align 8
599 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[LVAR_ADDR]], align 8
600 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 8
601 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8
602 // CHECK1-NEXT: store ptr [[TMP2]], ptr [[_TMP1]], align 8
603 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP0]], align 8
604 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[DOTLINEAR_START]], align 8
605 // CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[_TMP1]], align 8
606 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
607 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTLINEAR_START3]], align 4
608 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
609 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4
610 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
611 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
612 // CHECK1-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
613 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
614 // CHECK1-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP7]])
615 // CHECK1-NEXT: store ptr [[LVAR5]], ptr [[_TMP6]], align 8
616 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP7]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
617 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
618 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
619 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
620 // CHECK1: cond.true:
621 // CHECK1-NEXT: br label [[COND_END:%.*]]
622 // CHECK1: cond.false:
623 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
624 // CHECK1-NEXT: br label [[COND_END]]
625 // CHECK1: cond.end:
626 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
627 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
628 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
629 // CHECK1-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4
630 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
631 // CHECK1: omp.inner.for.cond:
632 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
633 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
634 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
635 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
636 // CHECK1: omp.inner.for.body:
637 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
638 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
639 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
640 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4
641 // CHECK1-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTLINEAR_START]], align 8
642 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
643 // CHECK1-NEXT: [[MUL8:%.*]] = mul nsw i32 [[TMP15]], 1
644 // CHECK1-NEXT: [[IDX_EXT:%.*]] = sext i32 [[MUL8]] to i64
645 // CHECK1-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, ptr [[TMP14]], i64 [[IDX_EXT]]
646 // CHECK1-NEXT: store ptr [[ADD_PTR]], ptr [[PVAR4]], align 8
647 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTLINEAR_START3]], align 4
648 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
649 // CHECK1-NEXT: [[MUL9:%.*]] = mul nsw i32 [[TMP17]], 1
650 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP16]], [[MUL9]]
651 // CHECK1-NEXT: store i32 [[ADD10]], ptr [[LVAR5]], align 4
652 // CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[PVAR4]], align 8
653 // CHECK1-NEXT: [[INCDEC_PTR:%.*]] = getelementptr inbounds nuw i32, ptr [[TMP18]], i32 1
654 // CHECK1-NEXT: store ptr [[INCDEC_PTR]], ptr [[PVAR4]], align 8
655 // CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[_TMP6]], align 8
656 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
657 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP20]], 1
658 // CHECK1-NEXT: store i32 [[INC]], ptr [[TMP19]], align 4
659 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
660 // CHECK1: omp.body.continue:
661 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
662 // CHECK1: omp.inner.for.inc:
663 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
664 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP21]], 1
665 // CHECK1-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4
666 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
667 // CHECK1: omp.inner.for.end:
668 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
669 // CHECK1: omp.loop.exit:
670 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP7]])
671 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
672 // CHECK1-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
673 // CHECK1-NEXT: br i1 [[TMP23]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
674 // CHECK1: .omp.linear.pu:
675 // CHECK1-NEXT: [[TMP24:%.*]] = load ptr, ptr [[PVAR4]], align 8
676 // CHECK1-NEXT: store ptr [[TMP24]], ptr [[TMP0]], align 8
677 // CHECK1-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP1]], align 8
678 // CHECK1-NEXT: store ptr [[TMP25]], ptr [[_TMP12]], align 8
679 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, ptr [[LVAR5]], align 4
680 // CHECK1-NEXT: [[TMP27:%.*]] = load ptr, ptr [[_TMP12]], align 8
681 // CHECK1-NEXT: store i32 [[TMP26]], ptr [[TMP27]], align 4
682 // CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
683 // CHECK1: .omp.linear.pu.done:
684 // CHECK1-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP7]])
685 // CHECK1-NEXT: ret void
686 //
687 //
688 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
689 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
690 // CHECK1-NEXT: entry:
691 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
692 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
693 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
694 // CHECK1-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
695 // CHECK1-NEXT: ret void
696 //
697 //
698 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
699 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
700 // CHECK1-NEXT: entry:
701 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
702 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
703 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
704 // CHECK1-NEXT: [[F:%.*]] = getelementptr inbounds nuw [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
705 // CHECK1-NEXT: store i32 0, ptr [[F]], align 4
706 // CHECK1-NEXT: ret void
707 //
708 //
709 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev
710 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
711 // CHECK1-NEXT: entry:
712 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
713 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
714 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
715 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SST:%.*]], ptr [[THIS1]], i32 0, i32 0
716 // CHECK1-NEXT: store i32 0, ptr [[A]], align 4
717 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 1, ptr @_ZN3SSTIiEC2Ev.omp_outlined, ptr [[THIS1]])
718 // CHECK1-NEXT: ret void
719 //
720 //
721 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev.omp_outlined
722 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
723 // CHECK1-NEXT: entry:
724 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
725 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
726 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
727 // CHECK1-NEXT: [[A:%.*]] = alloca ptr, align 8
728 // CHECK1-NEXT: [[TMP:%.*]] = alloca ptr, align 8
729 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
730 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
731 // CHECK1-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
732 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
733 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
734 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
735 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
736 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
737 // CHECK1-NEXT: [[A3:%.*]] = alloca i32, align 4
738 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca ptr, align 8
739 // CHECK1-NEXT: [[_TMP9:%.*]] = alloca ptr, align 8
740 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
741 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
742 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
743 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
744 // CHECK1-NEXT: [[A1:%.*]] = getelementptr inbounds nuw [[STRUCT_SST:%.*]], ptr [[TMP0]], i32 0, i32 0
745 // CHECK1-NEXT: store ptr [[A1]], ptr [[A]], align 8
746 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A]], align 8
747 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 8
748 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8
749 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
750 // CHECK1-NEXT: store i32 [[TMP3]], ptr [[DOTLINEAR_START]], align 4
751 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
752 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4
753 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
754 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
755 // CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
756 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
757 // CHECK1-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP5]])
758 // CHECK1-NEXT: store ptr [[A3]], ptr [[_TMP4]], align 8
759 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP5]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
760 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
761 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1
762 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
763 // CHECK1: cond.true:
764 // CHECK1-NEXT: br label [[COND_END:%.*]]
765 // CHECK1: cond.false:
766 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
767 // CHECK1-NEXT: br label [[COND_END]]
768 // CHECK1: cond.end:
769 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
770 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
771 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
772 // CHECK1-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
773 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
774 // CHECK1: omp.inner.for.cond:
775 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
776 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
777 // CHECK1-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
778 // CHECK1-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
779 // CHECK1: omp.inner.for.body:
780 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
781 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
782 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
783 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4
784 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTLINEAR_START]], align 4
785 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
786 // CHECK1-NEXT: [[MUL6:%.*]] = mul nsw i32 [[TMP13]], 1
787 // CHECK1-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP12]], [[MUL6]]
788 // CHECK1-NEXT: store i32 [[ADD7]], ptr [[A3]], align 4
789 // CHECK1-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP4]], align 8
790 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4
791 // CHECK1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP15]], 1
792 // CHECK1-NEXT: store i32 [[INC]], ptr [[TMP14]], align 4
793 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
794 // CHECK1: omp.body.continue:
795 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
796 // CHECK1: omp.inner.for.inc:
797 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
798 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP16]], 1
799 // CHECK1-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4
800 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
801 // CHECK1: omp.inner.for.end:
802 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
803 // CHECK1: omp.loop.exit:
804 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP5]])
805 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
806 // CHECK1-NEXT: [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
807 // CHECK1-NEXT: br i1 [[TMP18]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
808 // CHECK1: .omp.linear.pu:
809 // CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[TMP]], align 8
810 // CHECK1-NEXT: store ptr [[TMP19]], ptr [[_TMP9]], align 8
811 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[A3]], align 4
812 // CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[_TMP9]], align 8
813 // CHECK1-NEXT: store i32 [[TMP20]], ptr [[TMP21]], align 4
814 // CHECK1-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
815 // CHECK1: .omp.linear.pu.done:
816 // CHECK1-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP5]])
817 // CHECK1-NEXT: ret void
818 //
819 //
820 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
821 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
822 // CHECK1-NEXT: entry:
823 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
824 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
825 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
826 // CHECK1-NEXT: ret void
827 //
828 //
829 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
830 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
831 // CHECK1-NEXT: entry:
832 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
833 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
834 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
835 // CHECK1-NEXT: ret void
836 //
837 //
838 // CHECK3-LABEL: define {{[^@]+}}@main
839 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
840 // CHECK3-NEXT: entry:
841 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
842 // CHECK3-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
843 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
844 // CHECK3-NEXT: store i32 0, ptr [[RETVAL]], align 4
845 // CHECK3-NEXT: call void @_ZN2SSC1ERi(ptr noundef nonnull align 8 dereferenceable(16) [[SS]], ptr noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar)
846 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])
847 // CHECK3-NEXT: ret i32 0
848 //
849 //
850 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC1ERi
851 // CHECK3-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {
852 // CHECK3-NEXT: entry:
853 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
854 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8
855 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
856 // CHECK3-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
857 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
858 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8
859 // CHECK3-NEXT: call void @_ZN2SSC2ERi(ptr noundef nonnull align 8 dereferenceable(16) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]])
860 // CHECK3-NEXT: ret void
861 //
862 //
863 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC2ERi
864 // CHECK3-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
865 // CHECK3-NEXT: entry:
866 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
867 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8
868 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
869 // CHECK3-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
870 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
871 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0
872 // CHECK3-NEXT: store i32 0, ptr [[A]], align 8
873 // CHECK3-NEXT: [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 1
874 // CHECK3-NEXT: [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 4
875 // CHECK3-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
876 // CHECK3-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
877 // CHECK3-NEXT: store i8 [[BF_SET]], ptr [[B]], align 4
878 // CHECK3-NEXT: [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 2
879 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8
880 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[C]], align 8
881 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3:[0-9]+]], i32 1, ptr @_ZN2SSC2ERi.omp_outlined, ptr [[THIS1]])
882 // CHECK3-NEXT: ret void
883 //
884 //
885 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined
886 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2:[0-9]+]] {
887 // CHECK3-NEXT: entry:
888 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
889 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
890 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
891 // CHECK3-NEXT: [[A:%.*]] = alloca ptr, align 8
892 // CHECK3-NEXT: [[B:%.*]] = alloca i32, align 4
893 // CHECK3-NEXT: [[C:%.*]] = alloca ptr, align 8
894 // CHECK3-NEXT: [[TMP:%.*]] = alloca ptr, align 8
895 // CHECK3-NEXT: [[_TMP3:%.*]] = alloca ptr, align 8
896 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
897 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
898 // CHECK3-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
899 // CHECK3-NEXT: [[DOTLINEAR_START5:%.*]] = alloca i32, align 4
900 // CHECK3-NEXT: [[DOTLINEAR_START6:%.*]] = alloca i32, align 4
901 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
902 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
903 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
904 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
905 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
906 // CHECK3-NEXT: [[A7:%.*]] = alloca i32, align 4
907 // CHECK3-NEXT: [[_TMP8:%.*]] = alloca ptr, align 8
908 // CHECK3-NEXT: [[B9:%.*]] = alloca i32, align 4
909 // CHECK3-NEXT: [[C10:%.*]] = alloca i32, align 4
910 // CHECK3-NEXT: [[_TMP11:%.*]] = alloca ptr, align 8
911 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
912 // CHECK3-NEXT: [[_TMP20:%.*]] = alloca ptr, align 8
913 // CHECK3-NEXT: [[_TMP21:%.*]] = alloca ptr, align 8
914 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
915 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
916 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
917 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
918 // CHECK3-NEXT: [[A1:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
919 // CHECK3-NEXT: store ptr [[A1]], ptr [[A]], align 8
920 // CHECK3-NEXT: [[C2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 2
921 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[C2]], align 8
922 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[C]], align 8
923 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A]], align 8
924 // CHECK3-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8
925 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C]], align 8
926 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[_TMP3]], align 8
927 // CHECK3-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8
928 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
929 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTLINEAR_START]], align 4
930 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[B]], align 4
931 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTLINEAR_START5]], align 4
932 // CHECK3-NEXT: [[TMP7:%.*]] = load ptr, ptr [[_TMP3]], align 8
933 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
934 // CHECK3-NEXT: store i32 [[TMP8]], ptr [[DOTLINEAR_START6]], align 4
935 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
936 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4
937 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
938 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
939 // CHECK3-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
940 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
941 // CHECK3-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1:[0-9]+]], i32 [[TMP10]])
942 // CHECK3-NEXT: store ptr [[A7]], ptr [[_TMP8]], align 8
943 // CHECK3-NEXT: store ptr [[C10]], ptr [[_TMP11]], align 8
944 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
945 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
946 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 1
947 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
948 // CHECK3: cond.true:
949 // CHECK3-NEXT: br label [[COND_END:%.*]]
950 // CHECK3: cond.false:
951 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
952 // CHECK3-NEXT: br label [[COND_END]]
953 // CHECK3: cond.end:
954 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
955 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
956 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
957 // CHECK3-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
958 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
959 // CHECK3: omp.inner.for.cond:
960 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
961 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
962 // CHECK3-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
963 // CHECK3-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
964 // CHECK3: omp.inner.for.body:
965 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
966 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
967 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
968 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4
969 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTLINEAR_START]], align 4
970 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
971 // CHECK3-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP18]], 1
972 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP17]], [[MUL13]]
973 // CHECK3-NEXT: store i32 [[ADD14]], ptr [[A7]], align 4
974 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTLINEAR_START5]], align 4
975 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
976 // CHECK3-NEXT: [[MUL15:%.*]] = mul nsw i32 [[TMP20]], 1
977 // CHECK3-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP19]], [[MUL15]]
978 // CHECK3-NEXT: store i32 [[ADD16]], ptr [[B9]], align 4
979 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTLINEAR_START6]], align 4
980 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
981 // CHECK3-NEXT: [[MUL17:%.*]] = mul nsw i32 [[TMP22]], 1
982 // CHECK3-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP21]], [[MUL17]]
983 // CHECK3-NEXT: store i32 [[ADD18]], ptr [[C10]], align 4
984 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0
985 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[TMP23]], align 8
986 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1
987 // CHECK3-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP8]], align 8
988 // CHECK3-NEXT: store ptr [[TMP25]], ptr [[TMP24]], align 8
989 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2
990 // CHECK3-NEXT: store ptr [[B9]], ptr [[TMP26]], align 8
991 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3
992 // CHECK3-NEXT: [[TMP28:%.*]] = load ptr, ptr [[_TMP11]], align 8
993 // CHECK3-NEXT: store ptr [[TMP28]], ptr [[TMP27]], align 8
994 // CHECK3-NEXT: call void @_ZZN2SSC1ERiENKUlvE_clEv(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]])
995 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
996 // CHECK3: omp.body.continue:
997 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
998 // CHECK3: omp.inner.for.inc:
999 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1000 // CHECK3-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP29]], 1
1001 // CHECK3-NEXT: store i32 [[ADD19]], ptr [[DOTOMP_IV]], align 4
1002 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
1003 // CHECK3: omp.inner.for.end:
1004 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1005 // CHECK3: omp.loop.exit:
1006 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP10]])
1007 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1008 // CHECK3-NEXT: [[TMP31:%.*]] = icmp ne i32 [[TMP30]], 0
1009 // CHECK3-NEXT: br i1 [[TMP31]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
1010 // CHECK3: .omp.linear.pu:
1011 // CHECK3-NEXT: [[TMP32:%.*]] = load ptr, ptr [[TMP]], align 8
1012 // CHECK3-NEXT: store ptr [[TMP32]], ptr [[_TMP20]], align 8
1013 // CHECK3-NEXT: [[TMP33:%.*]] = load i32, ptr [[A7]], align 4
1014 // CHECK3-NEXT: [[TMP34:%.*]] = load ptr, ptr [[_TMP20]], align 8
1015 // CHECK3-NEXT: store i32 [[TMP33]], ptr [[TMP34]], align 4
1016 // CHECK3-NEXT: [[TMP35:%.*]] = load i32, ptr [[B9]], align 4
1017 // CHECK3-NEXT: store i32 [[TMP35]], ptr [[B]], align 4
1018 // CHECK3-NEXT: [[TMP36:%.*]] = load ptr, ptr [[_TMP3]], align 8
1019 // CHECK3-NEXT: store ptr [[TMP36]], ptr [[_TMP21]], align 8
1020 // CHECK3-NEXT: [[TMP37:%.*]] = load i32, ptr [[C10]], align 4
1021 // CHECK3-NEXT: [[TMP38:%.*]] = load ptr, ptr [[_TMP21]], align 8
1022 // CHECK3-NEXT: store i32 [[TMP37]], ptr [[TMP38]], align 4
1023 // CHECK3-NEXT: [[TMP39:%.*]] = load i32, ptr [[B]], align 4
1024 // CHECK3-NEXT: [[B22:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 1
1025 // CHECK3-NEXT: [[TMP40:%.*]] = trunc i32 [[TMP39]] to i8
1026 // CHECK3-NEXT: [[BF_LOAD:%.*]] = load i8, ptr [[B22]], align 4
1027 // CHECK3-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP40]], 15
1028 // CHECK3-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
1029 // CHECK3-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
1030 // CHECK3-NEXT: store i8 [[BF_SET]], ptr [[B22]], align 4
1031 // CHECK3-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
1032 // CHECK3: .omp.linear.pu.done:
1033 // CHECK3-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP10]])
1034 // CHECK3-NEXT: ret void
1035 //
1036 //
1037 // CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv
1038 // CHECK3-SAME: (ptr noundef nonnull align 8 dereferenceable(32) [[THIS:%.*]]) #[[ATTR1]] align 2 {
1039 // CHECK3-NEXT: entry:
1040 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1041 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1042 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1043 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0:%.*]], ptr [[THIS1]], i32 0, i32 0
1044 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[TMP0]], align 8
1045 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 1
1046 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP2]], align 8
1047 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
1048 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP4]], 1
1049 // CHECK3-NEXT: store i32 [[INC]], ptr [[TMP3]], align 4
1050 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 2
1051 // CHECK3-NEXT: [[TMP6:%.*]] = load ptr, ptr [[TMP5]], align 8
1052 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
1053 // CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP7]], -1
1054 // CHECK3-NEXT: store i32 [[DEC]], ptr [[TMP6]], align 4
1055 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 3
1056 // CHECK3-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8
1057 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
1058 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP10]], 1
1059 // CHECK3-NEXT: store i32 [[DIV]], ptr [[TMP9]], align 4
1060 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 1
1061 // CHECK3-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8
1062 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 2
1063 // CHECK3-NEXT: [[TMP14:%.*]] = load ptr, ptr [[TMP13]], align 8
1064 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 3
1065 // CHECK3-NEXT: [[TMP16:%.*]] = load ptr, ptr [[TMP15]], align 8
1066 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @_ZZN2SSC1ERiENKUlvE_clEv.omp_outlined, ptr [[TMP1]], ptr [[TMP12]], ptr [[TMP14]], ptr [[TMP16]])
1067 // CHECK3-NEXT: ret void
1068 //
1069 //
1070 // CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv.omp_outlined
1071 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] {
1072 // CHECK3-NEXT: entry:
1073 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1074 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1075 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1076 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
1077 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
1078 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
1079 // CHECK3-NEXT: [[TMP:%.*]] = alloca ptr, align 8
1080 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8
1081 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca ptr, align 8
1082 // CHECK3-NEXT: [[_TMP3:%.*]] = alloca ptr, align 8
1083 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1084 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
1085 // CHECK3-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
1086 // CHECK3-NEXT: [[DOTLINEAR_START5:%.*]] = alloca i32, align 4
1087 // CHECK3-NEXT: [[DOTLINEAR_START6:%.*]] = alloca i32, align 4
1088 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1089 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1090 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1091 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1092 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1093 // CHECK3-NEXT: [[A7:%.*]] = alloca i32, align 4
1094 // CHECK3-NEXT: [[_TMP8:%.*]] = alloca ptr, align 8
1095 // CHECK3-NEXT: [[B9:%.*]] = alloca i32, align 4
1096 // CHECK3-NEXT: [[C10:%.*]] = alloca i32, align 4
1097 // CHECK3-NEXT: [[_TMP11:%.*]] = alloca ptr, align 8
1098 // CHECK3-NEXT: [[_TMP20:%.*]] = alloca ptr, align 8
1099 // CHECK3-NEXT: [[_TMP21:%.*]] = alloca ptr, align 8
1100 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1101 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1102 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1103 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
1104 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
1105 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
1106 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1107 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1108 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8
1109 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8
1110 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 8
1111 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[_TMP1]], align 8
1112 // CHECK3-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8
1113 // CHECK3-NEXT: store ptr [[TMP4]], ptr [[_TMP2]], align 8
1114 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 8
1115 // CHECK3-NEXT: store ptr [[TMP5]], ptr [[_TMP3]], align 8
1116 // CHECK3-NEXT: [[TMP6:%.*]] = load ptr, ptr [[_TMP2]], align 8
1117 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
1118 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTLINEAR_START]], align 4
1119 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP2]], align 4
1120 // CHECK3-NEXT: store i32 [[TMP8]], ptr [[DOTLINEAR_START5]], align 4
1121 // CHECK3-NEXT: [[TMP9:%.*]] = load ptr, ptr [[_TMP3]], align 8
1122 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
1123 // CHECK3-NEXT: store i32 [[TMP10]], ptr [[DOTLINEAR_START6]], align 4
1124 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1125 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4
1126 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1127 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1128 // CHECK3-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1129 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
1130 // CHECK3-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP12]])
1131 // CHECK3-NEXT: store ptr [[A7]], ptr [[_TMP8]], align 8
1132 // CHECK3-NEXT: store ptr [[C10]], ptr [[_TMP11]], align 8
1133 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP12]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1134 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1135 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 1
1136 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1137 // CHECK3: cond.true:
1138 // CHECK3-NEXT: br label [[COND_END:%.*]]
1139 // CHECK3: cond.false:
1140 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1141 // CHECK3-NEXT: br label [[COND_END]]
1142 // CHECK3: cond.end:
1143 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
1144 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1145 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1146 // CHECK3-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4
1147 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1148 // CHECK3: omp.inner.for.cond:
1149 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1150 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1151 // CHECK3-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
1152 // CHECK3-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1153 // CHECK3: omp.inner.for.body:
1154 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1155 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
1156 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1157 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4
1158 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTLINEAR_START]], align 4
1159 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1160 // CHECK3-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP20]], 1
1161 // CHECK3-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP19]], [[MUL13]]
1162 // CHECK3-NEXT: store i32 [[ADD14]], ptr [[A7]], align 4
1163 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTLINEAR_START5]], align 4
1164 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1165 // CHECK3-NEXT: [[MUL15:%.*]] = mul nsw i32 [[TMP22]], 1
1166 // CHECK3-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP21]], [[MUL15]]
1167 // CHECK3-NEXT: store i32 [[ADD16]], ptr [[B9]], align 4
1168 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTLINEAR_START6]], align 4
1169 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1170 // CHECK3-NEXT: [[MUL17:%.*]] = mul nsw i32 [[TMP24]], 1
1171 // CHECK3-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP23]], [[MUL17]]
1172 // CHECK3-NEXT: store i32 [[ADD18]], ptr [[C10]], align 4
1173 // CHECK3-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP8]], align 8
1174 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4
1175 // CHECK3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP26]], 1
1176 // CHECK3-NEXT: store i32 [[INC]], ptr [[TMP25]], align 4
1177 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, ptr [[B9]], align 4
1178 // CHECK3-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP27]], -1
1179 // CHECK3-NEXT: store i32 [[DEC]], ptr [[B9]], align 4
1180 // CHECK3-NEXT: [[TMP28:%.*]] = load ptr, ptr [[_TMP11]], align 8
1181 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, ptr [[TMP28]], align 4
1182 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP29]], 1
1183 // CHECK3-NEXT: store i32 [[DIV]], ptr [[TMP28]], align 4
1184 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1185 // CHECK3: omp.body.continue:
1186 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1187 // CHECK3: omp.inner.for.inc:
1188 // CHECK3-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1189 // CHECK3-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP30]], 1
1190 // CHECK3-NEXT: store i32 [[ADD19]], ptr [[DOTOMP_IV]], align 4
1191 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
1192 // CHECK3: omp.inner.for.end:
1193 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1194 // CHECK3: omp.loop.exit:
1195 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP12]])
1196 // CHECK3-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1197 // CHECK3-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
1198 // CHECK3-NEXT: br i1 [[TMP32]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
1199 // CHECK3: .omp.linear.pu:
1200 // CHECK3-NEXT: [[TMP33:%.*]] = load ptr, ptr [[_TMP2]], align 8
1201 // CHECK3-NEXT: store ptr [[TMP33]], ptr [[_TMP20]], align 8
1202 // CHECK3-NEXT: [[TMP34:%.*]] = load i32, ptr [[A7]], align 4
1203 // CHECK3-NEXT: [[TMP35:%.*]] = load ptr, ptr [[_TMP20]], align 8
1204 // CHECK3-NEXT: store i32 [[TMP34]], ptr [[TMP35]], align 4
1205 // CHECK3-NEXT: [[TMP36:%.*]] = load i32, ptr [[B9]], align 4
1206 // CHECK3-NEXT: store i32 [[TMP36]], ptr [[TMP2]], align 4
1207 // CHECK3-NEXT: [[TMP37:%.*]] = load ptr, ptr [[_TMP3]], align 8
1208 // CHECK3-NEXT: store ptr [[TMP37]], ptr [[_TMP21]], align 8
1209 // CHECK3-NEXT: [[TMP38:%.*]] = load i32, ptr [[C10]], align 4
1210 // CHECK3-NEXT: [[TMP39:%.*]] = load ptr, ptr [[_TMP21]], align 8
1211 // CHECK3-NEXT: store i32 [[TMP38]], ptr [[TMP39]], align 4
1212 // CHECK3-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
1213 // CHECK3: .omp.linear.pu.done:
1214 // CHECK3-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP12]])
1215 // CHECK3-NEXT: ret void
1216 //
1217 //
1218 // CHECK4-LABEL: define {{[^@]+}}@main
1219 // CHECK4-SAME: () #[[ATTR1:[0-9]+]] {
1220 // CHECK4-NEXT: entry:
1221 // CHECK4-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1222 // CHECK4-NEXT: [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
1223 // CHECK4-NEXT: store i32 0, ptr [[RETVAL]], align 4
1224 // CHECK4-NEXT: call void @_ZN2SSC1ERi(ptr noundef nonnull align 8 dereferenceable(16) [[SS]], ptr noundef nonnull align 4 dereferenceable(4) @_ZZ4mainE5sivar)
1225 // CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr getelementptr inbounds nuw ([[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr @__block_literal_global, i32 0, i32 3), align 8
1226 // CHECK4-NEXT: call void [[TMP0]](ptr noundef @__block_literal_global)
1227 // CHECK4-NEXT: ret i32 0
1228 //
1229 //
1230 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC1ERi
1231 // CHECK4-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR2:[0-9]+]] align 2 {
1232 // CHECK4-NEXT: entry:
1233 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1234 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8
1235 // CHECK4-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1236 // CHECK4-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
1237 // CHECK4-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1238 // CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8
1239 // CHECK4-NEXT: call void @_ZN2SSC2ERi(ptr noundef nonnull align 8 dereferenceable(16) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]])
1240 // CHECK4-NEXT: ret void
1241 //
1242 //
1243 // CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke
1244 // CHECK4-SAME: (ptr noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR3:[0-9]+]] {
1245 // CHECK4-NEXT: entry:
1246 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca ptr, align 8
1247 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca ptr, align 8
1248 // CHECK4-NEXT: store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
1249 // CHECK4-NEXT: store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[BLOCK_ADDR]], align 8
1250 // CHECK4-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3:[0-9]+]], i32 0, ptr @__main_block_invoke.omp_outlined)
1251 // CHECK4-NEXT: ret void
1252 //
1253 //
1254 // CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke.omp_outlined
1255 // CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR4:[0-9]+]] {
1256 // CHECK4-NEXT: entry:
1257 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1258 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1259 // CHECK4-NEXT: [[TMP:%.*]] = alloca ptr, align 8
1260 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1261 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1262 // CHECK4-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
1263 // CHECK4-NEXT: [[DOTLINEAR_START2:%.*]] = alloca i32, align 4
1264 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1265 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1266 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1267 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1268 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
1269 // CHECK4-NEXT: [[G:%.*]] = alloca i32, align 4
1270 // CHECK4-NEXT: [[G1:%.*]] = alloca i32, align 4
1271 // CHECK4-NEXT: [[_TMP3:%.*]] = alloca ptr, align 8
1272 // CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ ptr, i32, i32, ptr, ptr, ptr, i32 }>, align 8
1273 // CHECK4-NEXT: [[_TMP13:%.*]] = alloca ptr, align 8
1274 // CHECK4-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1275 // CHECK4-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1276 // CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr @g1, align 8
1277 // CHECK4-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8
1278 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, ptr @g, align 4
1279 // CHECK4-NEXT: store i32 [[TMP1]], ptr [[DOTLINEAR_START]], align 4
1280 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, ptr @g, align 4
1281 // CHECK4-NEXT: store i32 [[TMP2]], ptr [[DOTLINEAR_START2]], align 4
1282 // CHECK4-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1283 // CHECK4-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4
1284 // CHECK4-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1285 // CHECK4-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1286 // CHECK4-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1287 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
1288 // CHECK4-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1:[0-9]+]], i32 [[TMP4]])
1289 // CHECK4-NEXT: store ptr [[G1]], ptr [[_TMP3]], align 8
1290 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1291 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1292 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
1293 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1294 // CHECK4: cond.true:
1295 // CHECK4-NEXT: br label [[COND_END:%.*]]
1296 // CHECK4: cond.false:
1297 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1298 // CHECK4-NEXT: br label [[COND_END]]
1299 // CHECK4: cond.end:
1300 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1301 // CHECK4-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1302 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1303 // CHECK4-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
1304 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1305 // CHECK4: omp.inner.for.cond:
1306 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1307 // CHECK4-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1308 // CHECK4-NEXT: [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1309 // CHECK4-NEXT: br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1310 // CHECK4: omp.inner.for.body:
1311 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1312 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1313 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1314 // CHECK4-NEXT: store i32 [[ADD]], ptr [[I]], align 4
1315 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTLINEAR_START]], align 4
1316 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1317 // CHECK4-NEXT: [[MUL5:%.*]] = mul nsw i32 [[TMP12]], 5
1318 // CHECK4-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP11]], [[MUL5]]
1319 // CHECK4-NEXT: store i32 [[ADD6]], ptr [[G]], align 4
1320 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTLINEAR_START2]], align 4
1321 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1322 // CHECK4-NEXT: [[MUL7:%.*]] = mul nsw i32 [[TMP14]], 5
1323 // CHECK4-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP13]], [[MUL7]]
1324 // CHECK4-NEXT: store i32 [[ADD8]], ptr [[G1]], align 4
1325 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, ptr [[G]], align 4
1326 // CHECK4-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP15]], 5
1327 // CHECK4-NEXT: store i32 [[ADD9]], ptr [[G]], align 4
1328 // CHECK4-NEXT: [[TMP16:%.*]] = load ptr, ptr [[_TMP3]], align 8
1329 // CHECK4-NEXT: [[TMP17:%.*]] = load volatile i32, ptr [[TMP16]], align 4
1330 // CHECK4-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP17]], 5
1331 // CHECK4-NEXT: store volatile i32 [[ADD10]], ptr [[TMP16]], align 4
1332 // CHECK4-NEXT: store i32 1, ptr [[G]], align 4
1333 // CHECK4-NEXT: [[TMP18:%.*]] = load ptr, ptr [[_TMP3]], align 8
1334 // CHECK4-NEXT: store volatile i32 5, ptr [[TMP18]], align 4
1335 // CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 0
1336 // CHECK4-NEXT: store ptr @_NSConcreteStackBlock, ptr [[BLOCK_ISA]], align 8
1337 // CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 1
1338 // CHECK4-NEXT: store i32 1073741824, ptr [[BLOCK_FLAGS]], align 8
1339 // CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 2
1340 // CHECK4-NEXT: store i32 0, ptr [[BLOCK_RESERVED]], align 4
1341 // CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 3
1342 // CHECK4-NEXT: store ptr @g1_block_invoke, ptr [[BLOCK_INVOKE]], align 8
1343 // CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 4
1344 // CHECK4-NEXT: store ptr @__block_descriptor_tmp.1, ptr [[BLOCK_DESCRIPTOR]], align 8
1345 // CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 6
1346 // CHECK4-NEXT: [[TMP19:%.*]] = load volatile i32, ptr [[G]], align 4
1347 // CHECK4-NEXT: store volatile i32 [[TMP19]], ptr [[BLOCK_CAPTURED]], align 8
1348 // CHECK4-NEXT: [[BLOCK_CAPTURED11:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 5
1349 // CHECK4-NEXT: [[TMP20:%.*]] = load ptr, ptr [[_TMP3]], align 8
1350 // CHECK4-NEXT: store ptr [[TMP20]], ptr [[BLOCK_CAPTURED11]], align 8
1351 // CHECK4-NEXT: [[TMP21:%.*]] = getelementptr inbounds nuw [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr [[BLOCK]], i32 0, i32 3
1352 // CHECK4-NEXT: [[TMP22:%.*]] = load ptr, ptr [[TMP21]], align 8
1353 // CHECK4-NEXT: call void [[TMP22]](ptr noundef [[BLOCK]])
1354 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1355 // CHECK4: omp.body.continue:
1356 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1357 // CHECK4: omp.inner.for.inc:
1358 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1359 // CHECK4-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP23]], 1
1360 // CHECK4-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4
1361 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
1362 // CHECK4: omp.inner.for.end:
1363 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1364 // CHECK4: omp.loop.exit:
1365 // CHECK4-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP4]])
1366 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1367 // CHECK4-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
1368 // CHECK4-NEXT: br i1 [[TMP25]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
1369 // CHECK4: .omp.linear.pu:
1370 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, ptr [[G]], align 4
1371 // CHECK4-NEXT: store i32 [[TMP26]], ptr @g, align 4
1372 // CHECK4-NEXT: [[TMP27:%.*]] = load ptr, ptr @g1, align 8
1373 // CHECK4-NEXT: store ptr [[TMP27]], ptr [[_TMP13]], align 8
1374 // CHECK4-NEXT: [[TMP28:%.*]] = load i32, ptr [[G1]], align 4
1375 // CHECK4-NEXT: [[TMP29:%.*]] = load ptr, ptr [[_TMP13]], align 8
1376 // CHECK4-NEXT: store volatile i32 [[TMP28]], ptr [[TMP29]], align 4
1377 // CHECK4-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
1378 // CHECK4: .omp.linear.pu.done:
1379 // CHECK4-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP4]])
1380 // CHECK4-NEXT: ret void
1381 //
1382 //
1383 // CHECK4-LABEL: define {{[^@]+}}@g1_block_invoke
1384 // CHECK4-SAME: (ptr noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR3]] {
1385 // CHECK4-NEXT: entry:
1386 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca ptr, align 8
1387 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca ptr, align 8
1388 // CHECK4-NEXT: store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
1389 // CHECK4-NEXT: store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[BLOCK_ADDR]], align 8
1390 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 6
1391 // CHECK4-NEXT: store i32 2, ptr [[BLOCK_CAPTURE_ADDR]], align 8
1392 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 5
1393 // CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR1]], align 8
1394 // CHECK4-NEXT: store i32 2, ptr [[TMP0]], align 4
1395 // CHECK4-NEXT: ret void
1396 //
1397 //
1398 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi
1399 // CHECK4-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR2]] align 2 {
1400 // CHECK4-NEXT: entry:
1401 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1402 // CHECK4-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8
1403 // CHECK4-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1404 // CHECK4-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
1405 // CHECK4-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1406 // CHECK4-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0
1407 // CHECK4-NEXT: store i32 0, ptr [[A]], align 8
1408 // CHECK4-NEXT: [[B:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 1
1409 // CHECK4-NEXT: [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 4
1410 // CHECK4-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
1411 // CHECK4-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
1412 // CHECK4-NEXT: store i8 [[BF_SET]], ptr [[B]], align 4
1413 // CHECK4-NEXT: [[C:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 2
1414 // CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8
1415 // CHECK4-NEXT: store ptr [[TMP0]], ptr [[C]], align 8
1416 // CHECK4-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 1, ptr @_ZN2SSC2ERi.omp_outlined, ptr [[THIS1]])
1417 // CHECK4-NEXT: ret void
1418 //
1419 //
1420 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined
1421 // CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR4]] {
1422 // CHECK4-NEXT: entry:
1423 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1424 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1425 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1426 // CHECK4-NEXT: [[A:%.*]] = alloca ptr, align 8
1427 // CHECK4-NEXT: [[B:%.*]] = alloca i32, align 4
1428 // CHECK4-NEXT: [[C:%.*]] = alloca ptr, align 8
1429 // CHECK4-NEXT: [[TMP:%.*]] = alloca ptr, align 8
1430 // CHECK4-NEXT: [[_TMP3:%.*]] = alloca ptr, align 8
1431 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1432 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
1433 // CHECK4-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
1434 // CHECK4-NEXT: [[DOTLINEAR_START5:%.*]] = alloca i32, align 4
1435 // CHECK4-NEXT: [[DOTLINEAR_START6:%.*]] = alloca i32, align 4
1436 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1437 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1438 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1439 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1440 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
1441 // CHECK4-NEXT: [[A7:%.*]] = alloca i32, align 4
1442 // CHECK4-NEXT: [[_TMP8:%.*]] = alloca ptr, align 8
1443 // CHECK4-NEXT: [[B9:%.*]] = alloca i32, align 4
1444 // CHECK4-NEXT: [[C10:%.*]] = alloca i32, align 4
1445 // CHECK4-NEXT: [[_TMP11:%.*]] = alloca ptr, align 8
1446 // CHECK4-NEXT: [[BLOCK:%.*]] = alloca <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, align 8
1447 // CHECK4-NEXT: [[_TMP22:%.*]] = alloca ptr, align 8
1448 // CHECK4-NEXT: [[_TMP23:%.*]] = alloca ptr, align 8
1449 // CHECK4-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1450 // CHECK4-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1451 // CHECK4-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1452 // CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1453 // CHECK4-NEXT: [[A1:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
1454 // CHECK4-NEXT: store ptr [[A1]], ptr [[A]], align 8
1455 // CHECK4-NEXT: [[C2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 2
1456 // CHECK4-NEXT: [[TMP1:%.*]] = load ptr, ptr [[C2]], align 8
1457 // CHECK4-NEXT: store ptr [[TMP1]], ptr [[C]], align 8
1458 // CHECK4-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A]], align 8
1459 // CHECK4-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8
1460 // CHECK4-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C]], align 8
1461 // CHECK4-NEXT: store ptr [[TMP3]], ptr [[_TMP3]], align 8
1462 // CHECK4-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8
1463 // CHECK4-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
1464 // CHECK4-NEXT: store i32 [[TMP5]], ptr [[DOTLINEAR_START]], align 4
1465 // CHECK4-NEXT: [[TMP6:%.*]] = load i32, ptr [[B]], align 4
1466 // CHECK4-NEXT: store i32 [[TMP6]], ptr [[DOTLINEAR_START5]], align 4
1467 // CHECK4-NEXT: [[TMP7:%.*]] = load ptr, ptr [[_TMP3]], align 8
1468 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
1469 // CHECK4-NEXT: store i32 [[TMP8]], ptr [[DOTLINEAR_START6]], align 4
1470 // CHECK4-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1471 // CHECK4-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4
1472 // CHECK4-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1473 // CHECK4-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1474 // CHECK4-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1475 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
1476 // CHECK4-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP10]])
1477 // CHECK4-NEXT: store ptr [[A7]], ptr [[_TMP8]], align 8
1478 // CHECK4-NEXT: store ptr [[C10]], ptr [[_TMP11]], align 8
1479 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1480 // CHECK4-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1481 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP11]], 1
1482 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1483 // CHECK4: cond.true:
1484 // CHECK4-NEXT: br label [[COND_END:%.*]]
1485 // CHECK4: cond.false:
1486 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1487 // CHECK4-NEXT: br label [[COND_END]]
1488 // CHECK4: cond.end:
1489 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
1490 // CHECK4-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1491 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1492 // CHECK4-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
1493 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1494 // CHECK4: omp.inner.for.cond:
1495 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1496 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1497 // CHECK4-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
1498 // CHECK4-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1499 // CHECK4: omp.inner.for.body:
1500 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1501 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
1502 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1503 // CHECK4-NEXT: store i32 [[ADD]], ptr [[I]], align 4
1504 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTLINEAR_START]], align 4
1505 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1506 // CHECK4-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP18]], 1
1507 // CHECK4-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP17]], [[MUL13]]
1508 // CHECK4-NEXT: store i32 [[ADD14]], ptr [[A7]], align 4
1509 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTLINEAR_START5]], align 4
1510 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1511 // CHECK4-NEXT: [[MUL15:%.*]] = mul nsw i32 [[TMP20]], 1
1512 // CHECK4-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP19]], [[MUL15]]
1513 // CHECK4-NEXT: store i32 [[ADD16]], ptr [[B9]], align 4
1514 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTLINEAR_START6]], align 4
1515 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1516 // CHECK4-NEXT: [[MUL17:%.*]] = mul nsw i32 [[TMP22]], 1
1517 // CHECK4-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP21]], [[MUL17]]
1518 // CHECK4-NEXT: store i32 [[ADD18]], ptr [[C10]], align 4
1519 // CHECK4-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 0
1520 // CHECK4-NEXT: store ptr @_NSConcreteStackBlock, ptr [[BLOCK_ISA]], align 8
1521 // CHECK4-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 1
1522 // CHECK4-NEXT: store i32 1073741824, ptr [[BLOCK_FLAGS]], align 8
1523 // CHECK4-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 2
1524 // CHECK4-NEXT: store i32 0, ptr [[BLOCK_RESERVED]], align 4
1525 // CHECK4-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 3
1526 // CHECK4-NEXT: store ptr @g1_block_invoke_2, ptr [[BLOCK_INVOKE]], align 8
1527 // CHECK4-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 4
1528 // CHECK4-NEXT: store ptr @__block_descriptor_tmp.2, ptr [[BLOCK_DESCRIPTOR]], align 8
1529 // CHECK4-NEXT: [[BLOCK_CAPTURED_THIS_ADDR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 5
1530 // CHECK4-NEXT: store ptr [[TMP0]], ptr [[BLOCK_CAPTURED_THIS_ADDR]], align 8
1531 // CHECK4-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 6
1532 // CHECK4-NEXT: [[TMP23:%.*]] = load ptr, ptr [[_TMP8]], align 8
1533 // CHECK4-NEXT: store ptr [[TMP23]], ptr [[BLOCK_CAPTURED]], align 8
1534 // CHECK4-NEXT: [[BLOCK_CAPTURED19:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 8
1535 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, ptr [[B9]], align 4
1536 // CHECK4-NEXT: store i32 [[TMP24]], ptr [[BLOCK_CAPTURED19]], align 8
1537 // CHECK4-NEXT: [[BLOCK_CAPTURED20:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 7
1538 // CHECK4-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP11]], align 8
1539 // CHECK4-NEXT: store ptr [[TMP25]], ptr [[BLOCK_CAPTURED20]], align 8
1540 // CHECK4-NEXT: [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr [[BLOCK]], i32 0, i32 3
1541 // CHECK4-NEXT: [[TMP27:%.*]] = load ptr, ptr [[TMP26]], align 8
1542 // CHECK4-NEXT: call void [[TMP27]](ptr noundef [[BLOCK]])
1543 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1544 // CHECK4: omp.body.continue:
1545 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1546 // CHECK4: omp.inner.for.inc:
1547 // CHECK4-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1548 // CHECK4-NEXT: [[ADD21:%.*]] = add nsw i32 [[TMP28]], 1
1549 // CHECK4-NEXT: store i32 [[ADD21]], ptr [[DOTOMP_IV]], align 4
1550 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
1551 // CHECK4: omp.inner.for.end:
1552 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1553 // CHECK4: omp.loop.exit:
1554 // CHECK4-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP10]])
1555 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1556 // CHECK4-NEXT: [[TMP30:%.*]] = icmp ne i32 [[TMP29]], 0
1557 // CHECK4-NEXT: br i1 [[TMP30]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
1558 // CHECK4: .omp.linear.pu:
1559 // CHECK4-NEXT: [[TMP31:%.*]] = load ptr, ptr [[TMP]], align 8
1560 // CHECK4-NEXT: store ptr [[TMP31]], ptr [[_TMP22]], align 8
1561 // CHECK4-NEXT: [[TMP32:%.*]] = load i32, ptr [[A7]], align 4
1562 // CHECK4-NEXT: [[TMP33:%.*]] = load ptr, ptr [[_TMP22]], align 8
1563 // CHECK4-NEXT: store i32 [[TMP32]], ptr [[TMP33]], align 4
1564 // CHECK4-NEXT: [[TMP34:%.*]] = load i32, ptr [[B9]], align 4
1565 // CHECK4-NEXT: store i32 [[TMP34]], ptr [[B]], align 4
1566 // CHECK4-NEXT: [[TMP35:%.*]] = load ptr, ptr [[_TMP3]], align 8
1567 // CHECK4-NEXT: store ptr [[TMP35]], ptr [[_TMP23]], align 8
1568 // CHECK4-NEXT: [[TMP36:%.*]] = load i32, ptr [[C10]], align 4
1569 // CHECK4-NEXT: [[TMP37:%.*]] = load ptr, ptr [[_TMP23]], align 8
1570 // CHECK4-NEXT: store i32 [[TMP36]], ptr [[TMP37]], align 4
1571 // CHECK4-NEXT: [[TMP38:%.*]] = load i32, ptr [[B]], align 4
1572 // CHECK4-NEXT: [[B24:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[TMP0]], i32 0, i32 1
1573 // CHECK4-NEXT: [[TMP39:%.*]] = trunc i32 [[TMP38]] to i8
1574 // CHECK4-NEXT: [[BF_LOAD:%.*]] = load i8, ptr [[B24]], align 4
1575 // CHECK4-NEXT: [[BF_VALUE:%.*]] = and i8 [[TMP39]], 15
1576 // CHECK4-NEXT: [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
1577 // CHECK4-NEXT: [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], [[BF_VALUE]]
1578 // CHECK4-NEXT: store i8 [[BF_SET]], ptr [[B24]], align 4
1579 // CHECK4-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
1580 // CHECK4: .omp.linear.pu.done:
1581 // CHECK4-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP10]])
1582 // CHECK4-NEXT: ret void
1583 //
1584 //
1585 // CHECK4-LABEL: define {{[^@]+}}@g1_block_invoke_2
1586 // CHECK4-SAME: (ptr noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR3]] {
1587 // CHECK4-NEXT: entry:
1588 // CHECK4-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca ptr, align 8
1589 // CHECK4-NEXT: [[BLOCK_ADDR:%.*]] = alloca ptr, align 8
1590 // CHECK4-NEXT: store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
1591 // CHECK4-NEXT: store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[BLOCK_ADDR]], align 8
1592 // CHECK4-NEXT: [[BLOCK_CAPTURED_THIS:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 5
1593 // CHECK4-NEXT: [[THIS:%.*]] = load ptr, ptr [[BLOCK_CAPTURED_THIS]], align 8
1594 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 6
1595 // CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR]], align 8
1596 // CHECK4-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1597 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP1]], 1
1598 // CHECK4-NEXT: store i32 [[INC]], ptr [[TMP0]], align 4
1599 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 8
1600 // CHECK4-NEXT: [[TMP2:%.*]] = load i32, ptr [[BLOCK_CAPTURE_ADDR1]], align 8
1601 // CHECK4-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP2]], -1
1602 // CHECK4-NEXT: store i32 [[DEC]], ptr [[BLOCK_CAPTURE_ADDR1]], align 8
1603 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 7
1604 // CHECK4-NEXT: [[TMP3:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR2]], align 8
1605 // CHECK4-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
1606 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP4]], 1
1607 // CHECK4-NEXT: store i32 [[DIV]], ptr [[TMP3]], align 4
1608 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR3:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 6
1609 // CHECK4-NEXT: [[TMP5:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR3]], align 8
1610 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR4:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 8
1611 // CHECK4-NEXT: [[BLOCK_CAPTURE_ADDR5:%.*]] = getelementptr inbounds nuw <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 7
1612 // CHECK4-NEXT: [[TMP6:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR5]], align 8
1613 // CHECK4-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @g1_block_invoke_2.omp_outlined, ptr [[THIS]], ptr [[TMP5]], ptr [[BLOCK_CAPTURE_ADDR4]], ptr [[TMP6]])
1614 // CHECK4-NEXT: ret void
1615 //
1616 //
1617 // CHECK4-LABEL: define {{[^@]+}}@g1_block_invoke_2.omp_outlined
1618 // CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR4]] {
1619 // CHECK4-NEXT: entry:
1620 // CHECK4-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1621 // CHECK4-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1622 // CHECK4-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1623 // CHECK4-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
1624 // CHECK4-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
1625 // CHECK4-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
1626 // CHECK4-NEXT: [[TMP:%.*]] = alloca ptr, align 8
1627 // CHECK4-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8
1628 // CHECK4-NEXT: [[_TMP2:%.*]] = alloca ptr, align 8
1629 // CHECK4-NEXT: [[_TMP3:%.*]] = alloca ptr, align 8
1630 // CHECK4-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1631 // CHECK4-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
1632 // CHECK4-NEXT: [[DOTLINEAR_START:%.*]] = alloca i32, align 4
1633 // CHECK4-NEXT: [[DOTLINEAR_START5:%.*]] = alloca i32, align 4
1634 // CHECK4-NEXT: [[DOTLINEAR_START6:%.*]] = alloca i32, align 4
1635 // CHECK4-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1636 // CHECK4-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1637 // CHECK4-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1638 // CHECK4-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1639 // CHECK4-NEXT: [[I:%.*]] = alloca i32, align 4
1640 // CHECK4-NEXT: [[A7:%.*]] = alloca i32, align 4
1641 // CHECK4-NEXT: [[_TMP8:%.*]] = alloca ptr, align 8
1642 // CHECK4-NEXT: [[B9:%.*]] = alloca i32, align 4
1643 // CHECK4-NEXT: [[C10:%.*]] = alloca i32, align 4
1644 // CHECK4-NEXT: [[_TMP11:%.*]] = alloca ptr, align 8
1645 // CHECK4-NEXT: [[_TMP20:%.*]] = alloca ptr, align 8
1646 // CHECK4-NEXT: [[_TMP21:%.*]] = alloca ptr, align 8
1647 // CHECK4-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1648 // CHECK4-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1649 // CHECK4-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1650 // CHECK4-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
1651 // CHECK4-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
1652 // CHECK4-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
1653 // CHECK4-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1654 // CHECK4-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1655 // CHECK4-NEXT: [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8
1656 // CHECK4-NEXT: [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8
1657 // CHECK4-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 8
1658 // CHECK4-NEXT: store ptr [[TMP3]], ptr [[_TMP1]], align 8
1659 // CHECK4-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8
1660 // CHECK4-NEXT: store ptr [[TMP4]], ptr [[_TMP2]], align 8
1661 // CHECK4-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 8
1662 // CHECK4-NEXT: store ptr [[TMP5]], ptr [[_TMP3]], align 8
1663 // CHECK4-NEXT: [[TMP6:%.*]] = load ptr, ptr [[_TMP2]], align 8
1664 // CHECK4-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
1665 // CHECK4-NEXT: store i32 [[TMP7]], ptr [[DOTLINEAR_START]], align 4
1666 // CHECK4-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP2]], align 4
1667 // CHECK4-NEXT: store i32 [[TMP8]], ptr [[DOTLINEAR_START5]], align 4
1668 // CHECK4-NEXT: [[TMP9:%.*]] = load ptr, ptr [[_TMP3]], align 8
1669 // CHECK4-NEXT: [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
1670 // CHECK4-NEXT: store i32 [[TMP10]], ptr [[DOTLINEAR_START6]], align 4
1671 // CHECK4-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1672 // CHECK4-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4
1673 // CHECK4-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1674 // CHECK4-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1675 // CHECK4-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1676 // CHECK4-NEXT: [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
1677 // CHECK4-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP12]])
1678 // CHECK4-NEXT: store ptr [[A7]], ptr [[_TMP8]], align 8
1679 // CHECK4-NEXT: store ptr [[C10]], ptr [[_TMP11]], align 8
1680 // CHECK4-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP12]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1681 // CHECK4-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1682 // CHECK4-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP13]], 1
1683 // CHECK4-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1684 // CHECK4: cond.true:
1685 // CHECK4-NEXT: br label [[COND_END:%.*]]
1686 // CHECK4: cond.false:
1687 // CHECK4-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1688 // CHECK4-NEXT: br label [[COND_END]]
1689 // CHECK4: cond.end:
1690 // CHECK4-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
1691 // CHECK4-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1692 // CHECK4-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1693 // CHECK4-NEXT: store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4
1694 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1695 // CHECK4: omp.inner.for.cond:
1696 // CHECK4-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1697 // CHECK4-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1698 // CHECK4-NEXT: [[CMP12:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
1699 // CHECK4-NEXT: br i1 [[CMP12]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1700 // CHECK4: omp.inner.for.body:
1701 // CHECK4-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1702 // CHECK4-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
1703 // CHECK4-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1704 // CHECK4-NEXT: store i32 [[ADD]], ptr [[I]], align 4
1705 // CHECK4-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTLINEAR_START]], align 4
1706 // CHECK4-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1707 // CHECK4-NEXT: [[MUL13:%.*]] = mul nsw i32 [[TMP20]], 1
1708 // CHECK4-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP19]], [[MUL13]]
1709 // CHECK4-NEXT: store i32 [[ADD14]], ptr [[A7]], align 4
1710 // CHECK4-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTLINEAR_START5]], align 4
1711 // CHECK4-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1712 // CHECK4-NEXT: [[MUL15:%.*]] = mul nsw i32 [[TMP22]], 1
1713 // CHECK4-NEXT: [[ADD16:%.*]] = add nsw i32 [[TMP21]], [[MUL15]]
1714 // CHECK4-NEXT: store i32 [[ADD16]], ptr [[B9]], align 4
1715 // CHECK4-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTLINEAR_START6]], align 4
1716 // CHECK4-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1717 // CHECK4-NEXT: [[MUL17:%.*]] = mul nsw i32 [[TMP24]], 1
1718 // CHECK4-NEXT: [[ADD18:%.*]] = add nsw i32 [[TMP23]], [[MUL17]]
1719 // CHECK4-NEXT: store i32 [[ADD18]], ptr [[C10]], align 4
1720 // CHECK4-NEXT: [[TMP25:%.*]] = load ptr, ptr [[_TMP8]], align 8
1721 // CHECK4-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4
1722 // CHECK4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP26]], 1
1723 // CHECK4-NEXT: store i32 [[INC]], ptr [[TMP25]], align 4
1724 // CHECK4-NEXT: [[TMP27:%.*]] = load i32, ptr [[B9]], align 4
1725 // CHECK4-NEXT: [[DEC:%.*]] = add nsw i32 [[TMP27]], -1
1726 // CHECK4-NEXT: store i32 [[DEC]], ptr [[B9]], align 4
1727 // CHECK4-NEXT: [[TMP28:%.*]] = load ptr, ptr [[_TMP11]], align 8
1728 // CHECK4-NEXT: [[TMP29:%.*]] = load i32, ptr [[TMP28]], align 4
1729 // CHECK4-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP29]], 1
1730 // CHECK4-NEXT: store i32 [[DIV]], ptr [[TMP28]], align 4
1731 // CHECK4-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1732 // CHECK4: omp.body.continue:
1733 // CHECK4-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1734 // CHECK4: omp.inner.for.inc:
1735 // CHECK4-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1736 // CHECK4-NEXT: [[ADD19:%.*]] = add nsw i32 [[TMP30]], 1
1737 // CHECK4-NEXT: store i32 [[ADD19]], ptr [[DOTOMP_IV]], align 4
1738 // CHECK4-NEXT: br label [[OMP_INNER_FOR_COND]]
1739 // CHECK4: omp.inner.for.end:
1740 // CHECK4-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1741 // CHECK4: omp.loop.exit:
1742 // CHECK4-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB2]], i32 [[TMP12]])
1743 // CHECK4-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1744 // CHECK4-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
1745 // CHECK4-NEXT: br i1 [[TMP32]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
1746 // CHECK4: .omp.linear.pu:
1747 // CHECK4-NEXT: [[TMP33:%.*]] = load ptr, ptr [[_TMP2]], align 8
1748 // CHECK4-NEXT: store ptr [[TMP33]], ptr [[_TMP20]], align 8
1749 // CHECK4-NEXT: [[TMP34:%.*]] = load i32, ptr [[A7]], align 4
1750 // CHECK4-NEXT: [[TMP35:%.*]] = load ptr, ptr [[_TMP20]], align 8
1751 // CHECK4-NEXT: store i32 [[TMP34]], ptr [[TMP35]], align 4
1752 // CHECK4-NEXT: [[TMP36:%.*]] = load i32, ptr [[B9]], align 4
1753 // CHECK4-NEXT: store i32 [[TMP36]], ptr [[TMP2]], align 4
1754 // CHECK4-NEXT: [[TMP37:%.*]] = load ptr, ptr [[_TMP3]], align 8
1755 // CHECK4-NEXT: store ptr [[TMP37]], ptr [[_TMP21]], align 8
1756 // CHECK4-NEXT: [[TMP38:%.*]] = load i32, ptr [[C10]], align 4
1757 // CHECK4-NEXT: [[C22:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 2
1758 // CHECK4-NEXT: [[TMP39:%.*]] = load ptr, ptr [[C22]], align 8
1759 // CHECK4-NEXT: store i32 [[TMP38]], ptr [[TMP39]], align 4
1760 // CHECK4-NEXT: br label [[DOTOMP_LINEAR_PU_DONE]]
1761 // CHECK4: .omp.linear.pu.done:
1762 // CHECK4-NEXT: call void @__kmpc_barrier(ptr @[[GLOB1]], i32 [[TMP12]])
1763 // CHECK4-NEXT: ret void
1764 //
LLVM monorepo