clang/test/OpenMP/for_simd_codegen.cpp

   1 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-unknown-unknown -emit-llvm -fexceptions -fcxx-exceptions -o - < %s | FileCheck %s --check-prefix=CHECK --check-prefix=OMP45
   2 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t < %s
   3 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify -emit-llvm -o - < %s | FileCheck %s --check-prefix=CHECK --check-prefix=OMP45
   4 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -fopenmp-version=45 -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm -o - < %s | FileCheck %s --check-prefix=TERM_DEBUG
   5 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm -fexceptions -fcxx-exceptions -o - < %s -DOMP5 | FileCheck %s --check-prefix=CHECK --check-prefix=OMP50
   6 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t < %s -DOMP5
   7 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify -emit-llvm -o - -DOMP5 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=OMP50
   8 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm -o - < %s -DOMP5 | FileCheck %s --check-prefix=TERM_DEBUG
   9
  10 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple x86_64-unknown-unknown -emit-llvm -fexceptions -fcxx-exceptions -o - < %s | FileCheck --check-prefix SIMD-ONLY0 %s
  11 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t < %s
  12 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify -emit-llvm -o - < %s | FileCheck --check-prefix SIMD-ONLY0 %s
  13 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp-simd -fopenmp-version=45 -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm -o - < %s | FileCheck --check-prefix SIMD-ONLY0 %s
  14 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm -fexceptions -fcxx-exceptions -o - < %s -DOMP5 | FileCheck --check-prefix SIMD-ONLY0 %s
  15 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t < %s -DOMP5
  16 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify -DOMP5 -emit-llvm -o - < %s | FileCheck --check-prefix SIMD-ONLY0 %s
  17 // RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp-simd -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm -o - < %s -DOMP5 | FileCheck --check-prefix SIMD-ONLY0 %s
  18 // SIMD-ONLY0-NOT: {{__kmpc|__tgt}}
  19 // expected-no-diagnostics
  20 #ifndef HEADER
  21 #define HEADER
  22
  23 long long get_val() { extern void mayThrow(); mayThrow(); return 0; }
  24 double *g_ptr;
  25
  26 // CHECK-LABEL: define {{.*void}} @{{.*}}simple{{.*}}(ptr noundef {{.+}}, ptr noundef {{.+}}, ptr noundef {{.+}}, ptr noundef {{.+}})
  27 void simple(float *a, float *b, float *c, float *d) {
  28 #ifdef OMP5
  29   #pragma omp for simd if (true)
  30 #else
  31   #pragma omp for simd
  32 #endif
  33 // CHECK: call void @__kmpc_for_static_init_4(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i32 1, i32 1)
  34 // CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]],
  35 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 5
  36 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
  37 // CHECK: [[TRUE]]:
  38 // CHECK: br label %[[SWITCH:[^,]+]]
  39 // CHECK: [[FALSE]]:
  40 // CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]],
  41 // CHECK: br label %[[SWITCH]]
  42 // CHECK: [[SWITCH]]:
  43 // CHECK: [[UP:%.+]] = phi i32 [ 5, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
  44 // CHECK: store i32 [[UP]], ptr [[UB]],
  45 // CHECK: [[LB_VAL:%.+]] = load i32, ptr [[LB]],
  46 // CHECK: store i32 [[LB_VAL]], ptr [[OMP_IV:%[^,]+]],
  47
  48 // CHECK: [[IV:%.+]] = load i32, ptr [[OMP_IV]]
  49 // CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]]
  50 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB_VAL]]
  51 // CHECK-NEXT: br i1 [[CMP]], label %[[SIMPLE_LOOP1_BODY:.+]], label %[[SIMPLE_LOOP1_END:[^,]+]]
  52   for (int i = 3; i < 32; i += 5) {
  53 // CHECK: [[SIMPLE_LOOP1_BODY]]:
  54 // Start of body: calculate i from IV:
  55 // CHECK: [[IV1_1:%.+]] = load i32, ptr [[OMP_IV]]{{.*}}
  56 // CHECK: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 5
  57 // CHECK-NEXT: [[CALC_I_2:%.+]] = add nsw i32 3, [[CALC_I_1]]
  58 // CHECK-NEXT: store i32 [[CALC_I_2]], ptr [[LC_I:.+]]
  59 // ... loop body ...
  60 // End of body: store into a[i]:
  61 // CHECK: store float [[RESULT:%.+]], ptr
  62     a[i] = b[i] * c[i] * d[i];
  63 // CHECK: [[IV1_2:%.+]] = load i32, ptr [[OMP_IV]]
  64 // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1
  65 // CHECK-NEXT: store i32 [[ADD1_2]], ptr [[OMP_IV]]
  66 // br label %{{.+}}, !llvm.loop !{{.+}}
  67   }
  68 // CHECK: [[SIMPLE_LOOP1_END]]:
  69 // CHECK: call void @__kmpc_for_static_fini(ptr {{.+}}, i32 %{{.+}})
  70 // CHECK: call void @__kmpc_barrier(ptr {{.+}}, i32 %{{.+}})
  71
  72   long long k = get_val();
  73
  74   #pragma omp for simd linear(k : 3) schedule(simd, nonmonotonic: dynamic)
  75 // CHECK: [[K0:%.+]] = call {{.*}}i64 @{{.*}}get_val
  76 // CHECK-NEXT: store i64 [[K0]], ptr [[K_VAR:%[^,]+]]
  77 // CHECK: [[K0LOAD:%.+]] = load i64, ptr [[K_VAR]]
  78 // CHECK-NEXT: store i64 [[K0LOAD]], ptr [[LIN0:%[^,]+]]
  79
  80 // CHECK: call void @__kmpc_dispatch_init_4(ptr {{.+}}, i32 %{{.+}}, i32 1073741859, i32 0, i32 8, i32 1, i32 1)
  81 // CHECK: [[NEXT:%.+]] = call i32 @__kmpc_dispatch_next_4(ptr {{.+}}, i32 %{{.+}}, ptr %{{.+}}, ptr [[LB:%.+]], ptr [[UB:%.+]], ptr %{{.+}})
  82 // CHECK: [[COND:%.+]] = icmp ne i32 [[NEXT]], 0
  83 // CHECK: br i1 [[COND]], label %[[CONT:.+]], label %[[END:.+]]
  84 // CHECK: [[CONT]]:
  85 // CHECK: [[LB_VAL:%.+]] = load i32, ptr [[LB]],
  86 // CHECK: store i32 [[LB_VAL]], ptr [[OMP_IV2:%[^,]+]],
  87
  88 // CHECK: [[IV2:%.+]] = load i32, ptr [[OMP_IV2]]{{.*}}!llvm.access.group
  89 // CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]]{{.*}}!llvm.access.group
  90 // CHECK-NEXT: [[CMP2:%.+]] = icmp sle i32 [[IV2]], [[UB_VAL]]
  91 // CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP2_BODY:.+]], label %[[SIMPLE_LOOP2_END:[^,]+]]
  92   for (int i = 10; i > 1; i--) {
  93 // CHECK: [[SIMPLE_LOOP2_BODY]]:
  94 // Start of body: calculate i from IV:
  95 // CHECK: [[IV2_0:%.+]] = load i32, ptr [[OMP_IV2]]{{.*}}!llvm.access.group
  96 // FIXME: It is interesting, why the following "mul 1" was not constant folded?
  97 // CHECK-NEXT: [[IV2_1:%.+]] = mul nsw i32 [[IV2_0]], 1
  98 // CHECK-NEXT: [[LC_I_1:%.+]] = sub nsw i32 10, [[IV2_1]]
  99 // CHECK-NEXT: store i32 [[LC_I_1]], ptr {{.+}}, !llvm.access.group
 100 //
 101 // CHECK-NEXT: [[LIN0_1:%.+]] = load i64, ptr [[LIN0]]{{.*}}!llvm.access.group
 102 // CHECK-NEXT: [[IV2_2:%.+]] = load i32, ptr [[OMP_IV2]]{{.*}}!llvm.access.group
 103 // CHECK-NEXT: [[LIN_MUL1:%.+]] = mul nsw i32 [[IV2_2]], 3
 104 // CHECK-NEXT: [[LIN_EXT1:%.+]] = sext i32 [[LIN_MUL1]] to i64
 105 // CHECK-NEXT: [[LIN_ADD1:%.+]] = add nsw i64 [[LIN0_1]], [[LIN_EXT1]]
 106 // Update of the privatized version of linear variable!
 107 // CHECK-NEXT: store i64 [[LIN_ADD1]], ptr [[K_PRIVATIZED:%[^,]+]]
 108     a[k]++;
 109     k = k + 3;
 110 // CHECK: [[IV2_2:%.+]] = load i32, ptr [[OMP_IV2]]{{.*}}!llvm.access.group
 111 // CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV2_2]], 1
 112 // CHECK-NEXT: store i32 [[ADD2_2]], ptr [[OMP_IV2]]{{.*}}!llvm.access.group
 113 // br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP2_ID]]
 114   }
 115 // CHECK: [[SIMPLE_LOOP2_END]]:
 116 //
 117 // Update linear vars after loop, as the loop was operating on a private version.
 118 // CHECK: [[LIN0_2:%.+]] = load i64, ptr [[K_PRIVATIZED]]
 119 // CHECK-NEXT: store i64 [[LIN0_2]], ptr [[K_VAR]]
 120 // CHECK: call void @__kmpc_barrier(ptr {{.+}}, i32 %{{.+}})
 121
 122   int lin = 12;
 123   #pragma omp for simd linear(lin : get_val()), linear(g_ptr)
 124
 125 // Init linear private var.
 126 // CHECK: store i32 12, ptr [[LIN_VAR:%[^,]+]]
 127 // CHECK: [[LIN_LOAD:%.+]] = load i32, ptr [[LIN_VAR]]
 128 // CHECK-NEXT: store i32 [[LIN_LOAD]], ptr [[LIN_START:%[^,]+]]
 129 // Remember linear step.
 130 // CHECK: [[CALL_VAL:%.+]] = invoke
 131 // CHECK: store i64 [[CALL_VAL]], ptr [[LIN_STEP:%[^,]+]]
 132
 133 // CHECK: [[GLIN_LOAD:%.+]] = load ptr, ptr [[GLIN_VAR:@[^,]+]]
 134 // CHECK-NEXT: store ptr [[GLIN_LOAD]], ptr [[GLIN_START:%[^,]+]]
 135
 136 // CHECK: call void @__kmpc_for_static_init_8u(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i64 1, i64 1)
 137 // CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]],
 138 // CHECK: [[CMP:%.+]] = icmp ugt i64 [[UB_VAL]], 3
 139 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
 140 // CHECK: [[TRUE]]:
 141 // CHECK: br label %[[SWITCH:[^,]+]]
 142 // CHECK: [[FALSE]]:
 143 // CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]],
 144 // CHECK: br label %[[SWITCH]]
 145 // CHECK: [[SWITCH]]:
 146 // CHECK: [[UP:%.+]] = phi i64 [ 3, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 147 // CHECK: store i64 [[UP]], ptr [[UB]],
 148 // CHECK: [[LB_VAL:%.+]] = load i64, ptr [[LB]],
 149 // CHECK: store i64 [[LB_VAL]], ptr [[OMP_IV3:%[^,]+]],
 150
 151 // CHECK: [[IV3:%.+]] = load i64, ptr [[OMP_IV3]]
 152 // CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]]
 153 // CHECK-NEXT: [[CMP3:%.+]] = icmp ule i64 [[IV3]], [[UB_VAL]]
 154 // CHECK-NEXT: br i1 [[CMP3]], label %[[SIMPLE_LOOP3_BODY:.+]], label %[[SIMPLE_LOOP3_END:[^,]+]]
 155   for (unsigned long long it = 2000; it >= 600; it-=400) {
 156 // CHECK: [[SIMPLE_LOOP3_BODY]]:
 157 // Start of body: calculate it from IV:
 158 // CHECK: [[IV3_0:%.+]] = load i64, ptr [[OMP_IV3]]
 159 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul i64 [[IV3_0]], 400
 160 // CHECK-NEXT: [[LC_IT_2:%.+]] = sub i64 2000, [[LC_IT_1]]
 161 // CHECK-NEXT: store i64 [[LC_IT_2]], ptr
 162 //
 163 // Linear start and step are used to calculate current value of the linear variable.
 164 // CHECK: [[LINSTART:.+]] = load i32, ptr [[LIN_START]]
 165 // CHECK: [[LINSTEP:.+]] = load i64, ptr [[LIN_STEP]]
 166 // CHECK-NOT: store i32 {{.+}}, ptr [[LIN_VAR]],
 167 // CHECK: store i32 {{.+}}, ptr [[LIN_PRIV:%[^,]+]],
 168 // CHECK: [[GLINSTART:.+]] = load ptr, ptr [[GLIN_START]]
 169 // CHECK-NEXT: [[IV3_1:%.+]] = load i64, ptr [[OMP_IV3]]
 170 // CHECK-NEXT: [[MUL:%.+]] = mul i64 [[IV3_1]], 1
 171 // CHECK: [[GEP:%.+]] = getelementptr{{.*}}[[GLINSTART]]
 172 // CHECK-NEXT: store ptr [[GEP]], ptr [[G_PTR_CUR:%[^,]+]]
 173     *g_ptr++ = 0.0;
 174 // CHECK: [[GEP_VAL:%.+]] = load ptr{{.*}}[[G_PTR_CUR]]
 175 // CHECK: store double{{.*}}[[GEP_VAL]]
 176     a[it + lin]++;
 177 // CHECK: [[FLT_INC:%.+]] = fadd float
 178 // CHECK-NEXT: store float [[FLT_INC]],
 179 // CHECK: [[IV3_2:%.+]] = load i64, ptr [[OMP_IV3]]
 180 // CHECK-NEXT: [[ADD3_2:%.+]] = add i64 [[IV3_2]], 1
 181 // CHECK-NEXT: store i64 [[ADD3_2]], ptr [[OMP_IV3]]
 182   }
 183 // CHECK: [[SIMPLE_LOOP3_END]]:
 184 // CHECK: call void @__kmpc_for_static_fini(ptr {{.+}}, i32 %{{.+}})
 185 //
 186 // Linear start and step are used to calculate final value of the linear variables.
 187 // CHECK: [[LIN:%.+]] = load i32, ptr [[LIN_PRIV]],
 188 // CHECK-NEXT: store i32 [[LIN]], ptr [[LIN_VAR]],
 189 // CHECK: [[GLIN:%.+]] = load ptr, ptr [[G_PTR_CUR]],
 190 // CHECK-NEXT: store ptr [[GLIN]], ptr [[GLIN_VAR]],
 191 // CHECK: call void @__kmpc_barrier(ptr {{.+}}, i32 %{{.+}})
 192
 193   #pragma omp for simd
 194 // CHECK: call void @__kmpc_for_static_init_4(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i32 1, i32 1)
 195 // CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]],
 196 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 3
 197 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
 198 // CHECK: [[TRUE]]:
 199 // CHECK: br label %[[SWITCH:[^,]+]]
 200 // CHECK: [[FALSE]]:
 201 // CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]],
 202 // CHECK: br label %[[SWITCH]]
 203 // CHECK: [[SWITCH]]:
 204 // CHECK: [[UP:%.+]] = phi i32 [ 3, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 205 // CHECK: store i32 [[UP]], ptr [[UB]],
 206 // CHECK: [[LB_VAL:%.+]] = load i32, ptr [[LB]],
 207 // CHECK: store i32 [[LB_VAL]], ptr [[OMP_IV4:%[^,]+]],
 208
 209 // CHECK: [[IV4:%.+]] = load i32, ptr [[OMP_IV4]]
 210 // CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]]
 211 // CHECK-NEXT: [[CMP4:%.+]] = icmp sle i32 [[IV4]], [[UB_VAL]]
 212 // CHECK-NEXT: br i1 [[CMP4]], label %[[SIMPLE_LOOP4_BODY:.+]], label %[[SIMPLE_LOOP4_END:[^,]+]]
 213   for (short it = 6; it <= 20; it-=-4) {
 214 // CHECK: [[SIMPLE_LOOP4_BODY]]:
 215 // Start of body: calculate it from IV:
 216 // CHECK: [[IV4_0:%.+]] = load i32, ptr [[OMP_IV4]]
 217 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i32 [[IV4_0]], 4
 218 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i32 6, [[LC_IT_1]]
 219 // CHECK-NEXT: [[LC_IT_3:%.+]] = trunc i32 [[LC_IT_2]] to i16
 220 // CHECK-NEXT: store i16 [[LC_IT_3]], ptr
 221
 222 // CHECK: [[IV4_2:%.+]] = load i32, ptr [[OMP_IV4]]
 223 // CHECK-NEXT: [[ADD4_2:%.+]] = add nsw i32 [[IV4_2]], 1
 224 // CHECK-NEXT: store i32 [[ADD4_2]], ptr [[OMP_IV4]]
 225   }
 226 // CHECK: [[SIMPLE_LOOP4_END]]:
 227 // CHECK: call void @__kmpc_for_static_fini(ptr {{.+}}, i32 %{{.+}})
 228 // CHECK: call void @__kmpc_barrier(ptr {{.+}}, i32 %{{.+}})
 229
 230   #pragma omp for simd
 231 // CHECK: call void @__kmpc_for_static_init_4(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i32 1, i32 1)
 232 // CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]],
 233 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 25
 234 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
 235 // CHECK: [[TRUE]]:
 236 // CHECK: br label %[[SWITCH:[^,]+]]
 237 // CHECK: [[FALSE]]:
 238 // CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]],
 239 // CHECK: br label %[[SWITCH]]
 240 // CHECK: [[SWITCH]]:
 241 // CHECK: [[UP:%.+]] = phi i32 [ 25, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 242 // CHECK: store i32 [[UP]], ptr [[UB]],
 243 // CHECK: [[LB_VAL:%.+]] = load i32, ptr [[LB]],
 244 // CHECK: store i32 [[LB_VAL]], ptr [[OMP_IV5:%[^,]+]],
 245
 246 // CHECK: [[IV5:%.+]] = load i32, ptr [[OMP_IV5]]
 247 // CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]]
 248 // CHECK-NEXT: [[CMP5:%.+]] = icmp sle i32 [[IV5]], [[UB_VAL]]
 249 // CHECK-NEXT: br i1 [[CMP5]], label %[[SIMPLE_LOOP5_BODY:.+]], label %[[SIMPLE_LOOP5_END:[^,]+]]
 250   for (unsigned char it = 'z'; it >= 'a'; it+=-1) {
 251 // CHECK: [[SIMPLE_LOOP5_BODY]]:
 252 // Start of body: calculate it from IV:
 253 // CHECK: [[IV5_0:%.+]] = load i32, ptr [[OMP_IV5]]
 254 // CHECK-NEXT: [[IV5_1:%.+]] = mul nsw i32 [[IV5_0]], 1
 255 // CHECK-NEXT: [[LC_IT_1:%.+]] = sub nsw i32 122, [[IV5_1]]
 256 // CHECK-NEXT: [[LC_IT_2:%.+]] = trunc i32 [[LC_IT_1]] to i8
 257 // CHECK-NEXT: store i8 [[LC_IT_2]], ptr
 258
 259 // CHECK: [[IV5_2:%.+]] = load i32, ptr [[OMP_IV5]]
 260 // CHECK-NEXT: [[ADD5_2:%.+]] = add nsw i32 [[IV5_2]], 1
 261 // CHECK-NEXT: store i32 [[ADD5_2]], ptr [[OMP_IV5]]
 262   }
 263 // CHECK: [[SIMPLE_LOOP5_END]]:
 264 // CHECK: call void @__kmpc_for_static_fini(ptr {{.+}}, i32 %{{.+}})
 265 // CHECK: call void @__kmpc_barrier(ptr {{.+}}, i32 %{{.+}})
 266
 267 // CHECK-NOT: mul i32 %{{.+}}, 10
 268   #pragma omp for simd
 269   for (unsigned i=100; i<10; i+=10) {
 270   }
 271
 272   int A;
 273   #pragma omp parallel
 274   {
 275   // CHECK: store i32 -1, ptr [[A:%.+]],
 276   A = -1;
 277   #pragma omp for simd lastprivate(A)
 278 // CHECK: call void @__kmpc_for_static_init_8(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i64 1, i64 1)
 279 // CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]],
 280 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 6
 281 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
 282 // CHECK: [[TRUE]]:
 283 // CHECK: br label %[[SWITCH:[^,]+]]
 284 // CHECK: [[FALSE]]:
 285 // CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]],
 286 // CHECK: br label %[[SWITCH]]
 287 // CHECK: [[SWITCH]]:
 288 // CHECK: [[UP:%.+]] = phi i64 [ 6, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 289 // CHECK: store i64 [[UP]], ptr [[UB]],
 290 // CHECK: [[LB_VAL:%.+]] = load i64, ptr [[LB]],
 291 // CHECK: store i64 [[LB_VAL]], ptr [[OMP_IV7:%[^,]+]],
 292
 293 // CHECK: br label %[[SIMD_LOOP7_COND:[^,]+]]
 294 // CHECK: [[SIMD_LOOP7_COND]]:
 295 // CHECK-NEXT: [[IV7:%.+]] = load i64, ptr [[OMP_IV7]]
 296 // CHECK-NEXT: [[UB_VAL:%.+]] = load i64, ptr [[UB]]
 297 // CHECK-NEXT: [[CMP7:%.+]] = icmp sle i64 [[IV7]], [[UB_VAL]]
 298 // CHECK-NEXT: br i1 [[CMP7]], label %[[SIMPLE_LOOP7_BODY:.+]], label %[[SIMPLE_LOOP7_END:[^,]+]]
 299   for (long long i = -10; i < 10; i += 3) {
 300 // CHECK: [[SIMPLE_LOOP7_BODY]]:
 301 // Start of body: calculate i from IV:
 302 // CHECK: [[IV7_0:%.+]] = load i64, ptr [[OMP_IV7]]
 303 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV7_0]], 3
 304 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i64 -10, [[LC_IT_1]]
 305 // CHECK-NEXT: store i64 [[LC_IT_2]], ptr [[LC:%[^,]+]],
 306 // CHECK-NEXT: [[LC_VAL:%.+]] = load i64, ptr [[LC]]
 307 // CHECK-NEXT: [[CONV:%.+]] = trunc i64 [[LC_VAL]] to i32
 308 // CHECK-NEXT: store i32 [[CONV]], ptr [[A_PRIV:%[^,]+]],
 309     A = i;
 310 // CHECK: [[IV7_2:%.+]] = load i64, ptr [[OMP_IV7]]
 311 // CHECK-NEXT: [[ADD7_2:%.+]] = add nsw i64 [[IV7_2]], 1
 312 // CHECK-NEXT: store i64 [[ADD7_2]], ptr [[OMP_IV7]]
 313   }
 314 // CHECK: [[SIMPLE_LOOP7_END]]:
 315 // CHECK: call void @__kmpc_for_static_fini(ptr {{.+}}, i32 %{{.+}})
 316 // CHECK: load i32, ptr
 317 // CHECK: icmp ne i32 %{{.+}}, 0
 318 // CHECK: br i1 %{{.+}}, label
 319 // CHECK: [[A_PRIV_VAL:%.+]] = load i32, ptr [[A_PRIV]],
 320 // CHECK-NEXT: store i32 [[A_PRIV_VAL]], ptr %{{.+}},
 321 // CHECK-NEXT: br label
 322 // CHECK: call void @__kmpc_barrier(ptr {{.+}}, i32 %{{.+}})
 323   }
 324   int R;
 325   #pragma omp parallel
 326   {
 327   // CHECK: store i32 -1, ptr [[R:%[^,]+]],
 328   R = -1;
 329 // CHECK: store i32 1, ptr [[R_PRIV:%[^,]+]],
 330 // OMP50: [[A_VAL:%.+]] = load i32, ptr %
 331 // OMP50: [[COND:%.+]] = icmp ne i32 [[A_VAL]], 0
 332 // OMP50: br i1 [[COND]], label {{%?}}[[THEN:[^,]+]], label {{%?}}[[ELSE:[^,]+]]
 333 // OMP50: [[THEN]]:
 334 #ifdef OMP5
 335   #pragma omp for simd reduction(*:R) if (simd:A) nontemporal(R)
 336 #else
 337   #pragma omp for simd reduction(*:R)
 338 #endif
 339 // CHECK: call void @__kmpc_for_static_init_8(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i64 1, i64 1)
 340 // CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]],
 341 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 6
 342 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
 343 // CHECK: [[TRUE]]:
 344 // CHECK: br label %[[SWITCH:[^,]+]]
 345 // CHECK: [[FALSE]]:
 346 // CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]],
 347 // CHECK: br label %[[SWITCH]]
 348 // CHECK: [[SWITCH]]:
 349 // CHECK: [[UP:%.+]] = phi i64 [ 6, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 350 // CHECK: store i64 [[UP]], ptr [[UB]],
 351 // CHECK: [[LB_VAL:%.+]] = load i64, ptr [[LB]],
 352 // CHECK: store i64 [[LB_VAL]], ptr [[OMP_IV8:%[^,]+]],
 353
 354 // CHECK: br label %[[SIMD_LOOP8_COND:[^,]+]]
 355 // CHECK: [[SIMD_LOOP8_COND]]:
 356 // CHECK-NEXT: [[IV8:%.+]] = load i64, ptr [[OMP_IV8]]
 357 // CHECK-NEXT: [[UB_VAL:%.+]] = load i64, ptr [[UB]]
 358 // CHECK-NEXT: [[CMP8:%.+]] = icmp sle i64 [[IV8]], [[UB_VAL]]
 359 // CHECK-NEXT: br i1 [[CMP8]], label %[[SIMPLE_LOOP8_BODY:.+]], label %[[SIMPLE_LOOP8_END:[^,]+]]
 360   for (long long i = -10; i < 10; i += 3) {
 361 // CHECK: [[SIMPLE_LOOP8_BODY]]:
 362 // Start of body: calculate i from IV:
 363 // CHECK: [[IV8_0:%.+]] = load i64, ptr [[OMP_IV8]]
 364 // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV8_0]], 3
 365 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i64 -10, [[LC_IT_1]]
 366 // CHECK-NEXT: store i64 [[LC_IT_2]], ptr [[LC:%[^,]+]],
 367 // CHECK-NEXT: [[LC_VAL:%.+]] = load i64, ptr [[LC]]
 368 // OMP45: store i32 %{{.+}}, ptr [[R_PRIV]],
 369 // OMP50: store i32 %{{.+}}, ptr [[R_PRIV]],{{.*}}!nontemporal
 370     R *= i;
 371 // CHECK: [[IV8_2:%.+]] = load i64, ptr [[OMP_IV8]]
 372 // CHECK-NEXT: [[ADD8_2:%.+]] = add nsw i64 [[IV8_2]], 1
 373 // CHECK-NEXT: store i64 [[ADD8_2]], ptr [[OMP_IV8]]
 374 // CHECK-NEXT: br label {{%?}}[[SIMD_LOOP8_COND]], {{.*}}!llvm.loop ![[SIMD_LOOP:.+]]
 375   }
 376 // CHECK: [[SIMPLE_LOOP8_END]]:
 377 // OMP50:  br label {{%?}}[[IF_EXIT:[^,]+]]
 378 // OMP50:  [[ELSE]]:
 379 // OMP50: call void @__kmpc_for_static_init_8(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i64 1, i64 1)
 380 // OMP50: [[UB_VAL:%.+]] = load i64, ptr [[UB]],
 381 // OMP50: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 6
 382 // OMP50: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
 383 // OMP50: [[TRUE]]:
 384 // OMP50: br label %[[SWITCH:[^,]+]]
 385 // OMP50: [[FALSE]]:
 386 // OMP50: [[UB_VAL:%.+]] = load i64, ptr [[UB]],
 387 // OMP50: br label %[[SWITCH]]
 388 // OMP50: [[SWITCH]]:
 389 // OMP50: [[UP:%.+]] = phi i64 [ 6, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 390 // OMP50: store i64 [[UP]], ptr [[UB]],
 391 // OMP50: [[LB_VAL:%.+]] = load i64, ptr [[LB]],
 392 // OMP50: store i64 [[LB_VAL]], ptr [[OMP_IV8:%[^,]+]],
 393
 394 // OMP50: br label %[[SIMD_LOOP8_COND:[^,]+]]
 395 // OMP50: [[SIMD_LOOP8_COND]]:
 396 // OMP50-NEXT: [[IV8:%.+]] = load i64, ptr [[OMP_IV8]]
 397 // OMP50-NEXT: [[UB_VAL:%.+]] = load i64, ptr [[UB]]
 398 // OMP50-NEXT: [[CMP8:%.+]] = icmp sle i64 [[IV8]], [[UB_VAL]]
 399 // OMP50-NEXT: br i1 [[CMP8]], label %[[SIMPLE_LOOP8_BODY:.+]], label %[[SIMPLE_LOOP8_END:[^,]+]]
 400 // OMP50: [[SIMPLE_LOOP8_BODY]]:
 401 // Start of body: calculate i from IV:
 402 // OMP50: [[IV8_0:%.+]] = load i64, ptr [[OMP_IV8]]
 403 // OMP50-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV8_0]], 3
 404 // OMP50-NEXT: [[LC_IT_2:%.+]] = add nsw i64 -10, [[LC_IT_1]]
 405 // OMP50-NEXT: store i64 [[LC_IT_2]], ptr [[LC:%[^,]+]],
 406 // OMP50-NEXT: [[LC_VAL:%.+]] = load i64, ptr [[LC]]
 407 // OMP50: store i32 %{{.+}}, ptr [[R_PRIV]],
 408 // OMP50: [[IV8_2:%.+]] = load i64, ptr [[OMP_IV8]]
 409 // OMP50-NEXT: [[ADD8_2:%.+]] = add nsw i64 [[IV8_2]], 1
 410 // OMP50-NEXT: store i64 [[ADD8_2]], ptr [[OMP_IV8]]
 411 // OMP50-NEXT: br label {{%?}}[[SIMD_LOOP8_COND]], {{.*}}!llvm.loop ![[NOSIMD_LOOP:.+]]
 412 // OMP50: [[SIMPLE_LOOP8_END]]:
 413 // OMP50:  br label {{%?}}[[IF_EXIT]]
 414 // OMP50:  [[IF_EXIT]]:
 415
 416 // CHECK: call void @__kmpc_for_static_fini(ptr {{.+}}, i32 %{{.+}})
 417 // CHECK: call i32 @__kmpc_reduce(
 418 // CHECK: [[R_PRIV_VAL:%.+]] = load i32, ptr [[R_PRIV]],
 419 // CHECK: [[RED:%.+]] = mul nsw i32 %{{.+}}, [[R_PRIV_VAL]]
 420 // CHECK-NEXT: store i32 [[RED]], ptr %{{.+}},
 421 // CHECK-NEXT: call void @__kmpc_end_reduce(
 422 // CHECK: call void @__kmpc_barrier(ptr {{.+}}, i32 %{{.+}})
 423   }
 424 }
 425
 426 template <class T, unsigned K> T tfoo(T a) { return a + K; }
 427
 428 template <typename T, unsigned N>
 429 int templ1(T a, T *z) {
 430   #pragma omp for simd collapse(N) schedule(simd: static, N)
 431   for (int i = 0; i < N * 2; i++) {
 432     for (long long j = 0; j < (N + N + N + N); j += 2) {
 433       z[i + j] = a + tfoo<T, N>(i + j);
 434     }
 435   }
 436   return 0;
 437 }
 438
 439 // Instatiation templ1<float,2>
 440 // CHECK-LABEL: define {{.*i32}} @{{.*}}templ1{{.*}}(float noundef {{.+}}, ptr noundef {{.+}})
 441 // CHECK: call void @__kmpc_for_static_init_8(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 45, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i64 1, i64 2)
 442 // CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]],
 443 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 15
 444 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
 445 // CHECK: [[TRUE]]:
 446 // CHECK: br label %[[SWITCH:[^,]+]]
 447 // CHECK: [[FALSE]]:
 448 // CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]],
 449 // CHECK: br label %[[SWITCH]]
 450 // CHECK: [[SWITCH]]:
 451 // CHECK: [[UP:%.+]] = phi i64 [ 15, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 452 // CHECK: store i64 [[UP]], ptr [[UB]],
 453 // CHECK: [[LB_VAL:%.+]] = load i64, ptr [[LB]],
 454 // CHECK: store i64 [[LB_VAL]], ptr [[T1_OMP_IV:%[^,]+]],
 455
 456 // ...
 457 // CHECK: icmp sle i64
 458 // CHECK: [[IV:%.+]] = load i64, ptr [[T1_OMP_IV]]
 459 // CHECK-NEXT: [[UB_VAL:%.+]] = load i64, ptr [[UB]]
 460 // CHECK-NEXT: [[CMP1:%.+]] = icmp sle i64 [[IV]], [[UB_VAL]]
 461 // CHECK-NEXT: br i1 [[CMP1]], label %[[T1_BODY:.+]], label %[[T1_END:[^,]+]]
 462 // CHECK: [[T1_BODY]]:
 463 // Loop counters i and j updates:
 464 // CHECK: [[IV1:%.+]] = load i64, ptr [[T1_OMP_IV]]
 465 // CHECK-NEXT: [[I_1:%.+]] = sdiv i64 [[IV1]], 4
 466 // CHECK-NEXT: [[I_1_MUL1:%.+]] = mul nsw i64 [[I_1]], 1
 467 // CHECK-NEXT: [[I_1_ADD0:%.+]] = add nsw i64 0, [[I_1_MUL1]]
 468 // CHECK-NEXT: [[I_2:%.+]] = trunc i64 [[I_1_ADD0]] to i32
 469 // CHECK-NEXT: store i32 [[I_2]], ptr
 470 // CHECK: [[IV2:%.+]] = load i64, ptr [[T1_OMP_IV]]
 471 // CHECK-NEXT: [[IV2_1:%.+]] = load i64, ptr [[T1_OMP_IV]]
 472 // CHECK-NEXT: [[DIV_2:%.+]] = sdiv i64 [[IV2_1]], 4
 473 // CHECK-NEXT: [[MUL_2:%.+]] = mul nsw i64 [[DIV_2]], 4
 474 // CHECK-NEXT: [[J_1:%.+]] = sub nsw i64 [[IV2]], [[MUL_2]]
 475 // CHECK-NEXT: [[J_2:%.+]] = mul nsw i64 [[J_1]], 2
 476 // CHECK-NEXT: [[J_2_ADD0:%.+]] = add nsw i64 0, [[J_2]]
 477 // CHECK-NEXT: store i64 [[J_2_ADD0]], ptr
 478 // simd.for.inc:
 479 // CHECK: [[IV3:%.+]] = load i64, ptr [[T1_OMP_IV]]
 480 // CHECK-NEXT: [[INC:%.+]] = add nsw i64 [[IV3]], 1
 481 // CHECK-NEXT: store i64 [[INC]], ptr [[T1_OMP_IV]]
 482 // CHECK-NEXT: br label {{%.+}}
 483 // CHECK: [[T1_END]]:
 484 // CHECK: call void @__kmpc_for_static_fini(ptr {{.+}}, i32 %{{.+}})
 485 // CHECK: call void @__kmpc_barrier(ptr {{.+}}, i32 %{{.+}})
 486 // CHECK: ret i32 0
 487 //
 488 void inst_templ1() {
 489   float a;
 490   float z[100];
 491   templ1<float,2> (a, z);
 492 }
 493
 494
 495 typedef int MyIdx;
 496
 497 class IterDouble {
 498   double *Ptr;
 499 public:
 500   IterDouble operator++ () const {
 501     IterDouble n;
 502     n.Ptr = Ptr + 1;
 503     return n;
 504   }
 505   bool operator < (const IterDouble &that) const {
 506     return Ptr < that.Ptr;
 507   }
 508   double & operator *() const {
 509     return *Ptr;
 510   }
 511   MyIdx operator - (const IterDouble &that) const {
 512     return (MyIdx) (Ptr - that.Ptr);
 513   }
 514   IterDouble operator + (int Delta) {
 515     IterDouble re;
 516     re.Ptr = Ptr + Delta;
 517     return re;
 518   }
 519
 520   ///~IterDouble() {}
 521 };
 522
 523 // CHECK-LABEL: define {{.*void}} @{{.*}}iter_simple{{.*}}
 524 void iter_simple(IterDouble ia, IterDouble ib, IterDouble ic) {
 525 //
 526 // Calculate number of iterations before the loop body.
 527 // CHECK: [[DIFF1:%.+]] = invoke {{.*}}i32 @{{.*}}IterDouble{{.*}}
 528 // CHECK: [[DIFF2:%.+]] = sub nsw i32 [[DIFF1]], 1
 529 // CHECK-NEXT: [[DIFF3:%.+]] = add nsw i32 [[DIFF2]], 1
 530 // CHECK-NEXT: [[DIFF4:%.+]] = sdiv i32 [[DIFF3]], 1
 531 // CHECK-NEXT: [[DIFF5:%.+]] = sub nsw i32 [[DIFF4]], 1
 532 // CHECK-NEXT: store i32 [[DIFF5]], ptr [[OMP_LAST_IT:%[^,]+]]{{.+}}
 533   #pragma omp for simd
 534
 535 // CHECK: call void @__kmpc_for_static_init_4(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i32 1, i32 1)
 536 // CHECK-DAG: [[UB_VAL:%.+]] = load i32, ptr [[UB]],
 537 // CHECK-DAG: [[OMP_LAST_IT_VAL:%.+]] = load i32, ptr [[OMP_LAST_IT]],
 538 // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], [[OMP_LAST_IT_VAL]]
 539 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
 540 // CHECK: [[TRUE]]:
 541 // CHECK: [[OMP_LAST_IT_VAL:%.+]] = load i32, ptr [[OMP_LAST_IT]],
 542 // CHECK: br label %[[SWITCH:[^,]+]]
 543 // CHECK: [[FALSE]]:
 544 // CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]],
 545 // CHECK: br label %[[SWITCH]]
 546 // CHECK: [[SWITCH]]:
 547 // CHECK: [[UP:%.+]] = phi i32 [ [[OMP_LAST_IT_VAL]], %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 548 // CHECK: store i32 [[UP]], ptr [[UB]],
 549 // CHECK: [[LB_VAL:%.+]] = load i32, ptr [[LB]],
 550 // CHECK: store i32 [[LB_VAL]], ptr [[IT_OMP_IV:%[^,]+]],
 551
 552 // CHECK: [[IV:%.+]] = load i32, ptr [[IT_OMP_IV]]
 553 // CHECK-NEXT: [[UB_VAL:%.+]] = load i32, ptr [[UB]]
 554 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB_VAL]]
 555 // CHECK-NEXT: br i1 [[CMP]], label %[[IT_BODY:[^,]+]], label %[[IT_END:[^,]+]]
 556   for (IterDouble i = ia; i < ib; ++i) {
 557 // CHECK: [[IT_BODY]]:
 558 // Start of body: calculate i from index:
 559 // CHECK: [[IV1:%.+]] = load i32, ptr [[IT_OMP_IV]]
 560 // Call of operator+ (i, IV).
 561 // CHECK: {{%.+}} = invoke {{.+}} @{{.*}}IterDouble{{.*}}
 562 // ... loop body ...
 563    *i = *ic * 0.5;
 564 // Float multiply and save result.
 565 // CHECK: [[MULR:%.+]] = fmul double {{%.+}}, 5.000000e-01
 566 // CHECK-NEXT: invoke {{.+}} @{{.*}}IterDouble{{.*}}
 567 // CHECK: store double [[MULR:%.+]], ptr [[RESULT_ADDR:%.+]]
 568    ++ic;
 569 //
 570 // CHECK: [[IV2:%.+]] = load i32, ptr [[IT_OMP_IV]]
 571 // CHECK-NEXT: [[ADD2:%.+]] = add nsw i32 [[IV2]], 1
 572 // CHECK-NEXT: store i32 [[ADD2]], ptr [[IT_OMP_IV]]
 573 // br label %{{.*}}, !llvm.loop ![[ITER_LOOP_ID]]
 574   }
 575 // CHECK: [[IT_END]]:
 576 // CHECK: call void @__kmpc_for_static_fini(ptr {{.+}}, i32 %{{.+}})
 577 // CHECK: call void @__kmpc_barrier(ptr {{.+}}, i32 %{{.+}})
 578 // CHECK: ret void
 579 }
 580
 581
 582 // CHECK-LABEL: define {{.*void}} @{{.*}}collapsed{{.*}}
 583 void collapsed(float *a, float *b, float *c, float *d) {
 584   int i; // outer loop counter
 585   unsigned j; // middle loop couter, leads to unsigned icmp in loop header.
 586   // k declared in the loop init below
 587   short l; // inner loop counter
 588 // CHECK: call void @__kmpc_for_static_init_4u(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i32 1, i32 1)
 589 // CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]],
 590 // CHECK: [[CMP:%.+]] = icmp ugt i32 [[UB_VAL]], 119
 591 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
 592 // CHECK: [[TRUE]]:
 593 // CHECK: br label %[[SWITCH:[^,]+]]
 594 // CHECK: [[FALSE]]:
 595 // CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]],
 596 // CHECK: br label %[[SWITCH]]
 597 // CHECK: [[SWITCH]]:
 598 // CHECK: [[UP:%.+]] = phi i32 [ 119, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 599 // CHECK: store i32 [[UP]], ptr [[UB]],
 600 // CHECK: [[LB_VAL:%.+]] = load i32, ptr [[LB]],
 601 // CHECK: store i32 [[LB_VAL]], ptr [[OMP_IV:%[^,]+]],
 602 //
 603   #pragma omp for simd collapse(4)
 604
 605 // CHECK: [[IV:%.+]] = load i32, ptr [[OMP_IV]]
 606 // CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]]
 607 // CHECK-NEXT: [[CMP:%.+]] = icmp ule i32 [[IV]], [[UB_VAL]]
 608 // CHECK-NEXT: br i1 [[CMP]], label %[[COLL1_BODY:[^,]+]], label %[[COLL1_END:[^,]+]]
 609   for (i = 1; i < 3; i++) // 2 iterations
 610     for (j = 2u; j < 5u; j++) //3 iterations
 611       for (int k = 3; k <= 6; k++) // 4 iterations
 612         for (l = 4; l < 9; ++l) // 5 iterations
 613         {
 614 // CHECK: [[COLL1_BODY]]:
 615 // Start of body: calculate i from index:
 616 // CHECK: [[IV1:%.+]] = load i32, ptr [[OMP_IV]]
 617 // Calculation of the loop counters values.
 618 // CHECK: [[CALC_I_1:%.+]] = udiv i32 [[IV1]], 60
 619 // CHECK-NEXT: [[CALC_I_1_MUL1:%.+]] = mul i32 [[CALC_I_1]], 1
 620 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i32 1, [[CALC_I_1_MUL1]]
 621 // CHECK-NEXT: store i32 [[CALC_I_2]], ptr [[LC_I:.+]]
 622
 623 // CHECK: [[IV1_2:%.+]] = load i32, ptr [[OMP_IV]]
 624 // CHECK: [[IV1_2_1:%.+]] = load i32, ptr [[OMP_IV]]
 625 // CHECK-NEXT: [[CALC_J_1:%.+]] = udiv i32 [[IV1_2_1]], 60
 626 // CHECK-NEXT: [[MUL_1:%.+]] = mul i32 [[CALC_J_1]], 60
 627 // CHECK-NEXT: [[SUB_3:%.+]] = sub i32 [[IV1_2]], [[MUL_1]]
 628 // CHECK-NEXT: [[CALC_J_2:%.+]] = udiv i32 [[SUB_3]], 20
 629 // CHECK-NEXT: [[CALC_J_2_MUL1:%.+]] = mul i32 [[CALC_J_2]], 1
 630 // CHECK-NEXT: [[CALC_J_3:%.+]] = add i32 2, [[CALC_J_2_MUL1]]
 631 // CHECK-NEXT: store i32 [[CALC_J_3]], ptr [[LC_J:.+]]
 632
 633 // CHECK: [[IV1_3:%.+]] = load i32, ptr [[OMP_IV]]
 634 // CHECK: [[IV1_3_1:%.+]] = load i32, ptr [[OMP_IV]]
 635 // CHECK-NEXT: [[DIV_1:%.+]] = udiv i32 [[IV1_3_1]], 60
 636 // CHECK-NEXT: [[MUL_2:%.+]] = mul i32 [[DIV_1]], 60
 637 // CHECK-NEXT: [[ADD_3:%.+]] = sub i32 [[IV1_3]], [[MUL_2]]
 638
 639 // CHECK: [[IV1_4:%.+]] = load i32, ptr [[OMP_IV]]
 640 // CHECK: [[IV1_4_1:%.+]] = load i32, ptr [[OMP_IV]]
 641 // CHECK-NEXT: [[DIV_2:%.+]] = udiv i32 [[IV1_4_1]], 60
 642 // CHECK-NEXT: [[MUL_3:%.+]] = mul i32 [[DIV_2]], 60
 643 // CHECK-NEXT: [[SUB_6:%.+]] = sub i32 [[IV1_4]], [[MUL_3]]
 644 // CHECK-NEXT: [[DIV_3:%.+]] = udiv i32 [[SUB_6]], 20
 645 // CHECK-NEXT: [[MUL_4:%.+]] = mul i32 [[DIV_3]], 20
 646 // CHECK-NEXT: [[SUB_7:%.+]] = sub i32 [[ADD_3]], [[MUL_4]]
 647 // CHECK-NEXT: [[DIV_4:%.+]] = udiv i32 [[SUB_7]], 5
 648 // CHECK-NEXT: [[MUL_5:%.+]] = mul i32 [[DIV_4]], 1
 649 // CHECK-NEXT: [[ADD_6:%.+]] = add i32 3, [[MUL_5]]
 650 // CHECK-NEXT: store i32 [[ADD_6]], ptr [[LC_K:.+]]
 651
 652 // CHECK: [[IV1_5:%.+]] = load i32, ptr [[OMP_IV]]
 653 // CHECK: [[IV1_5_1:%.+]] = load i32, ptr [[OMP_IV]]
 654 // CHECK-NEXT: [[DIV_5:%.+]] = udiv i32 [[IV1_5_1]], 60
 655 // CHECK-NEXT: [[MUL_6:%.+]] = mul i32 [[DIV_5]], 60
 656 // CHECK-NEXT: [[ADD_7:%.+]] = sub i32 [[IV1_5]], [[MUL_6]]
 657
 658 // CHECK: [[IV1_6:%.+]] = load i32, ptr [[OMP_IV]]
 659 // CHECK: [[IV1_6_1:%.+]] = load i32, ptr [[OMP_IV]]
 660 // CHECK-NEXT: [[DIV_6:%.+]] = udiv i32 [[IV1_6_1]], 60
 661 // CHECK-NEXT: [[MUL_7:%.+]] = mul i32 [[DIV_6]], 60
 662 // CHECK-NEXT: [[SUB_10:%.+]] = sub i32 [[IV1_6]], [[MUL_7]]
 663 // CHECK-NEXT: [[DIV_7:%.+]] = udiv i32 [[SUB_10]], 20
 664 // CHECK-NEXT: [[MUL_8:%.+]] = mul i32 [[DIV_7]], 20
 665 // CHECK-NEXT: [[ADD_9:%.+]] = sub i32 [[ADD_7]], [[MUL_8]]
 666
 667 // CHECK: [[IV1_7:%.+]] = load i32, ptr [[OMP_IV]]
 668 // CHECK: [[IV1_7_1:%.+]] = load i32, ptr [[OMP_IV]]
 669 // CHECK-NEXT: [[DIV_8:%.+]] = udiv i32 [[IV1_7_1]], 60
 670 // CHECK-NEXT: [[MUL_9:%.+]] = mul i32 [[DIV_8]], 60
 671 // CHECK-NEXT: [[ADD_10:%.+]] = sub i32 [[IV1_7]], [[MUL_9]]
 672
 673 // CHECK: [[IV1_8:%.+]] = load i32, ptr [[OMP_IV]]
 674 // CHECK: [[IV1_8_1:%.+]] = load i32, ptr [[OMP_IV]]
 675 // CHECK-NEXT: [[DIV_3:%.+]] = udiv i32 [[IV1_8_1]], 60
 676 // CHECK-NEXT: [[MUL_4:%.+]] = mul i32 [[DIV_3]], 60
 677 // CHECK-NEXT: [[SUB_7:%.+]] = sub i32 [[IV1_8]], [[MUL_4]]
 678 // CHECK-NEXT: [[DIV_4:%.+]] = udiv i32 [[SUB_7]], 20
 679 // CHECK-NEXT: [[MUL_5:%.+]] = mul i32 [[DIV_4]], 20
 680 // CHECK-NEXT: [[SUB_8:%.+]] = sub i32 [[ADD_10]], [[MUL_5]]
 681 // CHECK-NEXT: [[DIV_5:%.+]] = udiv i32 [[SUB_8]], 5
 682 // CHECK-NEXT: [[MUL_6:%.+]] = mul i32 [[DIV_5]], 5
 683 // CHECK-NEXT: [[SUB_9:%.+]] = sub i32 [[ADD_9]], [[MUL_6]]
 684 // CHECK-NEXT: [[MUL_6:%.+]] = mul i32 [[SUB_9]], 1
 685 // CHECK-NEXT: [[CALC_L_2:%.+]] = add i32 4, [[MUL_6]]
 686 // CHECK-NEXT: [[CALC_L_3:%.+]] = trunc i32 [[CALC_L_2]] to i16
 687 // CHECK-NEXT: store i16 [[CALC_L_3]], ptr [[LC_L:.+]]
 688 // ... loop body ...
 689 // End of body: store into a[i]:
 690 // CHECK: store float [[RESULT:%.+]], ptr [[RESULT_ADDR:%.+]]
 691     float res = b[j] * c[k];
 692     a[i] = res * d[l];
 693 // CHECK: [[IV2:%.+]] = load i32, ptr [[OMP_IV]]
 694 // CHECK-NEXT: [[ADD2:%.+]] = add i32 [[IV2]], 1
 695 // CHECK-NEXT: store i32 [[ADD2]], ptr [[OMP_IV]]
 696 // br label %{{[^,]+}}, !llvm.loop ![[COLL1_LOOP_ID]]
 697 // CHECK: [[COLL1_END]]:
 698   }
 699 // i,j,l are updated; k is not updated.
 700 // CHECK: call void @__kmpc_for_static_fini(ptr {{.+}}, i32 %{{.+}})
 701 // CHECK: br i1
 702 // CHECK: store i32 3, ptr
 703 // CHECK-NEXT: store i32 5,
 704 // CHECK-NEXT: store i32 7,
 705 // CHECK-NEXT: store i16 9, ptr
 706 // CHECK: call void @__kmpc_barrier(ptr {{.+}}, i32 %{{.+}})
 707 // CHECK: ret void
 708 }
 709
 710 extern char foo();
 711 extern double globalfloat;
 712
 713 // CHECK-LABEL: define {{.*void}} @{{.*}}widened{{.*}}
 714 void widened(float *a, float *b, float *c, float *d) {
 715   int i; // outer loop counter
 716   short j; // inner loop counter
 717   globalfloat = 1.0;
 718   int localint = 1;
 719 // CHECK: store double {{.+}}, ptr [[GLOBALFLOAT:@.+]]
 720 // Counter is widened to 64 bits.
 721 // CHECK:     [[MUL:%.+]] = mul nsw i64 2, %{{.+}}
 722 // CHECK-NEXT: [[SUB:%.+]] = sub nsw i64 [[MUL]], 1
 723 // CHECK-NEXT: store i64 [[SUB]], ptr [[OMP_LAST_IT:%[^,]+]],
 724 // CHECK: call void @__kmpc_for_static_init_8(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i64 1, i64 1)
 725 // CHECK-DAG: [[UB_VAL:%.+]] = load i64, ptr [[UB]],
 726 // CHECK-DAG: [[OMP_LAST_IT_VAL:%.+]] = load i64, ptr [[OMP_LAST_IT]],
 727 // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], [[OMP_LAST_IT_VAL]]
 728 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]]
 729 // CHECK: [[TRUE]]:
 730 // CHECK: [[OMP_LAST_IT_VAL:%.+]] = load i64, ptr [[OMP_LAST_IT]],
 731 // CHECK: br label %[[SWITCH:[^,]+]]
 732 // CHECK: [[FALSE]]:
 733 // CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]],
 734 // CHECK: br label %[[SWITCH]]
 735 // CHECK: [[SWITCH]]:
 736 // CHECK: [[UP:%.+]] = phi i64 [ [[OMP_LAST_IT_VAL]], %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ]
 737 // CHECK: store i64 [[UP]], ptr [[UB]],
 738 // CHECK: [[LB_VAL:%.+]] = load i64, ptr [[LB]],
 739 // CHECK: store i64 [[LB_VAL]], ptr [[OMP_IV:%[^,]+]],
 740 //
 741   #pragma omp for simd collapse(2) private(globalfloat, localint)
 742
 743 // CHECK: [[IV:%.+]] = load i64, ptr [[OMP_IV]]
 744 // CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]]
 745 // CHECK-NEXT: [[CMP:%.+]] = icmp sle i64 [[IV]], [[UB_VAL]]
 746 // CHECK-NEXT: br i1 [[CMP]], label %[[WIDE1_BODY:[^,]+]], label %[[WIDE1_END:[^,]+]]
 747   for (i = 1; i < 3; i++) // 2 iterations
 748     for (j = 0; j < foo(); j++) // foo() iterations
 749   {
 750 // CHECK: [[WIDE1_BODY]]:
 751 // Start of body: calculate i from index:
 752 // CHECK: [[IV1:%.+]] = load i64, ptr [[OMP_IV]]
 753 // Calculation of the loop counters values...
 754 // CHECK: store i32 {{[^,]+}}, ptr [[LC_I:.+]]
 755 // CHECK: [[IV1_2:%.+]] = load i64, ptr [[OMP_IV]]
 756 // CHECK: store i16 {{[^,]+}}, ptr [[LC_J:.+]]
 757 // ... loop body ...
 758 //
 759 // Here we expect store into private double var, not global
 760 // CHECK-NOT: store double {{.+}}, ptr [[GLOBALFLOAT]]
 761     globalfloat = (float)j/i;
 762     float res = b[j] * c[j];
 763 // Store into a[i]:
 764 // CHECK: store float [[RESULT:%.+]], ptr [[RESULT_ADDR:%.+]]
 765     a[i] = res * d[i];
 766 // Then there's a store into private var localint:
 767 // CHECK: store i32 {{.+}}, ptr [[LOCALINT:%[^,]+]]
 768     localint = (int)j;
 769 // CHECK: [[IV2:%.+]] = load i64, ptr [[OMP_IV]]
 770 // CHECK-NEXT: [[ADD2:%.+]] = add nsw i64 [[IV2]], 1
 771 // CHECK-NEXT: store i64 [[ADD2]], ptr [[OMP_IV]]
 772 //
 773 // br label %{{[^,]+}}, !llvm.loop ![[WIDE1_LOOP_ID]]
 774 // CHECK: [[WIDE1_END]]:
 775   }
 776 // i,j are updated.
 777 // CHECK: store i32 3, ptr [[I:%[^,]+]]
 778 // CHECK: store i16
 779 //
 780 // Here we expect store into original localint, not its privatized version.
 781 // CHECK-NOT: store i32 {{.+}}, ptr [[LOCALINT]]
 782   localint = (int)j;
 783 // CHECK: ret void
 784 }
 785
 786 // TERM_DEBUG-LABEL: bar
 787 int bar() { extern void mayThrow(); mayThrow(); return 0; };
 788
 789 // TERM_DEBUG-LABEL: parallel_simd
 790 void parallel_simd(float *a) {
 791 #pragma omp parallel
 792 #pragma omp for simd
 793   // TERM_DEBUG-NOT: __kmpc_global_thread_num
 794   // TERM_DEBUG:     invoke noundef i32 {{.*}}bar{{.*}}()
 795   // TERM_DEBUG:     unwind label %[[TERM_LPAD:[a-zA-Z0-9\.]+]],
 796   // TERM_DEBUG-NOT: __kmpc_global_thread_num
 797   // TERM_DEBUG:     [[TERM_LPAD]]
 798   // TERM_DEBUG:     call void @__clang_call_terminate
 799   // TERM_DEBUG:     unreachable
 800   for (unsigned i = 131071; i <= 2147483647; i += 127)
 801     a[i] += bar();
 802 }
 803 // TERM_DEBUG: !{{[0-9]+}} = !DILocation(line: [[@LINE-11]],
 804 // TERM_DEBUG-NOT: line: 0,
 805 // OMP45-NOT: !"llvm.loop.vectorize.enable", i1 false
 806 // CHECK-DAG: ![[SIMD_LOOP]] = distinct !{![[SIMD_LOOP]], {{.*}}![[VECT_LOOP:[^,]+]]}
 807 // CHECK-DAG: ![[VECT_LOOP]] = !{!"llvm.loop.vectorize.enable", i1 true}
 808 // OMP45-NOT: !"llvm.loop.vectorize.enable", i1 false
 809 // OMP50-DAG: ![[NOSIMD_LOOP]] = distinct !{![[NOSIMD_LOOP]], {{.*}}![[NOVECT_LOOP:[^,]+]]}
 810 // OMP50-DAG: ![[NOVECT_LOOP]] = !{!"llvm.loop.vectorize.enable", i1 false}
 811 #endif // HEADER