clang/test/OpenMP/nvptx_data_sharing.cpp

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
   2 // Test device global memory data sharing codegen.
   3 ///==========================================================================///
   4
   5 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc
   6 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - -disable-llvm-optzns | FileCheck %s --check-prefix=CHECK
   7
   8 // expected-no-diagnostics
   9
  10 #ifndef HEADER
  11 #define HEADER
  12
  13 void test_ds(){
  14   #pragma omp target
  15   {
  16     int a = 10;
  17     #pragma omp parallel
  18     {
  19       a = 1000;
  20     }
  21     int b = 100;
  22     int c = 1000;
  23     #pragma omp parallel private(c)
  24     {
  25       int *c1 = &c;
  26       b = a + 10000;
  27     }
  28   }
  29 }
  30
  31 #endif
  32
  33 // CHECK-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z7test_dsv_l14
  34 // CHECK-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0:[0-9]+]] {
  35 // CHECK-NEXT:  entry:
  36 // CHECK-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
  37 // CHECK-NEXT:    [[CAPTURED_VARS_ADDRS:%.*]] = alloca [1 x ptr], align 8
  38 // CHECK-NEXT:    [[C:%.*]] = alloca i32, align 4
  39 // CHECK-NEXT:    [[CAPTURED_VARS_ADDRS1:%.*]] = alloca [2 x ptr], align 8
  40 // CHECK-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
  41 // CHECK-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z7test_dsv_l14_kernel_environment, ptr [[DYN_PTR]])
  42 // CHECK-NEXT:    [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
  43 // CHECK-NEXT:    br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
  44 // CHECK:       user_code.entry:
  45 // CHECK-NEXT:    [[A:%.*]] = call align 8 ptr @__kmpc_alloc_shared(i64 4)
  46 // CHECK-NEXT:    [[B:%.*]] = call align 8 ptr @__kmpc_alloc_shared(i64 4)
  47 // CHECK-NEXT:    [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])
  48 // CHECK-NEXT:    store i32 10, ptr [[A]], align 4
  49 // CHECK-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
  50 // CHECK-NEXT:    store ptr [[A]], ptr [[TMP2]], align 8
  51 // CHECK-NEXT:    call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z7test_dsv_l14_omp_outlined, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z7test_dsv_l14_omp_outlined_wrapper, ptr [[CAPTURED_VARS_ADDRS]], i64 1)
  52 // CHECK-NEXT:    store i32 100, ptr [[B]], align 4
  53 // CHECK-NEXT:    store i32 1000, ptr [[C]], align 4
  54 // CHECK-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS1]], i64 0, i64 0
  55 // CHECK-NEXT:    store ptr [[B]], ptr [[TMP3]], align 8
  56 // CHECK-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [2 x ptr], ptr [[CAPTURED_VARS_ADDRS1]], i64 0, i64 1
  57 // CHECK-NEXT:    store ptr [[A]], ptr [[TMP4]], align 8
  58 // CHECK-NEXT:    call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z7test_dsv_l14_omp_outlined1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z7test_dsv_l14_omp_outlined1_wrapper, ptr [[CAPTURED_VARS_ADDRS1]], i64 2)
  59 // CHECK-NEXT:    call void @__kmpc_free_shared(ptr [[B]], i64 4)
  60 // CHECK-NEXT:    call void @__kmpc_free_shared(ptr [[A]], i64 4)
  61 // CHECK-NEXT:    call void @__kmpc_target_deinit()
  62 // CHECK-NEXT:    ret void
  63 // CHECK:       worker.exit:
  64 // CHECK-NEXT:    ret void
  65 //
  66 //
  67 // CHECK-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z7test_dsv_l14_omp_outlined
  68 // CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
  69 // CHECK-NEXT:  entry:
  70 // CHECK-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
  71 // CHECK-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
  72 // CHECK-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
  73 // CHECK-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
  74 // CHECK-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
  75 // CHECK-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
  76 // CHECK-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
  77 // CHECK-NEXT:    store i32 1000, ptr [[TMP0]], align 4
  78 // CHECK-NEXT:    ret void
  79 //
  80 //
  81 // CHECK-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z7test_dsv_l14_omp_outlined_wrapper
  82 // CHECK-SAME: (i16 noundef zeroext [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {
  83 // CHECK-NEXT:  entry:
  84 // CHECK-NEXT:    [[DOTADDR:%.*]] = alloca i16, align 2
  85 // CHECK-NEXT:    [[DOTADDR1:%.*]] = alloca i32, align 4
  86 // CHECK-NEXT:    [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
  87 // CHECK-NEXT:    [[GLOBAL_ARGS:%.*]] = alloca ptr, align 8
  88 // CHECK-NEXT:    store i16 [[TMP0]], ptr [[DOTADDR]], align 2
  89 // CHECK-NEXT:    store i32 [[TMP1]], ptr [[DOTADDR1]], align 4
  90 // CHECK-NEXT:    store i32 0, ptr [[DOTZERO_ADDR]], align 4
  91 // CHECK-NEXT:    call void @__kmpc_get_shared_variables(ptr [[GLOBAL_ARGS]])
  92 // CHECK-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[GLOBAL_ARGS]], align 8
  93 // CHECK-NEXT:    [[TMP3:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i64 0
  94 // CHECK-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP3]], align 8
  95 // CHECK-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z7test_dsv_l14_omp_outlined(ptr [[DOTADDR1]], ptr [[DOTZERO_ADDR]], ptr [[TMP4]]) #[[ATTR4:[0-9]+]]
  96 // CHECK-NEXT:    ret void
  97 //
  98 //
  99 // CHECK-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z7test_dsv_l14_omp_outlined1
 100 // CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
 101 // CHECK-NEXT:  entry:
 102 // CHECK-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 103 // CHECK-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 104 // CHECK-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 8
 105 // CHECK-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 106 // CHECK-NEXT:    [[C:%.*]] = alloca i32, align 4
 107 // CHECK-NEXT:    [[C1:%.*]] = alloca ptr, align 8
 108 // CHECK-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 109 // CHECK-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 110 // CHECK-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 8
 111 // CHECK-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 112 // CHECK-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[B_ADDR]], align 8
 113 // CHECK-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 114 // CHECK-NEXT:    store ptr [[C]], ptr [[C1]], align 8
 115 // CHECK-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
 116 // CHECK-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 10000
 117 // CHECK-NEXT:    store i32 [[ADD]], ptr [[TMP0]], align 4
 118 // CHECK-NEXT:    ret void
 119 //
 120 //
 121 // CHECK-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z7test_dsv_l14_omp_outlined1_wrapper
 122 // CHECK-SAME: (i16 noundef zeroext [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR3]] {
 123 // CHECK-NEXT:  entry:
 124 // CHECK-NEXT:    [[DOTADDR:%.*]] = alloca i16, align 2
 125 // CHECK-NEXT:    [[DOTADDR1:%.*]] = alloca i32, align 4
 126 // CHECK-NEXT:    [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
 127 // CHECK-NEXT:    [[GLOBAL_ARGS:%.*]] = alloca ptr, align 8
 128 // CHECK-NEXT:    store i16 [[TMP0]], ptr [[DOTADDR]], align 2
 129 // CHECK-NEXT:    store i32 [[TMP1]], ptr [[DOTADDR1]], align 4
 130 // CHECK-NEXT:    store i32 0, ptr [[DOTZERO_ADDR]], align 4
 131 // CHECK-NEXT:    call void @__kmpc_get_shared_variables(ptr [[GLOBAL_ARGS]])
 132 // CHECK-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[GLOBAL_ARGS]], align 8
 133 // CHECK-NEXT:    [[TMP3:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i64 0
 134 // CHECK-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP3]], align 8
 135 // CHECK-NEXT:    [[TMP5:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i64 1
 136 // CHECK-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP5]], align 8
 137 // CHECK-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z7test_dsv_l14_omp_outlined1(ptr [[DOTADDR1]], ptr [[DOTZERO_ADDR]], ptr [[TMP4]], ptr [[TMP6]]) #[[ATTR4]]
 138 // CHECK-NEXT:    ret void
 139 //