1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // expected-no-diagnostics
7 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
9 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
10 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
12 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
14 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
15 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
16 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
17 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
18 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
19 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
22 template <typename T
, int X
, long long Y
>
28 #pragma omp target teams distribute collapse(2)
29 for(int i
= 0; i
< X
; i
++) {
30 for(int j
= 0; j
< Y
; j
++) {
35 // discard loop variables not needed here
41 int teams_template_struct(void) {
49 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
50 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
51 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
52 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
53 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
54 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11
56 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
57 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
58 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
59 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
60 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
61 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
64 template <typename T
, int n
, int m
>
67 #pragma omp target teams distribute collapse(2)
68 for(int i
= 0; i
< n
; i
++) {
69 for(int j
= 0; j
< m
; j
++) {
76 int main (int argc
, char **argv
) {
80 #pragma omp target teams distribute collapse(2)
81 for(int i
= 0; i
< n
; i
++) {
82 for(int j
= 0; j
< m
; j
++) {
86 return tmain
<int, 10, 2>(argc
);
93 // discard loop variables not needed here
96 #endif // #ifndef HEADER
97 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv
98 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
99 // CHECK1-NEXT: entry:
100 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
101 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(224352) [[V]])
102 // CHECK1-NEXT: ret i32 [[CALL]]
105 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
106 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat {
107 // CHECK1-NEXT: entry:
108 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
109 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
110 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
111 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
112 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
113 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
114 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
115 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
116 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
117 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0
118 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
119 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 8
120 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
121 // CHECK1-NEXT: store ptr [[A]], ptr [[TMP1]], align 8
122 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
123 // CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8
124 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
125 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
126 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
127 // CHECK1-NEXT: store i32 3, ptr [[TMP5]], align 4
128 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
129 // CHECK1-NEXT: store i32 1, ptr [[TMP6]], align 4
130 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
131 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8
132 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
133 // CHECK1-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8
134 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
135 // CHECK1-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 8
136 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
137 // CHECK1-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 8
138 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
139 // CHECK1-NEXT: store ptr null, ptr [[TMP11]], align 8
140 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
141 // CHECK1-NEXT: store ptr null, ptr [[TMP12]], align 8
142 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
143 // CHECK1-NEXT: store i64 56088, ptr [[TMP13]], align 8
144 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
145 // CHECK1-NEXT: store i64 0, ptr [[TMP14]], align 8
146 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
147 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
148 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
149 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
150 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
151 // CHECK1-NEXT: store i32 0, ptr [[TMP17]], align 4
152 // CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]])
153 // CHECK1-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
154 // CHECK1-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
155 // CHECK1: omp_offload.failed:
156 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR2:[0-9]+]]
157 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
158 // CHECK1: omp_offload.cont:
159 // CHECK1-NEXT: [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
160 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A3]], i64 0, i64 0
161 // CHECK1-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i64 0, i64 0
162 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[ARRAYIDX4]], align 4
163 // CHECK1-NEXT: ret i32 [[TMP20]]
166 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
167 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
168 // CHECK1-NEXT: entry:
169 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
170 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
171 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
172 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]])
173 // CHECK1-NEXT: ret void
176 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined
177 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
178 // CHECK1-NEXT: entry:
179 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
180 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
181 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
182 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
183 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
184 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
185 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
186 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
187 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
188 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
189 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
190 // CHECK1-NEXT: [[J:%.*]] = alloca i32, align 4
191 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
192 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
193 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
194 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
195 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
196 // CHECK1-NEXT: store i32 56087, ptr [[DOTOMP_UB]], align 4
197 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
198 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
199 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
200 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
201 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
202 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
203 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087
204 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
205 // CHECK1: cond.true:
206 // CHECK1-NEXT: br label [[COND_END:%.*]]
207 // CHECK1: cond.false:
208 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
209 // CHECK1-NEXT: br label [[COND_END]]
211 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
212 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
213 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
214 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
215 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
216 // CHECK1: omp.inner.for.cond:
217 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
218 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
219 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
220 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
221 // CHECK1: omp.inner.for.body:
222 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
223 // CHECK1-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 456
224 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
225 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
226 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4
227 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
228 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
229 // CHECK1-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP10]], 456
230 // CHECK1-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456
231 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]]
232 // CHECK1-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
233 // CHECK1-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
234 // CHECK1-NEXT: store i32 [[ADD6]], ptr [[J]], align 4
235 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
236 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4
237 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
238 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A]], i64 0, i64 [[IDXPROM]]
239 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[J]], align 4
240 // CHECK1-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP12]] to i64
241 // CHECK1-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i64 0, i64 [[IDXPROM7]]
242 // CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX8]], align 4
243 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
244 // CHECK1: omp.body.continue:
245 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
246 // CHECK1: omp.inner.for.inc:
247 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
248 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP13]], 1
249 // CHECK1-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4
250 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
251 // CHECK1: omp.inner.for.end:
252 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
253 // CHECK1: omp.loop.exit:
254 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
255 // CHECK1-NEXT: ret void
258 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv
259 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
260 // CHECK3-NEXT: entry:
261 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
262 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(224352) [[V]])
263 // CHECK3-NEXT: ret i32 [[CALL]]
266 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
267 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
268 // CHECK3-NEXT: entry:
269 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
270 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
271 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
272 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
273 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
274 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
275 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
276 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
277 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
278 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0
279 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
280 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 4
281 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
282 // CHECK3-NEXT: store ptr [[A]], ptr [[TMP1]], align 4
283 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
284 // CHECK3-NEXT: store ptr null, ptr [[TMP2]], align 4
285 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
286 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
287 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
288 // CHECK3-NEXT: store i32 3, ptr [[TMP5]], align 4
289 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
290 // CHECK3-NEXT: store i32 1, ptr [[TMP6]], align 4
291 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
292 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 4
293 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
294 // CHECK3-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4
295 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
296 // CHECK3-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 4
297 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
298 // CHECK3-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 4
299 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
300 // CHECK3-NEXT: store ptr null, ptr [[TMP11]], align 4
301 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
302 // CHECK3-NEXT: store ptr null, ptr [[TMP12]], align 4
303 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
304 // CHECK3-NEXT: store i64 56088, ptr [[TMP13]], align 8
305 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
306 // CHECK3-NEXT: store i64 0, ptr [[TMP14]], align 8
307 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
308 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
309 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
310 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
311 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
312 // CHECK3-NEXT: store i32 0, ptr [[TMP17]], align 4
313 // CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]])
314 // CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
315 // CHECK3-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
316 // CHECK3: omp_offload.failed:
317 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR2:[0-9]+]]
318 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
319 // CHECK3: omp_offload.cont:
320 // CHECK3-NEXT: [[A3:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
321 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A3]], i32 0, i32 0
322 // CHECK3-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i32 0, i32 0
323 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[ARRAYIDX4]], align 4
324 // CHECK3-NEXT: ret i32 [[TMP20]]
327 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
328 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
329 // CHECK3-NEXT: entry:
330 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
331 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
332 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
333 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]])
334 // CHECK3-NEXT: ret void
337 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined
338 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
339 // CHECK3-NEXT: entry:
340 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
341 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
342 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
343 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
344 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
345 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
346 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
347 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
348 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
349 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
350 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
351 // CHECK3-NEXT: [[J:%.*]] = alloca i32, align 4
352 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
353 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
354 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
355 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
356 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
357 // CHECK3-NEXT: store i32 56087, ptr [[DOTOMP_UB]], align 4
358 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
359 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
360 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
361 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
362 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
363 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
364 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087
365 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
366 // CHECK3: cond.true:
367 // CHECK3-NEXT: br label [[COND_END:%.*]]
368 // CHECK3: cond.false:
369 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
370 // CHECK3-NEXT: br label [[COND_END]]
372 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
373 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
374 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
375 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
376 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
377 // CHECK3: omp.inner.for.cond:
378 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
379 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
380 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
381 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
382 // CHECK3: omp.inner.for.body:
383 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
384 // CHECK3-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 456
385 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
386 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
387 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4
388 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
389 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
390 // CHECK3-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP10]], 456
391 // CHECK3-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456
392 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]]
393 // CHECK3-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
394 // CHECK3-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
395 // CHECK3-NEXT: store i32 [[ADD6]], ptr [[J]], align 4
396 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
397 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4
398 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A]], i32 0, i32 [[TMP11]]
399 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[J]], align 4
400 // CHECK3-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i32 0, i32 [[TMP12]]
401 // CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX7]], align 4
402 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
403 // CHECK3: omp.body.continue:
404 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
405 // CHECK3: omp.inner.for.inc:
406 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
407 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP13]], 1
408 // CHECK3-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4
409 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
410 // CHECK3: omp.inner.for.end:
411 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
412 // CHECK3: omp.loop.exit:
413 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
414 // CHECK3-NEXT: ret void
417 // CHECK9-LABEL: define {{[^@]+}}@main
418 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
419 // CHECK9-NEXT: entry:
420 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
421 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
422 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8
423 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4
424 // CHECK9-NEXT: [[M:%.*]] = alloca i32, align 4
425 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8
426 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
427 // CHECK9-NEXT: [[__VLA_EXPR1:%.*]] = alloca i64, align 8
428 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
429 // CHECK9-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
430 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 8
431 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 8
432 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 8
433 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8
434 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
435 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
436 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
437 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
438 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
439 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
440 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4
441 // CHECK9-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
442 // CHECK9-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8
443 // CHECK9-NEXT: store i32 100, ptr [[N]], align 4
444 // CHECK9-NEXT: store i32 2, ptr [[M]], align 4
445 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4
446 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
447 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[M]], align 4
448 // CHECK9-NEXT: [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
449 // CHECK9-NEXT: [[TMP4:%.*]] = call ptr @llvm.stacksave.p0()
450 // CHECK9-NEXT: store ptr [[TMP4]], ptr [[SAVED_STACK]], align 8
451 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]
452 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4
453 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8
454 // CHECK9-NEXT: store i64 [[TMP3]], ptr [[__VLA_EXPR1]], align 8
455 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[N]], align 4
456 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[N_CASTED]], align 4
457 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, ptr [[N_CASTED]], align 8
458 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[M]], align 4
459 // CHECK9-NEXT: store i32 [[TMP8]], ptr [[M_CASTED]], align 4
460 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, ptr [[M_CASTED]], align 8
461 // CHECK9-NEXT: [[TMP10:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]
462 // CHECK9-NEXT: [[TMP11:%.*]] = mul nuw i64 [[TMP10]], 4
463 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 40, i1 false)
464 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
465 // CHECK9-NEXT: store i64 [[TMP7]], ptr [[TMP12]], align 8
466 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
467 // CHECK9-NEXT: store i64 [[TMP7]], ptr [[TMP13]], align 8
468 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
469 // CHECK9-NEXT: store ptr null, ptr [[TMP14]], align 8
470 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
471 // CHECK9-NEXT: store i64 [[TMP9]], ptr [[TMP15]], align 8
472 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
473 // CHECK9-NEXT: store i64 [[TMP9]], ptr [[TMP16]], align 8
474 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
475 // CHECK9-NEXT: store ptr null, ptr [[TMP17]], align 8
476 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
477 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP18]], align 8
478 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
479 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP19]], align 8
480 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
481 // CHECK9-NEXT: store ptr null, ptr [[TMP20]], align 8
482 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
483 // CHECK9-NEXT: store i64 [[TMP3]], ptr [[TMP21]], align 8
484 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
485 // CHECK9-NEXT: store i64 [[TMP3]], ptr [[TMP22]], align 8
486 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
487 // CHECK9-NEXT: store ptr null, ptr [[TMP23]], align 8
488 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
489 // CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP24]], align 8
490 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4
491 // CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP25]], align 8
492 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 4
493 // CHECK9-NEXT: store i64 [[TMP11]], ptr [[TMP26]], align 8
494 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
495 // CHECK9-NEXT: store ptr null, ptr [[TMP27]], align 8
496 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
497 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
498 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0
499 // CHECK9-NEXT: [[TMP31:%.*]] = load i32, ptr [[N]], align 4
500 // CHECK9-NEXT: store i32 [[TMP31]], ptr [[DOTCAPTURE_EXPR_]], align 4
501 // CHECK9-NEXT: [[TMP32:%.*]] = load i32, ptr [[M]], align 4
502 // CHECK9-NEXT: store i32 [[TMP32]], ptr [[DOTCAPTURE_EXPR_2]], align 4
503 // CHECK9-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
504 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP33]], 0
505 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
506 // CHECK9-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
507 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
508 // CHECK9-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP34]], 0
509 // CHECK9-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
510 // CHECK9-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
511 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
512 // CHECK9-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
513 // CHECK9-NEXT: store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_3]], align 8
514 // CHECK9-NEXT: [[TMP35:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8
515 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP35]], 1
516 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
517 // CHECK9-NEXT: store i32 3, ptr [[TMP36]], align 4
518 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
519 // CHECK9-NEXT: store i32 5, ptr [[TMP37]], align 4
520 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
521 // CHECK9-NEXT: store ptr [[TMP28]], ptr [[TMP38]], align 8
522 // CHECK9-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
523 // CHECK9-NEXT: store ptr [[TMP29]], ptr [[TMP39]], align 8
524 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
525 // CHECK9-NEXT: store ptr [[TMP30]], ptr [[TMP40]], align 8
526 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
527 // CHECK9-NEXT: store ptr @.offload_maptypes, ptr [[TMP41]], align 8
528 // CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
529 // CHECK9-NEXT: store ptr null, ptr [[TMP42]], align 8
530 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
531 // CHECK9-NEXT: store ptr null, ptr [[TMP43]], align 8
532 // CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
533 // CHECK9-NEXT: store i64 [[ADD]], ptr [[TMP44]], align 8
534 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
535 // CHECK9-NEXT: store i64 0, ptr [[TMP45]], align 8
536 // CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
537 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP46]], align 4
538 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
539 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP47]], align 4
540 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
541 // CHECK9-NEXT: store i32 0, ptr [[TMP48]], align 4
542 // CHECK9-NEXT: [[TMP49:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l80.region_id, ptr [[KERNEL_ARGS]])
543 // CHECK9-NEXT: [[TMP50:%.*]] = icmp ne i32 [[TMP49]], 0
544 // CHECK9-NEXT: br i1 [[TMP50]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
545 // CHECK9: omp_offload.failed:
546 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l80(i64 [[TMP7]], i64 [[TMP9]], i64 [[TMP1]], i64 [[TMP3]], ptr [[VLA]]) #[[ATTR3:[0-9]+]]
547 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
548 // CHECK9: omp_offload.cont:
549 // CHECK9-NEXT: [[TMP51:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
550 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef signext [[TMP51]])
551 // CHECK9-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4
552 // CHECK9-NEXT: [[TMP52:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8
553 // CHECK9-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP52]])
554 // CHECK9-NEXT: [[TMP53:%.*]] = load i32, ptr [[RETVAL]], align 4
555 // CHECK9-NEXT: ret i32 [[TMP53]]
558 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l80
559 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
560 // CHECK9-NEXT: entry:
561 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
562 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
563 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
564 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
565 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
566 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
567 // CHECK9-NEXT: [[M_CASTED:%.*]] = alloca i64, align 8
568 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8
569 // CHECK9-NEXT: store i64 [[M]], ptr [[M_ADDR]], align 8
570 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
571 // CHECK9-NEXT: store i64 [[VLA1]], ptr [[VLA_ADDR2]], align 8
572 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
573 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
574 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR2]], align 8
575 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8
576 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 4
577 // CHECK9-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 4
578 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 8
579 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[M_ADDR]], align 4
580 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[M_CASTED]], align 4
581 // CHECK9-NEXT: [[TMP6:%.*]] = load i64, ptr [[M_CASTED]], align 8
582 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l80.omp_outlined, i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP0]], i64 [[TMP1]], ptr [[TMP2]])
583 // CHECK9-NEXT: ret void
586 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l80.omp_outlined
587 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
588 // CHECK9-NEXT: entry:
589 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
590 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
591 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
592 // CHECK9-NEXT: [[M_ADDR:%.*]] = alloca i64, align 8
593 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
594 // CHECK9-NEXT: [[VLA_ADDR2:%.*]] = alloca i64, align 8
595 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
596 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
597 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
598 // CHECK9-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
599 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
600 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
601 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8
602 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
603 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
604 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
605 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
606 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
607 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
608 // CHECK9-NEXT: [[I11:%.*]] = alloca i32, align 4
609 // CHECK9-NEXT: [[J12:%.*]] = alloca i32, align 4
610 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
611 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
612 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8
613 // CHECK9-NEXT: store i64 [[M]], ptr [[M_ADDR]], align 8
614 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
615 // CHECK9-NEXT: store i64 [[VLA1]], ptr [[VLA_ADDR2]], align 8
616 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
617 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
618 // CHECK9-NEXT: [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR2]], align 8
619 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8
620 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 4
621 // CHECK9-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
622 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[M_ADDR]], align 4
623 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_4]], align 4
624 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
625 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
626 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
627 // CHECK9-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
628 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4
629 // CHECK9-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP6]], 0
630 // CHECK9-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
631 // CHECK9-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
632 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]
633 // CHECK9-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
634 // CHECK9-NEXT: store i64 [[SUB9]], ptr [[DOTCAPTURE_EXPR_5]], align 8
635 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4
636 // CHECK9-NEXT: store i32 0, ptr [[J]], align 4
637 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
638 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]]
639 // CHECK9-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
640 // CHECK9: land.lhs.true:
641 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4
642 // CHECK9-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP8]]
643 // CHECK9-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
644 // CHECK9: omp.precond.then:
645 // CHECK9-NEXT: store i64 0, ptr [[DOTOMP_LB]], align 8
646 // CHECK9-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8
647 // CHECK9-NEXT: store i64 [[TMP9]], ptr [[DOTOMP_UB]], align 8
648 // CHECK9-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8
649 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
650 // CHECK9-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
651 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4
652 // CHECK9-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1)
653 // CHECK9-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8
654 // CHECK9-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8
655 // CHECK9-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP12]], [[TMP13]]
656 // CHECK9-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
657 // CHECK9: cond.true:
658 // CHECK9-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8
659 // CHECK9-NEXT: br label [[COND_END:%.*]]
660 // CHECK9: cond.false:
661 // CHECK9-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8
662 // CHECK9-NEXT: br label [[COND_END]]
664 // CHECK9-NEXT: [[COND:%.*]] = phi i64 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ]
665 // CHECK9-NEXT: store i64 [[COND]], ptr [[DOTOMP_UB]], align 8
666 // CHECK9-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8
667 // CHECK9-NEXT: store i64 [[TMP16]], ptr [[DOTOMP_IV]], align 8
668 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
669 // CHECK9: omp.inner.for.cond:
670 // CHECK9-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
671 // CHECK9-NEXT: [[TMP18:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8
672 // CHECK9-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP17]], [[TMP18]]
673 // CHECK9-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
674 // CHECK9: omp.inner.for.body:
675 // CHECK9-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
676 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4
677 // CHECK9-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP20]], 0
678 // CHECK9-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
679 // CHECK9-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]]
680 // CHECK9-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64
681 // CHECK9-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP19]], [[CONV18]]
682 // CHECK9-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1
683 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]]
684 // CHECK9-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32
685 // CHECK9-NEXT: store i32 [[CONV21]], ptr [[I11]], align 4
686 // CHECK9-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
687 // CHECK9-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
688 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4
689 // CHECK9-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP23]], 0
690 // CHECK9-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1
691 // CHECK9-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]
692 // CHECK9-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64
693 // CHECK9-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP22]], [[CONV25]]
694 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4
695 // CHECK9-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP24]], 0
696 // CHECK9-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
697 // CHECK9-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]]
698 // CHECK9-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64
699 // CHECK9-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]]
700 // CHECK9-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP21]], [[MUL31]]
701 // CHECK9-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1
702 // CHECK9-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]]
703 // CHECK9-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32
704 // CHECK9-NEXT: store i32 [[CONV35]], ptr [[J12]], align 4
705 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[I11]], align 4
706 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP25]] to i64
707 // CHECK9-NEXT: [[TMP26:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP1]]
708 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[TMP26]]
709 // CHECK9-NEXT: [[TMP27:%.*]] = load i32, ptr [[J12]], align 4
710 // CHECK9-NEXT: [[IDXPROM36:%.*]] = sext i32 [[TMP27]] to i64
711 // CHECK9-NEXT: [[ARRAYIDX37:%.*]] = getelementptr inbounds i32, ptr [[ARRAYIDX]], i64 [[IDXPROM36]]
712 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX37]], align 4
713 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
714 // CHECK9: omp.body.continue:
715 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
716 // CHECK9: omp.inner.for.inc:
717 // CHECK9-NEXT: [[TMP28:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
718 // CHECK9-NEXT: [[ADD38:%.*]] = add nsw i64 [[TMP28]], 1
719 // CHECK9-NEXT: store i64 [[ADD38]], ptr [[DOTOMP_IV]], align 8
720 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
721 // CHECK9: omp.inner.for.end:
722 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
723 // CHECK9: omp.loop.exit:
724 // CHECK9-NEXT: [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
725 // CHECK9-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 4
726 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP30]])
727 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
728 // CHECK9: omp.precond.end:
729 // CHECK9-NEXT: ret void
732 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_
733 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
734 // CHECK9-NEXT: entry:
735 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
736 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4
737 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
738 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
739 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
740 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
741 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
742 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
743 // CHECK9-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
744 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
745 // CHECK9-NEXT: store ptr [[A]], ptr [[TMP0]], align 8
746 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
747 // CHECK9-NEXT: store ptr [[A]], ptr [[TMP1]], align 8
748 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
749 // CHECK9-NEXT: store ptr null, ptr [[TMP2]], align 8
750 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
751 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
752 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
753 // CHECK9-NEXT: store i32 3, ptr [[TMP5]], align 4
754 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
755 // CHECK9-NEXT: store i32 1, ptr [[TMP6]], align 4
756 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
757 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8
758 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
759 // CHECK9-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8
760 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
761 // CHECK9-NEXT: store ptr @.offload_sizes.1, ptr [[TMP9]], align 8
762 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
763 // CHECK9-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP10]], align 8
764 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
765 // CHECK9-NEXT: store ptr null, ptr [[TMP11]], align 8
766 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
767 // CHECK9-NEXT: store ptr null, ptr [[TMP12]], align 8
768 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
769 // CHECK9-NEXT: store i64 20, ptr [[TMP13]], align 8
770 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
771 // CHECK9-NEXT: store i64 0, ptr [[TMP14]], align 8
772 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
773 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
774 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
775 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
776 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
777 // CHECK9-NEXT: store i32 0, ptr [[TMP17]], align 4
778 // CHECK9-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l67.region_id, ptr [[KERNEL_ARGS]])
779 // CHECK9-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
780 // CHECK9-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
781 // CHECK9: omp_offload.failed:
782 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l67(ptr [[A]]) #[[ATTR3]]
783 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
784 // CHECK9: omp_offload.cont:
785 // CHECK9-NEXT: ret i32 0
788 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l67
789 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
790 // CHECK9-NEXT: entry:
791 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
792 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
793 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
794 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l67.omp_outlined, ptr [[TMP0]])
795 // CHECK9-NEXT: ret void
798 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l67.omp_outlined
799 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
800 // CHECK9-NEXT: entry:
801 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
802 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
803 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
804 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
805 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
806 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
807 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
808 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
809 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
810 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
811 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
812 // CHECK9-NEXT: [[J:%.*]] = alloca i32, align 4
813 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
814 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
815 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
816 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
817 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
818 // CHECK9-NEXT: store i32 19, ptr [[DOTOMP_UB]], align 4
819 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
820 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
821 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
822 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
823 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
824 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
825 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19
826 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
827 // CHECK9: cond.true:
828 // CHECK9-NEXT: br label [[COND_END:%.*]]
829 // CHECK9: cond.false:
830 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
831 // CHECK9-NEXT: br label [[COND_END]]
833 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
834 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
835 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
836 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
837 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
838 // CHECK9: omp.inner.for.cond:
839 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
840 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
841 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
842 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
843 // CHECK9: omp.inner.for.body:
844 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
845 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 2
846 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
847 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
848 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4
849 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
850 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
851 // CHECK9-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP10]], 2
852 // CHECK9-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2
853 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]]
854 // CHECK9-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
855 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
856 // CHECK9-NEXT: store i32 [[ADD6]], ptr [[J]], align 4
857 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4
858 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
859 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
860 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[J]], align 4
861 // CHECK9-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP12]] to i64
862 // CHECK9-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x i32], ptr [[ARRAYIDX]], i64 0, i64 [[IDXPROM7]]
863 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX8]], align 4
864 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
865 // CHECK9: omp.body.continue:
866 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
867 // CHECK9: omp.inner.for.inc:
868 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
869 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP13]], 1
870 // CHECK9-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4
871 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
872 // CHECK9: omp.inner.for.end:
873 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
874 // CHECK9: omp.loop.exit:
875 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
876 // CHECK9-NEXT: ret void
879 // CHECK11-LABEL: define {{[^@]+}}@main
880 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
881 // CHECK11-NEXT: entry:
882 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
883 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
884 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 4
885 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4
886 // CHECK11-NEXT: [[M:%.*]] = alloca i32, align 4
887 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 4
888 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
889 // CHECK11-NEXT: [[__VLA_EXPR1:%.*]] = alloca i32, align 4
890 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
891 // CHECK11-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
892 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 4
893 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 4
894 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 4
895 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4
896 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
897 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
898 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
899 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
900 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
901 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
902 // CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4
903 // CHECK11-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
904 // CHECK11-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 4
905 // CHECK11-NEXT: store i32 100, ptr [[N]], align 4
906 // CHECK11-NEXT: store i32 2, ptr [[M]], align 4
907 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4
908 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[M]], align 4
909 // CHECK11-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()
910 // CHECK11-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 4
911 // CHECK11-NEXT: [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]
912 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4
913 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 4
914 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[__VLA_EXPR1]], align 4
915 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[N]], align 4
916 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[N_CASTED]], align 4
917 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[N_CASTED]], align 4
918 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[M]], align 4
919 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[M_CASTED]], align 4
920 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[M_CASTED]], align 4
921 // CHECK11-NEXT: [[TMP8:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]
922 // CHECK11-NEXT: [[TMP9:%.*]] = mul nuw i32 [[TMP8]], 4
923 // CHECK11-NEXT: [[TMP10:%.*]] = sext i32 [[TMP9]] to i64
924 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 40, i1 false)
925 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
926 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP11]], align 4
927 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
928 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP12]], align 4
929 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
930 // CHECK11-NEXT: store ptr null, ptr [[TMP13]], align 4
931 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
932 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[TMP14]], align 4
933 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
934 // CHECK11-NEXT: store i32 [[TMP7]], ptr [[TMP15]], align 4
935 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
936 // CHECK11-NEXT: store ptr null, ptr [[TMP16]], align 4
937 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
938 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP17]], align 4
939 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
940 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP18]], align 4
941 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
942 // CHECK11-NEXT: store ptr null, ptr [[TMP19]], align 4
943 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
944 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[TMP20]], align 4
945 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
946 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[TMP21]], align 4
947 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
948 // CHECK11-NEXT: store ptr null, ptr [[TMP22]], align 4
949 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
950 // CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP23]], align 4
951 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4
952 // CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP24]], align 4
953 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 4
954 // CHECK11-NEXT: store i64 [[TMP10]], ptr [[TMP25]], align 4
955 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
956 // CHECK11-NEXT: store ptr null, ptr [[TMP26]], align 4
957 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
958 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
959 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0
960 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr [[N]], align 4
961 // CHECK11-NEXT: store i32 [[TMP30]], ptr [[DOTCAPTURE_EXPR_]], align 4
962 // CHECK11-NEXT: [[TMP31:%.*]] = load i32, ptr [[M]], align 4
963 // CHECK11-NEXT: store i32 [[TMP31]], ptr [[DOTCAPTURE_EXPR_2]], align 4
964 // CHECK11-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
965 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP32]], 0
966 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
967 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
968 // CHECK11-NEXT: [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
969 // CHECK11-NEXT: [[SUB4:%.*]] = sub nsw i32 [[TMP33]], 0
970 // CHECK11-NEXT: [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
971 // CHECK11-NEXT: [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
972 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
973 // CHECK11-NEXT: [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
974 // CHECK11-NEXT: store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_3]], align 8
975 // CHECK11-NEXT: [[TMP34:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8
976 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 [[TMP34]], 1
977 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
978 // CHECK11-NEXT: store i32 3, ptr [[TMP35]], align 4
979 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
980 // CHECK11-NEXT: store i32 5, ptr [[TMP36]], align 4
981 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
982 // CHECK11-NEXT: store ptr [[TMP27]], ptr [[TMP37]], align 4
983 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
984 // CHECK11-NEXT: store ptr [[TMP28]], ptr [[TMP38]], align 4
985 // CHECK11-NEXT: [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
986 // CHECK11-NEXT: store ptr [[TMP29]], ptr [[TMP39]], align 4
987 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
988 // CHECK11-NEXT: store ptr @.offload_maptypes, ptr [[TMP40]], align 4
989 // CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
990 // CHECK11-NEXT: store ptr null, ptr [[TMP41]], align 4
991 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
992 // CHECK11-NEXT: store ptr null, ptr [[TMP42]], align 4
993 // CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
994 // CHECK11-NEXT: store i64 [[ADD]], ptr [[TMP43]], align 8
995 // CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
996 // CHECK11-NEXT: store i64 0, ptr [[TMP44]], align 8
997 // CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
998 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP45]], align 4
999 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1000 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP46]], align 4
1001 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1002 // CHECK11-NEXT: store i32 0, ptr [[TMP47]], align 4
1003 // CHECK11-NEXT: [[TMP48:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l80.region_id, ptr [[KERNEL_ARGS]])
1004 // CHECK11-NEXT: [[TMP49:%.*]] = icmp ne i32 [[TMP48]], 0
1005 // CHECK11-NEXT: br i1 [[TMP49]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1006 // CHECK11: omp_offload.failed:
1007 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l80(i32 [[TMP5]], i32 [[TMP7]], i32 [[TMP0]], i32 [[TMP1]], ptr [[VLA]]) #[[ATTR3:[0-9]+]]
1008 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
1009 // CHECK11: omp_offload.cont:
1010 // CHECK11-NEXT: [[TMP50:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
1011 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef [[TMP50]])
1012 // CHECK11-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4
1013 // CHECK11-NEXT: [[TMP51:%.*]] = load ptr, ptr [[SAVED_STACK]], align 4
1014 // CHECK11-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP51]])
1015 // CHECK11-NEXT: [[TMP52:%.*]] = load i32, ptr [[RETVAL]], align 4
1016 // CHECK11-NEXT: ret i32 [[TMP52]]
1019 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l80
1020 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
1021 // CHECK11-NEXT: entry:
1022 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1023 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
1024 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
1025 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
1026 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
1027 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
1028 // CHECK11-NEXT: [[M_CASTED:%.*]] = alloca i32, align 4
1029 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
1030 // CHECK11-NEXT: store i32 [[M]], ptr [[M_ADDR]], align 4
1031 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
1032 // CHECK11-NEXT: store i32 [[VLA1]], ptr [[VLA_ADDR2]], align 4
1033 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
1034 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
1035 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR2]], align 4
1036 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4
1037 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 4
1038 // CHECK11-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 4
1039 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[N_CASTED]], align 4
1040 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[M_ADDR]], align 4
1041 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[M_CASTED]], align 4
1042 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[M_CASTED]], align 4
1043 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l80.omp_outlined, i32 [[TMP4]], i32 [[TMP6]], i32 [[TMP0]], i32 [[TMP1]], ptr [[TMP2]])
1044 // CHECK11-NEXT: ret void
1047 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l80.omp_outlined
1048 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1049 // CHECK11-NEXT: entry:
1050 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1051 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1052 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1053 // CHECK11-NEXT: [[M_ADDR:%.*]] = alloca i32, align 4
1054 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
1055 // CHECK11-NEXT: [[VLA_ADDR2:%.*]] = alloca i32, align 4
1056 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
1057 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i64, align 8
1058 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
1059 // CHECK11-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
1060 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1061 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
1062 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8
1063 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
1064 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
1065 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i64, align 8
1066 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i64, align 8
1067 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
1068 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1069 // CHECK11-NEXT: [[I11:%.*]] = alloca i32, align 4
1070 // CHECK11-NEXT: [[J12:%.*]] = alloca i32, align 4
1071 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1072 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1073 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
1074 // CHECK11-NEXT: store i32 [[M]], ptr [[M_ADDR]], align 4
1075 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
1076 // CHECK11-NEXT: store i32 [[VLA1]], ptr [[VLA_ADDR2]], align 4
1077 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
1078 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
1079 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR2]], align 4
1080 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4
1081 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_ADDR]], align 4
1082 // CHECK11-NEXT: store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
1083 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[M_ADDR]], align 4
1084 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR_4]], align 4
1085 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1086 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP5]], 0
1087 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1088 // CHECK11-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
1089 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4
1090 // CHECK11-NEXT: [[SUB6:%.*]] = sub nsw i32 [[TMP6]], 0
1091 // CHECK11-NEXT: [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
1092 // CHECK11-NEXT: [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
1093 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]
1094 // CHECK11-NEXT: [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
1095 // CHECK11-NEXT: store i64 [[SUB9]], ptr [[DOTCAPTURE_EXPR_5]], align 8
1096 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4
1097 // CHECK11-NEXT: store i32 0, ptr [[J]], align 4
1098 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1099 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP7]]
1100 // CHECK11-NEXT: br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
1101 // CHECK11: land.lhs.true:
1102 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4
1103 // CHECK11-NEXT: [[CMP10:%.*]] = icmp slt i32 0, [[TMP8]]
1104 // CHECK11-NEXT: br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
1105 // CHECK11: omp.precond.then:
1106 // CHECK11-NEXT: store i64 0, ptr [[DOTOMP_LB]], align 8
1107 // CHECK11-NEXT: [[TMP9:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8
1108 // CHECK11-NEXT: store i64 [[TMP9]], ptr [[DOTOMP_UB]], align 8
1109 // CHECK11-NEXT: store i64 1, ptr [[DOTOMP_STRIDE]], align 8
1110 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1111 // CHECK11-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1112 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4
1113 // CHECK11-NEXT: call void @__kmpc_for_static_init_8(ptr @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1)
1114 // CHECK11-NEXT: [[TMP12:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8
1115 // CHECK11-NEXT: [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8
1116 // CHECK11-NEXT: [[CMP13:%.*]] = icmp sgt i64 [[TMP12]], [[TMP13]]
1117 // CHECK11-NEXT: br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1118 // CHECK11: cond.true:
1119 // CHECK11-NEXT: [[TMP14:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8
1120 // CHECK11-NEXT: br label [[COND_END:%.*]]
1121 // CHECK11: cond.false:
1122 // CHECK11-NEXT: [[TMP15:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8
1123 // CHECK11-NEXT: br label [[COND_END]]
1124 // CHECK11: cond.end:
1125 // CHECK11-NEXT: [[COND:%.*]] = phi i64 [ [[TMP14]], [[COND_TRUE]] ], [ [[TMP15]], [[COND_FALSE]] ]
1126 // CHECK11-NEXT: store i64 [[COND]], ptr [[DOTOMP_UB]], align 8
1127 // CHECK11-NEXT: [[TMP16:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8
1128 // CHECK11-NEXT: store i64 [[TMP16]], ptr [[DOTOMP_IV]], align 8
1129 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1130 // CHECK11: omp.inner.for.cond:
1131 // CHECK11-NEXT: [[TMP17:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
1132 // CHECK11-NEXT: [[TMP18:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8
1133 // CHECK11-NEXT: [[CMP14:%.*]] = icmp sle i64 [[TMP17]], [[TMP18]]
1134 // CHECK11-NEXT: br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1135 // CHECK11: omp.inner.for.body:
1136 // CHECK11-NEXT: [[TMP19:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
1137 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4
1138 // CHECK11-NEXT: [[SUB15:%.*]] = sub nsw i32 [[TMP20]], 0
1139 // CHECK11-NEXT: [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
1140 // CHECK11-NEXT: [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]]
1141 // CHECK11-NEXT: [[CONV18:%.*]] = sext i32 [[MUL17]] to i64
1142 // CHECK11-NEXT: [[DIV19:%.*]] = sdiv i64 [[TMP19]], [[CONV18]]
1143 // CHECK11-NEXT: [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1
1144 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i64 0, [[MUL20]]
1145 // CHECK11-NEXT: [[CONV21:%.*]] = trunc i64 [[ADD]] to i32
1146 // CHECK11-NEXT: store i32 [[CONV21]], ptr [[I11]], align 4
1147 // CHECK11-NEXT: [[TMP21:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
1148 // CHECK11-NEXT: [[TMP22:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
1149 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4
1150 // CHECK11-NEXT: [[SUB22:%.*]] = sub nsw i32 [[TMP23]], 0
1151 // CHECK11-NEXT: [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1
1152 // CHECK11-NEXT: [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]
1153 // CHECK11-NEXT: [[CONV25:%.*]] = sext i32 [[MUL24]] to i64
1154 // CHECK11-NEXT: [[DIV26:%.*]] = sdiv i64 [[TMP22]], [[CONV25]]
1155 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4
1156 // CHECK11-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP24]], 0
1157 // CHECK11-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
1158 // CHECK11-NEXT: [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]]
1159 // CHECK11-NEXT: [[CONV30:%.*]] = sext i32 [[MUL29]] to i64
1160 // CHECK11-NEXT: [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]]
1161 // CHECK11-NEXT: [[SUB32:%.*]] = sub nsw i64 [[TMP21]], [[MUL31]]
1162 // CHECK11-NEXT: [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1
1163 // CHECK11-NEXT: [[ADD34:%.*]] = add nsw i64 0, [[MUL33]]
1164 // CHECK11-NEXT: [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32
1165 // CHECK11-NEXT: store i32 [[CONV35]], ptr [[J12]], align 4
1166 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[I11]], align 4
1167 // CHECK11-NEXT: [[TMP26:%.*]] = mul nsw i32 [[TMP25]], [[TMP1]]
1168 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP26]]
1169 // CHECK11-NEXT: [[TMP27:%.*]] = load i32, ptr [[J12]], align 4
1170 // CHECK11-NEXT: [[ARRAYIDX36:%.*]] = getelementptr inbounds i32, ptr [[ARRAYIDX]], i32 [[TMP27]]
1171 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX36]], align 4
1172 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1173 // CHECK11: omp.body.continue:
1174 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1175 // CHECK11: omp.inner.for.inc:
1176 // CHECK11-NEXT: [[TMP28:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
1177 // CHECK11-NEXT: [[ADD37:%.*]] = add nsw i64 [[TMP28]], 1
1178 // CHECK11-NEXT: store i64 [[ADD37]], ptr [[DOTOMP_IV]], align 8
1179 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
1180 // CHECK11: omp.inner.for.end:
1181 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1182 // CHECK11: omp.loop.exit:
1183 // CHECK11-NEXT: [[TMP29:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1184 // CHECK11-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP29]], align 4
1185 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP30]])
1186 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
1187 // CHECK11: omp.precond.end:
1188 // CHECK11-NEXT: ret void
1191 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_
1192 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
1193 // CHECK11-NEXT: entry:
1194 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
1195 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x [2 x i32]], align 4
1196 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
1197 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
1198 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
1199 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
1200 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1201 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1202 // CHECK11-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
1203 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1204 // CHECK11-NEXT: store ptr [[A]], ptr [[TMP0]], align 4
1205 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1206 // CHECK11-NEXT: store ptr [[A]], ptr [[TMP1]], align 4
1207 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1208 // CHECK11-NEXT: store ptr null, ptr [[TMP2]], align 4
1209 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1210 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1211 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1212 // CHECK11-NEXT: store i32 3, ptr [[TMP5]], align 4
1213 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1214 // CHECK11-NEXT: store i32 1, ptr [[TMP6]], align 4
1215 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1216 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 4
1217 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1218 // CHECK11-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4
1219 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1220 // CHECK11-NEXT: store ptr @.offload_sizes.1, ptr [[TMP9]], align 4
1221 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1222 // CHECK11-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP10]], align 4
1223 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1224 // CHECK11-NEXT: store ptr null, ptr [[TMP11]], align 4
1225 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1226 // CHECK11-NEXT: store ptr null, ptr [[TMP12]], align 4
1227 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1228 // CHECK11-NEXT: store i64 20, ptr [[TMP13]], align 8
1229 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1230 // CHECK11-NEXT: store i64 0, ptr [[TMP14]], align 8
1231 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1232 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
1233 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1234 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
1235 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1236 // CHECK11-NEXT: store i32 0, ptr [[TMP17]], align 4
1237 // CHECK11-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l67.region_id, ptr [[KERNEL_ARGS]])
1238 // CHECK11-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
1239 // CHECK11-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1240 // CHECK11: omp_offload.failed:
1241 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l67(ptr [[A]]) #[[ATTR3]]
1242 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
1243 // CHECK11: omp_offload.cont:
1244 // CHECK11-NEXT: ret i32 0
1247 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l67
1248 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
1249 // CHECK11-NEXT: entry:
1250 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
1251 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
1252 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
1253 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l67.omp_outlined, ptr [[TMP0]])
1254 // CHECK11-NEXT: ret void
1257 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l67.omp_outlined
1258 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
1259 // CHECK11-NEXT: entry:
1260 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1261 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1262 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
1263 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1264 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
1265 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1266 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1267 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1268 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1269 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1270 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
1271 // CHECK11-NEXT: [[J:%.*]] = alloca i32, align 4
1272 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1273 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1274 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
1275 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
1276 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1277 // CHECK11-NEXT: store i32 19, ptr [[DOTOMP_UB]], align 4
1278 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1279 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1280 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1281 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
1282 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1283 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1284 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19
1285 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1286 // CHECK11: cond.true:
1287 // CHECK11-NEXT: br label [[COND_END:%.*]]
1288 // CHECK11: cond.false:
1289 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1290 // CHECK11-NEXT: br label [[COND_END]]
1291 // CHECK11: cond.end:
1292 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1293 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1294 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1295 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
1296 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1297 // CHECK11: omp.inner.for.cond:
1298 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1299 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1300 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1301 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1302 // CHECK11: omp.inner.for.body:
1303 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1304 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[TMP8]], 2
1305 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
1306 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1307 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4
1308 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1309 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1310 // CHECK11-NEXT: [[DIV3:%.*]] = sdiv i32 [[TMP10]], 2
1311 // CHECK11-NEXT: [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2
1312 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]]
1313 // CHECK11-NEXT: [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
1314 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
1315 // CHECK11-NEXT: store i32 [[ADD6]], ptr [[J]], align 4
1316 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4
1317 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], ptr [[TMP0]], i32 0, i32 [[TMP11]]
1318 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[J]], align 4
1319 // CHECK11-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], ptr [[ARRAYIDX]], i32 0, i32 [[TMP12]]
1320 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX7]], align 4
1321 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1322 // CHECK11: omp.body.continue:
1323 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1324 // CHECK11: omp.inner.for.inc:
1325 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1326 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP13]], 1
1327 // CHECK11-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4
1328 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
1329 // CHECK11: omp.inner.for.end:
1330 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1331 // CHECK11: omp.loop.exit:
1332 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
1333 // CHECK11-NEXT: ret void