clang/test/OpenMP/target_teams_distribute_parallel_for_simd_codegen.cpp

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
   2 // expected-no-diagnostics
   3 #ifndef HEADER
   4 #define HEADER
   5 // Test host codegen.
   6 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
   7 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
   8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
   9 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
  10 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
  12
  13 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
  14 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  15 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5
  16 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
  17 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  18 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7
  19
  20 // Test target codegen - host bc file has to be created first. (no significant differences with host version of target region)
  21 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
  22 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK9
  23 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
  24 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
  25 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
  26 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK11
  27 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
  28 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11
  29
  30 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
  31 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK5
  32 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
  33 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5
  34 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
  35 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK7
  36 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
  37 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7
  38
  39 #ifdef CK1
  40
  41 int target_teams_fun(int *g){
  42   int n = 1000;
  43   int a[1000];
  44   int te = n / 128;
  45   int th = 128;
  46 // discard n_addr
  47 // discard capture expressions for te and th
  48
  49   int i;
  50 #pragma omp target teams distribute parallel for simd num_teams(te), thread_limit(th) aligned(a : 8) safelen(16) simdlen(4) linear(i : n)
  51   for(i = 0; i < n; i++) {
  52     a[i] = 0;
  53   }
  54
  55   {{{
  56   #pragma omp target teams distribute parallel for simd is_device_ptr(g) simdlen(8)
  57   for(int i = 0; i < n; i++) {
  58     a[i] = g[0];
  59   }
  60   }}}
  61
  62   // outlined target regions
  63
  64
  65
  66
  67   return a[0];
  68 }
  69
  70 void test_target_teams_atomic() {
  71   int x = 0;
  72 #pragma omp target teams distribute parallel for simd map(tofrom: x) shared(x)
  73   for (int i = 0; i < 1024; i++) {
  74 #pragma omp atomic update
  75     x += 1;
  76   }
  77 }
  78
  79
  80 #endif // CK1
  81 #endif // HEADER
  82
  83
  84
  85 // CHECK1-LABEL: define {{[^@]+}}@_Z16target_teams_funPi
  86 // CHECK1-SAME: (ptr noundef [[G:%.*]]) #[[ATTR0:[0-9]+]] {
  87 // CHECK1-NEXT:  entry:
  88 // CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 8
  89 // CHECK1-NEXT:    [[N:%.*]] = alloca i32, align 4
  90 // CHECK1-NEXT:    [[A:%.*]] = alloca [1000 x i32], align 4
  91 // CHECK1-NEXT:    [[TE:%.*]] = alloca i32, align 4
  92 // CHECK1-NEXT:    [[TH:%.*]] = alloca i32, align 4
  93 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
  94 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
  95 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
  96 // CHECK1-NEXT:    [[I_CASTED:%.*]] = alloca i64, align 8
  97 // CHECK1-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
  98 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
  99 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__CASTED2:%.*]] = alloca i64, align 8
 100 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 8
 101 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 8
 102 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 8
 103 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 104 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
 105 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
 106 // CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
 107 // CHECK1-NEXT:    [[N_CASTED7:%.*]] = alloca i64, align 8
 108 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [3 x ptr], align 8
 109 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS9:%.*]] = alloca [3 x ptr], align 8
 110 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [3 x ptr], align 8
 111 // CHECK1-NEXT:    [[_TMP11:%.*]] = alloca i32, align 4
 112 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4
 113 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4
 114 // CHECK1-NEXT:    [[KERNEL_ARGS18:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
 115 // CHECK1-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 8
 116 // CHECK1-NEXT:    store i32 1000, ptr [[N]], align 4
 117 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 4
 118 // CHECK1-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
 119 // CHECK1-NEXT:    store i32 [[DIV]], ptr [[TE]], align 4
 120 // CHECK1-NEXT:    store i32 128, ptr [[TH]], align 4
 121 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TE]], align 4
 122 // CHECK1-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
 123 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TH]], align 4
 124 // CHECK1-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
 125 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[I]], align 4
 126 // CHECK1-NEXT:    store i32 [[TMP3]], ptr [[I_CASTED]], align 4
 127 // CHECK1-NEXT:    [[TMP4:%.*]] = load i64, ptr [[I_CASTED]], align 8
 128 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[N]], align 4
 129 // CHECK1-NEXT:    store i32 [[TMP5]], ptr [[N_CASTED]], align 4
 130 // CHECK1-NEXT:    [[TMP6:%.*]] = load i64, ptr [[N_CASTED]], align 8
 131 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 132 // CHECK1-NEXT:    store i32 [[TMP7]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
 133 // CHECK1-NEXT:    [[TMP8:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
 134 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 135 // CHECK1-NEXT:    store i32 [[TMP9]], ptr [[DOTCAPTURE_EXPR__CASTED2]], align 4
 136 // CHECK1-NEXT:    [[TMP10:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED2]], align 8
 137 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 138 // CHECK1-NEXT:    store i64 [[TMP4]], ptr [[TMP11]], align 8
 139 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 140 // CHECK1-NEXT:    store i64 [[TMP4]], ptr [[TMP12]], align 8
 141 // CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
 142 // CHECK1-NEXT:    store ptr null, ptr [[TMP13]], align 8
 143 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
 144 // CHECK1-NEXT:    store i64 [[TMP6]], ptr [[TMP14]], align 8
 145 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
 146 // CHECK1-NEXT:    store i64 [[TMP6]], ptr [[TMP15]], align 8
 147 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
 148 // CHECK1-NEXT:    store ptr null, ptr [[TMP16]], align 8
 149 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
 150 // CHECK1-NEXT:    store ptr [[A]], ptr [[TMP17]], align 8
 151 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
 152 // CHECK1-NEXT:    store ptr [[A]], ptr [[TMP18]], align 8
 153 // CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
 154 // CHECK1-NEXT:    store ptr null, ptr [[TMP19]], align 8
 155 // CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
 156 // CHECK1-NEXT:    store i64 [[TMP8]], ptr [[TMP20]], align 8
 157 // CHECK1-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
 158 // CHECK1-NEXT:    store i64 [[TMP8]], ptr [[TMP21]], align 8
 159 // CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
 160 // CHECK1-NEXT:    store ptr null, ptr [[TMP22]], align 8
 161 // CHECK1-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
 162 // CHECK1-NEXT:    store i64 [[TMP10]], ptr [[TMP23]], align 8
 163 // CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4
 164 // CHECK1-NEXT:    store i64 [[TMP10]], ptr [[TMP24]], align 8
 165 // CHECK1-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
 166 // CHECK1-NEXT:    store ptr null, ptr [[TMP25]], align 8
 167 // CHECK1-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 168 // CHECK1-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 169 // CHECK1-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 170 // CHECK1-NEXT:    [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 171 // CHECK1-NEXT:    [[TMP30:%.*]] = load i32, ptr [[N]], align 4
 172 // CHECK1-NEXT:    store i32 [[TMP30]], ptr [[DOTCAPTURE_EXPR_3]], align 4
 173 // CHECK1-NEXT:    [[TMP31:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4
 174 // CHECK1-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP31]], 0
 175 // CHECK1-NEXT:    [[DIV5:%.*]] = sdiv i32 [[SUB]], 1
 176 // CHECK1-NEXT:    [[SUB6:%.*]] = sub nsw i32 [[DIV5]], 1
 177 // CHECK1-NEXT:    store i32 [[SUB6]], ptr [[DOTCAPTURE_EXPR_4]], align 4
 178 // CHECK1-NEXT:    [[TMP32:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4
 179 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP32]], 1
 180 // CHECK1-NEXT:    [[TMP33:%.*]] = zext i32 [[ADD]] to i64
 181 // CHECK1-NEXT:    [[TMP34:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP28]], 0
 182 // CHECK1-NEXT:    [[TMP35:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP29]], 0
 183 // CHECK1-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
 184 // CHECK1-NEXT:    store i32 3, ptr [[TMP36]], align 4
 185 // CHECK1-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
 186 // CHECK1-NEXT:    store i32 5, ptr [[TMP37]], align 4
 187 // CHECK1-NEXT:    [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
 188 // CHECK1-NEXT:    store ptr [[TMP26]], ptr [[TMP38]], align 8
 189 // CHECK1-NEXT:    [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
 190 // CHECK1-NEXT:    store ptr [[TMP27]], ptr [[TMP39]], align 8
 191 // CHECK1-NEXT:    [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
 192 // CHECK1-NEXT:    store ptr @.offload_sizes, ptr [[TMP40]], align 8
 193 // CHECK1-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
 194 // CHECK1-NEXT:    store ptr @.offload_maptypes, ptr [[TMP41]], align 8
 195 // CHECK1-NEXT:    [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
 196 // CHECK1-NEXT:    store ptr null, ptr [[TMP42]], align 8
 197 // CHECK1-NEXT:    [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
 198 // CHECK1-NEXT:    store ptr null, ptr [[TMP43]], align 8
 199 // CHECK1-NEXT:    [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
 200 // CHECK1-NEXT:    store i64 [[TMP33]], ptr [[TMP44]], align 8
 201 // CHECK1-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
 202 // CHECK1-NEXT:    store i64 0, ptr [[TMP45]], align 8
 203 // CHECK1-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
 204 // CHECK1-NEXT:    store [3 x i32] [[TMP34]], ptr [[TMP46]], align 4
 205 // CHECK1-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
 206 // CHECK1-NEXT:    store [3 x i32] [[TMP35]], ptr [[TMP47]], align 4
 207 // CHECK1-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
 208 // CHECK1-NEXT:    store i32 0, ptr [[TMP48]], align 4
 209 // CHECK1-NEXT:    [[TMP49:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4:[0-9]+]], i64 -1, i32 [[TMP28]], i32 [[TMP29]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50.region_id, ptr [[KERNEL_ARGS]])
 210 // CHECK1-NEXT:    [[TMP50:%.*]] = icmp ne i32 [[TMP49]], 0
 211 // CHECK1-NEXT:    br i1 [[TMP50]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 212 // CHECK1:       omp_offload.failed:
 213 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50(i64 [[TMP4]], i64 [[TMP6]], ptr [[A]], i64 [[TMP8]], i64 [[TMP10]]) #[[ATTR3:[0-9]+]]
 214 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 215 // CHECK1:       omp_offload.cont:
 216 // CHECK1-NEXT:    [[TMP51:%.*]] = load i32, ptr [[N]], align 4
 217 // CHECK1-NEXT:    store i32 [[TMP51]], ptr [[N_CASTED7]], align 4
 218 // CHECK1-NEXT:    [[TMP52:%.*]] = load i64, ptr [[N_CASTED7]], align 8
 219 // CHECK1-NEXT:    [[TMP53:%.*]] = load ptr, ptr [[G_ADDR]], align 8
 220 // CHECK1-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
 221 // CHECK1-NEXT:    store i64 [[TMP52]], ptr [[TMP54]], align 8
 222 // CHECK1-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
 223 // CHECK1-NEXT:    store i64 [[TMP52]], ptr [[TMP55]], align 8
 224 // CHECK1-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0
 225 // CHECK1-NEXT:    store ptr null, ptr [[TMP56]], align 8
 226 // CHECK1-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1
 227 // CHECK1-NEXT:    store ptr [[A]], ptr [[TMP57]], align 8
 228 // CHECK1-NEXT:    [[TMP58:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 1
 229 // CHECK1-NEXT:    store ptr [[A]], ptr [[TMP58]], align 8
 230 // CHECK1-NEXT:    [[TMP59:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 1
 231 // CHECK1-NEXT:    store ptr null, ptr [[TMP59]], align 8
 232 // CHECK1-NEXT:    [[TMP60:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 2
 233 // CHECK1-NEXT:    store ptr [[TMP53]], ptr [[TMP60]], align 8
 234 // CHECK1-NEXT:    [[TMP61:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 2
 235 // CHECK1-NEXT:    store ptr [[TMP53]], ptr [[TMP61]], align 8
 236 // CHECK1-NEXT:    [[TMP62:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 2
 237 // CHECK1-NEXT:    store ptr null, ptr [[TMP62]], align 8
 238 // CHECK1-NEXT:    [[TMP63:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
 239 // CHECK1-NEXT:    [[TMP64:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
 240 // CHECK1-NEXT:    [[TMP65:%.*]] = load i32, ptr [[N]], align 4
 241 // CHECK1-NEXT:    store i32 [[TMP65]], ptr [[DOTCAPTURE_EXPR_12]], align 4
 242 // CHECK1-NEXT:    [[TMP66:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_12]], align 4
 243 // CHECK1-NEXT:    [[SUB14:%.*]] = sub nsw i32 [[TMP66]], 0
 244 // CHECK1-NEXT:    [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1
 245 // CHECK1-NEXT:    [[SUB16:%.*]] = sub nsw i32 [[DIV15]], 1
 246 // CHECK1-NEXT:    store i32 [[SUB16]], ptr [[DOTCAPTURE_EXPR_13]], align 4
 247 // CHECK1-NEXT:    [[TMP67:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_13]], align 4
 248 // CHECK1-NEXT:    [[ADD17:%.*]] = add nsw i32 [[TMP67]], 1
 249 // CHECK1-NEXT:    [[TMP68:%.*]] = zext i32 [[ADD17]] to i64
 250 // CHECK1-NEXT:    [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 0
 251 // CHECK1-NEXT:    store i32 3, ptr [[TMP69]], align 4
 252 // CHECK1-NEXT:    [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 1
 253 // CHECK1-NEXT:    store i32 3, ptr [[TMP70]], align 4
 254 // CHECK1-NEXT:    [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 2
 255 // CHECK1-NEXT:    store ptr [[TMP63]], ptr [[TMP71]], align 8
 256 // CHECK1-NEXT:    [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 3
 257 // CHECK1-NEXT:    store ptr [[TMP64]], ptr [[TMP72]], align 8
 258 // CHECK1-NEXT:    [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 4
 259 // CHECK1-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP73]], align 8
 260 // CHECK1-NEXT:    [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 5
 261 // CHECK1-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP74]], align 8
 262 // CHECK1-NEXT:    [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 6
 263 // CHECK1-NEXT:    store ptr null, ptr [[TMP75]], align 8
 264 // CHECK1-NEXT:    [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 7
 265 // CHECK1-NEXT:    store ptr null, ptr [[TMP76]], align 8
 266 // CHECK1-NEXT:    [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 8
 267 // CHECK1-NEXT:    store i64 [[TMP68]], ptr [[TMP77]], align 8
 268 // CHECK1-NEXT:    [[TMP78:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 9
 269 // CHECK1-NEXT:    store i64 0, ptr [[TMP78]], align 8
 270 // CHECK1-NEXT:    [[TMP79:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 10
 271 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP79]], align 4
 272 // CHECK1-NEXT:    [[TMP80:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 11
 273 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP80]], align 4
 274 // CHECK1-NEXT:    [[TMP81:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 12
 275 // CHECK1-NEXT:    store i32 0, ptr [[TMP81]], align 4
 276 // CHECK1-NEXT:    [[TMP82:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56.region_id, ptr [[KERNEL_ARGS18]])
 277 // CHECK1-NEXT:    [[TMP83:%.*]] = icmp ne i32 [[TMP82]], 0
 278 // CHECK1-NEXT:    br i1 [[TMP83]], label [[OMP_OFFLOAD_FAILED19:%.*]], label [[OMP_OFFLOAD_CONT20:%.*]]
 279 // CHECK1:       omp_offload.failed19:
 280 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56(i64 [[TMP52]], ptr [[A]], ptr [[TMP53]]) #[[ATTR3]]
 281 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT20]]
 282 // CHECK1:       omp_offload.cont20:
 283 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], ptr [[A]], i64 0, i64 0
 284 // CHECK1-NEXT:    [[TMP84:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
 285 // CHECK1-NEXT:    ret i32 [[TMP84]]
 286 //
 287 //
 288 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50
 289 // CHECK1-SAME: (i64 noundef [[I:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1:[0-9]+]] {
 290 // CHECK1-NEXT:  entry:
 291 // CHECK1-NEXT:    [[I_ADDR:%.*]] = alloca i64, align 8
 292 // CHECK1-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
 293 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 294 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
 295 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8
 296 // CHECK1-NEXT:    [[I_CASTED:%.*]] = alloca i64, align 8
 297 // CHECK1-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
 298 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB4]])
 299 // CHECK1-NEXT:    store i64 [[I]], ptr [[I_ADDR]], align 8
 300 // CHECK1-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
 301 // CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 302 // CHECK1-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
 303 // CHECK1-NEXT:    store i64 [[DOTCAPTURE_EXPR_1]], ptr [[DOTCAPTURE_EXPR__ADDR2]], align 8
 304 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 305 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
 306 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR2]], align 4
 307 // CHECK1-NEXT:    call void @__kmpc_push_num_teams(ptr @[[GLOB4]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
 308 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I_ADDR]], align 4
 309 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[I_CASTED]], align 4
 310 // CHECK1-NEXT:    [[TMP5:%.*]] = load i64, ptr [[I_CASTED]], align 8
 311 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[N_ADDR]], align 4
 312 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[N_CASTED]], align 4
 313 // CHECK1-NEXT:    [[TMP7:%.*]] = load i64, ptr [[N_CASTED]], align 8
 314 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50.omp_outlined, i64 [[TMP5]], i64 [[TMP7]], ptr [[TMP1]])
 315 // CHECK1-NEXT:    ret void
 316 //
 317 //
 318 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50.omp_outlined
 319 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[I:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] {
 320 // CHECK1-NEXT:  entry:
 321 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 322 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 323 // CHECK1-NEXT:    [[I_ADDR:%.*]] = alloca i64, align 8
 324 // CHECK1-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
 325 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 326 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 327 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 328 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
 329 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
 330 // CHECK1-NEXT:    [[I3:%.*]] = alloca i32, align 4
 331 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 332 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 333 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 334 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 335 // CHECK1-NEXT:    [[I4:%.*]] = alloca i32, align 4
 336 // CHECK1-NEXT:    [[I_CASTED:%.*]] = alloca i64, align 8
 337 // CHECK1-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
 338 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 339 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 340 // CHECK1-NEXT:    store i64 [[I]], ptr [[I_ADDR]], align 8
 341 // CHECK1-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
 342 // CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 343 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 344 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
 345 // CHECK1-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
 346 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 347 // CHECK1-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
 348 // CHECK1-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
 349 // CHECK1-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
 350 // CHECK1-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
 351 // CHECK1-NEXT:    store i32 0, ptr [[I3]], align 4
 352 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 353 // CHECK1-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
 354 // CHECK1-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
 355 // CHECK1:       omp.precond.then:
 356 // CHECK1-NEXT:    [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i64 0, i64 0
 357 // CHECK1-NEXT:    call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i64 8) ]
 358 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 359 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 360 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4
 361 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 362 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 363 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 364 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
 365 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 366 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 367 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 368 // CHECK1-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
 369 // CHECK1-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 370 // CHECK1:       cond.true:
 371 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 372 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 373 // CHECK1:       cond.false:
 374 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 375 // CHECK1-NEXT:    br label [[COND_END]]
 376 // CHECK1:       cond.end:
 377 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
 378 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 379 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 380 // CHECK1-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
 381 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 382 // CHECK1:       omp.inner.for.cond:
 383 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 384 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 385 // CHECK1-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
 386 // CHECK1-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 387 // CHECK1:       omp.inner.for.body:
 388 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 389 // CHECK1-NEXT:    [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
 390 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 391 // CHECK1-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
 392 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I4]], align 4
 393 // CHECK1-NEXT:    store i32 [[TMP18]], ptr [[I_CASTED]], align 4
 394 // CHECK1-NEXT:    [[TMP19:%.*]] = load i64, ptr [[I_CASTED]], align 8
 395 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[N_ADDR]], align 4
 396 // CHECK1-NEXT:    store i32 [[TMP20]], ptr [[N_CASTED]], align 4
 397 // CHECK1-NEXT:    [[TMP21:%.*]] = load i64, ptr [[N_CASTED]], align 8
 398 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50.omp_outlined.omp_outlined, i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], i64 [[TMP21]], ptr [[TMP0]])
 399 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 400 // CHECK1:       omp.inner.for.inc:
 401 // CHECK1-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 402 // CHECK1-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 403 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
 404 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
 405 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
 406 // CHECK1:       omp.inner.for.end:
 407 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 408 // CHECK1:       omp.loop.exit:
 409 // CHECK1-NEXT:    [[TMP24:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 410 // CHECK1-NEXT:    [[TMP25:%.*]] = load i32, ptr [[TMP24]], align 4
 411 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP25]])
 412 // CHECK1-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 413 // CHECK1-NEXT:    [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0
 414 // CHECK1-NEXT:    br i1 [[TMP27]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 415 // CHECK1:       .omp.final.then:
 416 // CHECK1-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 417 // CHECK1-NEXT:    [[SUB7:%.*]] = sub nsw i32 [[TMP28]], 0
 418 // CHECK1-NEXT:    [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
 419 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
 420 // CHECK1-NEXT:    [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
 421 // CHECK1-NEXT:    store i32 [[ADD9]], ptr [[I_ADDR]], align 4
 422 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 423 // CHECK1:       .omp.final.done:
 424 // CHECK1-NEXT:    br label [[OMP_PRECOND_END]]
 425 // CHECK1:       omp.precond.end:
 426 // CHECK1-NEXT:    ret void
 427 //
 428 //
 429 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50.omp_outlined.omp_outlined
 430 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[I:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] {
 431 // CHECK1-NEXT:  entry:
 432 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 433 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 434 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 435 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 436 // CHECK1-NEXT:    [[I_ADDR:%.*]] = alloca i64, align 8
 437 // CHECK1-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
 438 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 439 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 440 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 441 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
 442 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
 443 // CHECK1-NEXT:    [[I3:%.*]] = alloca i32, align 4
 444 // CHECK1-NEXT:    [[DOTLINEAR_START:%.*]] = alloca i32, align 4
 445 // CHECK1-NEXT:    [[DOTLINEAR_STEP:%.*]] = alloca i32, align 4
 446 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 447 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 448 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 449 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 450 // CHECK1-NEXT:    [[I5:%.*]] = alloca i32, align 4
 451 // CHECK1-NEXT:    [[I6:%.*]] = alloca i32, align 4
 452 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 453 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 454 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 455 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 456 // CHECK1-NEXT:    store i64 [[I]], ptr [[I_ADDR]], align 8
 457 // CHECK1-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
 458 // CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 459 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 460 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
 461 // CHECK1-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
 462 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 463 // CHECK1-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
 464 // CHECK1-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
 465 // CHECK1-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
 466 // CHECK1-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
 467 // CHECK1-NEXT:    store i32 0, ptr [[I3]], align 4
 468 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 469 // CHECK1-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
 470 // CHECK1-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
 471 // CHECK1:       omp.precond.then:
 472 // CHECK1-NEXT:    [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i64 0, i64 0
 473 // CHECK1-NEXT:    call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i64 8) ]
 474 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I_ADDR]], align 4
 475 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTLINEAR_START]], align 4
 476 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[N_ADDR]], align 4
 477 // CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTLINEAR_STEP]], align 4
 478 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 479 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 480 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
 481 // CHECK1-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 482 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
 483 // CHECK1-NEXT:    [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 484 // CHECK1-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32
 485 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 486 // CHECK1-NEXT:    store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4
 487 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 488 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 489 // CHECK1-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 490 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
 491 // CHECK1-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP10]])
 492 // CHECK1-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 493 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
 494 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP12]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 495 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 496 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 497 // CHECK1-NEXT:    [[CMP7:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]]
 498 // CHECK1-NEXT:    br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 499 // CHECK1:       cond.true:
 500 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 501 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 502 // CHECK1:       cond.false:
 503 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 504 // CHECK1-NEXT:    br label [[COND_END]]
 505 // CHECK1:       cond.end:
 506 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ]
 507 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 508 // CHECK1-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 509 // CHECK1-NEXT:    store i32 [[TMP17]], ptr [[DOTOMP_IV]], align 4
 510 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 511 // CHECK1:       omp.inner.for.cond:
 512 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 513 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 514 // CHECK1-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
 515 // CHECK1-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 516 // CHECK1:       omp.inner.for.body:
 517 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 518 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
 519 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 520 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I5]], align 4
 521 // CHECK1-NEXT:    [[TMP21:%.*]] = load i32, ptr [[I5]], align 4
 522 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
 523 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
 524 // CHECK1-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
 525 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 526 // CHECK1:       omp.body.continue:
 527 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 528 // CHECK1:       omp.inner.for.inc:
 529 // CHECK1-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 530 // CHECK1-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP22]], 1
 531 // CHECK1-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4
 532 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
 533 // CHECK1:       omp.inner.for.end:
 534 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 535 // CHECK1:       omp.loop.exit:
 536 // CHECK1-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 537 // CHECK1-NEXT:    [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4
 538 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP24]])
 539 // CHECK1-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 540 // CHECK1-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
 541 // CHECK1-NEXT:    br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 542 // CHECK1:       .omp.final.then:
 543 // CHECK1-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 544 // CHECK1-NEXT:    [[SUB10:%.*]] = sub nsw i32 [[TMP27]], 0
 545 // CHECK1-NEXT:    [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
 546 // CHECK1-NEXT:    [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
 547 // CHECK1-NEXT:    [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
 548 // CHECK1-NEXT:    store i32 [[ADD13]], ptr [[I_ADDR]], align 4
 549 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 550 // CHECK1:       .omp.final.done:
 551 // CHECK1-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 552 // CHECK1-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
 553 // CHECK1-NEXT:    br i1 [[TMP29]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
 554 // CHECK1:       .omp.linear.pu:
 555 // CHECK1-NEXT:    br label [[DOTOMP_LINEAR_PU_DONE]]
 556 // CHECK1:       .omp.linear.pu.done:
 557 // CHECK1-NEXT:    br label [[OMP_PRECOND_END]]
 558 // CHECK1:       omp.precond.end:
 559 // CHECK1-NEXT:    ret void
 560 //
 561 //
 562 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56
 563 // CHECK1-SAME: (i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR1]] {
 564 // CHECK1-NEXT:  entry:
 565 // CHECK1-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
 566 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 567 // CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 8
 568 // CHECK1-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
 569 // CHECK1-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
 570 // CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 571 // CHECK1-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 8
 572 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 573 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
 574 // CHECK1-NEXT:    store i32 [[TMP1]], ptr [[N_CASTED]], align 4
 575 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, ptr [[N_CASTED]], align 8
 576 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[G_ADDR]], align 8
 577 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56.omp_outlined, i64 [[TMP2]], ptr [[TMP0]], ptr [[TMP3]])
 578 // CHECK1-NEXT:    ret void
 579 //
 580 //
 581 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56.omp_outlined
 582 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR1]] {
 583 // CHECK1-NEXT:  entry:
 584 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 585 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 586 // CHECK1-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
 587 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 588 // CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 8
 589 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 590 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 591 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
 592 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
 593 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 594 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 595 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 596 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 597 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 598 // CHECK1-NEXT:    [[I3:%.*]] = alloca i32, align 4
 599 // CHECK1-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
 600 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 601 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 602 // CHECK1-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
 603 // CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 604 // CHECK1-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 8
 605 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 606 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
 607 // CHECK1-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
 608 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 609 // CHECK1-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
 610 // CHECK1-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
 611 // CHECK1-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
 612 // CHECK1-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
 613 // CHECK1-NEXT:    store i32 0, ptr [[I]], align 4
 614 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 615 // CHECK1-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
 616 // CHECK1-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
 617 // CHECK1:       omp.precond.then:
 618 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 619 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 620 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4
 621 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 622 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 623 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 624 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
 625 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 626 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 627 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 628 // CHECK1-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
 629 // CHECK1-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 630 // CHECK1:       cond.true:
 631 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 632 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 633 // CHECK1:       cond.false:
 634 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 635 // CHECK1-NEXT:    br label [[COND_END]]
 636 // CHECK1:       cond.end:
 637 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
 638 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 639 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 640 // CHECK1-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
 641 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 642 // CHECK1:       omp.inner.for.cond:
 643 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]
 644 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP12]]
 645 // CHECK1-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
 646 // CHECK1-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 647 // CHECK1:       omp.inner.for.body:
 648 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP12]]
 649 // CHECK1-NEXT:    [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
 650 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP12]]
 651 // CHECK1-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
 652 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 4, !llvm.access.group [[ACC_GRP12]]
 653 // CHECK1-NEXT:    store i32 [[TMP18]], ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP12]]
 654 // CHECK1-NEXT:    [[TMP19:%.*]] = load i64, ptr [[N_CASTED]], align 8, !llvm.access.group [[ACC_GRP12]]
 655 // CHECK1-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[G_ADDR]], align 8, !llvm.access.group [[ACC_GRP12]]
 656 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56.omp_outlined.omp_outlined, i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]], ptr [[TMP20]]), !llvm.access.group [[ACC_GRP12]]
 657 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 658 // CHECK1:       omp.inner.for.inc:
 659 // CHECK1-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]
 660 // CHECK1-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP12]]
 661 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
 662 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]
 663 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
 664 // CHECK1:       omp.inner.for.end:
 665 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 666 // CHECK1:       omp.loop.exit:
 667 // CHECK1-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 668 // CHECK1-NEXT:    [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4
 669 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]])
 670 // CHECK1-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 671 // CHECK1-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
 672 // CHECK1-NEXT:    br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 673 // CHECK1:       .omp.final.then:
 674 // CHECK1-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 675 // CHECK1-NEXT:    [[SUB6:%.*]] = sub nsw i32 [[TMP27]], 0
 676 // CHECK1-NEXT:    [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
 677 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
 678 // CHECK1-NEXT:    [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
 679 // CHECK1-NEXT:    store i32 [[ADD8]], ptr [[I3]], align 4
 680 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 681 // CHECK1:       .omp.final.done:
 682 // CHECK1-NEXT:    br label [[OMP_PRECOND_END]]
 683 // CHECK1:       omp.precond.end:
 684 // CHECK1-NEXT:    ret void
 685 //
 686 //
 687 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56.omp_outlined.omp_outlined
 688 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR1]] {
 689 // CHECK1-NEXT:  entry:
 690 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 691 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 692 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 693 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 694 // CHECK1-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
 695 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 696 // CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 8
 697 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 698 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 699 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
 700 // CHECK1-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
 701 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 702 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 703 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 704 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 705 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 706 // CHECK1-NEXT:    [[I4:%.*]] = alloca i32, align 4
 707 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 708 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 709 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 710 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 711 // CHECK1-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
 712 // CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 713 // CHECK1-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 8
 714 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 715 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
 716 // CHECK1-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
 717 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 718 // CHECK1-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
 719 // CHECK1-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
 720 // CHECK1-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
 721 // CHECK1-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
 722 // CHECK1-NEXT:    store i32 0, ptr [[I]], align 4
 723 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 724 // CHECK1-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
 725 // CHECK1-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
 726 // CHECK1:       omp.precond.then:
 727 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 728 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 729 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4
 730 // CHECK1-NEXT:    [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 731 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP5]] to i32
 732 // CHECK1-NEXT:    [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 733 // CHECK1-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
 734 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 735 // CHECK1-NEXT:    store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4
 736 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 737 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 738 // CHECK1-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 739 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
 740 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 741 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 742 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 743 // CHECK1-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
 744 // CHECK1-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 745 // CHECK1:       cond.true:
 746 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
 747 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 748 // CHECK1:       cond.false:
 749 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 750 // CHECK1-NEXT:    br label [[COND_END]]
 751 // CHECK1:       cond.end:
 752 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
 753 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 754 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 755 // CHECK1-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
 756 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 757 // CHECK1:       omp.inner.for.cond:
 758 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]]
 759 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP16]]
 760 // CHECK1-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
 761 // CHECK1-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 762 // CHECK1:       omp.inner.for.body:
 763 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]
 764 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
 765 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 766 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP16]]
 767 // CHECK1-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[G_ADDR]], align 8, !llvm.access.group [[ACC_GRP16]]
 768 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i64 0
 769 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP16]]
 770 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP16]]
 771 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
 772 // CHECK1-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
 773 // CHECK1-NEXT:    store i32 [[TMP18]], ptr [[ARRAYIDX7]], align 4, !llvm.access.group [[ACC_GRP16]]
 774 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 775 // CHECK1:       omp.body.continue:
 776 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 777 // CHECK1:       omp.inner.for.inc:
 778 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]
 779 // CHECK1-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP20]], 1
 780 // CHECK1-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]
 781 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
 782 // CHECK1:       omp.inner.for.end:
 783 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 784 // CHECK1:       omp.loop.exit:
 785 // CHECK1-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 786 // CHECK1-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
 787 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP22]])
 788 // CHECK1-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 789 // CHECK1-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
 790 // CHECK1-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 791 // CHECK1:       .omp.final.then:
 792 // CHECK1-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 793 // CHECK1-NEXT:    [[SUB9:%.*]] = sub nsw i32 [[TMP25]], 0
 794 // CHECK1-NEXT:    [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1
 795 // CHECK1-NEXT:    [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1
 796 // CHECK1-NEXT:    [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
 797 // CHECK1-NEXT:    store i32 [[ADD12]], ptr [[I4]], align 4
 798 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 799 // CHECK1:       .omp.final.done:
 800 // CHECK1-NEXT:    br label [[OMP_PRECOND_END]]
 801 // CHECK1:       omp.precond.end:
 802 // CHECK1-NEXT:    ret void
 803 //
 804 //
 805 // CHECK1-LABEL: define {{[^@]+}}@_Z24test_target_teams_atomicv
 806 // CHECK1-SAME: () #[[ATTR0]] {
 807 // CHECK1-NEXT:  entry:
 808 // CHECK1-NEXT:    [[X:%.*]] = alloca i32, align 4
 809 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
 810 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
 811 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
 812 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 813 // CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
 814 // CHECK1-NEXT:    store i32 0, ptr [[X]], align 4
 815 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 816 // CHECK1-NEXT:    store ptr [[X]], ptr [[TMP0]], align 8
 817 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 818 // CHECK1-NEXT:    store ptr [[X]], ptr [[TMP1]], align 8
 819 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
 820 // CHECK1-NEXT:    store ptr null, ptr [[TMP2]], align 8
 821 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 822 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 823 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
 824 // CHECK1-NEXT:    store i32 3, ptr [[TMP5]], align 4
 825 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
 826 // CHECK1-NEXT:    store i32 1, ptr [[TMP6]], align 4
 827 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
 828 // CHECK1-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 8
 829 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
 830 // CHECK1-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 8
 831 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
 832 // CHECK1-NEXT:    store ptr @.offload_sizes.3, ptr [[TMP9]], align 8
 833 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
 834 // CHECK1-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP10]], align 8
 835 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
 836 // CHECK1-NEXT:    store ptr null, ptr [[TMP11]], align 8
 837 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
 838 // CHECK1-NEXT:    store ptr null, ptr [[TMP12]], align 8
 839 // CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
 840 // CHECK1-NEXT:    store i64 1024, ptr [[TMP13]], align 8
 841 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
 842 // CHECK1-NEXT:    store i64 0, ptr [[TMP14]], align 8
 843 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
 844 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
 845 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
 846 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
 847 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
 848 // CHECK1-NEXT:    store i32 0, ptr [[TMP17]], align 4
 849 // CHECK1-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z24test_target_teams_atomicv_l72.region_id, ptr [[KERNEL_ARGS]])
 850 // CHECK1-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
 851 // CHECK1-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 852 // CHECK1:       omp_offload.failed:
 853 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z24test_target_teams_atomicv_l72(ptr [[X]]) #[[ATTR3]]
 854 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 855 // CHECK1:       omp_offload.cont:
 856 // CHECK1-NEXT:    ret void
 857 //
 858 //
 859 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z24test_target_teams_atomicv_l72
 860 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] {
 861 // CHECK1-NEXT:  entry:
 862 // CHECK1-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 8
 863 // CHECK1-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 8
 864 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[X_ADDR]], align 8
 865 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z24test_target_teams_atomicv_l72.omp_outlined, ptr [[TMP0]])
 866 // CHECK1-NEXT:    ret void
 867 //
 868 //
 869 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z24test_target_teams_atomicv_l72.omp_outlined
 870 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] {
 871 // CHECK1-NEXT:  entry:
 872 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 873 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 874 // CHECK1-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 8
 875 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 876 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 877 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 878 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 879 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 880 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 881 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 882 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 883 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 884 // CHECK1-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 8
 885 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[X_ADDR]], align 8
 886 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 887 // CHECK1-NEXT:    store i32 1023, ptr [[DOTOMP_COMB_UB]], align 4
 888 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 889 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 890 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 891 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
 892 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 893 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 894 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1023
 895 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 896 // CHECK1:       cond.true:
 897 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 898 // CHECK1:       cond.false:
 899 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 900 // CHECK1-NEXT:    br label [[COND_END]]
 901 // CHECK1:       cond.end:
 902 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1023, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
 903 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 904 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 905 // CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
 906 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 907 // CHECK1:       omp.inner.for.cond:
 908 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]]
 909 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP19]]
 910 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
 911 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 912 // CHECK1:       omp.inner.for.body:
 913 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP19]]
 914 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
 915 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP19]]
 916 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
 917 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z24test_target_teams_atomicv_l72.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP19]]
 918 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 919 // CHECK1:       omp.inner.for.inc:
 920 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]
 921 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP19]]
 922 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
 923 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]
 924 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
 925 // CHECK1:       omp.inner.for.end:
 926 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 927 // CHECK1:       omp.loop.exit:
 928 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
 929 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 930 // CHECK1-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
 931 // CHECK1-NEXT:    br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 932 // CHECK1:       .omp.final.then:
 933 // CHECK1-NEXT:    store i32 1024, ptr [[I]], align 4
 934 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 935 // CHECK1:       .omp.final.done:
 936 // CHECK1-NEXT:    ret void
 937 //
 938 //
 939 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z24test_target_teams_atomicv_l72.omp_outlined.omp_outlined
 940 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] {
 941 // CHECK1-NEXT:  entry:
 942 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 943 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 944 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 945 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 946 // CHECK1-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 8
 947 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 948 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 949 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 950 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 951 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 952 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 953 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 954 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 955 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 956 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 957 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 958 // CHECK1-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 8
 959 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[X_ADDR]], align 8
 960 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 961 // CHECK1-NEXT:    store i32 1023, ptr [[DOTOMP_UB]], align 4
 962 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 963 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
 964 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 965 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
 966 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 967 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
 968 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 969 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 970 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 971 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
 972 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 973 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 974 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1023
 975 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 976 // CHECK1:       cond.true:
 977 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 978 // CHECK1:       cond.false:
 979 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 980 // CHECK1-NEXT:    br label [[COND_END]]
 981 // CHECK1:       cond.end:
 982 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1023, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
 983 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 984 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 985 // CHECK1-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
 986 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 987 // CHECK1:       omp.inner.for.cond:
 988 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]]
 989 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP22]]
 990 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
 991 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 992 // CHECK1:       omp.inner.for.body:
 993 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]
 994 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
 995 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 996 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]]
 997 // CHECK1-NEXT:    [[TMP11:%.*]] = atomicrmw add ptr [[TMP0]], i32 1 monotonic, align 4, !llvm.access.group [[ACC_GRP22]]
 998 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 999 // CHECK1:       omp.body.continue:
1000 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1001 // CHECK1:       omp.inner.for.inc:
1002 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]
1003 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
1004 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]
1005 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
1006 // CHECK1:       omp.inner.for.end:
1007 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1008 // CHECK1:       omp.loop.exit:
1009 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP4]])
1010 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1011 // CHECK1-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1012 // CHECK1-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1013 // CHECK1:       .omp.final.then:
1014 // CHECK1-NEXT:    store i32 1024, ptr [[I]], align 4
1015 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1016 // CHECK1:       .omp.final.done:
1017 // CHECK1-NEXT:    ret void
1018 //
1019 //
1020 // CHECK3-LABEL: define {{[^@]+}}@_Z16target_teams_funPi
1021 // CHECK3-SAME: (ptr noundef [[G:%.*]]) #[[ATTR0:[0-9]+]] {
1022 // CHECK3-NEXT:  entry:
1023 // CHECK3-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4
1024 // CHECK3-NEXT:    [[N:%.*]] = alloca i32, align 4
1025 // CHECK3-NEXT:    [[A:%.*]] = alloca [1000 x i32], align 4
1026 // CHECK3-NEXT:    [[TE:%.*]] = alloca i32, align 4
1027 // CHECK3-NEXT:    [[TH:%.*]] = alloca i32, align 4
1028 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1029 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1030 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1031 // CHECK3-NEXT:    [[I_CASTED:%.*]] = alloca i32, align 4
1032 // CHECK3-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
1033 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
1034 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__CASTED2:%.*]] = alloca i32, align 4
1035 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 4
1036 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 4
1037 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 4
1038 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1039 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
1040 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
1041 // CHECK3-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1042 // CHECK3-NEXT:    [[N_CASTED7:%.*]] = alloca i32, align 4
1043 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [3 x ptr], align 4
1044 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS9:%.*]] = alloca [3 x ptr], align 4
1045 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [3 x ptr], align 4
1046 // CHECK3-NEXT:    [[_TMP11:%.*]] = alloca i32, align 4
1047 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4
1048 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR_13:%.*]] = alloca i32, align 4
1049 // CHECK3-NEXT:    [[KERNEL_ARGS18:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1050 // CHECK3-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4
1051 // CHECK3-NEXT:    store i32 1000, ptr [[N]], align 4
1052 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 4
1053 // CHECK3-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
1054 // CHECK3-NEXT:    store i32 [[DIV]], ptr [[TE]], align 4
1055 // CHECK3-NEXT:    store i32 128, ptr [[TH]], align 4
1056 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TE]], align 4
1057 // CHECK3-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
1058 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TH]], align 4
1059 // CHECK3-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1060 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[I]], align 4
1061 // CHECK3-NEXT:    store i32 [[TMP3]], ptr [[I_CASTED]], align 4
1062 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I_CASTED]], align 4
1063 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[N]], align 4
1064 // CHECK3-NEXT:    store i32 [[TMP5]], ptr [[N_CASTED]], align 4
1065 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[N_CASTED]], align 4
1066 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1067 // CHECK3-NEXT:    store i32 [[TMP7]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
1068 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
1069 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1070 // CHECK3-NEXT:    store i32 [[TMP9]], ptr [[DOTCAPTURE_EXPR__CASTED2]], align 4
1071 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED2]], align 4
1072 // CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1073 // CHECK3-NEXT:    store i32 [[TMP4]], ptr [[TMP11]], align 4
1074 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1075 // CHECK3-NEXT:    store i32 [[TMP4]], ptr [[TMP12]], align 4
1076 // CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1077 // CHECK3-NEXT:    store ptr null, ptr [[TMP13]], align 4
1078 // CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1079 // CHECK3-NEXT:    store i32 [[TMP6]], ptr [[TMP14]], align 4
1080 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1081 // CHECK3-NEXT:    store i32 [[TMP6]], ptr [[TMP15]], align 4
1082 // CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1083 // CHECK3-NEXT:    store ptr null, ptr [[TMP16]], align 4
1084 // CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1085 // CHECK3-NEXT:    store ptr [[A]], ptr [[TMP17]], align 4
1086 // CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1087 // CHECK3-NEXT:    store ptr [[A]], ptr [[TMP18]], align 4
1088 // CHECK3-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1089 // CHECK3-NEXT:    store ptr null, ptr [[TMP19]], align 4
1090 // CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1091 // CHECK3-NEXT:    store i32 [[TMP8]], ptr [[TMP20]], align 4
1092 // CHECK3-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1093 // CHECK3-NEXT:    store i32 [[TMP8]], ptr [[TMP21]], align 4
1094 // CHECK3-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
1095 // CHECK3-NEXT:    store ptr null, ptr [[TMP22]], align 4
1096 // CHECK3-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
1097 // CHECK3-NEXT:    store i32 [[TMP10]], ptr [[TMP23]], align 4
1098 // CHECK3-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4
1099 // CHECK3-NEXT:    store i32 [[TMP10]], ptr [[TMP24]], align 4
1100 // CHECK3-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
1101 // CHECK3-NEXT:    store ptr null, ptr [[TMP25]], align 4
1102 // CHECK3-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1103 // CHECK3-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1104 // CHECK3-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1105 // CHECK3-NEXT:    [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1106 // CHECK3-NEXT:    [[TMP30:%.*]] = load i32, ptr [[N]], align 4
1107 // CHECK3-NEXT:    store i32 [[TMP30]], ptr [[DOTCAPTURE_EXPR_3]], align 4
1108 // CHECK3-NEXT:    [[TMP31:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4
1109 // CHECK3-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP31]], 0
1110 // CHECK3-NEXT:    [[DIV5:%.*]] = sdiv i32 [[SUB]], 1
1111 // CHECK3-NEXT:    [[SUB6:%.*]] = sub nsw i32 [[DIV5]], 1
1112 // CHECK3-NEXT:    store i32 [[SUB6]], ptr [[DOTCAPTURE_EXPR_4]], align 4
1113 // CHECK3-NEXT:    [[TMP32:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4
1114 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP32]], 1
1115 // CHECK3-NEXT:    [[TMP33:%.*]] = zext i32 [[ADD]] to i64
1116 // CHECK3-NEXT:    [[TMP34:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP28]], 0
1117 // CHECK3-NEXT:    [[TMP35:%.*]] = insertvalue [3 x i32] zeroinitializer, i32 [[TMP29]], 0
1118 // CHECK3-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1119 // CHECK3-NEXT:    store i32 3, ptr [[TMP36]], align 4
1120 // CHECK3-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1121 // CHECK3-NEXT:    store i32 5, ptr [[TMP37]], align 4
1122 // CHECK3-NEXT:    [[TMP38:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1123 // CHECK3-NEXT:    store ptr [[TMP26]], ptr [[TMP38]], align 4
1124 // CHECK3-NEXT:    [[TMP39:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1125 // CHECK3-NEXT:    store ptr [[TMP27]], ptr [[TMP39]], align 4
1126 // CHECK3-NEXT:    [[TMP40:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1127 // CHECK3-NEXT:    store ptr @.offload_sizes, ptr [[TMP40]], align 4
1128 // CHECK3-NEXT:    [[TMP41:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1129 // CHECK3-NEXT:    store ptr @.offload_maptypes, ptr [[TMP41]], align 4
1130 // CHECK3-NEXT:    [[TMP42:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1131 // CHECK3-NEXT:    store ptr null, ptr [[TMP42]], align 4
1132 // CHECK3-NEXT:    [[TMP43:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1133 // CHECK3-NEXT:    store ptr null, ptr [[TMP43]], align 4
1134 // CHECK3-NEXT:    [[TMP44:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1135 // CHECK3-NEXT:    store i64 [[TMP33]], ptr [[TMP44]], align 8
1136 // CHECK3-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1137 // CHECK3-NEXT:    store i64 0, ptr [[TMP45]], align 8
1138 // CHECK3-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1139 // CHECK3-NEXT:    store [3 x i32] [[TMP34]], ptr [[TMP46]], align 4
1140 // CHECK3-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1141 // CHECK3-NEXT:    store [3 x i32] [[TMP35]], ptr [[TMP47]], align 4
1142 // CHECK3-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1143 // CHECK3-NEXT:    store i32 0, ptr [[TMP48]], align 4
1144 // CHECK3-NEXT:    [[TMP49:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4:[0-9]+]], i64 -1, i32 [[TMP28]], i32 [[TMP29]], ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50.region_id, ptr [[KERNEL_ARGS]])
1145 // CHECK3-NEXT:    [[TMP50:%.*]] = icmp ne i32 [[TMP49]], 0
1146 // CHECK3-NEXT:    br i1 [[TMP50]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1147 // CHECK3:       omp_offload.failed:
1148 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50(i32 [[TMP4]], i32 [[TMP6]], ptr [[A]], i32 [[TMP8]], i32 [[TMP10]]) #[[ATTR3:[0-9]+]]
1149 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1150 // CHECK3:       omp_offload.cont:
1151 // CHECK3-NEXT:    [[TMP51:%.*]] = load i32, ptr [[N]], align 4
1152 // CHECK3-NEXT:    store i32 [[TMP51]], ptr [[N_CASTED7]], align 4
1153 // CHECK3-NEXT:    [[TMP52:%.*]] = load i32, ptr [[N_CASTED7]], align 4
1154 // CHECK3-NEXT:    [[TMP53:%.*]] = load ptr, ptr [[G_ADDR]], align 4
1155 // CHECK3-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
1156 // CHECK3-NEXT:    store i32 [[TMP52]], ptr [[TMP54]], align 4
1157 // CHECK3-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
1158 // CHECK3-NEXT:    store i32 [[TMP52]], ptr [[TMP55]], align 4
1159 // CHECK3-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0
1160 // CHECK3-NEXT:    store ptr null, ptr [[TMP56]], align 4
1161 // CHECK3-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1
1162 // CHECK3-NEXT:    store ptr [[A]], ptr [[TMP57]], align 4
1163 // CHECK3-NEXT:    [[TMP58:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 1
1164 // CHECK3-NEXT:    store ptr [[A]], ptr [[TMP58]], align 4
1165 // CHECK3-NEXT:    [[TMP59:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 1
1166 // CHECK3-NEXT:    store ptr null, ptr [[TMP59]], align 4
1167 // CHECK3-NEXT:    [[TMP60:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 2
1168 // CHECK3-NEXT:    store ptr [[TMP53]], ptr [[TMP60]], align 4
1169 // CHECK3-NEXT:    [[TMP61:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 2
1170 // CHECK3-NEXT:    store ptr [[TMP53]], ptr [[TMP61]], align 4
1171 // CHECK3-NEXT:    [[TMP62:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 2
1172 // CHECK3-NEXT:    store ptr null, ptr [[TMP62]], align 4
1173 // CHECK3-NEXT:    [[TMP63:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
1174 // CHECK3-NEXT:    [[TMP64:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
1175 // CHECK3-NEXT:    [[TMP65:%.*]] = load i32, ptr [[N]], align 4
1176 // CHECK3-NEXT:    store i32 [[TMP65]], ptr [[DOTCAPTURE_EXPR_12]], align 4
1177 // CHECK3-NEXT:    [[TMP66:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_12]], align 4
1178 // CHECK3-NEXT:    [[SUB14:%.*]] = sub nsw i32 [[TMP66]], 0
1179 // CHECK3-NEXT:    [[DIV15:%.*]] = sdiv i32 [[SUB14]], 1
1180 // CHECK3-NEXT:    [[SUB16:%.*]] = sub nsw i32 [[DIV15]], 1
1181 // CHECK3-NEXT:    store i32 [[SUB16]], ptr [[DOTCAPTURE_EXPR_13]], align 4
1182 // CHECK3-NEXT:    [[TMP67:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_13]], align 4
1183 // CHECK3-NEXT:    [[ADD17:%.*]] = add nsw i32 [[TMP67]], 1
1184 // CHECK3-NEXT:    [[TMP68:%.*]] = zext i32 [[ADD17]] to i64
1185 // CHECK3-NEXT:    [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 0
1186 // CHECK3-NEXT:    store i32 3, ptr [[TMP69]], align 4
1187 // CHECK3-NEXT:    [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 1
1188 // CHECK3-NEXT:    store i32 3, ptr [[TMP70]], align 4
1189 // CHECK3-NEXT:    [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 2
1190 // CHECK3-NEXT:    store ptr [[TMP63]], ptr [[TMP71]], align 4
1191 // CHECK3-NEXT:    [[TMP72:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 3
1192 // CHECK3-NEXT:    store ptr [[TMP64]], ptr [[TMP72]], align 4
1193 // CHECK3-NEXT:    [[TMP73:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 4
1194 // CHECK3-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP73]], align 4
1195 // CHECK3-NEXT:    [[TMP74:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 5
1196 // CHECK3-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP74]], align 4
1197 // CHECK3-NEXT:    [[TMP75:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 6
1198 // CHECK3-NEXT:    store ptr null, ptr [[TMP75]], align 4
1199 // CHECK3-NEXT:    [[TMP76:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 7
1200 // CHECK3-NEXT:    store ptr null, ptr [[TMP76]], align 4
1201 // CHECK3-NEXT:    [[TMP77:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 8
1202 // CHECK3-NEXT:    store i64 [[TMP68]], ptr [[TMP77]], align 8
1203 // CHECK3-NEXT:    [[TMP78:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 9
1204 // CHECK3-NEXT:    store i64 0, ptr [[TMP78]], align 8
1205 // CHECK3-NEXT:    [[TMP79:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 10
1206 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP79]], align 4
1207 // CHECK3-NEXT:    [[TMP80:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 11
1208 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP80]], align 4
1209 // CHECK3-NEXT:    [[TMP81:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS18]], i32 0, i32 12
1210 // CHECK3-NEXT:    store i32 0, ptr [[TMP81]], align 4
1211 // CHECK3-NEXT:    [[TMP82:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56.region_id, ptr [[KERNEL_ARGS18]])
1212 // CHECK3-NEXT:    [[TMP83:%.*]] = icmp ne i32 [[TMP82]], 0
1213 // CHECK3-NEXT:    br i1 [[TMP83]], label [[OMP_OFFLOAD_FAILED19:%.*]], label [[OMP_OFFLOAD_CONT20:%.*]]
1214 // CHECK3:       omp_offload.failed19:
1215 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56(i32 [[TMP52]], ptr [[A]], ptr [[TMP53]]) #[[ATTR3]]
1216 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT20]]
1217 // CHECK3:       omp_offload.cont20:
1218 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], ptr [[A]], i32 0, i32 0
1219 // CHECK3-NEXT:    [[TMP84:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
1220 // CHECK3-NEXT:    ret i32 [[TMP84]]
1221 //
1222 //
1223 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50
1224 // CHECK3-SAME: (i32 noundef [[I:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR1:[0-9]+]] {
1225 // CHECK3-NEXT:  entry:
1226 // CHECK3-NEXT:    [[I_ADDR:%.*]] = alloca i32, align 4
1227 // CHECK3-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
1228 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
1229 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
1230 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4
1231 // CHECK3-NEXT:    [[I_CASTED:%.*]] = alloca i32, align 4
1232 // CHECK3-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
1233 // CHECK3-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB4]])
1234 // CHECK3-NEXT:    store i32 [[I]], ptr [[I_ADDR]], align 4
1235 // CHECK3-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
1236 // CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
1237 // CHECK3-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
1238 // CHECK3-NEXT:    store i32 [[DOTCAPTURE_EXPR_1]], ptr [[DOTCAPTURE_EXPR__ADDR2]], align 4
1239 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
1240 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
1241 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR2]], align 4
1242 // CHECK3-NEXT:    call void @__kmpc_push_num_teams(ptr @[[GLOB4]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
1243 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I_ADDR]], align 4
1244 // CHECK3-NEXT:    store i32 [[TMP4]], ptr [[I_CASTED]], align 4
1245 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[I_CASTED]], align 4
1246 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[N_ADDR]], align 4
1247 // CHECK3-NEXT:    store i32 [[TMP6]], ptr [[N_CASTED]], align 4
1248 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[N_CASTED]], align 4
1249 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50.omp_outlined, i32 [[TMP5]], i32 [[TMP7]], ptr [[TMP1]])
1250 // CHECK3-NEXT:    ret void
1251 //
1252 //
1253 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50.omp_outlined
1254 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[I:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] {
1255 // CHECK3-NEXT:  entry:
1256 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1257 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1258 // CHECK3-NEXT:    [[I_ADDR:%.*]] = alloca i32, align 4
1259 // CHECK3-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
1260 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
1261 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1262 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1263 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1264 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1265 // CHECK3-NEXT:    [[I3:%.*]] = alloca i32, align 4
1266 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1267 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1268 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1269 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1270 // CHECK3-NEXT:    [[I4:%.*]] = alloca i32, align 4
1271 // CHECK3-NEXT:    [[I_CASTED:%.*]] = alloca i32, align 4
1272 // CHECK3-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
1273 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1274 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1275 // CHECK3-NEXT:    store i32 [[I]], ptr [[I_ADDR]], align 4
1276 // CHECK3-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
1277 // CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
1278 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
1279 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
1280 // CHECK3-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
1281 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1282 // CHECK3-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1283 // CHECK3-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1284 // CHECK3-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1285 // CHECK3-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1286 // CHECK3-NEXT:    store i32 0, ptr [[I3]], align 4
1287 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1288 // CHECK3-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1289 // CHECK3-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1290 // CHECK3:       omp.precond.then:
1291 // CHECK3-NEXT:    [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i32 0, i32 0
1292 // CHECK3-NEXT:    call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i32 8) ]
1293 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1294 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1295 // CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4
1296 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1297 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1298 // CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1299 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
1300 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1301 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1302 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1303 // CHECK3-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
1304 // CHECK3-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1305 // CHECK3:       cond.true:
1306 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1307 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1308 // CHECK3:       cond.false:
1309 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1310 // CHECK3-NEXT:    br label [[COND_END]]
1311 // CHECK3:       cond.end:
1312 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1313 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1314 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1315 // CHECK3-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
1316 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1317 // CHECK3:       omp.inner.for.cond:
1318 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1319 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1320 // CHECK3-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1321 // CHECK3-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1322 // CHECK3:       omp.inner.for.body:
1323 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1324 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1325 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I4]], align 4
1326 // CHECK3-NEXT:    store i32 [[TMP16]], ptr [[I_CASTED]], align 4
1327 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I_CASTED]], align 4
1328 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 4
1329 // CHECK3-NEXT:    store i32 [[TMP18]], ptr [[N_CASTED]], align 4
1330 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, ptr [[N_CASTED]], align 4
1331 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50.omp_outlined.omp_outlined, i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], i32 [[TMP19]], ptr [[TMP0]])
1332 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1333 // CHECK3:       omp.inner.for.inc:
1334 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1335 // CHECK3-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1336 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
1337 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
1338 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
1339 // CHECK3:       omp.inner.for.end:
1340 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1341 // CHECK3:       omp.loop.exit:
1342 // CHECK3-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1343 // CHECK3-NEXT:    [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4
1344 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]])
1345 // CHECK3-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1346 // CHECK3-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
1347 // CHECK3-NEXT:    br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1348 // CHECK3:       .omp.final.then:
1349 // CHECK3-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1350 // CHECK3-NEXT:    [[SUB7:%.*]] = sub nsw i32 [[TMP26]], 0
1351 // CHECK3-NEXT:    [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
1352 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
1353 // CHECK3-NEXT:    [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
1354 // CHECK3-NEXT:    store i32 [[ADD9]], ptr [[I_ADDR]], align 4
1355 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1356 // CHECK3:       .omp.final.done:
1357 // CHECK3-NEXT:    br label [[OMP_PRECOND_END]]
1358 // CHECK3:       omp.precond.end:
1359 // CHECK3-NEXT:    ret void
1360 //
1361 //
1362 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50.omp_outlined.omp_outlined
1363 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[I:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR1]] {
1364 // CHECK3-NEXT:  entry:
1365 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1366 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1367 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1368 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1369 // CHECK3-NEXT:    [[I_ADDR:%.*]] = alloca i32, align 4
1370 // CHECK3-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
1371 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
1372 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1373 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1374 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1375 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1376 // CHECK3-NEXT:    [[I3:%.*]] = alloca i32, align 4
1377 // CHECK3-NEXT:    [[DOTLINEAR_START:%.*]] = alloca i32, align 4
1378 // CHECK3-NEXT:    [[DOTLINEAR_STEP:%.*]] = alloca i32, align 4
1379 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1380 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1381 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1382 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1383 // CHECK3-NEXT:    [[I4:%.*]] = alloca i32, align 4
1384 // CHECK3-NEXT:    [[I5:%.*]] = alloca i32, align 4
1385 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1386 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1387 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
1388 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1389 // CHECK3-NEXT:    store i32 [[I]], ptr [[I_ADDR]], align 4
1390 // CHECK3-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
1391 // CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
1392 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
1393 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
1394 // CHECK3-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
1395 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1396 // CHECK3-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1397 // CHECK3-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1398 // CHECK3-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1399 // CHECK3-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1400 // CHECK3-NEXT:    store i32 0, ptr [[I3]], align 4
1401 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1402 // CHECK3-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1403 // CHECK3-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1404 // CHECK3:       omp.precond.then:
1405 // CHECK3-NEXT:    [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i32 0, i32 0
1406 // CHECK3-NEXT:    call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i32 8) ]
1407 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I_ADDR]], align 4
1408 // CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTLINEAR_START]], align 4
1409 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[N_ADDR]], align 4
1410 // CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTLINEAR_STEP]], align 4
1411 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1412 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1413 // CHECK3-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
1414 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
1415 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1416 // CHECK3-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_LB]], align 4
1417 // CHECK3-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 4
1418 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1419 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1420 // CHECK3-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1421 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
1422 // CHECK3-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP10]])
1423 // CHECK3-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1424 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
1425 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP12]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1426 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1427 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1428 // CHECK3-NEXT:    [[CMP6:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]]
1429 // CHECK3-NEXT:    br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1430 // CHECK3:       cond.true:
1431 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1432 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1433 // CHECK3:       cond.false:
1434 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1435 // CHECK3-NEXT:    br label [[COND_END]]
1436 // CHECK3:       cond.end:
1437 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ]
1438 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1439 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1440 // CHECK3-NEXT:    store i32 [[TMP17]], ptr [[DOTOMP_IV]], align 4
1441 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1442 // CHECK3:       omp.inner.for.cond:
1443 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1444 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1445 // CHECK3-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
1446 // CHECK3-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1447 // CHECK3:       omp.inner.for.body:
1448 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1449 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
1450 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1451 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4
1452 // CHECK3-NEXT:    [[TMP21:%.*]] = load i32, ptr [[I4]], align 4
1453 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i32 0, i32 [[TMP21]]
1454 // CHECK3-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
1455 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1456 // CHECK3:       omp.body.continue:
1457 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1458 // CHECK3:       omp.inner.for.inc:
1459 // CHECK3-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1460 // CHECK3-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1
1461 // CHECK3-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4
1462 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
1463 // CHECK3:       omp.inner.for.end:
1464 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1465 // CHECK3:       omp.loop.exit:
1466 // CHECK3-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1467 // CHECK3-NEXT:    [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4
1468 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP24]])
1469 // CHECK3-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1470 // CHECK3-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
1471 // CHECK3-NEXT:    br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1472 // CHECK3:       .omp.final.then:
1473 // CHECK3-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1474 // CHECK3-NEXT:    [[SUB9:%.*]] = sub nsw i32 [[TMP27]], 0
1475 // CHECK3-NEXT:    [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1
1476 // CHECK3-NEXT:    [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1
1477 // CHECK3-NEXT:    [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
1478 // CHECK3-NEXT:    store i32 [[ADD12]], ptr [[I_ADDR]], align 4
1479 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1480 // CHECK3:       .omp.final.done:
1481 // CHECK3-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1482 // CHECK3-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
1483 // CHECK3-NEXT:    br i1 [[TMP29]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
1484 // CHECK3:       .omp.linear.pu:
1485 // CHECK3-NEXT:    br label [[DOTOMP_LINEAR_PU_DONE]]
1486 // CHECK3:       .omp.linear.pu.done:
1487 // CHECK3-NEXT:    br label [[OMP_PRECOND_END]]
1488 // CHECK3:       omp.precond.end:
1489 // CHECK3-NEXT:    ret void
1490 //
1491 //
1492 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56
1493 // CHECK3-SAME: (i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR1]] {
1494 // CHECK3-NEXT:  entry:
1495 // CHECK3-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
1496 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
1497 // CHECK3-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4
1498 // CHECK3-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
1499 // CHECK3-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
1500 // CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
1501 // CHECK3-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4
1502 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
1503 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
1504 // CHECK3-NEXT:    store i32 [[TMP1]], ptr [[N_CASTED]], align 4
1505 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_CASTED]], align 4
1506 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[G_ADDR]], align 4
1507 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56.omp_outlined, i32 [[TMP2]], ptr [[TMP0]], ptr [[TMP3]])
1508 // CHECK3-NEXT:    ret void
1509 //
1510 //
1511 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56.omp_outlined
1512 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR1]] {
1513 // CHECK3-NEXT:  entry:
1514 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1515 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1516 // CHECK3-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
1517 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
1518 // CHECK3-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4
1519 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1520 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1521 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1522 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1523 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1524 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1525 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1526 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1527 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1528 // CHECK3-NEXT:    [[I3:%.*]] = alloca i32, align 4
1529 // CHECK3-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
1530 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1531 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1532 // CHECK3-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
1533 // CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
1534 // CHECK3-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4
1535 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
1536 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
1537 // CHECK3-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
1538 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1539 // CHECK3-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1540 // CHECK3-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1541 // CHECK3-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1542 // CHECK3-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1543 // CHECK3-NEXT:    store i32 0, ptr [[I]], align 4
1544 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1545 // CHECK3-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1546 // CHECK3-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1547 // CHECK3:       omp.precond.then:
1548 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1549 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1550 // CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4
1551 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1552 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1553 // CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1554 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
1555 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1556 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1557 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1558 // CHECK3-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
1559 // CHECK3-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1560 // CHECK3:       cond.true:
1561 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1562 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1563 // CHECK3:       cond.false:
1564 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1565 // CHECK3-NEXT:    br label [[COND_END]]
1566 // CHECK3:       cond.end:
1567 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1568 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1569 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1570 // CHECK3-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
1571 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1572 // CHECK3:       omp.inner.for.cond:
1573 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]
1574 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP13]]
1575 // CHECK3-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1576 // CHECK3-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1577 // CHECK3:       omp.inner.for.body:
1578 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP13]]
1579 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP13]]
1580 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[N_ADDR]], align 4, !llvm.access.group [[ACC_GRP13]]
1581 // CHECK3-NEXT:    store i32 [[TMP16]], ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP13]]
1582 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP13]]
1583 // CHECK3-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[G_ADDR]], align 4, !llvm.access.group [[ACC_GRP13]]
1584 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56.omp_outlined.omp_outlined, i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], ptr [[TMP0]], ptr [[TMP18]]), !llvm.access.group [[ACC_GRP13]]
1585 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1586 // CHECK3:       omp.inner.for.inc:
1587 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
1588 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP13]]
1589 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
1590 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
1591 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
1592 // CHECK3:       omp.inner.for.end:
1593 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1594 // CHECK3:       omp.loop.exit:
1595 // CHECK3-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1596 // CHECK3-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
1597 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])
1598 // CHECK3-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1599 // CHECK3-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
1600 // CHECK3-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1601 // CHECK3:       .omp.final.then:
1602 // CHECK3-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1603 // CHECK3-NEXT:    [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0
1604 // CHECK3-NEXT:    [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
1605 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
1606 // CHECK3-NEXT:    [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
1607 // CHECK3-NEXT:    store i32 [[ADD8]], ptr [[I3]], align 4
1608 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1609 // CHECK3:       .omp.final.done:
1610 // CHECK3-NEXT:    br label [[OMP_PRECOND_END]]
1611 // CHECK3:       omp.precond.end:
1612 // CHECK3-NEXT:    ret void
1613 //
1614 //
1615 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56.omp_outlined.omp_outlined
1616 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR1]] {
1617 // CHECK3-NEXT:  entry:
1618 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1619 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1620 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1621 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1622 // CHECK3-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
1623 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
1624 // CHECK3-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4
1625 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1626 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1627 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1628 // CHECK3-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1629 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1630 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1631 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1632 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1633 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1634 // CHECK3-NEXT:    [[I3:%.*]] = alloca i32, align 4
1635 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1636 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1637 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
1638 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1639 // CHECK3-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
1640 // CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
1641 // CHECK3-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4
1642 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
1643 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
1644 // CHECK3-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
1645 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1646 // CHECK3-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
1647 // CHECK3-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1648 // CHECK3-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1649 // CHECK3-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1650 // CHECK3-NEXT:    store i32 0, ptr [[I]], align 4
1651 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1652 // CHECK3-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
1653 // CHECK3-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1654 // CHECK3:       omp.precond.then:
1655 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1656 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1657 // CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4
1658 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
1659 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1660 // CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_LB]], align 4
1661 // CHECK3-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
1662 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1663 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1664 // CHECK3-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1665 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
1666 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1667 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1668 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1669 // CHECK3-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
1670 // CHECK3-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1671 // CHECK3:       cond.true:
1672 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1673 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1674 // CHECK3:       cond.false:
1675 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1676 // CHECK3-NEXT:    br label [[COND_END]]
1677 // CHECK3:       cond.end:
1678 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
1679 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1680 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1681 // CHECK3-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
1682 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1683 // CHECK3:       omp.inner.for.cond:
1684 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17:![0-9]+]]
1685 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP17]]
1686 // CHECK3-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
1687 // CHECK3-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1688 // CHECK3:       omp.inner.for.body:
1689 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]]
1690 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
1691 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1692 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP17]]
1693 // CHECK3-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[G_ADDR]], align 4, !llvm.access.group [[ACC_GRP17]]
1694 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i32 0
1695 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP17]]
1696 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP17]]
1697 // CHECK3-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i32 0, i32 [[TMP19]]
1698 // CHECK3-NEXT:    store i32 [[TMP18]], ptr [[ARRAYIDX6]], align 4, !llvm.access.group [[ACC_GRP17]]
1699 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1700 // CHECK3:       omp.body.continue:
1701 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1702 // CHECK3:       omp.inner.for.inc:
1703 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]]
1704 // CHECK3-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
1705 // CHECK3-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]]
1706 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
1707 // CHECK3:       omp.inner.for.end:
1708 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1709 // CHECK3:       omp.loop.exit:
1710 // CHECK3-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1711 // CHECK3-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
1712 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP22]])
1713 // CHECK3-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1714 // CHECK3-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
1715 // CHECK3-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1716 // CHECK3:       .omp.final.then:
1717 // CHECK3-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1718 // CHECK3-NEXT:    [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0
1719 // CHECK3-NEXT:    [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
1720 // CHECK3-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
1721 // CHECK3-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
1722 // CHECK3-NEXT:    store i32 [[ADD11]], ptr [[I3]], align 4
1723 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1724 // CHECK3:       .omp.final.done:
1725 // CHECK3-NEXT:    br label [[OMP_PRECOND_END]]
1726 // CHECK3:       omp.precond.end:
1727 // CHECK3-NEXT:    ret void
1728 //
1729 //
1730 // CHECK3-LABEL: define {{[^@]+}}@_Z24test_target_teams_atomicv
1731 // CHECK3-SAME: () #[[ATTR0]] {
1732 // CHECK3-NEXT:  entry:
1733 // CHECK3-NEXT:    [[X:%.*]] = alloca i32, align 4
1734 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
1735 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
1736 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
1737 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1738 // CHECK3-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1739 // CHECK3-NEXT:    store i32 0, ptr [[X]], align 4
1740 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1741 // CHECK3-NEXT:    store ptr [[X]], ptr [[TMP0]], align 4
1742 // CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1743 // CHECK3-NEXT:    store ptr [[X]], ptr [[TMP1]], align 4
1744 // CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1745 // CHECK3-NEXT:    store ptr null, ptr [[TMP2]], align 4
1746 // CHECK3-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1747 // CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1748 // CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1749 // CHECK3-NEXT:    store i32 3, ptr [[TMP5]], align 4
1750 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1751 // CHECK3-NEXT:    store i32 1, ptr [[TMP6]], align 4
1752 // CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1753 // CHECK3-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 4
1754 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1755 // CHECK3-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 4
1756 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1757 // CHECK3-NEXT:    store ptr @.offload_sizes.3, ptr [[TMP9]], align 4
1758 // CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1759 // CHECK3-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP10]], align 4
1760 // CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1761 // CHECK3-NEXT:    store ptr null, ptr [[TMP11]], align 4
1762 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1763 // CHECK3-NEXT:    store ptr null, ptr [[TMP12]], align 4
1764 // CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1765 // CHECK3-NEXT:    store i64 1024, ptr [[TMP13]], align 8
1766 // CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1767 // CHECK3-NEXT:    store i64 0, ptr [[TMP14]], align 8
1768 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1769 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
1770 // CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1771 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
1772 // CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1773 // CHECK3-NEXT:    store i32 0, ptr [[TMP17]], align 4
1774 // CHECK3-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB4]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z24test_target_teams_atomicv_l72.region_id, ptr [[KERNEL_ARGS]])
1775 // CHECK3-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
1776 // CHECK3-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1777 // CHECK3:       omp_offload.failed:
1778 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z24test_target_teams_atomicv_l72(ptr [[X]]) #[[ATTR3]]
1779 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1780 // CHECK3:       omp_offload.cont:
1781 // CHECK3-NEXT:    ret void
1782 //
1783 //
1784 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z24test_target_teams_atomicv_l72
1785 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] {
1786 // CHECK3-NEXT:  entry:
1787 // CHECK3-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 4
1788 // CHECK3-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 4
1789 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[X_ADDR]], align 4
1790 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z24test_target_teams_atomicv_l72.omp_outlined, ptr [[TMP0]])
1791 // CHECK3-NEXT:    ret void
1792 //
1793 //
1794 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z24test_target_teams_atomicv_l72.omp_outlined
1795 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] {
1796 // CHECK3-NEXT:  entry:
1797 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1798 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1799 // CHECK3-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 4
1800 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1801 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1802 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1803 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1804 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1805 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1806 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1807 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1808 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1809 // CHECK3-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 4
1810 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[X_ADDR]], align 4
1811 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1812 // CHECK3-NEXT:    store i32 1023, ptr [[DOTOMP_COMB_UB]], align 4
1813 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1814 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1815 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1816 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
1817 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1818 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1819 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1023
1820 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1821 // CHECK3:       cond.true:
1822 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1823 // CHECK3:       cond.false:
1824 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1825 // CHECK3-NEXT:    br label [[COND_END]]
1826 // CHECK3:       cond.end:
1827 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1023, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1828 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1829 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1830 // CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
1831 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1832 // CHECK3:       omp.inner.for.cond:
1833 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20:![0-9]+]]
1834 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
1835 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1836 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1837 // CHECK3:       omp.inner.for.body:
1838 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP20]]
1839 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
1840 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z24test_target_teams_atomicv_l72.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP20]]
1841 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1842 // CHECK3:       omp.inner.for.inc:
1843 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
1844 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP20]]
1845 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
1846 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
1847 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
1848 // CHECK3:       omp.inner.for.end:
1849 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1850 // CHECK3:       omp.loop.exit:
1851 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
1852 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1853 // CHECK3-NEXT:    [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
1854 // CHECK3-NEXT:    br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1855 // CHECK3:       .omp.final.then:
1856 // CHECK3-NEXT:    store i32 1024, ptr [[I]], align 4
1857 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1858 // CHECK3:       .omp.final.done:
1859 // CHECK3-NEXT:    ret void
1860 //
1861 //
1862 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z24test_target_teams_atomicv_l72.omp_outlined.omp_outlined
1863 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR1]] {
1864 // CHECK3-NEXT:  entry:
1865 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1866 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1867 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1868 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1869 // CHECK3-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 4
1870 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1871 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1872 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1873 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1874 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1875 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1876 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1877 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1878 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1879 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
1880 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1881 // CHECK3-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 4
1882 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[X_ADDR]], align 4
1883 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1884 // CHECK3-NEXT:    store i32 1023, ptr [[DOTOMP_UB]], align 4
1885 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
1886 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1887 // CHECK3-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
1888 // CHECK3-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
1889 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1890 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1891 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1892 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
1893 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1894 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1895 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1023
1896 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1897 // CHECK3:       cond.true:
1898 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1899 // CHECK3:       cond.false:
1900 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1901 // CHECK3-NEXT:    br label [[COND_END]]
1902 // CHECK3:       cond.end:
1903 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1023, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1904 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1905 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1906 // CHECK3-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
1907 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1908 // CHECK3:       omp.inner.for.cond:
1909 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]]
1910 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP23]]
1911 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1912 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1913 // CHECK3:       omp.inner.for.body:
1914 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
1915 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1916 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1917 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP23]]
1918 // CHECK3-NEXT:    [[TMP11:%.*]] = atomicrmw add ptr [[TMP0]], i32 1 monotonic, align 4, !llvm.access.group [[ACC_GRP23]]
1919 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1920 // CHECK3:       omp.body.continue:
1921 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1922 // CHECK3:       omp.inner.for.inc:
1923 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
1924 // CHECK3-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
1925 // CHECK3-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
1926 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
1927 // CHECK3:       omp.inner.for.end:
1928 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1929 // CHECK3:       omp.loop.exit:
1930 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP4]])
1931 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1932 // CHECK3-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1933 // CHECK3-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1934 // CHECK3:       .omp.final.then:
1935 // CHECK3-NEXT:    store i32 1024, ptr [[I]], align 4
1936 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1937 // CHECK3:       .omp.final.done:
1938 // CHECK3-NEXT:    ret void
1939 //
1940 //
1941 // CHECK5-LABEL: define {{[^@]+}}@_Z16target_teams_funPi
1942 // CHECK5-SAME: (ptr noundef [[G:%.*]]) #[[ATTR0:[0-9]+]] {
1943 // CHECK5-NEXT:  entry:
1944 // CHECK5-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 8
1945 // CHECK5-NEXT:    [[N:%.*]] = alloca i32, align 4
1946 // CHECK5-NEXT:    [[A:%.*]] = alloca [1000 x i32], align 4
1947 // CHECK5-NEXT:    [[TE:%.*]] = alloca i32, align 4
1948 // CHECK5-NEXT:    [[TH:%.*]] = alloca i32, align 4
1949 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
1950 // CHECK5-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1951 // CHECK5-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1952 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1953 // CHECK5-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
1954 // CHECK5-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
1955 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1956 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1957 // CHECK5-NEXT:    [[I6:%.*]] = alloca i32, align 4
1958 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1959 // CHECK5-NEXT:    [[DOTLINEAR_START:%.*]] = alloca i32, align 4
1960 // CHECK5-NEXT:    [[DOTLINEAR_STEP:%.*]] = alloca i32, align 4
1961 // CHECK5-NEXT:    [[I7:%.*]] = alloca i32, align 4
1962 // CHECK5-NEXT:    [[I8:%.*]] = alloca i32, align 4
1963 // CHECK5-NEXT:    [[_TMP15:%.*]] = alloca i32, align 4
1964 // CHECK5-NEXT:    [[DOTCAPTURE_EXPR_16:%.*]] = alloca i32, align 4
1965 // CHECK5-NEXT:    [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4
1966 // CHECK5-NEXT:    [[DOTOMP_LB21:%.*]] = alloca i32, align 4
1967 // CHECK5-NEXT:    [[DOTOMP_UB22:%.*]] = alloca i32, align 4
1968 // CHECK5-NEXT:    [[I23:%.*]] = alloca i32, align 4
1969 // CHECK5-NEXT:    [[DOTOMP_IV26:%.*]] = alloca i32, align 4
1970 // CHECK5-NEXT:    [[I27:%.*]] = alloca i32, align 4
1971 // CHECK5-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 8
1972 // CHECK5-NEXT:    store i32 1000, ptr [[N]], align 4
1973 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 4
1974 // CHECK5-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
1975 // CHECK5-NEXT:    store i32 [[DIV]], ptr [[TE]], align 4
1976 // CHECK5-NEXT:    store i32 128, ptr [[TH]], align 4
1977 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TE]], align 4
1978 // CHECK5-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
1979 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TH]], align 4
1980 // CHECK5-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1981 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N]], align 4
1982 // CHECK5-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
1983 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
1984 // CHECK5-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
1985 // CHECK5-NEXT:    [[DIV4:%.*]] = sdiv i32 [[SUB]], 1
1986 // CHECK5-NEXT:    [[SUB5:%.*]] = sub nsw i32 [[DIV4]], 1
1987 // CHECK5-NEXT:    store i32 [[SUB5]], ptr [[DOTCAPTURE_EXPR_3]], align 4
1988 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1989 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4
1990 // CHECK5-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
1991 // CHECK5-NEXT:    store i32 0, ptr [[I6]], align 4
1992 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
1993 // CHECK5-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
1994 // CHECK5-NEXT:    br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
1995 // CHECK5:       simd.if.then:
1996 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1997 // CHECK5-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
1998 // CHECK5-NEXT:    [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], ptr [[A]], i64 0, i64 0
1999 // CHECK5-NEXT:    call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i64 8) ]
2000 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[I]], align 4
2001 // CHECK5-NEXT:    store i32 [[TMP8]], ptr [[DOTLINEAR_START]], align 4
2002 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[N]], align 4
2003 // CHECK5-NEXT:    store i32 [[TMP9]], ptr [[DOTLINEAR_STEP]], align 4
2004 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2005 // CHECK5:       omp.inner.for.cond:
2006 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2007 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2008 // CHECK5-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
2009 // CHECK5-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2010 // CHECK5:       omp.inner.for.body:
2011 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2012 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
2013 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2014 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I7]], align 4
2015 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I7]], align 4
2016 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
2017 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
2018 // CHECK5-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
2019 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2020 // CHECK5:       omp.body.continue:
2021 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2022 // CHECK5:       omp.inner.for.inc:
2023 // CHECK5-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2024 // CHECK5-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP14]], 1
2025 // CHECK5-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4
2026 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
2027 // CHECK5:       omp.inner.for.end:
2028 // CHECK5-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
2029 // CHECK5-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP15]], 0
2030 // CHECK5-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
2031 // CHECK5-NEXT:    [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1
2032 // CHECK5-NEXT:    [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
2033 // CHECK5-NEXT:    store i32 [[ADD14]], ptr [[I]], align 4
2034 // CHECK5-NEXT:    br label [[SIMD_IF_END]]
2035 // CHECK5:       simd.if.end:
2036 // CHECK5-NEXT:    [[TMP16:%.*]] = load i32, ptr [[N]], align 4
2037 // CHECK5-NEXT:    store i32 [[TMP16]], ptr [[DOTCAPTURE_EXPR_16]], align 4
2038 // CHECK5-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_16]], align 4
2039 // CHECK5-NEXT:    [[SUB18:%.*]] = sub nsw i32 [[TMP17]], 0
2040 // CHECK5-NEXT:    [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1
2041 // CHECK5-NEXT:    [[SUB20:%.*]] = sub nsw i32 [[DIV19]], 1
2042 // CHECK5-NEXT:    store i32 [[SUB20]], ptr [[DOTCAPTURE_EXPR_17]], align 4
2043 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB21]], align 4
2044 // CHECK5-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_17]], align 4
2045 // CHECK5-NEXT:    store i32 [[TMP18]], ptr [[DOTOMP_UB22]], align 4
2046 // CHECK5-NEXT:    store i32 0, ptr [[I23]], align 4
2047 // CHECK5-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_16]], align 4
2048 // CHECK5-NEXT:    [[CMP24:%.*]] = icmp slt i32 0, [[TMP19]]
2049 // CHECK5-NEXT:    br i1 [[CMP24]], label [[SIMD_IF_THEN25:%.*]], label [[SIMD_IF_END44:%.*]]
2050 // CHECK5:       simd.if.then25:
2051 // CHECK5-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_LB21]], align 4
2052 // CHECK5-NEXT:    store i32 [[TMP20]], ptr [[DOTOMP_IV26]], align 4
2053 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND28:%.*]]
2054 // CHECK5:       omp.inner.for.cond28:
2055 // CHECK5-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV26]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]]
2056 // CHECK5-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_UB22]], align 4, !llvm.access.group [[ACC_GRP5]]
2057 // CHECK5-NEXT:    [[CMP29:%.*]] = icmp sle i32 [[TMP21]], [[TMP22]]
2058 // CHECK5-NEXT:    br i1 [[CMP29]], label [[OMP_INNER_FOR_BODY30:%.*]], label [[OMP_INNER_FOR_END39:%.*]]
2059 // CHECK5:       omp.inner.for.body30:
2060 // CHECK5-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV26]], align 4, !llvm.access.group [[ACC_GRP5]]
2061 // CHECK5-NEXT:    [[MUL31:%.*]] = mul nsw i32 [[TMP23]], 1
2062 // CHECK5-NEXT:    [[ADD32:%.*]] = add nsw i32 0, [[MUL31]]
2063 // CHECK5-NEXT:    store i32 [[ADD32]], ptr [[I27]], align 4, !llvm.access.group [[ACC_GRP5]]
2064 // CHECK5-NEXT:    [[TMP24:%.*]] = load ptr, ptr [[G_ADDR]], align 8, !llvm.access.group [[ACC_GRP5]]
2065 // CHECK5-NEXT:    [[ARRAYIDX33:%.*]] = getelementptr inbounds i32, ptr [[TMP24]], i64 0
2066 // CHECK5-NEXT:    [[TMP25:%.*]] = load i32, ptr [[ARRAYIDX33]], align 4, !llvm.access.group [[ACC_GRP5]]
2067 // CHECK5-NEXT:    [[TMP26:%.*]] = load i32, ptr [[I27]], align 4, !llvm.access.group [[ACC_GRP5]]
2068 // CHECK5-NEXT:    [[IDXPROM34:%.*]] = sext i32 [[TMP26]] to i64
2069 // CHECK5-NEXT:    [[ARRAYIDX35:%.*]] = getelementptr inbounds [1000 x i32], ptr [[A]], i64 0, i64 [[IDXPROM34]]
2070 // CHECK5-NEXT:    store i32 [[TMP25]], ptr [[ARRAYIDX35]], align 4, !llvm.access.group [[ACC_GRP5]]
2071 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE36:%.*]]
2072 // CHECK5:       omp.body.continue36:
2073 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC37:%.*]]
2074 // CHECK5:       omp.inner.for.inc37:
2075 // CHECK5-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IV26]], align 4, !llvm.access.group [[ACC_GRP5]]
2076 // CHECK5-NEXT:    [[ADD38:%.*]] = add nsw i32 [[TMP27]], 1
2077 // CHECK5-NEXT:    store i32 [[ADD38]], ptr [[DOTOMP_IV26]], align 4, !llvm.access.group [[ACC_GRP5]]
2078 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND28]], !llvm.loop [[LOOP6:![0-9]+]]
2079 // CHECK5:       omp.inner.for.end39:
2080 // CHECK5-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_16]], align 4
2081 // CHECK5-NEXT:    [[SUB40:%.*]] = sub nsw i32 [[TMP28]], 0
2082 // CHECK5-NEXT:    [[DIV41:%.*]] = sdiv i32 [[SUB40]], 1
2083 // CHECK5-NEXT:    [[MUL42:%.*]] = mul nsw i32 [[DIV41]], 1
2084 // CHECK5-NEXT:    [[ADD43:%.*]] = add nsw i32 0, [[MUL42]]
2085 // CHECK5-NEXT:    store i32 [[ADD43]], ptr [[I27]], align 4
2086 // CHECK5-NEXT:    br label [[SIMD_IF_END44]]
2087 // CHECK5:       simd.if.end44:
2088 // CHECK5-NEXT:    [[ARRAYIDX45:%.*]] = getelementptr inbounds [1000 x i32], ptr [[A]], i64 0, i64 0
2089 // CHECK5-NEXT:    [[TMP29:%.*]] = load i32, ptr [[ARRAYIDX45]], align 4
2090 // CHECK5-NEXT:    ret i32 [[TMP29]]
2091 //
2092 //
2093 // CHECK5-LABEL: define {{[^@]+}}@_Z24test_target_teams_atomicv
2094 // CHECK5-SAME: () #[[ATTR0]] {
2095 // CHECK5-NEXT:  entry:
2096 // CHECK5-NEXT:    [[X:%.*]] = alloca i32, align 4
2097 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2098 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2099 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2100 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2101 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2102 // CHECK5-NEXT:    store i32 0, ptr [[X]], align 4
2103 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2104 // CHECK5-NEXT:    store i32 1023, ptr [[DOTOMP_UB]], align 4
2105 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2106 // CHECK5-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
2107 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2108 // CHECK5:       omp.inner.for.cond:
2109 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
2110 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
2111 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
2112 // CHECK5-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2113 // CHECK5:       omp.inner.for.body:
2114 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
2115 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
2116 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2117 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
2118 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[X]], align 4, !llvm.access.group [[ACC_GRP9]]
2119 // CHECK5-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
2120 // CHECK5-NEXT:    store i32 [[ADD1]], ptr [[X]], align 4, !llvm.access.group [[ACC_GRP9]]
2121 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2122 // CHECK5:       omp.body.continue:
2123 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2124 // CHECK5:       omp.inner.for.inc:
2125 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
2126 // CHECK5-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1
2127 // CHECK5-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
2128 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
2129 // CHECK5:       omp.inner.for.end:
2130 // CHECK5-NEXT:    store i32 1024, ptr [[I]], align 4
2131 // CHECK5-NEXT:    ret void
2132 //
2133 //
2134 // CHECK7-LABEL: define {{[^@]+}}@_Z16target_teams_funPi
2135 // CHECK7-SAME: (ptr noundef [[G:%.*]]) #[[ATTR0:[0-9]+]] {
2136 // CHECK7-NEXT:  entry:
2137 // CHECK7-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4
2138 // CHECK7-NEXT:    [[N:%.*]] = alloca i32, align 4
2139 // CHECK7-NEXT:    [[A:%.*]] = alloca [1000 x i32], align 4
2140 // CHECK7-NEXT:    [[TE:%.*]] = alloca i32, align 4
2141 // CHECK7-NEXT:    [[TH:%.*]] = alloca i32, align 4
2142 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
2143 // CHECK7-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2144 // CHECK7-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2145 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2146 // CHECK7-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
2147 // CHECK7-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i32, align 4
2148 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2149 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2150 // CHECK7-NEXT:    [[I6:%.*]] = alloca i32, align 4
2151 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2152 // CHECK7-NEXT:    [[DOTLINEAR_START:%.*]] = alloca i32, align 4
2153 // CHECK7-NEXT:    [[DOTLINEAR_STEP:%.*]] = alloca i32, align 4
2154 // CHECK7-NEXT:    [[I7:%.*]] = alloca i32, align 4
2155 // CHECK7-NEXT:    [[I8:%.*]] = alloca i32, align 4
2156 // CHECK7-NEXT:    [[_TMP15:%.*]] = alloca i32, align 4
2157 // CHECK7-NEXT:    [[DOTCAPTURE_EXPR_16:%.*]] = alloca i32, align 4
2158 // CHECK7-NEXT:    [[DOTCAPTURE_EXPR_17:%.*]] = alloca i32, align 4
2159 // CHECK7-NEXT:    [[DOTOMP_LB21:%.*]] = alloca i32, align 4
2160 // CHECK7-NEXT:    [[DOTOMP_UB22:%.*]] = alloca i32, align 4
2161 // CHECK7-NEXT:    [[I23:%.*]] = alloca i32, align 4
2162 // CHECK7-NEXT:    [[DOTOMP_IV26:%.*]] = alloca i32, align 4
2163 // CHECK7-NEXT:    [[I27:%.*]] = alloca i32, align 4
2164 // CHECK7-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4
2165 // CHECK7-NEXT:    store i32 1000, ptr [[N]], align 4
2166 // CHECK7-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 4
2167 // CHECK7-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP0]], 128
2168 // CHECK7-NEXT:    store i32 [[DIV]], ptr [[TE]], align 4
2169 // CHECK7-NEXT:    store i32 128, ptr [[TH]], align 4
2170 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TE]], align 4
2171 // CHECK7-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
2172 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TH]], align 4
2173 // CHECK7-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
2174 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N]], align 4
2175 // CHECK7-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
2176 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
2177 // CHECK7-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
2178 // CHECK7-NEXT:    [[DIV4:%.*]] = sdiv i32 [[SUB]], 1
2179 // CHECK7-NEXT:    [[SUB5:%.*]] = sub nsw i32 [[DIV4]], 1
2180 // CHECK7-NEXT:    store i32 [[SUB5]], ptr [[DOTCAPTURE_EXPR_3]], align 4
2181 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2182 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_3]], align 4
2183 // CHECK7-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
2184 // CHECK7-NEXT:    store i32 0, ptr [[I6]], align 4
2185 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
2186 // CHECK7-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
2187 // CHECK7-NEXT:    br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
2188 // CHECK7:       simd.if.then:
2189 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2190 // CHECK7-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
2191 // CHECK7-NEXT:    [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], ptr [[A]], i32 0, i32 0
2192 // CHECK7-NEXT:    call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i32 8) ]
2193 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[I]], align 4
2194 // CHECK7-NEXT:    store i32 [[TMP8]], ptr [[DOTLINEAR_START]], align 4
2195 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[N]], align 4
2196 // CHECK7-NEXT:    store i32 [[TMP9]], ptr [[DOTLINEAR_STEP]], align 4
2197 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2198 // CHECK7:       omp.inner.for.cond:
2199 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2200 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2201 // CHECK7-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
2202 // CHECK7-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2203 // CHECK7:       omp.inner.for.body:
2204 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2205 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
2206 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2207 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[I7]], align 4
2208 // CHECK7-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I7]], align 4
2209 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], ptr [[A]], i32 0, i32 [[TMP13]]
2210 // CHECK7-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
2211 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2212 // CHECK7:       omp.body.continue:
2213 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2214 // CHECK7:       omp.inner.for.inc:
2215 // CHECK7-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2216 // CHECK7-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP14]], 1
2217 // CHECK7-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4
2218 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
2219 // CHECK7:       omp.inner.for.end:
2220 // CHECK7-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
2221 // CHECK7-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP15]], 0
2222 // CHECK7-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
2223 // CHECK7-NEXT:    [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1
2224 // CHECK7-NEXT:    [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
2225 // CHECK7-NEXT:    store i32 [[ADD14]], ptr [[I]], align 4
2226 // CHECK7-NEXT:    br label [[SIMD_IF_END]]
2227 // CHECK7:       simd.if.end:
2228 // CHECK7-NEXT:    [[TMP16:%.*]] = load i32, ptr [[N]], align 4
2229 // CHECK7-NEXT:    store i32 [[TMP16]], ptr [[DOTCAPTURE_EXPR_16]], align 4
2230 // CHECK7-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_16]], align 4
2231 // CHECK7-NEXT:    [[SUB18:%.*]] = sub nsw i32 [[TMP17]], 0
2232 // CHECK7-NEXT:    [[DIV19:%.*]] = sdiv i32 [[SUB18]], 1
2233 // CHECK7-NEXT:    [[SUB20:%.*]] = sub nsw i32 [[DIV19]], 1
2234 // CHECK7-NEXT:    store i32 [[SUB20]], ptr [[DOTCAPTURE_EXPR_17]], align 4
2235 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB21]], align 4
2236 // CHECK7-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_17]], align 4
2237 // CHECK7-NEXT:    store i32 [[TMP18]], ptr [[DOTOMP_UB22]], align 4
2238 // CHECK7-NEXT:    store i32 0, ptr [[I23]], align 4
2239 // CHECK7-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_16]], align 4
2240 // CHECK7-NEXT:    [[CMP24:%.*]] = icmp slt i32 0, [[TMP19]]
2241 // CHECK7-NEXT:    br i1 [[CMP24]], label [[SIMD_IF_THEN25:%.*]], label [[SIMD_IF_END43:%.*]]
2242 // CHECK7:       simd.if.then25:
2243 // CHECK7-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_LB21]], align 4
2244 // CHECK7-NEXT:    store i32 [[TMP20]], ptr [[DOTOMP_IV26]], align 4
2245 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND28:%.*]]
2246 // CHECK7:       omp.inner.for.cond28:
2247 // CHECK7-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV26]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
2248 // CHECK7-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_UB22]], align 4, !llvm.access.group [[ACC_GRP6]]
2249 // CHECK7-NEXT:    [[CMP29:%.*]] = icmp sle i32 [[TMP21]], [[TMP22]]
2250 // CHECK7-NEXT:    br i1 [[CMP29]], label [[OMP_INNER_FOR_BODY30:%.*]], label [[OMP_INNER_FOR_END38:%.*]]
2251 // CHECK7:       omp.inner.for.body30:
2252 // CHECK7-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV26]], align 4, !llvm.access.group [[ACC_GRP6]]
2253 // CHECK7-NEXT:    [[MUL31:%.*]] = mul nsw i32 [[TMP23]], 1
2254 // CHECK7-NEXT:    [[ADD32:%.*]] = add nsw i32 0, [[MUL31]]
2255 // CHECK7-NEXT:    store i32 [[ADD32]], ptr [[I27]], align 4, !llvm.access.group [[ACC_GRP6]]
2256 // CHECK7-NEXT:    [[TMP24:%.*]] = load ptr, ptr [[G_ADDR]], align 4, !llvm.access.group [[ACC_GRP6]]
2257 // CHECK7-NEXT:    [[ARRAYIDX33:%.*]] = getelementptr inbounds i32, ptr [[TMP24]], i32 0
2258 // CHECK7-NEXT:    [[TMP25:%.*]] = load i32, ptr [[ARRAYIDX33]], align 4, !llvm.access.group [[ACC_GRP6]]
2259 // CHECK7-NEXT:    [[TMP26:%.*]] = load i32, ptr [[I27]], align 4, !llvm.access.group [[ACC_GRP6]]
2260 // CHECK7-NEXT:    [[ARRAYIDX34:%.*]] = getelementptr inbounds [1000 x i32], ptr [[A]], i32 0, i32 [[TMP26]]
2261 // CHECK7-NEXT:    store i32 [[TMP25]], ptr [[ARRAYIDX34]], align 4, !llvm.access.group [[ACC_GRP6]]
2262 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE35:%.*]]
2263 // CHECK7:       omp.body.continue35:
2264 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC36:%.*]]
2265 // CHECK7:       omp.inner.for.inc36:
2266 // CHECK7-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IV26]], align 4, !llvm.access.group [[ACC_GRP6]]
2267 // CHECK7-NEXT:    [[ADD37:%.*]] = add nsw i32 [[TMP27]], 1
2268 // CHECK7-NEXT:    store i32 [[ADD37]], ptr [[DOTOMP_IV26]], align 4, !llvm.access.group [[ACC_GRP6]]
2269 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND28]], !llvm.loop [[LOOP7:![0-9]+]]
2270 // CHECK7:       omp.inner.for.end38:
2271 // CHECK7-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_16]], align 4
2272 // CHECK7-NEXT:    [[SUB39:%.*]] = sub nsw i32 [[TMP28]], 0
2273 // CHECK7-NEXT:    [[DIV40:%.*]] = sdiv i32 [[SUB39]], 1
2274 // CHECK7-NEXT:    [[MUL41:%.*]] = mul nsw i32 [[DIV40]], 1
2275 // CHECK7-NEXT:    [[ADD42:%.*]] = add nsw i32 0, [[MUL41]]
2276 // CHECK7-NEXT:    store i32 [[ADD42]], ptr [[I27]], align 4
2277 // CHECK7-NEXT:    br label [[SIMD_IF_END43]]
2278 // CHECK7:       simd.if.end43:
2279 // CHECK7-NEXT:    [[ARRAYIDX44:%.*]] = getelementptr inbounds [1000 x i32], ptr [[A]], i32 0, i32 0
2280 // CHECK7-NEXT:    [[TMP29:%.*]] = load i32, ptr [[ARRAYIDX44]], align 4
2281 // CHECK7-NEXT:    ret i32 [[TMP29]]
2282 //
2283 //
2284 // CHECK7-LABEL: define {{[^@]+}}@_Z24test_target_teams_atomicv
2285 // CHECK7-SAME: () #[[ATTR0]] {
2286 // CHECK7-NEXT:  entry:
2287 // CHECK7-NEXT:    [[X:%.*]] = alloca i32, align 4
2288 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2289 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2290 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2291 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2292 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
2293 // CHECK7-NEXT:    store i32 0, ptr [[X]], align 4
2294 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2295 // CHECK7-NEXT:    store i32 1023, ptr [[DOTOMP_UB]], align 4
2296 // CHECK7-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2297 // CHECK7-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
2298 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2299 // CHECK7:       omp.inner.for.cond:
2300 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]
2301 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]]
2302 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
2303 // CHECK7-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2304 // CHECK7:       omp.inner.for.body:
2305 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
2306 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
2307 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2308 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]
2309 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[X]], align 4, !llvm.access.group [[ACC_GRP10]]
2310 // CHECK7-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP4]], 1
2311 // CHECK7-NEXT:    store i32 [[ADD1]], ptr [[X]], align 4, !llvm.access.group [[ACC_GRP10]]
2312 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2313 // CHECK7:       omp.body.continue:
2314 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2315 // CHECK7:       omp.inner.for.inc:
2316 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
2317 // CHECK7-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1
2318 // CHECK7-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
2319 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
2320 // CHECK7:       omp.inner.for.end:
2321 // CHECK7-NEXT:    store i32 1024, ptr [[I]], align 4
2322 // CHECK7-NEXT:    ret void
2323 //
2324 //
2325 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50
2326 // CHECK9-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[I:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]], i64 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] {
2327 // CHECK9-NEXT:  entry:
2328 // CHECK9-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
2329 // CHECK9-NEXT:    [[I_ADDR:%.*]] = alloca i64, align 8
2330 // CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
2331 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
2332 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
2333 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i64, align 8
2334 // CHECK9-NEXT:    [[I_CASTED:%.*]] = alloca i64, align 8
2335 // CHECK9-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
2336 // CHECK9-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB4:[0-9]+]])
2337 // CHECK9-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
2338 // CHECK9-NEXT:    store i64 [[I]], ptr [[I_ADDR]], align 8
2339 // CHECK9-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
2340 // CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
2341 // CHECK9-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
2342 // CHECK9-NEXT:    store i64 [[DOTCAPTURE_EXPR_1]], ptr [[DOTCAPTURE_EXPR__ADDR2]], align 8
2343 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
2344 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
2345 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR2]], align 4
2346 // CHECK9-NEXT:    call void @__kmpc_push_num_teams(ptr @[[GLOB4]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
2347 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I_ADDR]], align 4
2348 // CHECK9-NEXT:    store i32 [[TMP4]], ptr [[I_CASTED]], align 4
2349 // CHECK9-NEXT:    [[TMP5:%.*]] = load i64, ptr [[I_CASTED]], align 8
2350 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[N_ADDR]], align 4
2351 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[N_CASTED]], align 4
2352 // CHECK9-NEXT:    [[TMP7:%.*]] = load i64, ptr [[N_CASTED]], align 8
2353 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50.omp_outlined, i64 [[TMP5]], i64 [[TMP7]], ptr [[TMP1]])
2354 // CHECK9-NEXT:    ret void
2355 //
2356 //
2357 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50.omp_outlined
2358 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[I:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] {
2359 // CHECK9-NEXT:  entry:
2360 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2361 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2362 // CHECK9-NEXT:    [[I_ADDR:%.*]] = alloca i64, align 8
2363 // CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
2364 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
2365 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2366 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2367 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2368 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2369 // CHECK9-NEXT:    [[I3:%.*]] = alloca i32, align 4
2370 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2371 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2372 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2373 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2374 // CHECK9-NEXT:    [[I4:%.*]] = alloca i32, align 4
2375 // CHECK9-NEXT:    [[I_CASTED:%.*]] = alloca i64, align 8
2376 // CHECK9-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
2377 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2378 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2379 // CHECK9-NEXT:    store i64 [[I]], ptr [[I_ADDR]], align 8
2380 // CHECK9-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
2381 // CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
2382 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
2383 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
2384 // CHECK9-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
2385 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2386 // CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2387 // CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2388 // CHECK9-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2389 // CHECK9-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
2390 // CHECK9-NEXT:    store i32 0, ptr [[I3]], align 4
2391 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2392 // CHECK9-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2393 // CHECK9-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2394 // CHECK9:       omp.precond.then:
2395 // CHECK9-NEXT:    [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i64 0, i64 0
2396 // CHECK9-NEXT:    call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i64 8) ]
2397 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2398 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2399 // CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4
2400 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2401 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2402 // CHECK9-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2403 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
2404 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2405 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2406 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2407 // CHECK9-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
2408 // CHECK9-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2409 // CHECK9:       cond.true:
2410 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2411 // CHECK9-NEXT:    br label [[COND_END:%.*]]
2412 // CHECK9:       cond.false:
2413 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2414 // CHECK9-NEXT:    br label [[COND_END]]
2415 // CHECK9:       cond.end:
2416 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
2417 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2418 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2419 // CHECK9-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
2420 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2421 // CHECK9:       omp.inner.for.cond:
2422 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2423 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2424 // CHECK9-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
2425 // CHECK9-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2426 // CHECK9:       omp.inner.for.body:
2427 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2428 // CHECK9-NEXT:    [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
2429 // CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2430 // CHECK9-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
2431 // CHECK9-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I4]], align 4
2432 // CHECK9-NEXT:    store i32 [[TMP18]], ptr [[I_CASTED]], align 4
2433 // CHECK9-NEXT:    [[TMP19:%.*]] = load i64, ptr [[I_CASTED]], align 8
2434 // CHECK9-NEXT:    [[TMP20:%.*]] = load i32, ptr [[N_ADDR]], align 4
2435 // CHECK9-NEXT:    store i32 [[TMP20]], ptr [[N_CASTED]], align 4
2436 // CHECK9-NEXT:    [[TMP21:%.*]] = load i64, ptr [[N_CASTED]], align 8
2437 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50.omp_outlined.omp_outlined, i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], i64 [[TMP21]], ptr [[TMP0]])
2438 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2439 // CHECK9:       omp.inner.for.inc:
2440 // CHECK9-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2441 // CHECK9-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2442 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
2443 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2444 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
2445 // CHECK9:       omp.inner.for.end:
2446 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2447 // CHECK9:       omp.loop.exit:
2448 // CHECK9-NEXT:    [[TMP24:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2449 // CHECK9-NEXT:    [[TMP25:%.*]] = load i32, ptr [[TMP24]], align 4
2450 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP25]])
2451 // CHECK9-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2452 // CHECK9-NEXT:    [[TMP27:%.*]] = icmp ne i32 [[TMP26]], 0
2453 // CHECK9-NEXT:    br i1 [[TMP27]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2454 // CHECK9:       .omp.final.then:
2455 // CHECK9-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2456 // CHECK9-NEXT:    [[SUB7:%.*]] = sub nsw i32 [[TMP28]], 0
2457 // CHECK9-NEXT:    [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
2458 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
2459 // CHECK9-NEXT:    [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
2460 // CHECK9-NEXT:    store i32 [[ADD9]], ptr [[I_ADDR]], align 4
2461 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2462 // CHECK9:       .omp.final.done:
2463 // CHECK9-NEXT:    br label [[OMP_PRECOND_END]]
2464 // CHECK9:       omp.precond.end:
2465 // CHECK9-NEXT:    ret void
2466 //
2467 //
2468 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50.omp_outlined.omp_outlined
2469 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[I:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] {
2470 // CHECK9-NEXT:  entry:
2471 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2472 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2473 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2474 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2475 // CHECK9-NEXT:    [[I_ADDR:%.*]] = alloca i64, align 8
2476 // CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
2477 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
2478 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2479 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2480 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2481 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2482 // CHECK9-NEXT:    [[I3:%.*]] = alloca i32, align 4
2483 // CHECK9-NEXT:    [[DOTLINEAR_START:%.*]] = alloca i32, align 4
2484 // CHECK9-NEXT:    [[DOTLINEAR_STEP:%.*]] = alloca i32, align 4
2485 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2486 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2487 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2488 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2489 // CHECK9-NEXT:    [[I5:%.*]] = alloca i32, align 4
2490 // CHECK9-NEXT:    [[I6:%.*]] = alloca i32, align 4
2491 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2492 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2493 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2494 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2495 // CHECK9-NEXT:    store i64 [[I]], ptr [[I_ADDR]], align 8
2496 // CHECK9-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
2497 // CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
2498 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
2499 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
2500 // CHECK9-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
2501 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2502 // CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2503 // CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2504 // CHECK9-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2505 // CHECK9-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
2506 // CHECK9-NEXT:    store i32 0, ptr [[I3]], align 4
2507 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2508 // CHECK9-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2509 // CHECK9-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2510 // CHECK9:       omp.precond.then:
2511 // CHECK9-NEXT:    [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i64 0, i64 0
2512 // CHECK9-NEXT:    call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i64 8) ]
2513 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I_ADDR]], align 4
2514 // CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTLINEAR_START]], align 4
2515 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[N_ADDR]], align 4
2516 // CHECK9-NEXT:    store i32 [[TMP5]], ptr [[DOTLINEAR_STEP]], align 4
2517 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2518 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2519 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
2520 // CHECK9-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2521 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
2522 // CHECK9-NEXT:    [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2523 // CHECK9-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32
2524 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2525 // CHECK9-NEXT:    store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4
2526 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2527 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2528 // CHECK9-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2529 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
2530 // CHECK9-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP10]])
2531 // CHECK9-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2532 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
2533 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP12]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2534 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2535 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2536 // CHECK9-NEXT:    [[CMP7:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]]
2537 // CHECK9-NEXT:    br i1 [[CMP7]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2538 // CHECK9:       cond.true:
2539 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2540 // CHECK9-NEXT:    br label [[COND_END:%.*]]
2541 // CHECK9:       cond.false:
2542 // CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2543 // CHECK9-NEXT:    br label [[COND_END]]
2544 // CHECK9:       cond.end:
2545 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ]
2546 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2547 // CHECK9-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2548 // CHECK9-NEXT:    store i32 [[TMP17]], ptr [[DOTOMP_IV]], align 4
2549 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2550 // CHECK9:       omp.inner.for.cond:
2551 // CHECK9-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2552 // CHECK9-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2553 // CHECK9-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
2554 // CHECK9-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2555 // CHECK9:       omp.inner.for.body:
2556 // CHECK9-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2557 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
2558 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2559 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I5]], align 4
2560 // CHECK9-NEXT:    [[TMP21:%.*]] = load i32, ptr [[I5]], align 4
2561 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
2562 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
2563 // CHECK9-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
2564 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2565 // CHECK9:       omp.body.continue:
2566 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2567 // CHECK9:       omp.inner.for.inc:
2568 // CHECK9-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2569 // CHECK9-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP22]], 1
2570 // CHECK9-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4
2571 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
2572 // CHECK9:       omp.inner.for.end:
2573 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2574 // CHECK9:       omp.loop.exit:
2575 // CHECK9-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2576 // CHECK9-NEXT:    [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4
2577 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP24]])
2578 // CHECK9-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2579 // CHECK9-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
2580 // CHECK9-NEXT:    br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2581 // CHECK9:       .omp.final.then:
2582 // CHECK9-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2583 // CHECK9-NEXT:    [[SUB10:%.*]] = sub nsw i32 [[TMP27]], 0
2584 // CHECK9-NEXT:    [[DIV11:%.*]] = sdiv i32 [[SUB10]], 1
2585 // CHECK9-NEXT:    [[MUL12:%.*]] = mul nsw i32 [[DIV11]], 1
2586 // CHECK9-NEXT:    [[ADD13:%.*]] = add nsw i32 0, [[MUL12]]
2587 // CHECK9-NEXT:    store i32 [[ADD13]], ptr [[I_ADDR]], align 4
2588 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2589 // CHECK9:       .omp.final.done:
2590 // CHECK9-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2591 // CHECK9-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
2592 // CHECK9-NEXT:    br i1 [[TMP29]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
2593 // CHECK9:       .omp.linear.pu:
2594 // CHECK9-NEXT:    br label [[DOTOMP_LINEAR_PU_DONE]]
2595 // CHECK9:       .omp.linear.pu.done:
2596 // CHECK9-NEXT:    br label [[OMP_PRECOND_END]]
2597 // CHECK9:       omp.precond.end:
2598 // CHECK9-NEXT:    ret void
2599 //
2600 //
2601 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56
2602 // CHECK9-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR0]] {
2603 // CHECK9-NEXT:  entry:
2604 // CHECK9-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
2605 // CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
2606 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
2607 // CHECK9-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 8
2608 // CHECK9-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
2609 // CHECK9-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
2610 // CHECK9-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
2611 // CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
2612 // CHECK9-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 8
2613 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
2614 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
2615 // CHECK9-NEXT:    store i32 [[TMP1]], ptr [[N_CASTED]], align 4
2616 // CHECK9-NEXT:    [[TMP2:%.*]] = load i64, ptr [[N_CASTED]], align 8
2617 // CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[G_ADDR]], align 8
2618 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56.omp_outlined, i64 [[TMP2]], ptr [[TMP0]], ptr [[TMP3]])
2619 // CHECK9-NEXT:    ret void
2620 //
2621 //
2622 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56.omp_outlined
2623 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR0]] {
2624 // CHECK9-NEXT:  entry:
2625 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2626 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2627 // CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
2628 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
2629 // CHECK9-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 8
2630 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2631 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2632 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2633 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2634 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
2635 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2636 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2637 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2638 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2639 // CHECK9-NEXT:    [[I3:%.*]] = alloca i32, align 4
2640 // CHECK9-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
2641 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2642 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2643 // CHECK9-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
2644 // CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
2645 // CHECK9-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 8
2646 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
2647 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
2648 // CHECK9-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
2649 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2650 // CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2651 // CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2652 // CHECK9-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2653 // CHECK9-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
2654 // CHECK9-NEXT:    store i32 0, ptr [[I]], align 4
2655 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2656 // CHECK9-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2657 // CHECK9-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2658 // CHECK9:       omp.precond.then:
2659 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2660 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2661 // CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4
2662 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2663 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2664 // CHECK9-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2665 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
2666 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2667 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2668 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2669 // CHECK9-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
2670 // CHECK9-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2671 // CHECK9:       cond.true:
2672 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2673 // CHECK9-NEXT:    br label [[COND_END:%.*]]
2674 // CHECK9:       cond.false:
2675 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2676 // CHECK9-NEXT:    br label [[COND_END]]
2677 // CHECK9:       cond.end:
2678 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
2679 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2680 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2681 // CHECK9-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
2682 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2683 // CHECK9:       omp.inner.for.cond:
2684 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]
2685 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP13]]
2686 // CHECK9-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
2687 // CHECK9-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2688 // CHECK9:       omp.inner.for.body:
2689 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP13]]
2690 // CHECK9-NEXT:    [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
2691 // CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP13]]
2692 // CHECK9-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
2693 // CHECK9-NEXT:    [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 4, !llvm.access.group [[ACC_GRP13]]
2694 // CHECK9-NEXT:    store i32 [[TMP18]], ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP13]]
2695 // CHECK9-NEXT:    [[TMP19:%.*]] = load i64, ptr [[N_CASTED]], align 8, !llvm.access.group [[ACC_GRP13]]
2696 // CHECK9-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[G_ADDR]], align 8, !llvm.access.group [[ACC_GRP13]]
2697 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56.omp_outlined.omp_outlined, i64 [[TMP15]], i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]], ptr [[TMP20]]), !llvm.access.group [[ACC_GRP13]]
2698 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2699 // CHECK9:       omp.inner.for.inc:
2700 // CHECK9-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
2701 // CHECK9-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP13]]
2702 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
2703 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
2704 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
2705 // CHECK9:       omp.inner.for.end:
2706 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2707 // CHECK9:       omp.loop.exit:
2708 // CHECK9-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2709 // CHECK9-NEXT:    [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4
2710 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]])
2711 // CHECK9-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2712 // CHECK9-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
2713 // CHECK9-NEXT:    br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2714 // CHECK9:       .omp.final.then:
2715 // CHECK9-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2716 // CHECK9-NEXT:    [[SUB6:%.*]] = sub nsw i32 [[TMP27]], 0
2717 // CHECK9-NEXT:    [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
2718 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
2719 // CHECK9-NEXT:    [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
2720 // CHECK9-NEXT:    store i32 [[ADD8]], ptr [[I3]], align 4
2721 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2722 // CHECK9:       .omp.final.done:
2723 // CHECK9-NEXT:    br label [[OMP_PRECOND_END]]
2724 // CHECK9:       omp.precond.end:
2725 // CHECK9-NEXT:    ret void
2726 //
2727 //
2728 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56.omp_outlined.omp_outlined
2729 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR0]] {
2730 // CHECK9-NEXT:  entry:
2731 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2732 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2733 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2734 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2735 // CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
2736 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
2737 // CHECK9-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 8
2738 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2739 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2740 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2741 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2742 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
2743 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2744 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2745 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2746 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2747 // CHECK9-NEXT:    [[I4:%.*]] = alloca i32, align 4
2748 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2749 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2750 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2751 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2752 // CHECK9-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
2753 // CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
2754 // CHECK9-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 8
2755 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
2756 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
2757 // CHECK9-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
2758 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2759 // CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
2760 // CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2761 // CHECK9-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2762 // CHECK9-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
2763 // CHECK9-NEXT:    store i32 0, ptr [[I]], align 4
2764 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2765 // CHECK9-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
2766 // CHECK9-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2767 // CHECK9:       omp.precond.then:
2768 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2769 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2770 // CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4
2771 // CHECK9-NEXT:    [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2772 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP5]] to i32
2773 // CHECK9-NEXT:    [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2774 // CHECK9-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP6]] to i32
2775 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2776 // CHECK9-NEXT:    store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4
2777 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2778 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2779 // CHECK9-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2780 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
2781 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2782 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2783 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2784 // CHECK9-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
2785 // CHECK9-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2786 // CHECK9:       cond.true:
2787 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2788 // CHECK9-NEXT:    br label [[COND_END:%.*]]
2789 // CHECK9:       cond.false:
2790 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2791 // CHECK9-NEXT:    br label [[COND_END]]
2792 // CHECK9:       cond.end:
2793 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
2794 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2795 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2796 // CHECK9-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
2797 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2798 // CHECK9:       omp.inner.for.cond:
2799 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17:![0-9]+]]
2800 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP17]]
2801 // CHECK9-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
2802 // CHECK9-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2803 // CHECK9:       omp.inner.for.body:
2804 // CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]]
2805 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
2806 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2807 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP17]]
2808 // CHECK9-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[G_ADDR]], align 8, !llvm.access.group [[ACC_GRP17]]
2809 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i64 0
2810 // CHECK9-NEXT:    [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP17]]
2811 // CHECK9-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP17]]
2812 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
2813 // CHECK9-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
2814 // CHECK9-NEXT:    store i32 [[TMP18]], ptr [[ARRAYIDX7]], align 4, !llvm.access.group [[ACC_GRP17]]
2815 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2816 // CHECK9:       omp.body.continue:
2817 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2818 // CHECK9:       omp.inner.for.inc:
2819 // CHECK9-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]]
2820 // CHECK9-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP20]], 1
2821 // CHECK9-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]]
2822 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
2823 // CHECK9:       omp.inner.for.end:
2824 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2825 // CHECK9:       omp.loop.exit:
2826 // CHECK9-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2827 // CHECK9-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
2828 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP22]])
2829 // CHECK9-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2830 // CHECK9-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2831 // CHECK9-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2832 // CHECK9:       .omp.final.then:
2833 // CHECK9-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2834 // CHECK9-NEXT:    [[SUB9:%.*]] = sub nsw i32 [[TMP25]], 0
2835 // CHECK9-NEXT:    [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1
2836 // CHECK9-NEXT:    [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1
2837 // CHECK9-NEXT:    [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
2838 // CHECK9-NEXT:    store i32 [[ADD12]], ptr [[I4]], align 4
2839 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2840 // CHECK9:       .omp.final.done:
2841 // CHECK9-NEXT:    br label [[OMP_PRECOND_END]]
2842 // CHECK9:       omp.precond.end:
2843 // CHECK9-NEXT:    ret void
2844 //
2845 //
2846 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z24test_target_teams_atomicv_l72
2847 // CHECK9-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] {
2848 // CHECK9-NEXT:  entry:
2849 // CHECK9-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
2850 // CHECK9-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 8
2851 // CHECK9-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
2852 // CHECK9-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 8
2853 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[X_ADDR]], align 8
2854 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z24test_target_teams_atomicv_l72.omp_outlined, ptr [[TMP0]])
2855 // CHECK9-NEXT:    ret void
2856 //
2857 //
2858 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z24test_target_teams_atomicv_l72.omp_outlined
2859 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] {
2860 // CHECK9-NEXT:  entry:
2861 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2862 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2863 // CHECK9-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 8
2864 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2865 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2866 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2867 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2868 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2869 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2870 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
2871 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2872 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2873 // CHECK9-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 8
2874 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[X_ADDR]], align 8
2875 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2876 // CHECK9-NEXT:    store i32 1023, ptr [[DOTOMP_COMB_UB]], align 4
2877 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2878 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2879 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2880 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
2881 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2882 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2883 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1023
2884 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2885 // CHECK9:       cond.true:
2886 // CHECK9-NEXT:    br label [[COND_END:%.*]]
2887 // CHECK9:       cond.false:
2888 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2889 // CHECK9-NEXT:    br label [[COND_END]]
2890 // CHECK9:       cond.end:
2891 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1023, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2892 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2893 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2894 // CHECK9-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
2895 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2896 // CHECK9:       omp.inner.for.cond:
2897 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20:![0-9]+]]
2898 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
2899 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2900 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2901 // CHECK9:       omp.inner.for.body:
2902 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP20]]
2903 // CHECK9-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2904 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP20]]
2905 // CHECK9-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2906 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z24test_target_teams_atomicv_l72.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP20]]
2907 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2908 // CHECK9:       omp.inner.for.inc:
2909 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
2910 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP20]]
2911 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2912 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP20]]
2913 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP21:![0-9]+]]
2914 // CHECK9:       omp.inner.for.end:
2915 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2916 // CHECK9:       omp.loop.exit:
2917 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
2918 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2919 // CHECK9-NEXT:    [[TMP15:%.*]] = icmp ne i32 [[TMP14]], 0
2920 // CHECK9-NEXT:    br i1 [[TMP15]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2921 // CHECK9:       .omp.final.then:
2922 // CHECK9-NEXT:    store i32 1024, ptr [[I]], align 4
2923 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2924 // CHECK9:       .omp.final.done:
2925 // CHECK9-NEXT:    ret void
2926 //
2927 //
2928 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z24test_target_teams_atomicv_l72.omp_outlined.omp_outlined
2929 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] {
2930 // CHECK9-NEXT:  entry:
2931 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2932 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2933 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2934 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2935 // CHECK9-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 8
2936 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2937 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2938 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2939 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2940 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2941 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2942 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
2943 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2944 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2945 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2946 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2947 // CHECK9-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 8
2948 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[X_ADDR]], align 8
2949 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2950 // CHECK9-NEXT:    store i32 1023, ptr [[DOTOMP_UB]], align 4
2951 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2952 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
2953 // CHECK9-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2954 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
2955 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2956 // CHECK9-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
2957 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2958 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2959 // CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2960 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
2961 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2962 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2963 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1023
2964 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2965 // CHECK9:       cond.true:
2966 // CHECK9-NEXT:    br label [[COND_END:%.*]]
2967 // CHECK9:       cond.false:
2968 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2969 // CHECK9-NEXT:    br label [[COND_END]]
2970 // CHECK9:       cond.end:
2971 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1023, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2972 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2973 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2974 // CHECK9-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
2975 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2976 // CHECK9:       omp.inner.for.cond:
2977 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23:![0-9]+]]
2978 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP23]]
2979 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2980 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2981 // CHECK9:       omp.inner.for.body:
2982 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
2983 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2984 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2985 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP23]]
2986 // CHECK9-NEXT:    [[TMP11:%.*]] = atomicrmw add ptr [[TMP0]], i32 1 monotonic, align 4, !llvm.access.group [[ACC_GRP23]]
2987 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2988 // CHECK9:       omp.body.continue:
2989 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2990 // CHECK9:       omp.inner.for.inc:
2991 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
2992 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
2993 // CHECK9-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP23]]
2994 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP24:![0-9]+]]
2995 // CHECK9:       omp.inner.for.end:
2996 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2997 // CHECK9:       omp.loop.exit:
2998 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP4]])
2999 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3000 // CHECK9-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
3001 // CHECK9-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3002 // CHECK9:       .omp.final.then:
3003 // CHECK9-NEXT:    store i32 1024, ptr [[I]], align 4
3004 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3005 // CHECK9:       .omp.final.done:
3006 // CHECK9-NEXT:    ret void
3007 //
3008 //
3009 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50
3010 // CHECK11-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[I:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]], i32 noundef [[DOTCAPTURE_EXPR_1:%.*]]) #[[ATTR0:[0-9]+]] {
3011 // CHECK11-NEXT:  entry:
3012 // CHECK11-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
3013 // CHECK11-NEXT:    [[I_ADDR:%.*]] = alloca i32, align 4
3014 // CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
3015 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
3016 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
3017 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR__ADDR2:%.*]] = alloca i32, align 4
3018 // CHECK11-NEXT:    [[I_CASTED:%.*]] = alloca i32, align 4
3019 // CHECK11-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
3020 // CHECK11-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB4:[0-9]+]])
3021 // CHECK11-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
3022 // CHECK11-NEXT:    store i32 [[I]], ptr [[I_ADDR]], align 4
3023 // CHECK11-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
3024 // CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
3025 // CHECK11-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
3026 // CHECK11-NEXT:    store i32 [[DOTCAPTURE_EXPR_1]], ptr [[DOTCAPTURE_EXPR__ADDR2]], align 4
3027 // CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
3028 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
3029 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR2]], align 4
3030 // CHECK11-NEXT:    call void @__kmpc_push_num_teams(ptr @[[GLOB4]], i32 [[TMP0]], i32 [[TMP2]], i32 [[TMP3]])
3031 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I_ADDR]], align 4
3032 // CHECK11-NEXT:    store i32 [[TMP4]], ptr [[I_CASTED]], align 4
3033 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[I_CASTED]], align 4
3034 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[N_ADDR]], align 4
3035 // CHECK11-NEXT:    store i32 [[TMP6]], ptr [[N_CASTED]], align 4
3036 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[N_CASTED]], align 4
3037 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50.omp_outlined, i32 [[TMP5]], i32 [[TMP7]], ptr [[TMP1]])
3038 // CHECK11-NEXT:    ret void
3039 //
3040 //
3041 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50.omp_outlined
3042 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[I:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] {
3043 // CHECK11-NEXT:  entry:
3044 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
3045 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
3046 // CHECK11-NEXT:    [[I_ADDR:%.*]] = alloca i32, align 4
3047 // CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
3048 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
3049 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3050 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3051 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3052 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3053 // CHECK11-NEXT:    [[I3:%.*]] = alloca i32, align 4
3054 // CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3055 // CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3056 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3057 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3058 // CHECK11-NEXT:    [[I4:%.*]] = alloca i32, align 4
3059 // CHECK11-NEXT:    [[I_CASTED:%.*]] = alloca i32, align 4
3060 // CHECK11-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
3061 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
3062 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
3063 // CHECK11-NEXT:    store i32 [[I]], ptr [[I_ADDR]], align 4
3064 // CHECK11-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
3065 // CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
3066 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
3067 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
3068 // CHECK11-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
3069 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
3070 // CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
3071 // CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3072 // CHECK11-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3073 // CHECK11-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
3074 // CHECK11-NEXT:    store i32 0, ptr [[I3]], align 4
3075 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
3076 // CHECK11-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
3077 // CHECK11-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3078 // CHECK11:       omp.precond.then:
3079 // CHECK11-NEXT:    [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i32 0, i32 0
3080 // CHECK11-NEXT:    call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i32 8) ]
3081 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3082 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
3083 // CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4
3084 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3085 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3086 // CHECK11-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3087 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
3088 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3089 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3090 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
3091 // CHECK11-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
3092 // CHECK11-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3093 // CHECK11:       cond.true:
3094 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
3095 // CHECK11-NEXT:    br label [[COND_END:%.*]]
3096 // CHECK11:       cond.false:
3097 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3098 // CHECK11-NEXT:    br label [[COND_END]]
3099 // CHECK11:       cond.end:
3100 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
3101 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3102 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3103 // CHECK11-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
3104 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3105 // CHECK11:       omp.inner.for.cond:
3106 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3107 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3108 // CHECK11-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
3109 // CHECK11-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3110 // CHECK11:       omp.inner.for.body:
3111 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3112 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3113 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I4]], align 4
3114 // CHECK11-NEXT:    store i32 [[TMP16]], ptr [[I_CASTED]], align 4
3115 // CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I_CASTED]], align 4
3116 // CHECK11-NEXT:    [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 4
3117 // CHECK11-NEXT:    store i32 [[TMP18]], ptr [[N_CASTED]], align 4
3118 // CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[N_CASTED]], align 4
3119 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50.omp_outlined.omp_outlined, i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], i32 [[TMP19]], ptr [[TMP0]])
3120 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3121 // CHECK11:       omp.inner.for.inc:
3122 // CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3123 // CHECK11-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3124 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
3125 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
3126 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
3127 // CHECK11:       omp.inner.for.end:
3128 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3129 // CHECK11:       omp.loop.exit:
3130 // CHECK11-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3131 // CHECK11-NEXT:    [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4
3132 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]])
3133 // CHECK11-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3134 // CHECK11-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
3135 // CHECK11-NEXT:    br i1 [[TMP25]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3136 // CHECK11:       .omp.final.then:
3137 // CHECK11-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
3138 // CHECK11-NEXT:    [[SUB7:%.*]] = sub nsw i32 [[TMP26]], 0
3139 // CHECK11-NEXT:    [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
3140 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV8]], 1
3141 // CHECK11-NEXT:    [[ADD9:%.*]] = add nsw i32 0, [[MUL]]
3142 // CHECK11-NEXT:    store i32 [[ADD9]], ptr [[I_ADDR]], align 4
3143 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3144 // CHECK11:       .omp.final.done:
3145 // CHECK11-NEXT:    br label [[OMP_PRECOND_END]]
3146 // CHECK11:       omp.precond.end:
3147 // CHECK11-NEXT:    ret void
3148 //
3149 //
3150 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l50.omp_outlined.omp_outlined
3151 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[I:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]]) #[[ATTR0]] {
3152 // CHECK11-NEXT:  entry:
3153 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
3154 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
3155 // CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3156 // CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3157 // CHECK11-NEXT:    [[I_ADDR:%.*]] = alloca i32, align 4
3158 // CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
3159 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
3160 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3161 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3162 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3163 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3164 // CHECK11-NEXT:    [[I3:%.*]] = alloca i32, align 4
3165 // CHECK11-NEXT:    [[DOTLINEAR_START:%.*]] = alloca i32, align 4
3166 // CHECK11-NEXT:    [[DOTLINEAR_STEP:%.*]] = alloca i32, align 4
3167 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3168 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3169 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3170 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3171 // CHECK11-NEXT:    [[I4:%.*]] = alloca i32, align 4
3172 // CHECK11-NEXT:    [[I5:%.*]] = alloca i32, align 4
3173 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
3174 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
3175 // CHECK11-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
3176 // CHECK11-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3177 // CHECK11-NEXT:    store i32 [[I]], ptr [[I_ADDR]], align 4
3178 // CHECK11-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
3179 // CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
3180 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
3181 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
3182 // CHECK11-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
3183 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
3184 // CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
3185 // CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3186 // CHECK11-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3187 // CHECK11-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
3188 // CHECK11-NEXT:    store i32 0, ptr [[I3]], align 4
3189 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
3190 // CHECK11-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
3191 // CHECK11-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3192 // CHECK11:       omp.precond.then:
3193 // CHECK11-NEXT:    [[ARRAYDECAY:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i32 0, i32 0
3194 // CHECK11-NEXT:    call void @llvm.assume(i1 true) [ "align"(ptr [[ARRAYDECAY]], i32 8) ]
3195 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I_ADDR]], align 4
3196 // CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTLINEAR_START]], align 4
3197 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[N_ADDR]], align 4
3198 // CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTLINEAR_STEP]], align 4
3199 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3200 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
3201 // CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
3202 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
3203 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3204 // CHECK11-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_LB]], align 4
3205 // CHECK11-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 4
3206 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3207 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3208 // CHECK11-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3209 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
3210 // CHECK11-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP10]])
3211 // CHECK11-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3212 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
3213 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB3:[0-9]+]], i32 [[TMP12]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3214 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3215 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
3216 // CHECK11-NEXT:    [[CMP6:%.*]] = icmp sgt i32 [[TMP13]], [[TMP14]]
3217 // CHECK11-NEXT:    br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3218 // CHECK11:       cond.true:
3219 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
3220 // CHECK11-NEXT:    br label [[COND_END:%.*]]
3221 // CHECK11:       cond.false:
3222 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3223 // CHECK11-NEXT:    br label [[COND_END]]
3224 // CHECK11:       cond.end:
3225 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP15]], [[COND_TRUE]] ], [ [[TMP16]], [[COND_FALSE]] ]
3226 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3227 // CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3228 // CHECK11-NEXT:    store i32 [[TMP17]], ptr [[DOTOMP_IV]], align 4
3229 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3230 // CHECK11:       omp.inner.for.cond:
3231 // CHECK11-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3232 // CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3233 // CHECK11-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
3234 // CHECK11-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3235 // CHECK11:       omp.inner.for.body:
3236 // CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3237 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
3238 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3239 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4
3240 // CHECK11-NEXT:    [[TMP21:%.*]] = load i32, ptr [[I4]], align 4
3241 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i32 0, i32 [[TMP21]]
3242 // CHECK11-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
3243 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3244 // CHECK11:       omp.body.continue:
3245 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3246 // CHECK11:       omp.inner.for.inc:
3247 // CHECK11-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3248 // CHECK11-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP22]], 1
3249 // CHECK11-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4
3250 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
3251 // CHECK11:       omp.inner.for.end:
3252 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3253 // CHECK11:       omp.loop.exit:
3254 // CHECK11-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3255 // CHECK11-NEXT:    [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4
3256 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP24]])
3257 // CHECK11-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3258 // CHECK11-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
3259 // CHECK11-NEXT:    br i1 [[TMP26]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3260 // CHECK11:       .omp.final.then:
3261 // CHECK11-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
3262 // CHECK11-NEXT:    [[SUB9:%.*]] = sub nsw i32 [[TMP27]], 0
3263 // CHECK11-NEXT:    [[DIV10:%.*]] = sdiv i32 [[SUB9]], 1
3264 // CHECK11-NEXT:    [[MUL11:%.*]] = mul nsw i32 [[DIV10]], 1
3265 // CHECK11-NEXT:    [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
3266 // CHECK11-NEXT:    store i32 [[ADD12]], ptr [[I_ADDR]], align 4
3267 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3268 // CHECK11:       .omp.final.done:
3269 // CHECK11-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3270 // CHECK11-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
3271 // CHECK11-NEXT:    br i1 [[TMP29]], label [[DOTOMP_LINEAR_PU:%.*]], label [[DOTOMP_LINEAR_PU_DONE:%.*]]
3272 // CHECK11:       .omp.linear.pu:
3273 // CHECK11-NEXT:    br label [[DOTOMP_LINEAR_PU_DONE]]
3274 // CHECK11:       .omp.linear.pu.done:
3275 // CHECK11-NEXT:    br label [[OMP_PRECOND_END]]
3276 // CHECK11:       omp.precond.end:
3277 // CHECK11-NEXT:    ret void
3278 //
3279 //
3280 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56
3281 // CHECK11-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR0]] {
3282 // CHECK11-NEXT:  entry:
3283 // CHECK11-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
3284 // CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
3285 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
3286 // CHECK11-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4
3287 // CHECK11-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
3288 // CHECK11-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
3289 // CHECK11-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
3290 // CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
3291 // CHECK11-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4
3292 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
3293 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
3294 // CHECK11-NEXT:    store i32 [[TMP1]], ptr [[N_CASTED]], align 4
3295 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_CASTED]], align 4
3296 // CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[G_ADDR]], align 4
3297 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56.omp_outlined, i32 [[TMP2]], ptr [[TMP0]], ptr [[TMP3]])
3298 // CHECK11-NEXT:    ret void
3299 //
3300 //
3301 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56.omp_outlined
3302 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR0]] {
3303 // CHECK11-NEXT:  entry:
3304 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
3305 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
3306 // CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
3307 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
3308 // CHECK11-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4
3309 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3310 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3311 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3312 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3313 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
3314 // CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3315 // CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3316 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3317 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3318 // CHECK11-NEXT:    [[I3:%.*]] = alloca i32, align 4
3319 // CHECK11-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
3320 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
3321 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
3322 // CHECK11-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
3323 // CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
3324 // CHECK11-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4
3325 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
3326 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
3327 // CHECK11-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
3328 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
3329 // CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
3330 // CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3331 // CHECK11-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3332 // CHECK11-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
3333 // CHECK11-NEXT:    store i32 0, ptr [[I]], align 4
3334 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
3335 // CHECK11-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
3336 // CHECK11-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3337 // CHECK11:       omp.precond.then:
3338 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3339 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
3340 // CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_COMB_UB]], align 4
3341 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3342 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3343 // CHECK11-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3344 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
3345 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP6]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3346 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3347 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
3348 // CHECK11-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP7]], [[TMP8]]
3349 // CHECK11-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3350 // CHECK11:       cond.true:
3351 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
3352 // CHECK11-NEXT:    br label [[COND_END:%.*]]
3353 // CHECK11:       cond.false:
3354 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3355 // CHECK11-NEXT:    br label [[COND_END]]
3356 // CHECK11:       cond.end:
3357 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP9]], [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
3358 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3359 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3360 // CHECK11-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
3361 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3362 // CHECK11:       omp.inner.for.cond:
3363 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]
3364 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP14]]
3365 // CHECK11-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
3366 // CHECK11-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3367 // CHECK11:       omp.inner.for.body:
3368 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP14]]
3369 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP14]]
3370 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[N_ADDR]], align 4, !llvm.access.group [[ACC_GRP14]]
3371 // CHECK11-NEXT:    store i32 [[TMP16]], ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP14]]
3372 // CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[N_CASTED]], align 4, !llvm.access.group [[ACC_GRP14]]
3373 // CHECK11-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[G_ADDR]], align 4, !llvm.access.group [[ACC_GRP14]]
3374 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56.omp_outlined.omp_outlined, i32 [[TMP14]], i32 [[TMP15]], i32 [[TMP17]], ptr [[TMP0]], ptr [[TMP18]]), !llvm.access.group [[ACC_GRP14]]
3375 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3376 // CHECK11:       omp.inner.for.inc:
3377 // CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
3378 // CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP14]]
3379 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
3380 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
3381 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
3382 // CHECK11:       omp.inner.for.end:
3383 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3384 // CHECK11:       omp.loop.exit:
3385 // CHECK11-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3386 // CHECK11-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
3387 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])
3388 // CHECK11-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3389 // CHECK11-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
3390 // CHECK11-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3391 // CHECK11:       .omp.final.then:
3392 // CHECK11-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
3393 // CHECK11-NEXT:    [[SUB6:%.*]] = sub nsw i32 [[TMP25]], 0
3394 // CHECK11-NEXT:    [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
3395 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV7]], 1
3396 // CHECK11-NEXT:    [[ADD8:%.*]] = add nsw i32 0, [[MUL]]
3397 // CHECK11-NEXT:    store i32 [[ADD8]], ptr [[I3]], align 4
3398 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3399 // CHECK11:       .omp.final.done:
3400 // CHECK11-NEXT:    br label [[OMP_PRECOND_END]]
3401 // CHECK11:       omp.precond.end:
3402 // CHECK11-NEXT:    ret void
3403 //
3404 //
3405 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z16target_teams_funPi_l56.omp_outlined.omp_outlined
3406 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4000) [[A:%.*]], ptr noundef [[G:%.*]]) #[[ATTR0]] {
3407 // CHECK11-NEXT:  entry:
3408 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
3409 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
3410 // CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3411 // CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3412 // CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
3413 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
3414 // CHECK11-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4
3415 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3416 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3417 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3418 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3419 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
3420 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3421 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3422 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3423 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3424 // CHECK11-NEXT:    [[I3:%.*]] = alloca i32, align 4
3425 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
3426 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
3427 // CHECK11-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
3428 // CHECK11-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3429 // CHECK11-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
3430 // CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
3431 // CHECK11-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4
3432 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
3433 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[N_ADDR]], align 4
3434 // CHECK11-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
3435 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
3436 // CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP2]], 0
3437 // CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3438 // CHECK11-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3439 // CHECK11-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
3440 // CHECK11-NEXT:    store i32 0, ptr [[I]], align 4
3441 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
3442 // CHECK11-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP3]]
3443 // CHECK11-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
3444 // CHECK11:       omp.precond.then:
3445 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3446 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
3447 // CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4
3448 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
3449 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3450 // CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_LB]], align 4
3451 // CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
3452 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3453 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3454 // CHECK11-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3455 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
3456 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3457 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3458 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
3459 // CHECK11-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
3460 // CHECK11-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3461 // CHECK11:       cond.true:
3462 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
3463 // CHECK11-NEXT:    br label [[COND_END:%.*]]
3464 // CHECK11:       cond.false:
3465 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3466 // CHECK11-NEXT:    br label [[COND_END]]
3467 // CHECK11:       cond.end:
3468 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
3469 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3470 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3471 // CHECK11-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
3472 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3473 // CHECK11:       omp.inner.for.cond:
3474 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
3475 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
3476 // CHECK11-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
3477 // CHECK11-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3478 // CHECK11:       omp.inner.for.body:
3479 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
3480 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
3481 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3482 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP18]]
3483 // CHECK11-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[G_ADDR]], align 4, !llvm.access.group [[ACC_GRP18]]
3484 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP17]], i32 0
3485 // CHECK11-NEXT:    [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP18]]
3486 // CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP18]]
3487 // CHECK11-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds [1000 x i32], ptr [[TMP0]], i32 0, i32 [[TMP19]]
3488 // CHECK11-NEXT:    store i32 [[TMP18]], ptr [[ARRAYIDX6]], align 4, !llvm.access.group [[ACC_GRP18]]
3489 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3490 // CHECK11:       omp.body.continue:
3491 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3492 // CHECK11:       omp.inner.for.inc:
3493 // CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
3494 // CHECK11-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
3495 // CHECK11-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
3496 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
3497 // CHECK11:       omp.inner.for.end:
3498 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3499 // CHECK11:       omp.loop.exit:
3500 // CHECK11-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3501 // CHECK11-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
3502 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP22]])
3503 // CHECK11-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3504 // CHECK11-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
3505 // CHECK11-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3506 // CHECK11:       .omp.final.then:
3507 // CHECK11-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
3508 // CHECK11-NEXT:    [[SUB8:%.*]] = sub nsw i32 [[TMP25]], 0
3509 // CHECK11-NEXT:    [[DIV9:%.*]] = sdiv i32 [[SUB8]], 1
3510 // CHECK11-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[DIV9]], 1
3511 // CHECK11-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3512 // CHECK11-NEXT:    store i32 [[ADD11]], ptr [[I3]], align 4
3513 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3514 // CHECK11:       .omp.final.done:
3515 // CHECK11-NEXT:    br label [[OMP_PRECOND_END]]
3516 // CHECK11:       omp.precond.end:
3517 // CHECK11-NEXT:    ret void
3518 //
3519 //
3520 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z24test_target_teams_atomicv_l72
3521 // CHECK11-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] {
3522 // CHECK11-NEXT:  entry:
3523 // CHECK11-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
3524 // CHECK11-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 4
3525 // CHECK11-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
3526 // CHECK11-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 4
3527 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[X_ADDR]], align 4
3528 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB4]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z24test_target_teams_atomicv_l72.omp_outlined, ptr [[TMP0]])
3529 // CHECK11-NEXT:    ret void
3530 //
3531 //
3532 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z24test_target_teams_atomicv_l72.omp_outlined
3533 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] {
3534 // CHECK11-NEXT:  entry:
3535 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
3536 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
3537 // CHECK11-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 4
3538 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3539 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3540 // CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3541 // CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3542 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3543 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3544 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
3545 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
3546 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
3547 // CHECK11-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 4
3548 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[X_ADDR]], align 4
3549 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3550 // CHECK11-NEXT:    store i32 1023, ptr [[DOTOMP_COMB_UB]], align 4
3551 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3552 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3553 // CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3554 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
3555 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3556 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3557 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1023
3558 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3559 // CHECK11:       cond.true:
3560 // CHECK11-NEXT:    br label [[COND_END:%.*]]
3561 // CHECK11:       cond.false:
3562 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3563 // CHECK11-NEXT:    br label [[COND_END]]
3564 // CHECK11:       cond.end:
3565 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1023, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3566 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3567 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3568 // CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
3569 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3570 // CHECK11:       omp.inner.for.cond:
3571 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]
3572 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP21]]
3573 // CHECK11-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3574 // CHECK11-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3575 // CHECK11:       omp.inner.for.body:
3576 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP21]]
3577 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP21]]
3578 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB4]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z24test_target_teams_atomicv_l72.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]]), !llvm.access.group [[ACC_GRP21]]
3579 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3580 // CHECK11:       omp.inner.for.inc:
3581 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
3582 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP21]]
3583 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3584 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
3585 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
3586 // CHECK11:       omp.inner.for.end:
3587 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3588 // CHECK11:       omp.loop.exit:
3589 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
3590 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3591 // CHECK11-NEXT:    [[TMP13:%.*]] = icmp ne i32 [[TMP12]], 0
3592 // CHECK11-NEXT:    br i1 [[TMP13]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3593 // CHECK11:       .omp.final.then:
3594 // CHECK11-NEXT:    store i32 1024, ptr [[I]], align 4
3595 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3596 // CHECK11:       .omp.final.done:
3597 // CHECK11-NEXT:    ret void
3598 //
3599 //
3600 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z24test_target_teams_atomicv_l72.omp_outlined.omp_outlined
3601 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR0]] {
3602 // CHECK11-NEXT:  entry:
3603 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
3604 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
3605 // CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3606 // CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3607 // CHECK11-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 4
3608 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3609 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3610 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3611 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3612 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3613 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3614 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
3615 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
3616 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
3617 // CHECK11-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
3618 // CHECK11-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3619 // CHECK11-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 4
3620 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[X_ADDR]], align 4
3621 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3622 // CHECK11-NEXT:    store i32 1023, ptr [[DOTOMP_UB]], align 4
3623 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
3624 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3625 // CHECK11-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
3626 // CHECK11-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
3627 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3628 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3629 // CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3630 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
3631 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB3]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3632 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3633 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1023
3634 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3635 // CHECK11:       cond.true:
3636 // CHECK11-NEXT:    br label [[COND_END:%.*]]
3637 // CHECK11:       cond.false:
3638 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3639 // CHECK11-NEXT:    br label [[COND_END]]
3640 // CHECK11:       cond.end:
3641 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1023, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
3642 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3643 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3644 // CHECK11-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
3645 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3646 // CHECK11:       omp.inner.for.cond:
3647 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]
3648 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP24]]
3649 // CHECK11-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3650 // CHECK11-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3651 // CHECK11:       omp.inner.for.body:
3652 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
3653 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3654 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3655 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]]
3656 // CHECK11-NEXT:    [[TMP11:%.*]] = atomicrmw add ptr [[TMP0]], i32 1 monotonic, align 4, !llvm.access.group [[ACC_GRP24]]
3657 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3658 // CHECK11:       omp.body.continue:
3659 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3660 // CHECK11:       omp.inner.for.inc:
3661 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
3662 // CHECK11-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
3663 // CHECK11-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
3664 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
3665 // CHECK11:       omp.inner.for.end:
3666 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3667 // CHECK11:       omp.loop.exit:
3668 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB3]], i32 [[TMP4]])
3669 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3670 // CHECK11-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
3671 // CHECK11-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3672 // CHECK11:       .omp.final.then:
3673 // CHECK11-NEXT:    store i32 1024, ptr [[I]], align 4
3674 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3675 // CHECK11:       .omp.final.done:
3676 // CHECK11-NEXT:    ret void
3677 //