clang/test/OpenMP/teams_distribute_simd_dist_schedule_codegen.cpp

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
   2 // expected-no-diagnostics
   3 #ifndef HEADER
   4 #define HEADER
   5
   6 // Test host codegen.
   7 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
   8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
   9 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
  10 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
  11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  12 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
  13
  14 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
  15 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  16 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5
  17 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
  18 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  19 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7
  20 #ifdef CK1
  21
  22 template <typename T, int X, long long Y>
  23 struct SS{
  24   T a[X];
  25   float b;
  26   int foo(void) {
  27
  28     #pragma omp target
  29     #pragma omp teams distribute simd
  30     for(int i = 0; i < X; i++) {
  31       a[i] = (T)0;
  32     }
  33     #pragma omp target
  34     #pragma omp teams distribute simd dist_schedule(static)
  35     for(int i = 0; i < X; i++) {
  36       a[i] = (T)0;
  37     }
  38     #pragma omp target
  39     #pragma omp teams distribute simd dist_schedule(static, X/2)
  40     for(int i = 0; i < X; i++) {
  41       a[i] = (T)0;
  42     }
  43
  44
  45
  46
  47
  48
  49     return a[0];
  50   }
  51 };
  52
  53 int teams_template_struct(void) {
  54   SS<int, 123, 456> V;
  55   return V.foo();
  56
  57 }
  58 #endif // CK1
  59
  60 // Test host codegen.
  61 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
  62 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  63 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
  64 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
  65 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  66 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11
  67
  68 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13
  69 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  70 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13
  71 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15
  72 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  73 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15
  74 #ifdef CK2
  75
  76 template <typename T, int n>
  77 int tmain(T argc) {
  78   T a[n];
  79 #pragma omp target
  80 #pragma omp teams distribute simd
  81   for(int i = 0; i < n; i++) {
  82     a[i] = (T)0;
  83   }
  84 #pragma omp target
  85 #pragma omp teams distribute simd dist_schedule(static)
  86   for(int i = 0; i < n; i++) {
  87     a[i] = (T)0;
  88   }
  89 #pragma omp target
  90 #pragma omp teams distribute simd dist_schedule(static, n)
  91   for(int i = 0; i < n; i++) {
  92     a[i] = (T)0;
  93   }
  94   return 0;
  95 }
  96
  97 int main (int argc, char **argv) {
  98   int n = 100;
  99   int a[n];
 100 #pragma omp target
 101 #pragma omp teams distribute simd
 102   for(int i = 0; i < n; i++) {
 103     a[i] = 0;
 104   }
 105 #pragma omp target
 106 #pragma omp teams distribute simd dist_schedule(static)
 107   for(int i = 0; i < n; i++) {
 108     a[i] = 0;
 109   }
 110 #pragma omp target
 111 #pragma omp teams distribute simd dist_schedule(static, n)
 112   for(int i = 0; i < n; i++) {
 113     a[i] = 0;
 114   }
 115   return tmain<int, 10>(argc);
 116 }
 117
 118
 119
 120
 121
 122
 123
 124
 125
 126
 127
 128
 129
 130
 131
 132 #endif // CK2
 133 #endif // #ifndef HEADER
 134 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv
 135 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
 136 // CHECK1-NEXT:  entry:
 137 // CHECK1-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
 138 // CHECK1-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])
 139 // CHECK1-NEXT:    ret i32 [[CALL]]
 140 //
 141 //
 142 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
 143 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat {
 144 // CHECK1-NEXT:  entry:
 145 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 146 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
 147 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
 148 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
 149 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 150 // CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
 151 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 8
 152 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 8
 153 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 8
 154 // CHECK1-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
 155 // CHECK1-NEXT:    [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
 156 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 8
 157 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 8
 158 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 8
 159 // CHECK1-NEXT:    [[_TMP14:%.*]] = alloca i32, align 4
 160 // CHECK1-NEXT:    [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
 161 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 162 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 163 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0
 164 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 165 // CHECK1-NEXT:    store ptr [[THIS1]], ptr [[TMP0]], align 8
 166 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 167 // CHECK1-NEXT:    store ptr [[A]], ptr [[TMP1]], align 8
 168 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
 169 // CHECK1-NEXT:    store ptr null, ptr [[TMP2]], align 8
 170 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 171 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 172 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
 173 // CHECK1-NEXT:    store i32 3, ptr [[TMP5]], align 4
 174 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
 175 // CHECK1-NEXT:    store i32 1, ptr [[TMP6]], align 4
 176 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
 177 // CHECK1-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 8
 178 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
 179 // CHECK1-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 8
 180 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
 181 // CHECK1-NEXT:    store ptr @.offload_sizes, ptr [[TMP9]], align 8
 182 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
 183 // CHECK1-NEXT:    store ptr @.offload_maptypes, ptr [[TMP10]], align 8
 184 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
 185 // CHECK1-NEXT:    store ptr null, ptr [[TMP11]], align 8
 186 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
 187 // CHECK1-NEXT:    store ptr null, ptr [[TMP12]], align 8
 188 // CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
 189 // CHECK1-NEXT:    store i64 123, ptr [[TMP13]], align 8
 190 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
 191 // CHECK1-NEXT:    store i64 0, ptr [[TMP14]], align 8
 192 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
 193 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
 194 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
 195 // CHECK1-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP16]], align 4
 196 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
 197 // CHECK1-NEXT:    store i32 0, ptr [[TMP17]], align 4
 198 // CHECK1-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]])
 199 // CHECK1-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
 200 // CHECK1-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 201 // CHECK1:       omp_offload.failed:
 202 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR2:[0-9]+]]
 203 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 204 // CHECK1:       omp_offload.cont:
 205 // CHECK1-NEXT:    [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
 206 // CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
 207 // CHECK1-NEXT:    store ptr [[THIS1]], ptr [[TMP20]], align 8
 208 // CHECK1-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
 209 // CHECK1-NEXT:    store ptr [[A2]], ptr [[TMP21]], align 8
 210 // CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
 211 // CHECK1-NEXT:    store ptr null, ptr [[TMP22]], align 8
 212 // CHECK1-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
 213 // CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
 214 // CHECK1-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0
 215 // CHECK1-NEXT:    store i32 3, ptr [[TMP25]], align 4
 216 // CHECK1-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1
 217 // CHECK1-NEXT:    store i32 1, ptr [[TMP26]], align 4
 218 // CHECK1-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2
 219 // CHECK1-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 8
 220 // CHECK1-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3
 221 // CHECK1-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 8
 222 // CHECK1-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4
 223 // CHECK1-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP29]], align 8
 224 // CHECK1-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5
 225 // CHECK1-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP30]], align 8
 226 // CHECK1-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6
 227 // CHECK1-NEXT:    store ptr null, ptr [[TMP31]], align 8
 228 // CHECK1-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7
 229 // CHECK1-NEXT:    store ptr null, ptr [[TMP32]], align 8
 230 // CHECK1-NEXT:    [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8
 231 // CHECK1-NEXT:    store i64 123, ptr [[TMP33]], align 8
 232 // CHECK1-NEXT:    [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9
 233 // CHECK1-NEXT:    store i64 0, ptr [[TMP34]], align 8
 234 // CHECK1-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10
 235 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
 236 // CHECK1-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11
 237 // CHECK1-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP36]], align 4
 238 // CHECK1-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12
 239 // CHECK1-NEXT:    store i32 0, ptr [[TMP37]], align 4
 240 // CHECK1-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.region_id, ptr [[KERNEL_ARGS7]])
 241 // CHECK1-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
 242 // CHECK1-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
 243 // CHECK1:       omp_offload.failed8:
 244 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33(ptr [[THIS1]]) #[[ATTR2]]
 245 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT9]]
 246 // CHECK1:       omp_offload.cont9:
 247 // CHECK1-NEXT:    [[A10:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
 248 // CHECK1-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
 249 // CHECK1-NEXT:    store ptr [[THIS1]], ptr [[TMP40]], align 8
 250 // CHECK1-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
 251 // CHECK1-NEXT:    store ptr [[A10]], ptr [[TMP41]], align 8
 252 // CHECK1-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 0
 253 // CHECK1-NEXT:    store ptr null, ptr [[TMP42]], align 8
 254 // CHECK1-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
 255 // CHECK1-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
 256 // CHECK1-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0
 257 // CHECK1-NEXT:    store i32 3, ptr [[TMP45]], align 4
 258 // CHECK1-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1
 259 // CHECK1-NEXT:    store i32 1, ptr [[TMP46]], align 4
 260 // CHECK1-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2
 261 // CHECK1-NEXT:    store ptr [[TMP43]], ptr [[TMP47]], align 8
 262 // CHECK1-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3
 263 // CHECK1-NEXT:    store ptr [[TMP44]], ptr [[TMP48]], align 8
 264 // CHECK1-NEXT:    [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4
 265 // CHECK1-NEXT:    store ptr @.offload_sizes.3, ptr [[TMP49]], align 8
 266 // CHECK1-NEXT:    [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5
 267 // CHECK1-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP50]], align 8
 268 // CHECK1-NEXT:    [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6
 269 // CHECK1-NEXT:    store ptr null, ptr [[TMP51]], align 8
 270 // CHECK1-NEXT:    [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7
 271 // CHECK1-NEXT:    store ptr null, ptr [[TMP52]], align 8
 272 // CHECK1-NEXT:    [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8
 273 // CHECK1-NEXT:    store i64 123, ptr [[TMP53]], align 8
 274 // CHECK1-NEXT:    [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9
 275 // CHECK1-NEXT:    store i64 0, ptr [[TMP54]], align 8
 276 // CHECK1-NEXT:    [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10
 277 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4
 278 // CHECK1-NEXT:    [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11
 279 // CHECK1-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP56]], align 4
 280 // CHECK1-NEXT:    [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12
 281 // CHECK1-NEXT:    store i32 0, ptr [[TMP57]], align 4
 282 // CHECK1-NEXT:    [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.region_id, ptr [[KERNEL_ARGS15]])
 283 // CHECK1-NEXT:    [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0
 284 // CHECK1-NEXT:    br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
 285 // CHECK1:       omp_offload.failed16:
 286 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38(ptr [[THIS1]]) #[[ATTR2]]
 287 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
 288 // CHECK1:       omp_offload.cont17:
 289 // CHECK1-NEXT:    [[A18:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
 290 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A18]], i64 0, i64 0
 291 // CHECK1-NEXT:    [[TMP60:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
 292 // CHECK1-NEXT:    ret i32 [[TMP60]]
 293 //
 294 //
 295 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
 296 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
 297 // CHECK1-NEXT:  entry:
 298 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 299 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 300 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 301 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]])
 302 // CHECK1-NEXT:    ret void
 303 //
 304 //
 305 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined
 306 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
 307 // CHECK1-NEXT:  entry:
 308 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 309 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 310 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 311 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 312 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 313 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 314 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 315 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 316 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 317 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 318 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 319 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 320 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 321 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 322 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 323 // CHECK1-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
 324 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 325 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 326 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 327 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
 328 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 329 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 330 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
 331 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 332 // CHECK1:       cond.true:
 333 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 334 // CHECK1:       cond.false:
 335 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 336 // CHECK1-NEXT:    br label [[COND_END]]
 337 // CHECK1:       cond.end:
 338 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
 339 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 340 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 341 // CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
 342 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 343 // CHECK1:       omp.inner.for.cond:
 344 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
 345 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP6]]
 346 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
 347 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 348 // CHECK1:       omp.inner.for.body:
 349 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
 350 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
 351 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 352 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]]
 353 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
 354 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]]
 355 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
 356 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
 357 // CHECK1-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP6]]
 358 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 359 // CHECK1:       omp.body.continue:
 360 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 361 // CHECK1:       omp.inner.for.inc:
 362 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
 363 // CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
 364 // CHECK1-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
 365 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
 366 // CHECK1:       omp.inner.for.end:
 367 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 368 // CHECK1:       omp.loop.exit:
 369 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
 370 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 371 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
 372 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 373 // CHECK1:       .omp.final.then:
 374 // CHECK1-NEXT:    store i32 123, ptr [[I]], align 4
 375 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 376 // CHECK1:       .omp.final.done:
 377 // CHECK1-NEXT:    ret void
 378 //
 379 //
 380 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33
 381 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
 382 // CHECK1-NEXT:  entry:
 383 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 384 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 385 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 386 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.omp_outlined, ptr [[TMP0]])
 387 // CHECK1-NEXT:    ret void
 388 //
 389 //
 390 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.omp_outlined
 391 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
 392 // CHECK1-NEXT:  entry:
 393 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 394 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 395 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 396 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 397 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 398 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 399 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 400 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 401 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 402 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 403 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 404 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 405 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 406 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 407 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 408 // CHECK1-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
 409 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 410 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 411 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 412 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
 413 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 414 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 415 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
 416 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 417 // CHECK1:       cond.true:
 418 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 419 // CHECK1:       cond.false:
 420 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 421 // CHECK1-NEXT:    br label [[COND_END]]
 422 // CHECK1:       cond.end:
 423 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
 424 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 425 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 426 // CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
 427 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 428 // CHECK1:       omp.inner.for.cond:
 429 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]
 430 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP12]]
 431 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
 432 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 433 // CHECK1:       omp.inner.for.body:
 434 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]
 435 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
 436 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 437 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]]
 438 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
 439 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]]
 440 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
 441 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
 442 // CHECK1-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP12]]
 443 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 444 // CHECK1:       omp.body.continue:
 445 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 446 // CHECK1:       omp.inner.for.inc:
 447 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]
 448 // CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
 449 // CHECK1-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]
 450 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
 451 // CHECK1:       omp.inner.for.end:
 452 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 453 // CHECK1:       omp.loop.exit:
 454 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
 455 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 456 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
 457 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 458 // CHECK1:       .omp.final.then:
 459 // CHECK1-NEXT:    store i32 123, ptr [[I]], align 4
 460 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 461 // CHECK1:       .omp.final.done:
 462 // CHECK1-NEXT:    ret void
 463 //
 464 //
 465 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38
 466 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
 467 // CHECK1-NEXT:  entry:
 468 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 469 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 470 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 471 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.omp_outlined, ptr [[TMP0]])
 472 // CHECK1-NEXT:    ret void
 473 //
 474 //
 475 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.omp_outlined
 476 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
 477 // CHECK1-NEXT:  entry:
 478 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 479 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 480 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 481 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 482 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 483 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 484 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 485 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 486 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 487 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 488 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 489 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 490 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 491 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 492 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 493 // CHECK1-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
 494 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 495 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 496 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 497 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
 498 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61)
 499 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
 500 // CHECK1:       omp.dispatch.cond:
 501 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 502 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
 503 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 504 // CHECK1:       cond.true:
 505 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 506 // CHECK1:       cond.false:
 507 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 508 // CHECK1-NEXT:    br label [[COND_END]]
 509 // CHECK1:       cond.end:
 510 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
 511 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 512 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 513 // CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
 514 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 515 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 516 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
 517 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
 518 // CHECK1:       omp.dispatch.body:
 519 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 520 // CHECK1:       omp.inner.for.cond:
 521 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
 522 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
 523 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
 524 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 525 // CHECK1:       omp.inner.for.body:
 526 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
 527 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
 528 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 529 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]
 530 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
 531 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]
 532 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
 533 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
 534 // CHECK1-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP15]]
 535 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 536 // CHECK1:       omp.body.continue:
 537 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 538 // CHECK1:       omp.inner.for.inc:
 539 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
 540 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
 541 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
 542 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
 543 // CHECK1:       omp.inner.for.end:
 544 // CHECK1-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
 545 // CHECK1:       omp.dispatch.inc:
 546 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 547 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 548 // CHECK1-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
 549 // CHECK1-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
 550 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 551 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 552 // CHECK1-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
 553 // CHECK1-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
 554 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND]]
 555 // CHECK1:       omp.dispatch.end:
 556 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
 557 // CHECK1-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 558 // CHECK1-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
 559 // CHECK1-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 560 // CHECK1:       .omp.final.then:
 561 // CHECK1-NEXT:    store i32 123, ptr [[I]], align 4
 562 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 563 // CHECK1:       .omp.final.done:
 564 // CHECK1-NEXT:    ret void
 565 //
 566 //
 567 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv
 568 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
 569 // CHECK3-NEXT:  entry:
 570 // CHECK3-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
 571 // CHECK3-NEXT:    [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])
 572 // CHECK3-NEXT:    ret i32 [[CALL]]
 573 //
 574 //
 575 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
 576 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
 577 // CHECK3-NEXT:  entry:
 578 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
 579 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
 580 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
 581 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
 582 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 583 // CHECK3-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
 584 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 4
 585 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 4
 586 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 4
 587 // CHECK3-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
 588 // CHECK3-NEXT:    [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
 589 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 4
 590 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 4
 591 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 4
 592 // CHECK3-NEXT:    [[_TMP14:%.*]] = alloca i32, align 4
 593 // CHECK3-NEXT:    [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
 594 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
 595 // CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
 596 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0
 597 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 598 // CHECK3-NEXT:    store ptr [[THIS1]], ptr [[TMP0]], align 4
 599 // CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 600 // CHECK3-NEXT:    store ptr [[A]], ptr [[TMP1]], align 4
 601 // CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
 602 // CHECK3-NEXT:    store ptr null, ptr [[TMP2]], align 4
 603 // CHECK3-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 604 // CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 605 // CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
 606 // CHECK3-NEXT:    store i32 3, ptr [[TMP5]], align 4
 607 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
 608 // CHECK3-NEXT:    store i32 1, ptr [[TMP6]], align 4
 609 // CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
 610 // CHECK3-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 4
 611 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
 612 // CHECK3-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 4
 613 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
 614 // CHECK3-NEXT:    store ptr @.offload_sizes, ptr [[TMP9]], align 4
 615 // CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
 616 // CHECK3-NEXT:    store ptr @.offload_maptypes, ptr [[TMP10]], align 4
 617 // CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
 618 // CHECK3-NEXT:    store ptr null, ptr [[TMP11]], align 4
 619 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
 620 // CHECK3-NEXT:    store ptr null, ptr [[TMP12]], align 4
 621 // CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
 622 // CHECK3-NEXT:    store i64 123, ptr [[TMP13]], align 8
 623 // CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
 624 // CHECK3-NEXT:    store i64 0, ptr [[TMP14]], align 8
 625 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
 626 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
 627 // CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
 628 // CHECK3-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP16]], align 4
 629 // CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
 630 // CHECK3-NEXT:    store i32 0, ptr [[TMP17]], align 4
 631 // CHECK3-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]])
 632 // CHECK3-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
 633 // CHECK3-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 634 // CHECK3:       omp_offload.failed:
 635 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR2:[0-9]+]]
 636 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 637 // CHECK3:       omp_offload.cont:
 638 // CHECK3-NEXT:    [[A2:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
 639 // CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
 640 // CHECK3-NEXT:    store ptr [[THIS1]], ptr [[TMP20]], align 4
 641 // CHECK3-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
 642 // CHECK3-NEXT:    store ptr [[A2]], ptr [[TMP21]], align 4
 643 // CHECK3-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
 644 // CHECK3-NEXT:    store ptr null, ptr [[TMP22]], align 4
 645 // CHECK3-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
 646 // CHECK3-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
 647 // CHECK3-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0
 648 // CHECK3-NEXT:    store i32 3, ptr [[TMP25]], align 4
 649 // CHECK3-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1
 650 // CHECK3-NEXT:    store i32 1, ptr [[TMP26]], align 4
 651 // CHECK3-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2
 652 // CHECK3-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 4
 653 // CHECK3-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3
 654 // CHECK3-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 4
 655 // CHECK3-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4
 656 // CHECK3-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP29]], align 4
 657 // CHECK3-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5
 658 // CHECK3-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP30]], align 4
 659 // CHECK3-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6
 660 // CHECK3-NEXT:    store ptr null, ptr [[TMP31]], align 4
 661 // CHECK3-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7
 662 // CHECK3-NEXT:    store ptr null, ptr [[TMP32]], align 4
 663 // CHECK3-NEXT:    [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8
 664 // CHECK3-NEXT:    store i64 123, ptr [[TMP33]], align 8
 665 // CHECK3-NEXT:    [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9
 666 // CHECK3-NEXT:    store i64 0, ptr [[TMP34]], align 8
 667 // CHECK3-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10
 668 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
 669 // CHECK3-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11
 670 // CHECK3-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP36]], align 4
 671 // CHECK3-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12
 672 // CHECK3-NEXT:    store i32 0, ptr [[TMP37]], align 4
 673 // CHECK3-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.region_id, ptr [[KERNEL_ARGS7]])
 674 // CHECK3-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
 675 // CHECK3-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
 676 // CHECK3:       omp_offload.failed8:
 677 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33(ptr [[THIS1]]) #[[ATTR2]]
 678 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT9]]
 679 // CHECK3:       omp_offload.cont9:
 680 // CHECK3-NEXT:    [[A10:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
 681 // CHECK3-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
 682 // CHECK3-NEXT:    store ptr [[THIS1]], ptr [[TMP40]], align 4
 683 // CHECK3-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
 684 // CHECK3-NEXT:    store ptr [[A10]], ptr [[TMP41]], align 4
 685 // CHECK3-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i32 0, i32 0
 686 // CHECK3-NEXT:    store ptr null, ptr [[TMP42]], align 4
 687 // CHECK3-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
 688 // CHECK3-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
 689 // CHECK3-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0
 690 // CHECK3-NEXT:    store i32 3, ptr [[TMP45]], align 4
 691 // CHECK3-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1
 692 // CHECK3-NEXT:    store i32 1, ptr [[TMP46]], align 4
 693 // CHECK3-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2
 694 // CHECK3-NEXT:    store ptr [[TMP43]], ptr [[TMP47]], align 4
 695 // CHECK3-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3
 696 // CHECK3-NEXT:    store ptr [[TMP44]], ptr [[TMP48]], align 4
 697 // CHECK3-NEXT:    [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4
 698 // CHECK3-NEXT:    store ptr @.offload_sizes.3, ptr [[TMP49]], align 4
 699 // CHECK3-NEXT:    [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5
 700 // CHECK3-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP50]], align 4
 701 // CHECK3-NEXT:    [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6
 702 // CHECK3-NEXT:    store ptr null, ptr [[TMP51]], align 4
 703 // CHECK3-NEXT:    [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7
 704 // CHECK3-NEXT:    store ptr null, ptr [[TMP52]], align 4
 705 // CHECK3-NEXT:    [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8
 706 // CHECK3-NEXT:    store i64 123, ptr [[TMP53]], align 8
 707 // CHECK3-NEXT:    [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9
 708 // CHECK3-NEXT:    store i64 0, ptr [[TMP54]], align 8
 709 // CHECK3-NEXT:    [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10
 710 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4
 711 // CHECK3-NEXT:    [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11
 712 // CHECK3-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP56]], align 4
 713 // CHECK3-NEXT:    [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12
 714 // CHECK3-NEXT:    store i32 0, ptr [[TMP57]], align 4
 715 // CHECK3-NEXT:    [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.region_id, ptr [[KERNEL_ARGS15]])
 716 // CHECK3-NEXT:    [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0
 717 // CHECK3-NEXT:    br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
 718 // CHECK3:       omp_offload.failed16:
 719 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38(ptr [[THIS1]]) #[[ATTR2]]
 720 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
 721 // CHECK3:       omp_offload.cont17:
 722 // CHECK3-NEXT:    [[A18:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
 723 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A18]], i32 0, i32 0
 724 // CHECK3-NEXT:    [[TMP60:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
 725 // CHECK3-NEXT:    ret i32 [[TMP60]]
 726 //
 727 //
 728 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
 729 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
 730 // CHECK3-NEXT:  entry:
 731 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
 732 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
 733 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
 734 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]])
 735 // CHECK3-NEXT:    ret void
 736 //
 737 //
 738 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined
 739 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
 740 // CHECK3-NEXT:  entry:
 741 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
 742 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
 743 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
 744 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 745 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 746 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 747 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 748 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 749 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 750 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
 751 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
 752 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
 753 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
 754 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
 755 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 756 // CHECK3-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
 757 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 758 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 759 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
 760 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
 761 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 762 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 763 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
 764 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 765 // CHECK3:       cond.true:
 766 // CHECK3-NEXT:    br label [[COND_END:%.*]]
 767 // CHECK3:       cond.false:
 768 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 769 // CHECK3-NEXT:    br label [[COND_END]]
 770 // CHECK3:       cond.end:
 771 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
 772 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 773 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 774 // CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
 775 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 776 // CHECK3:       omp.inner.for.cond:
 777 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]]
 778 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP7]]
 779 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
 780 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 781 // CHECK3:       omp.inner.for.body:
 782 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]
 783 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
 784 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 785 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]]
 786 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
 787 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]]
 788 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP9]]
 789 // CHECK3-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP7]]
 790 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 791 // CHECK3:       omp.body.continue:
 792 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 793 // CHECK3:       omp.inner.for.inc:
 794 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]
 795 // CHECK3-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
 796 // CHECK3-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]
 797 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
 798 // CHECK3:       omp.inner.for.end:
 799 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 800 // CHECK3:       omp.loop.exit:
 801 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
 802 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 803 // CHECK3-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
 804 // CHECK3-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 805 // CHECK3:       .omp.final.then:
 806 // CHECK3-NEXT:    store i32 123, ptr [[I]], align 4
 807 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 808 // CHECK3:       .omp.final.done:
 809 // CHECK3-NEXT:    ret void
 810 //
 811 //
 812 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33
 813 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
 814 // CHECK3-NEXT:  entry:
 815 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
 816 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
 817 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
 818 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.omp_outlined, ptr [[TMP0]])
 819 // CHECK3-NEXT:    ret void
 820 //
 821 //
 822 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l33.omp_outlined
 823 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
 824 // CHECK3-NEXT:  entry:
 825 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
 826 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
 827 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
 828 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 829 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 830 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 831 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 832 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 833 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 834 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
 835 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
 836 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
 837 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
 838 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
 839 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 840 // CHECK3-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
 841 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 842 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 843 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
 844 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
 845 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 846 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 847 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
 848 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 849 // CHECK3:       cond.true:
 850 // CHECK3-NEXT:    br label [[COND_END:%.*]]
 851 // CHECK3:       cond.false:
 852 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 853 // CHECK3-NEXT:    br label [[COND_END]]
 854 // CHECK3:       cond.end:
 855 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
 856 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 857 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 858 // CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
 859 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 860 // CHECK3:       omp.inner.for.cond:
 861 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]
 862 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]]
 863 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
 864 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 865 // CHECK3:       omp.inner.for.body:
 866 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
 867 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
 868 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 869 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]]
 870 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
 871 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]]
 872 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP9]]
 873 // CHECK3-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP13]]
 874 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 875 // CHECK3:       omp.body.continue:
 876 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 877 // CHECK3:       omp.inner.for.inc:
 878 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
 879 // CHECK3-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
 880 // CHECK3-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
 881 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
 882 // CHECK3:       omp.inner.for.end:
 883 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 884 // CHECK3:       omp.loop.exit:
 885 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
 886 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 887 // CHECK3-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
 888 // CHECK3-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 889 // CHECK3:       .omp.final.then:
 890 // CHECK3-NEXT:    store i32 123, ptr [[I]], align 4
 891 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 892 // CHECK3:       .omp.final.done:
 893 // CHECK3-NEXT:    ret void
 894 //
 895 //
 896 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38
 897 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
 898 // CHECK3-NEXT:  entry:
 899 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
 900 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
 901 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
 902 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.omp_outlined, ptr [[TMP0]])
 903 // CHECK3-NEXT:    ret void
 904 //
 905 //
 906 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l38.omp_outlined
 907 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
 908 // CHECK3-NEXT:  entry:
 909 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
 910 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
 911 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
 912 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 913 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 914 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 915 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 916 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 917 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 918 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
 919 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
 920 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
 921 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
 922 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
 923 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 924 // CHECK3-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
 925 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 926 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 927 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
 928 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
 929 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61)
 930 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
 931 // CHECK3:       omp.dispatch.cond:
 932 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 933 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
 934 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 935 // CHECK3:       cond.true:
 936 // CHECK3-NEXT:    br label [[COND_END:%.*]]
 937 // CHECK3:       cond.false:
 938 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 939 // CHECK3-NEXT:    br label [[COND_END]]
 940 // CHECK3:       cond.end:
 941 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
 942 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 943 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 944 // CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
 945 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 946 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 947 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
 948 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
 949 // CHECK3:       omp.dispatch.body:
 950 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 951 // CHECK3:       omp.inner.for.cond:
 952 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]]
 953 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP16]]
 954 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
 955 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 956 // CHECK3:       omp.inner.for.body:
 957 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]
 958 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
 959 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 960 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP16]]
 961 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
 962 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP16]]
 963 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP11]]
 964 // CHECK3-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP16]]
 965 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 966 // CHECK3:       omp.body.continue:
 967 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 968 // CHECK3:       omp.inner.for.inc:
 969 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]
 970 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
 971 // CHECK3-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]
 972 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
 973 // CHECK3:       omp.inner.for.end:
 974 // CHECK3-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
 975 // CHECK3:       omp.dispatch.inc:
 976 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 977 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 978 // CHECK3-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
 979 // CHECK3-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
 980 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 981 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 982 // CHECK3-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
 983 // CHECK3-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
 984 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND]]
 985 // CHECK3:       omp.dispatch.end:
 986 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
 987 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 988 // CHECK3-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
 989 // CHECK3-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 990 // CHECK3:       .omp.final.then:
 991 // CHECK3-NEXT:    store i32 123, ptr [[I]], align 4
 992 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 993 // CHECK3:       .omp.final.done:
 994 // CHECK3-NEXT:    ret void
 995 //
 996 //
 997 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv
 998 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
 999 // CHECK5-NEXT:  entry:
1000 // CHECK5-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
1001 // CHECK5-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])
1002 // CHECK5-NEXT:    ret i32 [[CALL]]
1003 //
1004 //
1005 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
1006 // CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat {
1007 // CHECK5-NEXT:  entry:
1008 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1009 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1010 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1011 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1012 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1013 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
1014 // CHECK5-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4
1015 // CHECK5-NEXT:    [[DOTOMP_LB4:%.*]] = alloca i32, align 4
1016 // CHECK5-NEXT:    [[DOTOMP_UB5:%.*]] = alloca i32, align 4
1017 // CHECK5-NEXT:    [[DOTOMP_IV6:%.*]] = alloca i32, align 4
1018 // CHECK5-NEXT:    [[I7:%.*]] = alloca i32, align 4
1019 // CHECK5-NEXT:    [[_TMP20:%.*]] = alloca i32, align 4
1020 // CHECK5-NEXT:    [[DOTOMP_LB21:%.*]] = alloca i32, align 4
1021 // CHECK5-NEXT:    [[DOTOMP_UB22:%.*]] = alloca i32, align 4
1022 // CHECK5-NEXT:    [[DOTOMP_IV23:%.*]] = alloca i32, align 4
1023 // CHECK5-NEXT:    [[I24:%.*]] = alloca i32, align 4
1024 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1025 // CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1026 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1027 // CHECK5-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
1028 // CHECK5-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1029 // CHECK5-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
1030 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1031 // CHECK5:       omp.inner.for.cond:
1032 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
1033 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]
1034 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
1035 // CHECK5-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1036 // CHECK5:       omp.inner.for.body:
1037 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
1038 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
1039 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1040 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
1041 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0
1042 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
1043 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64
1044 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
1045 // CHECK5-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]]
1046 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1047 // CHECK5:       omp.body.continue:
1048 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1049 // CHECK5:       omp.inner.for.inc:
1050 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
1051 // CHECK5-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1
1052 // CHECK5-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
1053 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
1054 // CHECK5:       omp.inner.for.end:
1055 // CHECK5-NEXT:    store i32 123, ptr [[I]], align 4
1056 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB4]], align 4
1057 // CHECK5-NEXT:    store i32 122, ptr [[DOTOMP_UB5]], align 4
1058 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB4]], align 4
1059 // CHECK5-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV6]], align 4
1060 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND8:%.*]]
1061 // CHECK5:       omp.inner.for.cond8:
1062 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
1063 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB5]], align 4, !llvm.access.group [[ACC_GRP6]]
1064 // CHECK5-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1065 // CHECK5-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END19:%.*]]
1066 // CHECK5:       omp.inner.for.body10:
1067 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6]]
1068 // CHECK5-NEXT:    [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1
1069 // CHECK5-NEXT:    [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
1070 // CHECK5-NEXT:    store i32 [[ADD12]], ptr [[I7]], align 4, !llvm.access.group [[ACC_GRP6]]
1071 // CHECK5-NEXT:    [[A13:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
1072 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[I7]], align 4, !llvm.access.group [[ACC_GRP6]]
1073 // CHECK5-NEXT:    [[IDXPROM14:%.*]] = sext i32 [[TMP10]] to i64
1074 // CHECK5-NEXT:    [[ARRAYIDX15:%.*]] = getelementptr inbounds [123 x i32], ptr [[A13]], i64 0, i64 [[IDXPROM14]]
1075 // CHECK5-NEXT:    store i32 0, ptr [[ARRAYIDX15]], align 4, !llvm.access.group [[ACC_GRP6]]
1076 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE16:%.*]]
1077 // CHECK5:       omp.body.continue16:
1078 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC17:%.*]]
1079 // CHECK5:       omp.inner.for.inc17:
1080 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6]]
1081 // CHECK5-NEXT:    [[ADD18:%.*]] = add nsw i32 [[TMP11]], 1
1082 // CHECK5-NEXT:    store i32 [[ADD18]], ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP6]]
1083 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP7:![0-9]+]]
1084 // CHECK5:       omp.inner.for.end19:
1085 // CHECK5-NEXT:    store i32 123, ptr [[I7]], align 4
1086 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB21]], align 4
1087 // CHECK5-NEXT:    store i32 122, ptr [[DOTOMP_UB22]], align 4
1088 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB21]], align 4
1089 // CHECK5-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV23]], align 4
1090 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND25:%.*]]
1091 // CHECK5:       omp.inner.for.cond25:
1092 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
1093 // CHECK5-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB22]], align 4, !llvm.access.group [[ACC_GRP9]]
1094 // CHECK5-NEXT:    [[CMP26:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
1095 // CHECK5-NEXT:    br i1 [[CMP26]], label [[OMP_INNER_FOR_BODY27:%.*]], label [[OMP_INNER_FOR_END36:%.*]]
1096 // CHECK5:       omp.inner.for.body27:
1097 // CHECK5-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 4, !llvm.access.group [[ACC_GRP9]]
1098 // CHECK5-NEXT:    [[MUL28:%.*]] = mul nsw i32 [[TMP15]], 1
1099 // CHECK5-NEXT:    [[ADD29:%.*]] = add nsw i32 0, [[MUL28]]
1100 // CHECK5-NEXT:    store i32 [[ADD29]], ptr [[I24]], align 4, !llvm.access.group [[ACC_GRP9]]
1101 // CHECK5-NEXT:    [[A30:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
1102 // CHECK5-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I24]], align 4, !llvm.access.group [[ACC_GRP9]]
1103 // CHECK5-NEXT:    [[IDXPROM31:%.*]] = sext i32 [[TMP16]] to i64
1104 // CHECK5-NEXT:    [[ARRAYIDX32:%.*]] = getelementptr inbounds [123 x i32], ptr [[A30]], i64 0, i64 [[IDXPROM31]]
1105 // CHECK5-NEXT:    store i32 0, ptr [[ARRAYIDX32]], align 4, !llvm.access.group [[ACC_GRP9]]
1106 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE33:%.*]]
1107 // CHECK5:       omp.body.continue33:
1108 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC34:%.*]]
1109 // CHECK5:       omp.inner.for.inc34:
1110 // CHECK5-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV23]], align 4, !llvm.access.group [[ACC_GRP9]]
1111 // CHECK5-NEXT:    [[ADD35:%.*]] = add nsw i32 [[TMP17]], 1
1112 // CHECK5-NEXT:    store i32 [[ADD35]], ptr [[DOTOMP_IV23]], align 4, !llvm.access.group [[ACC_GRP9]]
1113 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND25]], !llvm.loop [[LOOP10:![0-9]+]]
1114 // CHECK5:       omp.inner.for.end36:
1115 // CHECK5-NEXT:    store i32 123, ptr [[I24]], align 4
1116 // CHECK5-NEXT:    [[A37:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
1117 // CHECK5-NEXT:    [[ARRAYIDX38:%.*]] = getelementptr inbounds [123 x i32], ptr [[A37]], i64 0, i64 0
1118 // CHECK5-NEXT:    [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX38]], align 4
1119 // CHECK5-NEXT:    ret i32 [[TMP18]]
1120 //
1121 //
1122 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv
1123 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
1124 // CHECK7-NEXT:  entry:
1125 // CHECK7-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
1126 // CHECK7-NEXT:    [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])
1127 // CHECK7-NEXT:    ret i32 [[CALL]]
1128 //
1129 //
1130 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
1131 // CHECK7-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
1132 // CHECK7-NEXT:  entry:
1133 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1134 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1135 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1136 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1137 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1138 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
1139 // CHECK7-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4
1140 // CHECK7-NEXT:    [[DOTOMP_LB4:%.*]] = alloca i32, align 4
1141 // CHECK7-NEXT:    [[DOTOMP_UB5:%.*]] = alloca i32, align 4
1142 // CHECK7-NEXT:    [[DOTOMP_IV6:%.*]] = alloca i32, align 4
1143 // CHECK7-NEXT:    [[I7:%.*]] = alloca i32, align 4
1144 // CHECK7-NEXT:    [[_TMP19:%.*]] = alloca i32, align 4
1145 // CHECK7-NEXT:    [[DOTOMP_LB20:%.*]] = alloca i32, align 4
1146 // CHECK7-NEXT:    [[DOTOMP_UB21:%.*]] = alloca i32, align 4
1147 // CHECK7-NEXT:    [[DOTOMP_IV22:%.*]] = alloca i32, align 4
1148 // CHECK7-NEXT:    [[I23:%.*]] = alloca i32, align 4
1149 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1150 // CHECK7-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1151 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1152 // CHECK7-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
1153 // CHECK7-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1154 // CHECK7-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
1155 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1156 // CHECK7:       omp.inner.for.cond:
1157 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]]
1158 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]]
1159 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
1160 // CHECK7-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1161 // CHECK7:       omp.inner.for.body:
1162 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]
1163 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
1164 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1165 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]
1166 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0
1167 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]
1168 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP4]]
1169 // CHECK7-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP3]]
1170 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1171 // CHECK7:       omp.body.continue:
1172 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1173 // CHECK7:       omp.inner.for.inc:
1174 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]
1175 // CHECK7-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP5]], 1
1176 // CHECK7-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]
1177 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
1178 // CHECK7:       omp.inner.for.end:
1179 // CHECK7-NEXT:    store i32 123, ptr [[I]], align 4
1180 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB4]], align 4
1181 // CHECK7-NEXT:    store i32 122, ptr [[DOTOMP_UB5]], align 4
1182 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB4]], align 4
1183 // CHECK7-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV6]], align 4
1184 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND8:%.*]]
1185 // CHECK7:       omp.inner.for.cond8:
1186 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]]
1187 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB5]], align 4, !llvm.access.group [[ACC_GRP7]]
1188 // CHECK7-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1189 // CHECK7-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY10:%.*]], label [[OMP_INNER_FOR_END18:%.*]]
1190 // CHECK7:       omp.inner.for.body10:
1191 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP7]]
1192 // CHECK7-NEXT:    [[MUL11:%.*]] = mul nsw i32 [[TMP9]], 1
1193 // CHECK7-NEXT:    [[ADD12:%.*]] = add nsw i32 0, [[MUL11]]
1194 // CHECK7-NEXT:    store i32 [[ADD12]], ptr [[I7]], align 4, !llvm.access.group [[ACC_GRP7]]
1195 // CHECK7-NEXT:    [[A13:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
1196 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[I7]], align 4, !llvm.access.group [[ACC_GRP7]]
1197 // CHECK7-NEXT:    [[ARRAYIDX14:%.*]] = getelementptr inbounds [123 x i32], ptr [[A13]], i32 0, i32 [[TMP10]]
1198 // CHECK7-NEXT:    store i32 0, ptr [[ARRAYIDX14]], align 4, !llvm.access.group [[ACC_GRP7]]
1199 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE15:%.*]]
1200 // CHECK7:       omp.body.continue15:
1201 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC16:%.*]]
1202 // CHECK7:       omp.inner.for.inc16:
1203 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP7]]
1204 // CHECK7-NEXT:    [[ADD17:%.*]] = add nsw i32 [[TMP11]], 1
1205 // CHECK7-NEXT:    store i32 [[ADD17]], ptr [[DOTOMP_IV6]], align 4, !llvm.access.group [[ACC_GRP7]]
1206 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND8]], !llvm.loop [[LOOP8:![0-9]+]]
1207 // CHECK7:       omp.inner.for.end18:
1208 // CHECK7-NEXT:    store i32 123, ptr [[I7]], align 4
1209 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB20]], align 4
1210 // CHECK7-NEXT:    store i32 122, ptr [[DOTOMP_UB21]], align 4
1211 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB20]], align 4
1212 // CHECK7-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV22]], align 4
1213 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND24:%.*]]
1214 // CHECK7:       omp.inner.for.cond24:
1215 // CHECK7-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV22]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]
1216 // CHECK7-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB21]], align 4, !llvm.access.group [[ACC_GRP10]]
1217 // CHECK7-NEXT:    [[CMP25:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
1218 // CHECK7-NEXT:    br i1 [[CMP25]], label [[OMP_INNER_FOR_BODY26:%.*]], label [[OMP_INNER_FOR_END34:%.*]]
1219 // CHECK7:       omp.inner.for.body26:
1220 // CHECK7-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV22]], align 4, !llvm.access.group [[ACC_GRP10]]
1221 // CHECK7-NEXT:    [[MUL27:%.*]] = mul nsw i32 [[TMP15]], 1
1222 // CHECK7-NEXT:    [[ADD28:%.*]] = add nsw i32 0, [[MUL27]]
1223 // CHECK7-NEXT:    store i32 [[ADD28]], ptr [[I23]], align 4, !llvm.access.group [[ACC_GRP10]]
1224 // CHECK7-NEXT:    [[A29:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
1225 // CHECK7-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I23]], align 4, !llvm.access.group [[ACC_GRP10]]
1226 // CHECK7-NEXT:    [[ARRAYIDX30:%.*]] = getelementptr inbounds [123 x i32], ptr [[A29]], i32 0, i32 [[TMP16]]
1227 // CHECK7-NEXT:    store i32 0, ptr [[ARRAYIDX30]], align 4, !llvm.access.group [[ACC_GRP10]]
1228 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE31:%.*]]
1229 // CHECK7:       omp.body.continue31:
1230 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC32:%.*]]
1231 // CHECK7:       omp.inner.for.inc32:
1232 // CHECK7-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV22]], align 4, !llvm.access.group [[ACC_GRP10]]
1233 // CHECK7-NEXT:    [[ADD33:%.*]] = add nsw i32 [[TMP17]], 1
1234 // CHECK7-NEXT:    store i32 [[ADD33]], ptr [[DOTOMP_IV22]], align 4, !llvm.access.group [[ACC_GRP10]]
1235 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND24]], !llvm.loop [[LOOP11:![0-9]+]]
1236 // CHECK7:       omp.inner.for.end34:
1237 // CHECK7-NEXT:    store i32 123, ptr [[I23]], align 4
1238 // CHECK7-NEXT:    [[A35:%.*]] = getelementptr inbounds nuw [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
1239 // CHECK7-NEXT:    [[ARRAYIDX36:%.*]] = getelementptr inbounds [123 x i32], ptr [[A35]], i32 0, i32 0
1240 // CHECK7-NEXT:    [[TMP18:%.*]] = load i32, ptr [[ARRAYIDX36]], align 4
1241 // CHECK7-NEXT:    ret i32 [[TMP18]]
1242 //
1243 //
1244 // CHECK9-LABEL: define {{[^@]+}}@main
1245 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
1246 // CHECK9-NEXT:  entry:
1247 // CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1248 // CHECK9-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
1249 // CHECK9-NEXT:    [[ARGV_ADDR:%.*]] = alloca ptr, align 8
1250 // CHECK9-NEXT:    [[N:%.*]] = alloca i32, align 4
1251 // CHECK9-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 8
1252 // CHECK9-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
1253 // CHECK9-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
1254 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 8
1255 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 8
1256 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 8
1257 // CHECK9-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
1258 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1259 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1260 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1261 // CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1262 // CHECK9-NEXT:    [[N_CASTED3:%.*]] = alloca i64, align 8
1263 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 8
1264 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 8
1265 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 8
1266 // CHECK9-NEXT:    [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 8
1267 // CHECK9-NEXT:    [[_TMP8:%.*]] = alloca i32, align 4
1268 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
1269 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
1270 // CHECK9-NEXT:    [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1271 // CHECK9-NEXT:    [[N_CASTED18:%.*]] = alloca i64, align 8
1272 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [3 x ptr], align 8
1273 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS20:%.*]] = alloca [3 x ptr], align 8
1274 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [3 x ptr], align 8
1275 // CHECK9-NEXT:    [[DOTOFFLOAD_SIZES22:%.*]] = alloca [3 x i64], align 8
1276 // CHECK9-NEXT:    [[_TMP23:%.*]] = alloca i32, align 4
1277 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
1278 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
1279 // CHECK9-NEXT:    [[KERNEL_ARGS30:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1280 // CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 4
1281 // CHECK9-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
1282 // CHECK9-NEXT:    store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8
1283 // CHECK9-NEXT:    store i32 100, ptr [[N]], align 4
1284 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 4
1285 // CHECK9-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
1286 // CHECK9-NEXT:    [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()
1287 // CHECK9-NEXT:    store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8
1288 // CHECK9-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
1289 // CHECK9-NEXT:    store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8
1290 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N]], align 4
1291 // CHECK9-NEXT:    store i32 [[TMP3]], ptr [[N_CASTED]], align 4
1292 // CHECK9-NEXT:    [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 8
1293 // CHECK9-NEXT:    [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
1294 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 24, i1 false)
1295 // CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1296 // CHECK9-NEXT:    store i64 [[TMP4]], ptr [[TMP6]], align 8
1297 // CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1298 // CHECK9-NEXT:    store i64 [[TMP4]], ptr [[TMP7]], align 8
1299 // CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1300 // CHECK9-NEXT:    store ptr null, ptr [[TMP8]], align 8
1301 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1302 // CHECK9-NEXT:    store i64 [[TMP1]], ptr [[TMP9]], align 8
1303 // CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1304 // CHECK9-NEXT:    store i64 [[TMP1]], ptr [[TMP10]], align 8
1305 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1306 // CHECK9-NEXT:    store ptr null, ptr [[TMP11]], align 8
1307 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1308 // CHECK9-NEXT:    store ptr [[VLA]], ptr [[TMP12]], align 8
1309 // CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1310 // CHECK9-NEXT:    store ptr [[VLA]], ptr [[TMP13]], align 8
1311 // CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 2
1312 // CHECK9-NEXT:    store i64 [[TMP5]], ptr [[TMP14]], align 8
1313 // CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1314 // CHECK9-NEXT:    store ptr null, ptr [[TMP15]], align 8
1315 // CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1316 // CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1317 // CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0
1318 // CHECK9-NEXT:    [[TMP19:%.*]] = load i32, ptr [[N]], align 4
1319 // CHECK9-NEXT:    store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 4
1320 // CHECK9-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1321 // CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0
1322 // CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1323 // CHECK9-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1324 // CHECK9-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1325 // CHECK9-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1326 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], 1
1327 // CHECK9-NEXT:    [[TMP22:%.*]] = zext i32 [[ADD]] to i64
1328 // CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1329 // CHECK9-NEXT:    store i32 3, ptr [[TMP23]], align 4
1330 // CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1331 // CHECK9-NEXT:    store i32 3, ptr [[TMP24]], align 4
1332 // CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1333 // CHECK9-NEXT:    store ptr [[TMP16]], ptr [[TMP25]], align 8
1334 // CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1335 // CHECK9-NEXT:    store ptr [[TMP17]], ptr [[TMP26]], align 8
1336 // CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1337 // CHECK9-NEXT:    store ptr [[TMP18]], ptr [[TMP27]], align 8
1338 // CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1339 // CHECK9-NEXT:    store ptr @.offload_maptypes, ptr [[TMP28]], align 8
1340 // CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1341 // CHECK9-NEXT:    store ptr null, ptr [[TMP29]], align 8
1342 // CHECK9-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1343 // CHECK9-NEXT:    store ptr null, ptr [[TMP30]], align 8
1344 // CHECK9-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1345 // CHECK9-NEXT:    store i64 [[TMP22]], ptr [[TMP31]], align 8
1346 // CHECK9-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1347 // CHECK9-NEXT:    store i64 0, ptr [[TMP32]], align 8
1348 // CHECK9-NEXT:    [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1349 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4
1350 // CHECK9-NEXT:    [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1351 // CHECK9-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP34]], align 4
1352 // CHECK9-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1353 // CHECK9-NEXT:    store i32 0, ptr [[TMP35]], align 4
1354 // CHECK9-NEXT:    [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100.region_id, ptr [[KERNEL_ARGS]])
1355 // CHECK9-NEXT:    [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
1356 // CHECK9-NEXT:    br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1357 // CHECK9:       omp_offload.failed:
1358 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100(i64 [[TMP4]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3:[0-9]+]]
1359 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1360 // CHECK9:       omp_offload.cont:
1361 // CHECK9-NEXT:    [[TMP38:%.*]] = load i32, ptr [[N]], align 4
1362 // CHECK9-NEXT:    store i32 [[TMP38]], ptr [[N_CASTED3]], align 4
1363 // CHECK9-NEXT:    [[TMP39:%.*]] = load i64, ptr [[N_CASTED3]], align 8
1364 // CHECK9-NEXT:    [[TMP40:%.*]] = mul nuw i64 [[TMP1]], 4
1365 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES7]], ptr align 8 @.offload_sizes.1, i64 24, i1 false)
1366 // CHECK9-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
1367 // CHECK9-NEXT:    store i64 [[TMP39]], ptr [[TMP41]], align 8
1368 // CHECK9-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
1369 // CHECK9-NEXT:    store i64 [[TMP39]], ptr [[TMP42]], align 8
1370 // CHECK9-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0
1371 // CHECK9-NEXT:    store ptr null, ptr [[TMP43]], align 8
1372 // CHECK9-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
1373 // CHECK9-NEXT:    store i64 [[TMP1]], ptr [[TMP44]], align 8
1374 // CHECK9-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
1375 // CHECK9-NEXT:    store i64 [[TMP1]], ptr [[TMP45]], align 8
1376 // CHECK9-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 1
1377 // CHECK9-NEXT:    store ptr null, ptr [[TMP46]], align 8
1378 // CHECK9-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
1379 // CHECK9-NEXT:    store ptr [[VLA]], ptr [[TMP47]], align 8
1380 // CHECK9-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
1381 // CHECK9-NEXT:    store ptr [[VLA]], ptr [[TMP48]], align 8
1382 // CHECK9-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
1383 // CHECK9-NEXT:    store i64 [[TMP40]], ptr [[TMP49]], align 8
1384 // CHECK9-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 2
1385 // CHECK9-NEXT:    store ptr null, ptr [[TMP50]], align 8
1386 // CHECK9-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
1387 // CHECK9-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
1388 // CHECK9-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
1389 // CHECK9-NEXT:    [[TMP54:%.*]] = load i32, ptr [[N]], align 4
1390 // CHECK9-NEXT:    store i32 [[TMP54]], ptr [[DOTCAPTURE_EXPR_9]], align 4
1391 // CHECK9-NEXT:    [[TMP55:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4
1392 // CHECK9-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP55]], 0
1393 // CHECK9-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
1394 // CHECK9-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
1395 // CHECK9-NEXT:    store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 4
1396 // CHECK9-NEXT:    [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 4
1397 // CHECK9-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP56]], 1
1398 // CHECK9-NEXT:    [[TMP57:%.*]] = zext i32 [[ADD14]] to i64
1399 // CHECK9-NEXT:    [[TMP58:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0
1400 // CHECK9-NEXT:    store i32 3, ptr [[TMP58]], align 4
1401 // CHECK9-NEXT:    [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1
1402 // CHECK9-NEXT:    store i32 3, ptr [[TMP59]], align 4
1403 // CHECK9-NEXT:    [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2
1404 // CHECK9-NEXT:    store ptr [[TMP51]], ptr [[TMP60]], align 8
1405 // CHECK9-NEXT:    [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3
1406 // CHECK9-NEXT:    store ptr [[TMP52]], ptr [[TMP61]], align 8
1407 // CHECK9-NEXT:    [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4
1408 // CHECK9-NEXT:    store ptr [[TMP53]], ptr [[TMP62]], align 8
1409 // CHECK9-NEXT:    [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5
1410 // CHECK9-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP63]], align 8
1411 // CHECK9-NEXT:    [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6
1412 // CHECK9-NEXT:    store ptr null, ptr [[TMP64]], align 8
1413 // CHECK9-NEXT:    [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7
1414 // CHECK9-NEXT:    store ptr null, ptr [[TMP65]], align 8
1415 // CHECK9-NEXT:    [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8
1416 // CHECK9-NEXT:    store i64 [[TMP57]], ptr [[TMP66]], align 8
1417 // CHECK9-NEXT:    [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9
1418 // CHECK9-NEXT:    store i64 0, ptr [[TMP67]], align 8
1419 // CHECK9-NEXT:    [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10
1420 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP68]], align 4
1421 // CHECK9-NEXT:    [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11
1422 // CHECK9-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP69]], align 4
1423 // CHECK9-NEXT:    [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12
1424 // CHECK9-NEXT:    store i32 0, ptr [[TMP70]], align 4
1425 // CHECK9-NEXT:    [[TMP71:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.region_id, ptr [[KERNEL_ARGS15]])
1426 // CHECK9-NEXT:    [[TMP72:%.*]] = icmp ne i32 [[TMP71]], 0
1427 // CHECK9-NEXT:    br i1 [[TMP72]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
1428 // CHECK9:       omp_offload.failed16:
1429 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105(i64 [[TMP39]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]]
1430 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
1431 // CHECK9:       omp_offload.cont17:
1432 // CHECK9-NEXT:    [[TMP73:%.*]] = load i32, ptr [[N]], align 4
1433 // CHECK9-NEXT:    store i32 [[TMP73]], ptr [[N_CASTED18]], align 4
1434 // CHECK9-NEXT:    [[TMP74:%.*]] = load i64, ptr [[N_CASTED18]], align 8
1435 // CHECK9-NEXT:    [[TMP75:%.*]] = mul nuw i64 [[TMP1]], 4
1436 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES22]], ptr align 8 @.offload_sizes.3, i64 24, i1 false)
1437 // CHECK9-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
1438 // CHECK9-NEXT:    store i64 [[TMP74]], ptr [[TMP76]], align 8
1439 // CHECK9-NEXT:    [[TMP77:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
1440 // CHECK9-NEXT:    store i64 [[TMP74]], ptr [[TMP77]], align 8
1441 // CHECK9-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 0
1442 // CHECK9-NEXT:    store ptr null, ptr [[TMP78]], align 8
1443 // CHECK9-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 1
1444 // CHECK9-NEXT:    store i64 [[TMP1]], ptr [[TMP79]], align 8
1445 // CHECK9-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 1
1446 // CHECK9-NEXT:    store i64 [[TMP1]], ptr [[TMP80]], align 8
1447 // CHECK9-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 1
1448 // CHECK9-NEXT:    store ptr null, ptr [[TMP81]], align 8
1449 // CHECK9-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 2
1450 // CHECK9-NEXT:    store ptr [[VLA]], ptr [[TMP82]], align 8
1451 // CHECK9-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 2
1452 // CHECK9-NEXT:    store ptr [[VLA]], ptr [[TMP83]], align 8
1453 // CHECK9-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES22]], i32 0, i32 2
1454 // CHECK9-NEXT:    store i64 [[TMP75]], ptr [[TMP84]], align 8
1455 // CHECK9-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 2
1456 // CHECK9-NEXT:    store ptr null, ptr [[TMP85]], align 8
1457 // CHECK9-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
1458 // CHECK9-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
1459 // CHECK9-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES22]], i32 0, i32 0
1460 // CHECK9-NEXT:    [[TMP89:%.*]] = load i32, ptr [[N]], align 4
1461 // CHECK9-NEXT:    store i32 [[TMP89]], ptr [[DOTCAPTURE_EXPR_24]], align 4
1462 // CHECK9-NEXT:    [[TMP90:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_24]], align 4
1463 // CHECK9-NEXT:    [[SUB26:%.*]] = sub nsw i32 [[TMP90]], 0
1464 // CHECK9-NEXT:    [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1
1465 // CHECK9-NEXT:    [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1
1466 // CHECK9-NEXT:    store i32 [[SUB28]], ptr [[DOTCAPTURE_EXPR_25]], align 4
1467 // CHECK9-NEXT:    [[TMP91:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 4
1468 // CHECK9-NEXT:    [[ADD29:%.*]] = add nsw i32 [[TMP91]], 1
1469 // CHECK9-NEXT:    [[TMP92:%.*]] = zext i32 [[ADD29]] to i64
1470 // CHECK9-NEXT:    [[TMP93:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 0
1471 // CHECK9-NEXT:    store i32 3, ptr [[TMP93]], align 4
1472 // CHECK9-NEXT:    [[TMP94:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 1
1473 // CHECK9-NEXT:    store i32 3, ptr [[TMP94]], align 4
1474 // CHECK9-NEXT:    [[TMP95:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 2
1475 // CHECK9-NEXT:    store ptr [[TMP86]], ptr [[TMP95]], align 8
1476 // CHECK9-NEXT:    [[TMP96:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 3
1477 // CHECK9-NEXT:    store ptr [[TMP87]], ptr [[TMP96]], align 8
1478 // CHECK9-NEXT:    [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 4
1479 // CHECK9-NEXT:    store ptr [[TMP88]], ptr [[TMP97]], align 8
1480 // CHECK9-NEXT:    [[TMP98:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 5
1481 // CHECK9-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP98]], align 8
1482 // CHECK9-NEXT:    [[TMP99:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 6
1483 // CHECK9-NEXT:    store ptr null, ptr [[TMP99]], align 8
1484 // CHECK9-NEXT:    [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 7
1485 // CHECK9-NEXT:    store ptr null, ptr [[TMP100]], align 8
1486 // CHECK9-NEXT:    [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 8
1487 // CHECK9-NEXT:    store i64 [[TMP92]], ptr [[TMP101]], align 8
1488 // CHECK9-NEXT:    [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 9
1489 // CHECK9-NEXT:    store i64 0, ptr [[TMP102]], align 8
1490 // CHECK9-NEXT:    [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 10
1491 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP103]], align 4
1492 // CHECK9-NEXT:    [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 11
1493 // CHECK9-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP104]], align 4
1494 // CHECK9-NEXT:    [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 12
1495 // CHECK9-NEXT:    store i32 0, ptr [[TMP105]], align 4
1496 // CHECK9-NEXT:    [[TMP106:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.region_id, ptr [[KERNEL_ARGS30]])
1497 // CHECK9-NEXT:    [[TMP107:%.*]] = icmp ne i32 [[TMP106]], 0
1498 // CHECK9-NEXT:    br i1 [[TMP107]], label [[OMP_OFFLOAD_FAILED31:%.*]], label [[OMP_OFFLOAD_CONT32:%.*]]
1499 // CHECK9:       omp_offload.failed31:
1500 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110(i64 [[TMP74]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]]
1501 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT32]]
1502 // CHECK9:       omp_offload.cont32:
1503 // CHECK9-NEXT:    [[TMP108:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
1504 // CHECK9-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP108]])
1505 // CHECK9-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
1506 // CHECK9-NEXT:    [[TMP109:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8
1507 // CHECK9-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP109]])
1508 // CHECK9-NEXT:    [[TMP110:%.*]] = load i32, ptr [[RETVAL]], align 4
1509 // CHECK9-NEXT:    ret i32 [[TMP110]]
1510 //
1511 //
1512 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100
1513 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
1514 // CHECK9-NEXT:  entry:
1515 // CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
1516 // CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
1517 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
1518 // CHECK9-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
1519 // CHECK9-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
1520 // CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
1521 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
1522 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1523 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]])
1524 // CHECK9-NEXT:    ret void
1525 //
1526 //
1527 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100.omp_outlined
1528 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1529 // CHECK9-NEXT:  entry:
1530 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1531 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1532 // CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 8
1533 // CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
1534 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
1535 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1536 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1537 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1538 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1539 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
1540 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1541 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1542 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1543 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1544 // CHECK9-NEXT:    [[I3:%.*]] = alloca i32, align 4
1545 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1546 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1547 // CHECK9-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 8
1548 // CHECK9-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
1549 // CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
1550 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
1551 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
1552 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1553 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
1554 // CHECK9-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
1555 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1556 // CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
1557 // CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1558 // CHECK9-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1559 // CHECK9-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1560 // CHECK9-NEXT:    store i32 0, ptr [[I]], align 4
1561 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1562 // CHECK9-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
1563 // CHECK9-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1564 // CHECK9:       omp.precond.then:
1565 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1566 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1567 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
1568 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1569 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1570 // CHECK9-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1571 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
1572 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1573 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1574 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1575 // CHECK9-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
1576 // CHECK9-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1577 // CHECK9:       cond.true:
1578 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1579 // CHECK9-NEXT:    br label [[COND_END:%.*]]
1580 // CHECK9:       cond.false:
1581 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1582 // CHECK9-NEXT:    br label [[COND_END]]
1583 // CHECK9:       cond.end:
1584 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
1585 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1586 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1587 // CHECK9-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
1588 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1589 // CHECK9:       omp.inner.for.cond:
1590 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
1591 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
1592 // CHECK9-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
1593 // CHECK9-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1594 // CHECK9:       omp.inner.for.body:
1595 // CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
1596 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
1597 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1598 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP9]]
1599 // CHECK9-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP9]]
1600 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
1601 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]]
1602 // CHECK9-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP9]]
1603 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1604 // CHECK9:       omp.body.continue:
1605 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1606 // CHECK9:       omp.inner.for.inc:
1607 // CHECK9-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
1608 // CHECK9-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1
1609 // CHECK9-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
1610 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
1611 // CHECK9:       omp.inner.for.end:
1612 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1613 // CHECK9:       omp.loop.exit:
1614 // CHECK9-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1615 // CHECK9-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
1616 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])
1617 // CHECK9-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1618 // CHECK9-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
1619 // CHECK9-NEXT:    br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1620 // CHECK9:       .omp.final.then:
1621 // CHECK9-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1622 // CHECK9-NEXT:    [[SUB7:%.*]] = sub nsw i32 [[TMP23]], 0
1623 // CHECK9-NEXT:    [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
1624 // CHECK9-NEXT:    [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
1625 // CHECK9-NEXT:    [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
1626 // CHECK9-NEXT:    store i32 [[ADD10]], ptr [[I3]], align 4
1627 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1628 // CHECK9:       .omp.final.done:
1629 // CHECK9-NEXT:    br label [[OMP_PRECOND_END]]
1630 // CHECK9:       omp.precond.end:
1631 // CHECK9-NEXT:    ret void
1632 //
1633 //
1634 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105
1635 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1636 // CHECK9-NEXT:  entry:
1637 // CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
1638 // CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
1639 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
1640 // CHECK9-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
1641 // CHECK9-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
1642 // CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
1643 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
1644 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1645 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]])
1646 // CHECK9-NEXT:    ret void
1647 //
1648 //
1649 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.omp_outlined
1650 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1651 // CHECK9-NEXT:  entry:
1652 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1653 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1654 // CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 8
1655 // CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
1656 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
1657 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1658 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1659 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1660 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1661 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
1662 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1663 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1664 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1665 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1666 // CHECK9-NEXT:    [[I3:%.*]] = alloca i32, align 4
1667 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1668 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1669 // CHECK9-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 8
1670 // CHECK9-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
1671 // CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
1672 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
1673 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
1674 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1675 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
1676 // CHECK9-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
1677 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1678 // CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
1679 // CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1680 // CHECK9-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1681 // CHECK9-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1682 // CHECK9-NEXT:    store i32 0, ptr [[I]], align 4
1683 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1684 // CHECK9-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
1685 // CHECK9-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1686 // CHECK9:       omp.precond.then:
1687 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1688 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1689 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
1690 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1691 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1692 // CHECK9-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1693 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
1694 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1695 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1696 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1697 // CHECK9-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
1698 // CHECK9-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1699 // CHECK9:       cond.true:
1700 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1701 // CHECK9-NEXT:    br label [[COND_END:%.*]]
1702 // CHECK9:       cond.false:
1703 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1704 // CHECK9-NEXT:    br label [[COND_END]]
1705 // CHECK9:       cond.end:
1706 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
1707 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1708 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1709 // CHECK9-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
1710 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1711 // CHECK9:       omp.inner.for.cond:
1712 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
1713 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
1714 // CHECK9-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
1715 // CHECK9-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1716 // CHECK9:       omp.inner.for.body:
1717 // CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
1718 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
1719 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1720 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP15]]
1721 // CHECK9-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP15]]
1722 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
1723 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]]
1724 // CHECK9-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP15]]
1725 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1726 // CHECK9:       omp.body.continue:
1727 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1728 // CHECK9:       omp.inner.for.inc:
1729 // CHECK9-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
1730 // CHECK9-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1
1731 // CHECK9-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
1732 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
1733 // CHECK9:       omp.inner.for.end:
1734 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1735 // CHECK9:       omp.loop.exit:
1736 // CHECK9-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1737 // CHECK9-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
1738 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])
1739 // CHECK9-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1740 // CHECK9-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
1741 // CHECK9-NEXT:    br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1742 // CHECK9:       .omp.final.then:
1743 // CHECK9-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1744 // CHECK9-NEXT:    [[SUB7:%.*]] = sub nsw i32 [[TMP23]], 0
1745 // CHECK9-NEXT:    [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
1746 // CHECK9-NEXT:    [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
1747 // CHECK9-NEXT:    [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
1748 // CHECK9-NEXT:    store i32 [[ADD10]], ptr [[I3]], align 4
1749 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1750 // CHECK9:       .omp.final.done:
1751 // CHECK9-NEXT:    br label [[OMP_PRECOND_END]]
1752 // CHECK9:       omp.precond.end:
1753 // CHECK9-NEXT:    ret void
1754 //
1755 //
1756 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110
1757 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1758 // CHECK9-NEXT:  entry:
1759 // CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
1760 // CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
1761 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
1762 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1763 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
1764 // CHECK9-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
1765 // CHECK9-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
1766 // CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
1767 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
1768 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1769 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
1770 // CHECK9-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
1771 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1772 // CHECK9-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
1773 // CHECK9-NEXT:    [[TMP4:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
1774 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP4]])
1775 // CHECK9-NEXT:    ret void
1776 //
1777 //
1778 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.omp_outlined
1779 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
1780 // CHECK9-NEXT:  entry:
1781 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1782 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1783 // CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 8
1784 // CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
1785 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
1786 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1787 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1788 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1789 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1790 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
1791 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
1792 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1793 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1794 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1795 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1796 // CHECK9-NEXT:    [[I4:%.*]] = alloca i32, align 4
1797 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1798 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1799 // CHECK9-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 8
1800 // CHECK9-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
1801 // CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
1802 // CHECK9-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
1803 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
1804 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
1805 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1806 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
1807 // CHECK9-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1808 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1809 // CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
1810 // CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1811 // CHECK9-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
1812 // CHECK9-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
1813 // CHECK9-NEXT:    store i32 0, ptr [[I]], align 4
1814 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1815 // CHECK9-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
1816 // CHECK9-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1817 // CHECK9:       omp.precond.then:
1818 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1819 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
1820 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
1821 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1822 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1823 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
1824 // CHECK9-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1825 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
1826 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
1827 // CHECK9-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
1828 // CHECK9:       omp.dispatch.cond:
1829 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1830 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
1831 // CHECK9-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
1832 // CHECK9-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1833 // CHECK9:       cond.true:
1834 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
1835 // CHECK9-NEXT:    br label [[COND_END:%.*]]
1836 // CHECK9:       cond.false:
1837 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1838 // CHECK9-NEXT:    br label [[COND_END]]
1839 // CHECK9:       cond.end:
1840 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
1841 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1842 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1843 // CHECK9-NEXT:    store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4
1844 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1845 // CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1846 // CHECK9-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
1847 // CHECK9-NEXT:    br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1848 // CHECK9:       omp.dispatch.body:
1849 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1850 // CHECK9:       omp.inner.for.cond:
1851 // CHECK9-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
1852 // CHECK9-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
1853 // CHECK9-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
1854 // CHECK9-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1855 // CHECK9:       omp.inner.for.body:
1856 // CHECK9-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
1857 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
1858 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1859 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP18]]
1860 // CHECK9-NEXT:    [[TMP20:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP18]]
1861 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
1862 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]]
1863 // CHECK9-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP18]]
1864 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1865 // CHECK9:       omp.body.continue:
1866 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1867 // CHECK9:       omp.inner.for.inc:
1868 // CHECK9-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
1869 // CHECK9-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP21]], 1
1870 // CHECK9-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
1871 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
1872 // CHECK9:       omp.inner.for.end:
1873 // CHECK9-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
1874 // CHECK9:       omp.dispatch.inc:
1875 // CHECK9-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1876 // CHECK9-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1877 // CHECK9-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
1878 // CHECK9-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_LB]], align 4
1879 // CHECK9-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1880 // CHECK9-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1881 // CHECK9-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
1882 // CHECK9-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_UB]], align 4
1883 // CHECK9-NEXT:    br label [[OMP_DISPATCH_COND]]
1884 // CHECK9:       omp.dispatch.end:
1885 // CHECK9-NEXT:    [[TMP26:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1886 // CHECK9-NEXT:    [[TMP27:%.*]] = load i32, ptr [[TMP26]], align 4
1887 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP27]])
1888 // CHECK9-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1889 // CHECK9-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
1890 // CHECK9-NEXT:    br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1891 // CHECK9:       .omp.final.then:
1892 // CHECK9-NEXT:    [[TMP30:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1893 // CHECK9-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP30]], 0
1894 // CHECK9-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
1895 // CHECK9-NEXT:    [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1
1896 // CHECK9-NEXT:    [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
1897 // CHECK9-NEXT:    store i32 [[ADD14]], ptr [[I4]], align 4
1898 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1899 // CHECK9:       .omp.final.done:
1900 // CHECK9-NEXT:    br label [[OMP_PRECOND_END]]
1901 // CHECK9:       omp.precond.end:
1902 // CHECK9-NEXT:    ret void
1903 //
1904 //
1905 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
1906 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
1907 // CHECK9-NEXT:  entry:
1908 // CHECK9-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
1909 // CHECK9-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
1910 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
1911 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
1912 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
1913 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1914 // CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1915 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 8
1916 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 8
1917 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 8
1918 // CHECK9-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
1919 // CHECK9-NEXT:    [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1920 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [1 x ptr], align 8
1921 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS9:%.*]] = alloca [1 x ptr], align 8
1922 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [1 x ptr], align 8
1923 // CHECK9-NEXT:    [[_TMP11:%.*]] = alloca i32, align 4
1924 // CHECK9-NEXT:    [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1925 // CHECK9-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
1926 // CHECK9-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1927 // CHECK9-NEXT:    store ptr [[A]], ptr [[TMP0]], align 8
1928 // CHECK9-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1929 // CHECK9-NEXT:    store ptr [[A]], ptr [[TMP1]], align 8
1930 // CHECK9-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1931 // CHECK9-NEXT:    store ptr null, ptr [[TMP2]], align 8
1932 // CHECK9-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1933 // CHECK9-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1934 // CHECK9-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1935 // CHECK9-NEXT:    store i32 3, ptr [[TMP5]], align 4
1936 // CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1937 // CHECK9-NEXT:    store i32 1, ptr [[TMP6]], align 4
1938 // CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1939 // CHECK9-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 8
1940 // CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1941 // CHECK9-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 8
1942 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1943 // CHECK9-NEXT:    store ptr @.offload_sizes.5, ptr [[TMP9]], align 8
1944 // CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1945 // CHECK9-NEXT:    store ptr @.offload_maptypes.6, ptr [[TMP10]], align 8
1946 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1947 // CHECK9-NEXT:    store ptr null, ptr [[TMP11]], align 8
1948 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1949 // CHECK9-NEXT:    store ptr null, ptr [[TMP12]], align 8
1950 // CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1951 // CHECK9-NEXT:    store i64 10, ptr [[TMP13]], align 8
1952 // CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1953 // CHECK9-NEXT:    store i64 0, ptr [[TMP14]], align 8
1954 // CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1955 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
1956 // CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1957 // CHECK9-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP16]], align 4
1958 // CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1959 // CHECK9-NEXT:    store i32 0, ptr [[TMP17]], align 4
1960 // CHECK9-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79.region_id, ptr [[KERNEL_ARGS]])
1961 // CHECK9-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
1962 // CHECK9-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1963 // CHECK9:       omp_offload.failed:
1964 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79(ptr [[A]]) #[[ATTR3]]
1965 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1966 // CHECK9:       omp_offload.cont:
1967 // CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
1968 // CHECK9-NEXT:    store ptr [[A]], ptr [[TMP20]], align 8
1969 // CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
1970 // CHECK9-NEXT:    store ptr [[A]], ptr [[TMP21]], align 8
1971 // CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
1972 // CHECK9-NEXT:    store ptr null, ptr [[TMP22]], align 8
1973 // CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
1974 // CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
1975 // CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0
1976 // CHECK9-NEXT:    store i32 3, ptr [[TMP25]], align 4
1977 // CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1
1978 // CHECK9-NEXT:    store i32 1, ptr [[TMP26]], align 4
1979 // CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2
1980 // CHECK9-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 8
1981 // CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3
1982 // CHECK9-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 8
1983 // CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4
1984 // CHECK9-NEXT:    store ptr @.offload_sizes.7, ptr [[TMP29]], align 8
1985 // CHECK9-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5
1986 // CHECK9-NEXT:    store ptr @.offload_maptypes.8, ptr [[TMP30]], align 8
1987 // CHECK9-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6
1988 // CHECK9-NEXT:    store ptr null, ptr [[TMP31]], align 8
1989 // CHECK9-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7
1990 // CHECK9-NEXT:    store ptr null, ptr [[TMP32]], align 8
1991 // CHECK9-NEXT:    [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8
1992 // CHECK9-NEXT:    store i64 10, ptr [[TMP33]], align 8
1993 // CHECK9-NEXT:    [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9
1994 // CHECK9-NEXT:    store i64 0, ptr [[TMP34]], align 8
1995 // CHECK9-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10
1996 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
1997 // CHECK9-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11
1998 // CHECK9-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP36]], align 4
1999 // CHECK9-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12
2000 // CHECK9-NEXT:    store i32 0, ptr [[TMP37]], align 4
2001 // CHECK9-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, ptr [[KERNEL_ARGS5]])
2002 // CHECK9-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
2003 // CHECK9-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
2004 // CHECK9:       omp_offload.failed6:
2005 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84(ptr [[A]]) #[[ATTR3]]
2006 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
2007 // CHECK9:       omp_offload.cont7:
2008 // CHECK9-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
2009 // CHECK9-NEXT:    store ptr [[A]], ptr [[TMP40]], align 8
2010 // CHECK9-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
2011 // CHECK9-NEXT:    store ptr [[A]], ptr [[TMP41]], align 8
2012 // CHECK9-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0
2013 // CHECK9-NEXT:    store ptr null, ptr [[TMP42]], align 8
2014 // CHECK9-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
2015 // CHECK9-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
2016 // CHECK9-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0
2017 // CHECK9-NEXT:    store i32 3, ptr [[TMP45]], align 4
2018 // CHECK9-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1
2019 // CHECK9-NEXT:    store i32 1, ptr [[TMP46]], align 4
2020 // CHECK9-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2
2021 // CHECK9-NEXT:    store ptr [[TMP43]], ptr [[TMP47]], align 8
2022 // CHECK9-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3
2023 // CHECK9-NEXT:    store ptr [[TMP44]], ptr [[TMP48]], align 8
2024 // CHECK9-NEXT:    [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4
2025 // CHECK9-NEXT:    store ptr @.offload_sizes.9, ptr [[TMP49]], align 8
2026 // CHECK9-NEXT:    [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5
2027 // CHECK9-NEXT:    store ptr @.offload_maptypes.10, ptr [[TMP50]], align 8
2028 // CHECK9-NEXT:    [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6
2029 // CHECK9-NEXT:    store ptr null, ptr [[TMP51]], align 8
2030 // CHECK9-NEXT:    [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7
2031 // CHECK9-NEXT:    store ptr null, ptr [[TMP52]], align 8
2032 // CHECK9-NEXT:    [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8
2033 // CHECK9-NEXT:    store i64 10, ptr [[TMP53]], align 8
2034 // CHECK9-NEXT:    [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9
2035 // CHECK9-NEXT:    store i64 0, ptr [[TMP54]], align 8
2036 // CHECK9-NEXT:    [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10
2037 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4
2038 // CHECK9-NEXT:    [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11
2039 // CHECK9-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP56]], align 4
2040 // CHECK9-NEXT:    [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12
2041 // CHECK9-NEXT:    store i32 0, ptr [[TMP57]], align 4
2042 // CHECK9-NEXT:    [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89.region_id, ptr [[KERNEL_ARGS12]])
2043 // CHECK9-NEXT:    [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0
2044 // CHECK9-NEXT:    br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
2045 // CHECK9:       omp_offload.failed13:
2046 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89(ptr [[A]]) #[[ATTR3]]
2047 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT14]]
2048 // CHECK9:       omp_offload.cont14:
2049 // CHECK9-NEXT:    ret i32 0
2050 //
2051 //
2052 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79
2053 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2054 // CHECK9-NEXT:  entry:
2055 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
2056 // CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
2057 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
2058 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79.omp_outlined, ptr [[TMP0]])
2059 // CHECK9-NEXT:    ret void
2060 //
2061 //
2062 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79.omp_outlined
2063 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2064 // CHECK9-NEXT:  entry:
2065 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2066 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2067 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
2068 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2069 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2070 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2071 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2072 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2073 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2074 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
2075 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2076 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2077 // CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
2078 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
2079 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2080 // CHECK9-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
2081 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2082 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2083 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2084 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
2085 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2086 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2087 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
2088 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2089 // CHECK9:       cond.true:
2090 // CHECK9-NEXT:    br label [[COND_END:%.*]]
2091 // CHECK9:       cond.false:
2092 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2093 // CHECK9-NEXT:    br label [[COND_END]]
2094 // CHECK9:       cond.end:
2095 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2096 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2097 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2098 // CHECK9-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
2099 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2100 // CHECK9:       omp.inner.for.cond:
2101 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]
2102 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]]
2103 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2104 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2105 // CHECK9:       omp.inner.for.body:
2106 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
2107 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
2108 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2109 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]]
2110 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]]
2111 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
2112 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
2113 // CHECK9-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP21]]
2114 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2115 // CHECK9:       omp.body.continue:
2116 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2117 // CHECK9:       omp.inner.for.inc:
2118 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
2119 // CHECK9-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
2120 // CHECK9-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
2121 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
2122 // CHECK9:       omp.inner.for.end:
2123 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2124 // CHECK9:       omp.loop.exit:
2125 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
2126 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2127 // CHECK9-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2128 // CHECK9-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2129 // CHECK9:       .omp.final.then:
2130 // CHECK9-NEXT:    store i32 10, ptr [[I]], align 4
2131 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2132 // CHECK9:       .omp.final.done:
2133 // CHECK9-NEXT:    ret void
2134 //
2135 //
2136 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84
2137 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2138 // CHECK9-NEXT:  entry:
2139 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
2140 // CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
2141 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
2142 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.omp_outlined, ptr [[TMP0]])
2143 // CHECK9-NEXT:    ret void
2144 //
2145 //
2146 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.omp_outlined
2147 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2148 // CHECK9-NEXT:  entry:
2149 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2150 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2151 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
2152 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2153 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2154 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2155 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2156 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2157 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2158 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
2159 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2160 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2161 // CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
2162 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
2163 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2164 // CHECK9-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
2165 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2166 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2167 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2168 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
2169 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2170 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2171 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
2172 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2173 // CHECK9:       cond.true:
2174 // CHECK9-NEXT:    br label [[COND_END:%.*]]
2175 // CHECK9:       cond.false:
2176 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2177 // CHECK9-NEXT:    br label [[COND_END]]
2178 // CHECK9:       cond.end:
2179 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2180 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2181 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2182 // CHECK9-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
2183 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2184 // CHECK9:       omp.inner.for.cond:
2185 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]
2186 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP24]]
2187 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2188 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2189 // CHECK9:       omp.inner.for.body:
2190 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
2191 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
2192 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2193 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]]
2194 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]]
2195 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
2196 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
2197 // CHECK9-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP24]]
2198 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2199 // CHECK9:       omp.body.continue:
2200 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2201 // CHECK9:       omp.inner.for.inc:
2202 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
2203 // CHECK9-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
2204 // CHECK9-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
2205 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
2206 // CHECK9:       omp.inner.for.end:
2207 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2208 // CHECK9:       omp.loop.exit:
2209 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
2210 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2211 // CHECK9-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
2212 // CHECK9-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2213 // CHECK9:       .omp.final.then:
2214 // CHECK9-NEXT:    store i32 10, ptr [[I]], align 4
2215 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2216 // CHECK9:       .omp.final.done:
2217 // CHECK9-NEXT:    ret void
2218 //
2219 //
2220 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89
2221 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2222 // CHECK9-NEXT:  entry:
2223 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
2224 // CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
2225 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
2226 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89.omp_outlined, ptr [[TMP0]])
2227 // CHECK9-NEXT:    ret void
2228 //
2229 //
2230 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89.omp_outlined
2231 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2232 // CHECK9-NEXT:  entry:
2233 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2234 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2235 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
2236 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2237 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2238 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2239 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2240 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2241 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2242 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
2243 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2244 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2245 // CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
2246 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
2247 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2248 // CHECK9-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
2249 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2250 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2251 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2252 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
2253 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 10)
2254 // CHECK9-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
2255 // CHECK9:       omp.dispatch.cond:
2256 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2257 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
2258 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2259 // CHECK9:       cond.true:
2260 // CHECK9-NEXT:    br label [[COND_END:%.*]]
2261 // CHECK9:       cond.false:
2262 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2263 // CHECK9-NEXT:    br label [[COND_END]]
2264 // CHECK9:       cond.end:
2265 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2266 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2267 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2268 // CHECK9-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
2269 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2270 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2271 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2272 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2273 // CHECK9:       omp.dispatch.body:
2274 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2275 // CHECK9:       omp.inner.for.cond:
2276 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27:![0-9]+]]
2277 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP27]]
2278 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2279 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2280 // CHECK9:       omp.inner.for.body:
2281 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]
2282 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2283 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2284 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP27]]
2285 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP27]]
2286 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
2287 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
2288 // CHECK9-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP27]]
2289 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2290 // CHECK9:       omp.body.continue:
2291 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2292 // CHECK9:       omp.inner.for.inc:
2293 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]
2294 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
2295 // CHECK9-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP27]]
2296 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP28:![0-9]+]]
2297 // CHECK9:       omp.inner.for.end:
2298 // CHECK9-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
2299 // CHECK9:       omp.dispatch.inc:
2300 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2301 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2302 // CHECK9-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
2303 // CHECK9-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
2304 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2305 // CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2306 // CHECK9-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
2307 // CHECK9-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
2308 // CHECK9-NEXT:    br label [[OMP_DISPATCH_COND]]
2309 // CHECK9:       omp.dispatch.end:
2310 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
2311 // CHECK9-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2312 // CHECK9-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
2313 // CHECK9-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2314 // CHECK9:       .omp.final.then:
2315 // CHECK9-NEXT:    store i32 10, ptr [[I]], align 4
2316 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2317 // CHECK9:       .omp.final.done:
2318 // CHECK9-NEXT:    ret void
2319 //
2320 //
2321 // CHECK11-LABEL: define {{[^@]+}}@main
2322 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
2323 // CHECK11-NEXT:  entry:
2324 // CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2325 // CHECK11-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
2326 // CHECK11-NEXT:    [[ARGV_ADDR:%.*]] = alloca ptr, align 4
2327 // CHECK11-NEXT:    [[N:%.*]] = alloca i32, align 4
2328 // CHECK11-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 4
2329 // CHECK11-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 4
2330 // CHECK11-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
2331 // CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 4
2332 // CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 4
2333 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 4
2334 // CHECK11-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
2335 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2336 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2337 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2338 // CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2339 // CHECK11-NEXT:    [[N_CASTED3:%.*]] = alloca i32, align 4
2340 // CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 4
2341 // CHECK11-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 4
2342 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 4
2343 // CHECK11-NEXT:    [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
2344 // CHECK11-NEXT:    [[_TMP8:%.*]] = alloca i32, align 4
2345 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
2346 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
2347 // CHECK11-NEXT:    [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2348 // CHECK11-NEXT:    [[N_CASTED18:%.*]] = alloca i32, align 4
2349 // CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [3 x ptr], align 4
2350 // CHECK11-NEXT:    [[DOTOFFLOAD_PTRS20:%.*]] = alloca [3 x ptr], align 4
2351 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [3 x ptr], align 4
2352 // CHECK11-NEXT:    [[DOTOFFLOAD_SIZES22:%.*]] = alloca [3 x i64], align 4
2353 // CHECK11-NEXT:    [[_TMP23:%.*]] = alloca i32, align 4
2354 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
2355 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
2356 // CHECK11-NEXT:    [[KERNEL_ARGS30:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2357 // CHECK11-NEXT:    store i32 0, ptr [[RETVAL]], align 4
2358 // CHECK11-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
2359 // CHECK11-NEXT:    store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 4
2360 // CHECK11-NEXT:    store i32 100, ptr [[N]], align 4
2361 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 4
2362 // CHECK11-NEXT:    [[TMP1:%.*]] = call ptr @llvm.stacksave.p0()
2363 // CHECK11-NEXT:    store ptr [[TMP1]], ptr [[SAVED_STACK]], align 4
2364 // CHECK11-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
2365 // CHECK11-NEXT:    store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 4
2366 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N]], align 4
2367 // CHECK11-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 4
2368 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4
2369 // CHECK11-NEXT:    [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
2370 // CHECK11-NEXT:    [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
2371 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 24, i1 false)
2372 // CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2373 // CHECK11-NEXT:    store i32 [[TMP3]], ptr [[TMP6]], align 4
2374 // CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2375 // CHECK11-NEXT:    store i32 [[TMP3]], ptr [[TMP7]], align 4
2376 // CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2377 // CHECK11-NEXT:    store ptr null, ptr [[TMP8]], align 4
2378 // CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2379 // CHECK11-NEXT:    store i32 [[TMP0]], ptr [[TMP9]], align 4
2380 // CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2381 // CHECK11-NEXT:    store i32 [[TMP0]], ptr [[TMP10]], align 4
2382 // CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
2383 // CHECK11-NEXT:    store ptr null, ptr [[TMP11]], align 4
2384 // CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2385 // CHECK11-NEXT:    store ptr [[VLA]], ptr [[TMP12]], align 4
2386 // CHECK11-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2387 // CHECK11-NEXT:    store ptr [[VLA]], ptr [[TMP13]], align 4
2388 // CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 2
2389 // CHECK11-NEXT:    store i64 [[TMP5]], ptr [[TMP14]], align 4
2390 // CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
2391 // CHECK11-NEXT:    store ptr null, ptr [[TMP15]], align 4
2392 // CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2393 // CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2394 // CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0
2395 // CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[N]], align 4
2396 // CHECK11-NEXT:    store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 4
2397 // CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2398 // CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0
2399 // CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2400 // CHECK11-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2401 // CHECK11-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
2402 // CHECK11-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2403 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], 1
2404 // CHECK11-NEXT:    [[TMP22:%.*]] = zext i32 [[ADD]] to i64
2405 // CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
2406 // CHECK11-NEXT:    store i32 3, ptr [[TMP23]], align 4
2407 // CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
2408 // CHECK11-NEXT:    store i32 3, ptr [[TMP24]], align 4
2409 // CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
2410 // CHECK11-NEXT:    store ptr [[TMP16]], ptr [[TMP25]], align 4
2411 // CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
2412 // CHECK11-NEXT:    store ptr [[TMP17]], ptr [[TMP26]], align 4
2413 // CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
2414 // CHECK11-NEXT:    store ptr [[TMP18]], ptr [[TMP27]], align 4
2415 // CHECK11-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
2416 // CHECK11-NEXT:    store ptr @.offload_maptypes, ptr [[TMP28]], align 4
2417 // CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
2418 // CHECK11-NEXT:    store ptr null, ptr [[TMP29]], align 4
2419 // CHECK11-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
2420 // CHECK11-NEXT:    store ptr null, ptr [[TMP30]], align 4
2421 // CHECK11-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
2422 // CHECK11-NEXT:    store i64 [[TMP22]], ptr [[TMP31]], align 8
2423 // CHECK11-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
2424 // CHECK11-NEXT:    store i64 0, ptr [[TMP32]], align 8
2425 // CHECK11-NEXT:    [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
2426 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4
2427 // CHECK11-NEXT:    [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
2428 // CHECK11-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP34]], align 4
2429 // CHECK11-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
2430 // CHECK11-NEXT:    store i32 0, ptr [[TMP35]], align 4
2431 // CHECK11-NEXT:    [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100.region_id, ptr [[KERNEL_ARGS]])
2432 // CHECK11-NEXT:    [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
2433 // CHECK11-NEXT:    br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2434 // CHECK11:       omp_offload.failed:
2435 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100(i32 [[TMP3]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3:[0-9]+]]
2436 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2437 // CHECK11:       omp_offload.cont:
2438 // CHECK11-NEXT:    [[TMP38:%.*]] = load i32, ptr [[N]], align 4
2439 // CHECK11-NEXT:    store i32 [[TMP38]], ptr [[N_CASTED3]], align 4
2440 // CHECK11-NEXT:    [[TMP39:%.*]] = load i32, ptr [[N_CASTED3]], align 4
2441 // CHECK11-NEXT:    [[TMP40:%.*]] = mul nuw i32 [[TMP0]], 4
2442 // CHECK11-NEXT:    [[TMP41:%.*]] = sext i32 [[TMP40]] to i64
2443 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES7]], ptr align 4 @.offload_sizes.1, i32 24, i1 false)
2444 // CHECK11-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
2445 // CHECK11-NEXT:    store i32 [[TMP39]], ptr [[TMP42]], align 4
2446 // CHECK11-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
2447 // CHECK11-NEXT:    store i32 [[TMP39]], ptr [[TMP43]], align 4
2448 // CHECK11-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
2449 // CHECK11-NEXT:    store ptr null, ptr [[TMP44]], align 4
2450 // CHECK11-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
2451 // CHECK11-NEXT:    store i32 [[TMP0]], ptr [[TMP45]], align 4
2452 // CHECK11-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
2453 // CHECK11-NEXT:    store i32 [[TMP0]], ptr [[TMP46]], align 4
2454 // CHECK11-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
2455 // CHECK11-NEXT:    store ptr null, ptr [[TMP47]], align 4
2456 // CHECK11-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
2457 // CHECK11-NEXT:    store ptr [[VLA]], ptr [[TMP48]], align 4
2458 // CHECK11-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
2459 // CHECK11-NEXT:    store ptr [[VLA]], ptr [[TMP49]], align 4
2460 // CHECK11-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
2461 // CHECK11-NEXT:    store i64 [[TMP41]], ptr [[TMP50]], align 4
2462 // CHECK11-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
2463 // CHECK11-NEXT:    store ptr null, ptr [[TMP51]], align 4
2464 // CHECK11-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
2465 // CHECK11-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
2466 // CHECK11-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
2467 // CHECK11-NEXT:    [[TMP55:%.*]] = load i32, ptr [[N]], align 4
2468 // CHECK11-NEXT:    store i32 [[TMP55]], ptr [[DOTCAPTURE_EXPR_9]], align 4
2469 // CHECK11-NEXT:    [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4
2470 // CHECK11-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP56]], 0
2471 // CHECK11-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
2472 // CHECK11-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
2473 // CHECK11-NEXT:    store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 4
2474 // CHECK11-NEXT:    [[TMP57:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 4
2475 // CHECK11-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP57]], 1
2476 // CHECK11-NEXT:    [[TMP58:%.*]] = zext i32 [[ADD14]] to i64
2477 // CHECK11-NEXT:    [[TMP59:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0
2478 // CHECK11-NEXT:    store i32 3, ptr [[TMP59]], align 4
2479 // CHECK11-NEXT:    [[TMP60:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1
2480 // CHECK11-NEXT:    store i32 3, ptr [[TMP60]], align 4
2481 // CHECK11-NEXT:    [[TMP61:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2
2482 // CHECK11-NEXT:    store ptr [[TMP52]], ptr [[TMP61]], align 4
2483 // CHECK11-NEXT:    [[TMP62:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3
2484 // CHECK11-NEXT:    store ptr [[TMP53]], ptr [[TMP62]], align 4
2485 // CHECK11-NEXT:    [[TMP63:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4
2486 // CHECK11-NEXT:    store ptr [[TMP54]], ptr [[TMP63]], align 4
2487 // CHECK11-NEXT:    [[TMP64:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5
2488 // CHECK11-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP64]], align 4
2489 // CHECK11-NEXT:    [[TMP65:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6
2490 // CHECK11-NEXT:    store ptr null, ptr [[TMP65]], align 4
2491 // CHECK11-NEXT:    [[TMP66:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7
2492 // CHECK11-NEXT:    store ptr null, ptr [[TMP66]], align 4
2493 // CHECK11-NEXT:    [[TMP67:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8
2494 // CHECK11-NEXT:    store i64 [[TMP58]], ptr [[TMP67]], align 8
2495 // CHECK11-NEXT:    [[TMP68:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9
2496 // CHECK11-NEXT:    store i64 0, ptr [[TMP68]], align 8
2497 // CHECK11-NEXT:    [[TMP69:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10
2498 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP69]], align 4
2499 // CHECK11-NEXT:    [[TMP70:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11
2500 // CHECK11-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP70]], align 4
2501 // CHECK11-NEXT:    [[TMP71:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12
2502 // CHECK11-NEXT:    store i32 0, ptr [[TMP71]], align 4
2503 // CHECK11-NEXT:    [[TMP72:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.region_id, ptr [[KERNEL_ARGS15]])
2504 // CHECK11-NEXT:    [[TMP73:%.*]] = icmp ne i32 [[TMP72]], 0
2505 // CHECK11-NEXT:    br i1 [[TMP73]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
2506 // CHECK11:       omp_offload.failed16:
2507 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105(i32 [[TMP39]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]]
2508 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
2509 // CHECK11:       omp_offload.cont17:
2510 // CHECK11-NEXT:    [[TMP74:%.*]] = load i32, ptr [[N]], align 4
2511 // CHECK11-NEXT:    store i32 [[TMP74]], ptr [[N_CASTED18]], align 4
2512 // CHECK11-NEXT:    [[TMP75:%.*]] = load i32, ptr [[N_CASTED18]], align 4
2513 // CHECK11-NEXT:    [[TMP76:%.*]] = mul nuw i32 [[TMP0]], 4
2514 // CHECK11-NEXT:    [[TMP77:%.*]] = sext i32 [[TMP76]] to i64
2515 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES22]], ptr align 4 @.offload_sizes.3, i32 24, i1 false)
2516 // CHECK11-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
2517 // CHECK11-NEXT:    store i32 [[TMP75]], ptr [[TMP78]], align 4
2518 // CHECK11-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
2519 // CHECK11-NEXT:    store i32 [[TMP75]], ptr [[TMP79]], align 4
2520 // CHECK11-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0
2521 // CHECK11-NEXT:    store ptr null, ptr [[TMP80]], align 4
2522 // CHECK11-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 1
2523 // CHECK11-NEXT:    store i32 [[TMP0]], ptr [[TMP81]], align 4
2524 // CHECK11-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 1
2525 // CHECK11-NEXT:    store i32 [[TMP0]], ptr [[TMP82]], align 4
2526 // CHECK11-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 1
2527 // CHECK11-NEXT:    store ptr null, ptr [[TMP83]], align 4
2528 // CHECK11-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 2
2529 // CHECK11-NEXT:    store ptr [[VLA]], ptr [[TMP84]], align 4
2530 // CHECK11-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 2
2531 // CHECK11-NEXT:    store ptr [[VLA]], ptr [[TMP85]], align 4
2532 // CHECK11-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES22]], i32 0, i32 2
2533 // CHECK11-NEXT:    store i64 [[TMP77]], ptr [[TMP86]], align 4
2534 // CHECK11-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 2
2535 // CHECK11-NEXT:    store ptr null, ptr [[TMP87]], align 4
2536 // CHECK11-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
2537 // CHECK11-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
2538 // CHECK11-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES22]], i32 0, i32 0
2539 // CHECK11-NEXT:    [[TMP91:%.*]] = load i32, ptr [[N]], align 4
2540 // CHECK11-NEXT:    store i32 [[TMP91]], ptr [[DOTCAPTURE_EXPR_24]], align 4
2541 // CHECK11-NEXT:    [[TMP92:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_24]], align 4
2542 // CHECK11-NEXT:    [[SUB26:%.*]] = sub nsw i32 [[TMP92]], 0
2543 // CHECK11-NEXT:    [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1
2544 // CHECK11-NEXT:    [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1
2545 // CHECK11-NEXT:    store i32 [[SUB28]], ptr [[DOTCAPTURE_EXPR_25]], align 4
2546 // CHECK11-NEXT:    [[TMP93:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 4
2547 // CHECK11-NEXT:    [[ADD29:%.*]] = add nsw i32 [[TMP93]], 1
2548 // CHECK11-NEXT:    [[TMP94:%.*]] = zext i32 [[ADD29]] to i64
2549 // CHECK11-NEXT:    [[TMP95:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 0
2550 // CHECK11-NEXT:    store i32 3, ptr [[TMP95]], align 4
2551 // CHECK11-NEXT:    [[TMP96:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 1
2552 // CHECK11-NEXT:    store i32 3, ptr [[TMP96]], align 4
2553 // CHECK11-NEXT:    [[TMP97:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 2
2554 // CHECK11-NEXT:    store ptr [[TMP88]], ptr [[TMP97]], align 4
2555 // CHECK11-NEXT:    [[TMP98:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 3
2556 // CHECK11-NEXT:    store ptr [[TMP89]], ptr [[TMP98]], align 4
2557 // CHECK11-NEXT:    [[TMP99:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 4
2558 // CHECK11-NEXT:    store ptr [[TMP90]], ptr [[TMP99]], align 4
2559 // CHECK11-NEXT:    [[TMP100:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 5
2560 // CHECK11-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP100]], align 4
2561 // CHECK11-NEXT:    [[TMP101:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 6
2562 // CHECK11-NEXT:    store ptr null, ptr [[TMP101]], align 4
2563 // CHECK11-NEXT:    [[TMP102:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 7
2564 // CHECK11-NEXT:    store ptr null, ptr [[TMP102]], align 4
2565 // CHECK11-NEXT:    [[TMP103:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 8
2566 // CHECK11-NEXT:    store i64 [[TMP94]], ptr [[TMP103]], align 8
2567 // CHECK11-NEXT:    [[TMP104:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 9
2568 // CHECK11-NEXT:    store i64 0, ptr [[TMP104]], align 8
2569 // CHECK11-NEXT:    [[TMP105:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 10
2570 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP105]], align 4
2571 // CHECK11-NEXT:    [[TMP106:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 11
2572 // CHECK11-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP106]], align 4
2573 // CHECK11-NEXT:    [[TMP107:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 12
2574 // CHECK11-NEXT:    store i32 0, ptr [[TMP107]], align 4
2575 // CHECK11-NEXT:    [[TMP108:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.region_id, ptr [[KERNEL_ARGS30]])
2576 // CHECK11-NEXT:    [[TMP109:%.*]] = icmp ne i32 [[TMP108]], 0
2577 // CHECK11-NEXT:    br i1 [[TMP109]], label [[OMP_OFFLOAD_FAILED31:%.*]], label [[OMP_OFFLOAD_CONT32:%.*]]
2578 // CHECK11:       omp_offload.failed31:
2579 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110(i32 [[TMP75]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]]
2580 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT32]]
2581 // CHECK11:       omp_offload.cont32:
2582 // CHECK11-NEXT:    [[TMP110:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
2583 // CHECK11-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP110]])
2584 // CHECK11-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
2585 // CHECK11-NEXT:    [[TMP111:%.*]] = load ptr, ptr [[SAVED_STACK]], align 4
2586 // CHECK11-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP111]])
2587 // CHECK11-NEXT:    [[TMP112:%.*]] = load i32, ptr [[RETVAL]], align 4
2588 // CHECK11-NEXT:    ret i32 [[TMP112]]
2589 //
2590 //
2591 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100
2592 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
2593 // CHECK11-NEXT:  entry:
2594 // CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
2595 // CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
2596 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
2597 // CHECK11-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
2598 // CHECK11-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
2599 // CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
2600 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
2601 // CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
2602 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]])
2603 // CHECK11-NEXT:    ret void
2604 //
2605 //
2606 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l100.omp_outlined
2607 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2608 // CHECK11-NEXT:  entry:
2609 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2610 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2611 // CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 4
2612 // CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
2613 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
2614 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2615 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2616 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2617 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2618 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
2619 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2620 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2621 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2622 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2623 // CHECK11-NEXT:    [[I3:%.*]] = alloca i32, align 4
2624 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2625 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2626 // CHECK11-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 4
2627 // CHECK11-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
2628 // CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
2629 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4
2630 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
2631 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4
2632 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
2633 // CHECK11-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
2634 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2635 // CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
2636 // CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2637 // CHECK11-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2638 // CHECK11-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
2639 // CHECK11-NEXT:    store i32 0, ptr [[I]], align 4
2640 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2641 // CHECK11-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
2642 // CHECK11-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2643 // CHECK11:       omp.precond.then:
2644 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2645 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2646 // CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
2647 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2648 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2649 // CHECK11-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2650 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
2651 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2652 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2653 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2654 // CHECK11-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
2655 // CHECK11-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2656 // CHECK11:       cond.true:
2657 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2658 // CHECK11-NEXT:    br label [[COND_END:%.*]]
2659 // CHECK11:       cond.false:
2660 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2661 // CHECK11-NEXT:    br label [[COND_END]]
2662 // CHECK11:       cond.end:
2663 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
2664 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2665 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2666 // CHECK11-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
2667 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2668 // CHECK11:       omp.inner.for.cond:
2669 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]
2670 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]]
2671 // CHECK11-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
2672 // CHECK11-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2673 // CHECK11:       omp.inner.for.body:
2674 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
2675 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
2676 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2677 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP10]]
2678 // CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP10]]
2679 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP17]]
2680 // CHECK11-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]]
2681 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2682 // CHECK11:       omp.body.continue:
2683 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2684 // CHECK11:       omp.inner.for.inc:
2685 // CHECK11-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
2686 // CHECK11-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1
2687 // CHECK11-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
2688 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
2689 // CHECK11:       omp.inner.for.end:
2690 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2691 // CHECK11:       omp.loop.exit:
2692 // CHECK11-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2693 // CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
2694 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])
2695 // CHECK11-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2696 // CHECK11-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
2697 // CHECK11-NEXT:    br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2698 // CHECK11:       .omp.final.then:
2699 // CHECK11-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2700 // CHECK11-NEXT:    [[SUB7:%.*]] = sub nsw i32 [[TMP23]], 0
2701 // CHECK11-NEXT:    [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
2702 // CHECK11-NEXT:    [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
2703 // CHECK11-NEXT:    [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
2704 // CHECK11-NEXT:    store i32 [[ADD10]], ptr [[I3]], align 4
2705 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2706 // CHECK11:       .omp.final.done:
2707 // CHECK11-NEXT:    br label [[OMP_PRECOND_END]]
2708 // CHECK11:       omp.precond.end:
2709 // CHECK11-NEXT:    ret void
2710 //
2711 //
2712 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105
2713 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2714 // CHECK11-NEXT:  entry:
2715 // CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
2716 // CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
2717 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
2718 // CHECK11-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
2719 // CHECK11-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
2720 // CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
2721 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
2722 // CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
2723 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]])
2724 // CHECK11-NEXT:    ret void
2725 //
2726 //
2727 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l105.omp_outlined
2728 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2729 // CHECK11-NEXT:  entry:
2730 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2731 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2732 // CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 4
2733 // CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
2734 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
2735 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2736 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2737 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2738 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2739 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
2740 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2741 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2742 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2743 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2744 // CHECK11-NEXT:    [[I3:%.*]] = alloca i32, align 4
2745 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2746 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2747 // CHECK11-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 4
2748 // CHECK11-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
2749 // CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
2750 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4
2751 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
2752 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4
2753 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
2754 // CHECK11-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
2755 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2756 // CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
2757 // CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2758 // CHECK11-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2759 // CHECK11-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
2760 // CHECK11-NEXT:    store i32 0, ptr [[I]], align 4
2761 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2762 // CHECK11-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
2763 // CHECK11-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2764 // CHECK11:       omp.precond.then:
2765 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2766 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2767 // CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
2768 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2769 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2770 // CHECK11-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2771 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
2772 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2773 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2774 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2775 // CHECK11-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
2776 // CHECK11-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2777 // CHECK11:       cond.true:
2778 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2779 // CHECK11-NEXT:    br label [[COND_END:%.*]]
2780 // CHECK11:       cond.false:
2781 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2782 // CHECK11-NEXT:    br label [[COND_END]]
2783 // CHECK11:       cond.end:
2784 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
2785 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2786 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2787 // CHECK11-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
2788 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2789 // CHECK11:       omp.inner.for.cond:
2790 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]]
2791 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP16]]
2792 // CHECK11-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
2793 // CHECK11-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2794 // CHECK11:       omp.inner.for.body:
2795 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]
2796 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
2797 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2798 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP16]]
2799 // CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP16]]
2800 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP17]]
2801 // CHECK11-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP16]]
2802 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2803 // CHECK11:       omp.body.continue:
2804 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2805 // CHECK11:       omp.inner.for.inc:
2806 // CHECK11-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]
2807 // CHECK11-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP18]], 1
2808 // CHECK11-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]
2809 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
2810 // CHECK11:       omp.inner.for.end:
2811 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2812 // CHECK11:       omp.loop.exit:
2813 // CHECK11-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2814 // CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
2815 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])
2816 // CHECK11-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2817 // CHECK11-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
2818 // CHECK11-NEXT:    br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2819 // CHECK11:       .omp.final.then:
2820 // CHECK11-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2821 // CHECK11-NEXT:    [[SUB7:%.*]] = sub nsw i32 [[TMP23]], 0
2822 // CHECK11-NEXT:    [[DIV8:%.*]] = sdiv i32 [[SUB7]], 1
2823 // CHECK11-NEXT:    [[MUL9:%.*]] = mul nsw i32 [[DIV8]], 1
2824 // CHECK11-NEXT:    [[ADD10:%.*]] = add nsw i32 0, [[MUL9]]
2825 // CHECK11-NEXT:    store i32 [[ADD10]], ptr [[I3]], align 4
2826 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2827 // CHECK11:       .omp.final.done:
2828 // CHECK11-NEXT:    br label [[OMP_PRECOND_END]]
2829 // CHECK11:       omp.precond.end:
2830 // CHECK11-NEXT:    ret void
2831 //
2832 //
2833 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110
2834 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2835 // CHECK11-NEXT:  entry:
2836 // CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
2837 // CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
2838 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
2839 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2840 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
2841 // CHECK11-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
2842 // CHECK11-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
2843 // CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
2844 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
2845 // CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
2846 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
2847 // CHECK11-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
2848 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2849 // CHECK11-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
2850 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
2851 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP4]])
2852 // CHECK11-NEXT:    ret void
2853 //
2854 //
2855 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l110.omp_outlined
2856 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
2857 // CHECK11-NEXT:  entry:
2858 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2859 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2860 // CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 4
2861 // CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
2862 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
2863 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
2864 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2865 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2866 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2867 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
2868 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
2869 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2870 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2871 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2872 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2873 // CHECK11-NEXT:    [[I4:%.*]] = alloca i32, align 4
2874 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2875 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2876 // CHECK11-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 4
2877 // CHECK11-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
2878 // CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
2879 // CHECK11-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
2880 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4
2881 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
2882 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4
2883 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
2884 // CHECK11-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 4
2885 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2886 // CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
2887 // CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2888 // CHECK11-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
2889 // CHECK11-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
2890 // CHECK11-NEXT:    store i32 0, ptr [[I]], align 4
2891 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2892 // CHECK11-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
2893 // CHECK11-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2894 // CHECK11:       omp.precond.then:
2895 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2896 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
2897 // CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
2898 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2899 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2900 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
2901 // CHECK11-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2902 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
2903 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
2904 // CHECK11-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
2905 // CHECK11:       omp.dispatch.cond:
2906 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2907 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
2908 // CHECK11-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
2909 // CHECK11-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2910 // CHECK11:       cond.true:
2911 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
2912 // CHECK11-NEXT:    br label [[COND_END:%.*]]
2913 // CHECK11:       cond.false:
2914 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2915 // CHECK11-NEXT:    br label [[COND_END]]
2916 // CHECK11:       cond.end:
2917 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
2918 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2919 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2920 // CHECK11-NEXT:    store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4
2921 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2922 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2923 // CHECK11-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
2924 // CHECK11-NEXT:    br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2925 // CHECK11:       omp.dispatch.body:
2926 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2927 // CHECK11:       omp.inner.for.cond:
2928 // CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]]
2929 // CHECK11-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP19]]
2930 // CHECK11-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
2931 // CHECK11-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2932 // CHECK11:       omp.inner.for.body:
2933 // CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]
2934 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
2935 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2936 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP19]]
2937 // CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP19]]
2938 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP20]]
2939 // CHECK11-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP19]]
2940 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2941 // CHECK11:       omp.body.continue:
2942 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2943 // CHECK11:       omp.inner.for.inc:
2944 // CHECK11-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]
2945 // CHECK11-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP21]], 1
2946 // CHECK11-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]
2947 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
2948 // CHECK11:       omp.inner.for.end:
2949 // CHECK11-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
2950 // CHECK11:       omp.dispatch.inc:
2951 // CHECK11-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2952 // CHECK11-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2953 // CHECK11-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
2954 // CHECK11-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_LB]], align 4
2955 // CHECK11-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2956 // CHECK11-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2957 // CHECK11-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
2958 // CHECK11-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_UB]], align 4
2959 // CHECK11-NEXT:    br label [[OMP_DISPATCH_COND]]
2960 // CHECK11:       omp.dispatch.end:
2961 // CHECK11-NEXT:    [[TMP26:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2962 // CHECK11-NEXT:    [[TMP27:%.*]] = load i32, ptr [[TMP26]], align 4
2963 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP27]])
2964 // CHECK11-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2965 // CHECK11-NEXT:    [[TMP29:%.*]] = icmp ne i32 [[TMP28]], 0
2966 // CHECK11-NEXT:    br i1 [[TMP29]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2967 // CHECK11:       .omp.final.then:
2968 // CHECK11-NEXT:    [[TMP30:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2969 // CHECK11-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP30]], 0
2970 // CHECK11-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
2971 // CHECK11-NEXT:    [[MUL13:%.*]] = mul nsw i32 [[DIV12]], 1
2972 // CHECK11-NEXT:    [[ADD14:%.*]] = add nsw i32 0, [[MUL13]]
2973 // CHECK11-NEXT:    store i32 [[ADD14]], ptr [[I4]], align 4
2974 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2975 // CHECK11:       .omp.final.done:
2976 // CHECK11-NEXT:    br label [[OMP_PRECOND_END]]
2977 // CHECK11:       omp.precond.end:
2978 // CHECK11-NEXT:    ret void
2979 //
2980 //
2981 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
2982 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
2983 // CHECK11-NEXT:  entry:
2984 // CHECK11-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
2985 // CHECK11-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
2986 // CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
2987 // CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
2988 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
2989 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2990 // CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2991 // CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 4
2992 // CHECK11-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 4
2993 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 4
2994 // CHECK11-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
2995 // CHECK11-NEXT:    [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2996 // CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [1 x ptr], align 4
2997 // CHECK11-NEXT:    [[DOTOFFLOAD_PTRS9:%.*]] = alloca [1 x ptr], align 4
2998 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [1 x ptr], align 4
2999 // CHECK11-NEXT:    [[_TMP11:%.*]] = alloca i32, align 4
3000 // CHECK11-NEXT:    [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3001 // CHECK11-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
3002 // CHECK11-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3003 // CHECK11-NEXT:    store ptr [[A]], ptr [[TMP0]], align 4
3004 // CHECK11-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3005 // CHECK11-NEXT:    store ptr [[A]], ptr [[TMP1]], align 4
3006 // CHECK11-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3007 // CHECK11-NEXT:    store ptr null, ptr [[TMP2]], align 4
3008 // CHECK11-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3009 // CHECK11-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3010 // CHECK11-NEXT:    [[TMP5:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
3011 // CHECK11-NEXT:    store i32 3, ptr [[TMP5]], align 4
3012 // CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
3013 // CHECK11-NEXT:    store i32 1, ptr [[TMP6]], align 4
3014 // CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
3015 // CHECK11-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 4
3016 // CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
3017 // CHECK11-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 4
3018 // CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
3019 // CHECK11-NEXT:    store ptr @.offload_sizes.5, ptr [[TMP9]], align 4
3020 // CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
3021 // CHECK11-NEXT:    store ptr @.offload_maptypes.6, ptr [[TMP10]], align 4
3022 // CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
3023 // CHECK11-NEXT:    store ptr null, ptr [[TMP11]], align 4
3024 // CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
3025 // CHECK11-NEXT:    store ptr null, ptr [[TMP12]], align 4
3026 // CHECK11-NEXT:    [[TMP13:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
3027 // CHECK11-NEXT:    store i64 10, ptr [[TMP13]], align 8
3028 // CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
3029 // CHECK11-NEXT:    store i64 0, ptr [[TMP14]], align 8
3030 // CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
3031 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
3032 // CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
3033 // CHECK11-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP16]], align 4
3034 // CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
3035 // CHECK11-NEXT:    store i32 0, ptr [[TMP17]], align 4
3036 // CHECK11-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79.region_id, ptr [[KERNEL_ARGS]])
3037 // CHECK11-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
3038 // CHECK11-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3039 // CHECK11:       omp_offload.failed:
3040 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79(ptr [[A]]) #[[ATTR3]]
3041 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3042 // CHECK11:       omp_offload.cont:
3043 // CHECK11-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
3044 // CHECK11-NEXT:    store ptr [[A]], ptr [[TMP20]], align 4
3045 // CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
3046 // CHECK11-NEXT:    store ptr [[A]], ptr [[TMP21]], align 4
3047 // CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
3048 // CHECK11-NEXT:    store ptr null, ptr [[TMP22]], align 4
3049 // CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
3050 // CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
3051 // CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0
3052 // CHECK11-NEXT:    store i32 3, ptr [[TMP25]], align 4
3053 // CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1
3054 // CHECK11-NEXT:    store i32 1, ptr [[TMP26]], align 4
3055 // CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2
3056 // CHECK11-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 4
3057 // CHECK11-NEXT:    [[TMP28:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3
3058 // CHECK11-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 4
3059 // CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4
3060 // CHECK11-NEXT:    store ptr @.offload_sizes.7, ptr [[TMP29]], align 4
3061 // CHECK11-NEXT:    [[TMP30:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5
3062 // CHECK11-NEXT:    store ptr @.offload_maptypes.8, ptr [[TMP30]], align 4
3063 // CHECK11-NEXT:    [[TMP31:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6
3064 // CHECK11-NEXT:    store ptr null, ptr [[TMP31]], align 4
3065 // CHECK11-NEXT:    [[TMP32:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7
3066 // CHECK11-NEXT:    store ptr null, ptr [[TMP32]], align 4
3067 // CHECK11-NEXT:    [[TMP33:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8
3068 // CHECK11-NEXT:    store i64 10, ptr [[TMP33]], align 8
3069 // CHECK11-NEXT:    [[TMP34:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9
3070 // CHECK11-NEXT:    store i64 0, ptr [[TMP34]], align 8
3071 // CHECK11-NEXT:    [[TMP35:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10
3072 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
3073 // CHECK11-NEXT:    [[TMP36:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11
3074 // CHECK11-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP36]], align 4
3075 // CHECK11-NEXT:    [[TMP37:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12
3076 // CHECK11-NEXT:    store i32 0, ptr [[TMP37]], align 4
3077 // CHECK11-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, ptr [[KERNEL_ARGS5]])
3078 // CHECK11-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
3079 // CHECK11-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
3080 // CHECK11:       omp_offload.failed6:
3081 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84(ptr [[A]]) #[[ATTR3]]
3082 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
3083 // CHECK11:       omp_offload.cont7:
3084 // CHECK11-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
3085 // CHECK11-NEXT:    store ptr [[A]], ptr [[TMP40]], align 4
3086 // CHECK11-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
3087 // CHECK11-NEXT:    store ptr [[A]], ptr [[TMP41]], align 4
3088 // CHECK11-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0
3089 // CHECK11-NEXT:    store ptr null, ptr [[TMP42]], align 4
3090 // CHECK11-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
3091 // CHECK11-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
3092 // CHECK11-NEXT:    [[TMP45:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0
3093 // CHECK11-NEXT:    store i32 3, ptr [[TMP45]], align 4
3094 // CHECK11-NEXT:    [[TMP46:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1
3095 // CHECK11-NEXT:    store i32 1, ptr [[TMP46]], align 4
3096 // CHECK11-NEXT:    [[TMP47:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2
3097 // CHECK11-NEXT:    store ptr [[TMP43]], ptr [[TMP47]], align 4
3098 // CHECK11-NEXT:    [[TMP48:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3
3099 // CHECK11-NEXT:    store ptr [[TMP44]], ptr [[TMP48]], align 4
3100 // CHECK11-NEXT:    [[TMP49:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4
3101 // CHECK11-NEXT:    store ptr @.offload_sizes.9, ptr [[TMP49]], align 4
3102 // CHECK11-NEXT:    [[TMP50:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5
3103 // CHECK11-NEXT:    store ptr @.offload_maptypes.10, ptr [[TMP50]], align 4
3104 // CHECK11-NEXT:    [[TMP51:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6
3105 // CHECK11-NEXT:    store ptr null, ptr [[TMP51]], align 4
3106 // CHECK11-NEXT:    [[TMP52:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7
3107 // CHECK11-NEXT:    store ptr null, ptr [[TMP52]], align 4
3108 // CHECK11-NEXT:    [[TMP53:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8
3109 // CHECK11-NEXT:    store i64 10, ptr [[TMP53]], align 8
3110 // CHECK11-NEXT:    [[TMP54:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9
3111 // CHECK11-NEXT:    store i64 0, ptr [[TMP54]], align 8
3112 // CHECK11-NEXT:    [[TMP55:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10
3113 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4
3114 // CHECK11-NEXT:    [[TMP56:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11
3115 // CHECK11-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP56]], align 4
3116 // CHECK11-NEXT:    [[TMP57:%.*]] = getelementptr inbounds nuw [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12
3117 // CHECK11-NEXT:    store i32 0, ptr [[TMP57]], align 4
3118 // CHECK11-NEXT:    [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89.region_id, ptr [[KERNEL_ARGS12]])
3119 // CHECK11-NEXT:    [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0
3120 // CHECK11-NEXT:    br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
3121 // CHECK11:       omp_offload.failed13:
3122 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89(ptr [[A]]) #[[ATTR3]]
3123 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT14]]
3124 // CHECK11:       omp_offload.cont14:
3125 // CHECK11-NEXT:    ret i32 0
3126 //
3127 //
3128 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79
3129 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
3130 // CHECK11-NEXT:  entry:
3131 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
3132 // CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
3133 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
3134 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79.omp_outlined, ptr [[TMP0]])
3135 // CHECK11-NEXT:    ret void
3136 //
3137 //
3138 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l79.omp_outlined
3139 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
3140 // CHECK11-NEXT:  entry:
3141 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
3142 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
3143 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
3144 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3145 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3146 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3147 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3148 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3149 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3150 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
3151 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
3152 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
3153 // CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
3154 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
3155 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3156 // CHECK11-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
3157 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3158 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3159 // CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3160 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
3161 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3162 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3163 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
3164 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3165 // CHECK11:       cond.true:
3166 // CHECK11-NEXT:    br label [[COND_END:%.*]]
3167 // CHECK11:       cond.false:
3168 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3169 // CHECK11-NEXT:    br label [[COND_END]]
3170 // CHECK11:       cond.end:
3171 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3172 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3173 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3174 // CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
3175 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3176 // CHECK11:       omp.inner.for.cond:
3177 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]]
3178 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP22]]
3179 // CHECK11-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3180 // CHECK11-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3181 // CHECK11:       omp.inner.for.body:
3182 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]
3183 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
3184 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3185 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]]
3186 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]]
3187 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP9]]
3188 // CHECK11-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP22]]
3189 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3190 // CHECK11:       omp.body.continue:
3191 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3192 // CHECK11:       omp.inner.for.inc:
3193 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]
3194 // CHECK11-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
3195 // CHECK11-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]
3196 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
3197 // CHECK11:       omp.inner.for.end:
3198 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3199 // CHECK11:       omp.loop.exit:
3200 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
3201 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3202 // CHECK11-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3203 // CHECK11-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3204 // CHECK11:       .omp.final.then:
3205 // CHECK11-NEXT:    store i32 10, ptr [[I]], align 4
3206 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3207 // CHECK11:       .omp.final.done:
3208 // CHECK11-NEXT:    ret void
3209 //
3210 //
3211 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84
3212 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
3213 // CHECK11-NEXT:  entry:
3214 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
3215 // CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
3216 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
3217 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.omp_outlined, ptr [[TMP0]])
3218 // CHECK11-NEXT:    ret void
3219 //
3220 //
3221 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.omp_outlined
3222 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
3223 // CHECK11-NEXT:  entry:
3224 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
3225 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
3226 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
3227 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3228 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3229 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3230 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3231 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3232 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3233 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
3234 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
3235 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
3236 // CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
3237 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
3238 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3239 // CHECK11-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
3240 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3241 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3242 // CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3243 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
3244 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3245 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3246 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
3247 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3248 // CHECK11:       cond.true:
3249 // CHECK11-NEXT:    br label [[COND_END:%.*]]
3250 // CHECK11:       cond.false:
3251 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3252 // CHECK11-NEXT:    br label [[COND_END]]
3253 // CHECK11:       cond.end:
3254 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3255 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3256 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3257 // CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
3258 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3259 // CHECK11:       omp.inner.for.cond:
3260 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25:![0-9]+]]
3261 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP25]]
3262 // CHECK11-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3263 // CHECK11-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3264 // CHECK11:       omp.inner.for.body:
3265 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]
3266 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
3267 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3268 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP25]]
3269 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP25]]
3270 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP9]]
3271 // CHECK11-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP25]]
3272 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3273 // CHECK11:       omp.body.continue:
3274 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3275 // CHECK11:       omp.inner.for.inc:
3276 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]
3277 // CHECK11-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
3278 // CHECK11-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]
3279 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
3280 // CHECK11:       omp.inner.for.end:
3281 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3282 // CHECK11:       omp.loop.exit:
3283 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
3284 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3285 // CHECK11-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
3286 // CHECK11-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3287 // CHECK11:       .omp.final.then:
3288 // CHECK11-NEXT:    store i32 10, ptr [[I]], align 4
3289 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3290 // CHECK11:       .omp.final.done:
3291 // CHECK11-NEXT:    ret void
3292 //
3293 //
3294 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89
3295 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
3296 // CHECK11-NEXT:  entry:
3297 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
3298 // CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
3299 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
3300 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89.omp_outlined, ptr [[TMP0]])
3301 // CHECK11-NEXT:    ret void
3302 //
3303 //
3304 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l89.omp_outlined
3305 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
3306 // CHECK11-NEXT:  entry:
3307 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
3308 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
3309 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
3310 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3311 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3312 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3313 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3314 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3315 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3316 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
3317 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
3318 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
3319 // CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
3320 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
3321 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3322 // CHECK11-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
3323 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3324 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3325 // CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3326 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
3327 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 10)
3328 // CHECK11-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
3329 // CHECK11:       omp.dispatch.cond:
3330 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3331 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
3332 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3333 // CHECK11:       cond.true:
3334 // CHECK11-NEXT:    br label [[COND_END:%.*]]
3335 // CHECK11:       cond.false:
3336 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3337 // CHECK11-NEXT:    br label [[COND_END]]
3338 // CHECK11:       cond.end:
3339 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3340 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3341 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3342 // CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
3343 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3344 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3345 // CHECK11-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3346 // CHECK11-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3347 // CHECK11:       omp.dispatch.body:
3348 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3349 // CHECK11:       omp.inner.for.cond:
3350 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28:![0-9]+]]
3351 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP28]]
3352 // CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3353 // CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3354 // CHECK11:       omp.inner.for.body:
3355 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]]
3356 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3357 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3358 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP28]]
3359 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP28]]
3360 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP11]]
3361 // CHECK11-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP28]]
3362 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3363 // CHECK11:       omp.body.continue:
3364 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3365 // CHECK11:       omp.inner.for.inc:
3366 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]]
3367 // CHECK11-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
3368 // CHECK11-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP28]]
3369 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP29:![0-9]+]]
3370 // CHECK11:       omp.inner.for.end:
3371 // CHECK11-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
3372 // CHECK11:       omp.dispatch.inc:
3373 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3374 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3375 // CHECK11-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
3376 // CHECK11-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
3377 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3378 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3379 // CHECK11-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
3380 // CHECK11-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
3381 // CHECK11-NEXT:    br label [[OMP_DISPATCH_COND]]
3382 // CHECK11:       omp.dispatch.end:
3383 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
3384 // CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
3385 // CHECK11-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
3386 // CHECK11-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
3387 // CHECK11:       .omp.final.then:
3388 // CHECK11-NEXT:    store i32 10, ptr [[I]], align 4
3389 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
3390 // CHECK11:       .omp.final.done:
3391 // CHECK11-NEXT:    ret void
3392 //
3393 //
3394 // CHECK13-LABEL: define {{[^@]+}}@main
3395 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
3396 // CHECK13-NEXT:  entry:
3397 // CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3398 // CHECK13-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
3399 // CHECK13-NEXT:    [[ARGV_ADDR:%.*]] = alloca ptr, align 8
3400 // CHECK13-NEXT:    [[N:%.*]] = alloca i32, align 4
3401 // CHECK13-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 8
3402 // CHECK13-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
3403 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3404 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3405 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3406 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3407 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3408 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
3409 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3410 // CHECK13-NEXT:    [[I3:%.*]] = alloca i32, align 4
3411 // CHECK13-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
3412 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
3413 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4
3414 // CHECK13-NEXT:    [[DOTOMP_LB16:%.*]] = alloca i32, align 4
3415 // CHECK13-NEXT:    [[DOTOMP_UB17:%.*]] = alloca i32, align 4
3416 // CHECK13-NEXT:    [[I18:%.*]] = alloca i32, align 4
3417 // CHECK13-NEXT:    [[DOTOMP_IV21:%.*]] = alloca i32, align 4
3418 // CHECK13-NEXT:    [[I22:%.*]] = alloca i32, align 4
3419 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4
3420 // CHECK13-NEXT:    [[_TMP40:%.*]] = alloca i32, align 4
3421 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
3422 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_42:%.*]] = alloca i32, align 4
3423 // CHECK13-NEXT:    [[DOTOMP_LB46:%.*]] = alloca i32, align 4
3424 // CHECK13-NEXT:    [[DOTOMP_UB47:%.*]] = alloca i32, align 4
3425 // CHECK13-NEXT:    [[I48:%.*]] = alloca i32, align 4
3426 // CHECK13-NEXT:    [[DOTOMP_IV51:%.*]] = alloca i32, align 4
3427 // CHECK13-NEXT:    [[I52:%.*]] = alloca i32, align 4
3428 // CHECK13-NEXT:    store i32 0, ptr [[RETVAL]], align 4
3429 // CHECK13-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
3430 // CHECK13-NEXT:    store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8
3431 // CHECK13-NEXT:    store i32 100, ptr [[N]], align 4
3432 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 4
3433 // CHECK13-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
3434 // CHECK13-NEXT:    [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()
3435 // CHECK13-NEXT:    store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8
3436 // CHECK13-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
3437 // CHECK13-NEXT:    store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8
3438 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N]], align 4
3439 // CHECK13-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
3440 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
3441 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
3442 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3443 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3444 // CHECK13-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
3445 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3446 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
3447 // CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
3448 // CHECK13-NEXT:    store i32 0, ptr [[I]], align 4
3449 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
3450 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP6]]
3451 // CHECK13-NEXT:    br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
3452 // CHECK13:       simd.if.then:
3453 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3454 // CHECK13-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
3455 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3456 // CHECK13:       omp.inner.for.cond:
3457 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
3458 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]
3459 // CHECK13-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3460 // CHECK13-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3461 // CHECK13:       omp.inner.for.body:
3462 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3463 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3464 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3465 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP2]]
3466 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP2]]
3467 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
3468 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 [[IDXPROM]]
3469 // CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]]
3470 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3471 // CHECK13:       omp.body.continue:
3472 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3473 // CHECK13:       omp.inner.for.inc:
3474 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3475 // CHECK13-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP12]], 1
3476 // CHECK13-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
3477 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
3478 // CHECK13:       omp.inner.for.end:
3479 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
3480 // CHECK13-NEXT:    [[SUB6:%.*]] = sub nsw i32 [[TMP13]], 0
3481 // CHECK13-NEXT:    [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
3482 // CHECK13-NEXT:    [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1
3483 // CHECK13-NEXT:    [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
3484 // CHECK13-NEXT:    store i32 [[ADD9]], ptr [[I3]], align 4
3485 // CHECK13-NEXT:    br label [[SIMD_IF_END]]
3486 // CHECK13:       simd.if.end:
3487 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[N]], align 4
3488 // CHECK13-NEXT:    store i32 [[TMP14]], ptr [[DOTCAPTURE_EXPR_11]], align 4
3489 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 4
3490 // CHECK13-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[TMP15]], 0
3491 // CHECK13-NEXT:    [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1
3492 // CHECK13-NEXT:    [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1
3493 // CHECK13-NEXT:    store i32 [[SUB15]], ptr [[DOTCAPTURE_EXPR_12]], align 4
3494 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB16]], align 4
3495 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_12]], align 4
3496 // CHECK13-NEXT:    store i32 [[TMP16]], ptr [[DOTOMP_UB17]], align 4
3497 // CHECK13-NEXT:    store i32 0, ptr [[I18]], align 4
3498 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 4
3499 // CHECK13-NEXT:    [[CMP19:%.*]] = icmp slt i32 0, [[TMP17]]
3500 // CHECK13-NEXT:    br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END38:%.*]]
3501 // CHECK13:       simd.if.then20:
3502 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB16]], align 4
3503 // CHECK13-NEXT:    store i32 [[TMP18]], ptr [[DOTOMP_IV21]], align 4
3504 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND23:%.*]]
3505 // CHECK13:       omp.inner.for.cond23:
3506 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
3507 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB17]], align 4, !llvm.access.group [[ACC_GRP6]]
3508 // CHECK13-NEXT:    [[CMP24:%.*]] = icmp sle i32 [[TMP19]], [[TMP20]]
3509 // CHECK13-NEXT:    br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]]
3510 // CHECK13:       omp.inner.for.body25:
3511 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP6]]
3512 // CHECK13-NEXT:    [[MUL26:%.*]] = mul nsw i32 [[TMP21]], 1
3513 // CHECK13-NEXT:    [[ADD27:%.*]] = add nsw i32 0, [[MUL26]]
3514 // CHECK13-NEXT:    store i32 [[ADD27]], ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP6]]
3515 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32, ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP6]]
3516 // CHECK13-NEXT:    [[IDXPROM28:%.*]] = sext i32 [[TMP22]] to i64
3517 // CHECK13-NEXT:    [[ARRAYIDX29:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 [[IDXPROM28]]
3518 // CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX29]], align 4, !llvm.access.group [[ACC_GRP6]]
3519 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE30:%.*]]
3520 // CHECK13:       omp.body.continue30:
3521 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC31:%.*]]
3522 // CHECK13:       omp.inner.for.inc31:
3523 // CHECK13-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP6]]
3524 // CHECK13-NEXT:    [[ADD32:%.*]] = add nsw i32 [[TMP23]], 1
3525 // CHECK13-NEXT:    store i32 [[ADD32]], ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP6]]
3526 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP7:![0-9]+]]
3527 // CHECK13:       omp.inner.for.end33:
3528 // CHECK13-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 4
3529 // CHECK13-NEXT:    [[SUB34:%.*]] = sub nsw i32 [[TMP24]], 0
3530 // CHECK13-NEXT:    [[DIV35:%.*]] = sdiv i32 [[SUB34]], 1
3531 // CHECK13-NEXT:    [[MUL36:%.*]] = mul nsw i32 [[DIV35]], 1
3532 // CHECK13-NEXT:    [[ADD37:%.*]] = add nsw i32 0, [[MUL36]]
3533 // CHECK13-NEXT:    store i32 [[ADD37]], ptr [[I22]], align 4
3534 // CHECK13-NEXT:    br label [[SIMD_IF_END38]]
3535 // CHECK13:       simd.if.end38:
3536 // CHECK13-NEXT:    [[TMP25:%.*]] = load i32, ptr [[N]], align 4
3537 // CHECK13-NEXT:    store i32 [[TMP25]], ptr [[DOTCAPTURE_EXPR_39]], align 4
3538 // CHECK13-NEXT:    [[TMP26:%.*]] = load i32, ptr [[N]], align 4
3539 // CHECK13-NEXT:    store i32 [[TMP26]], ptr [[DOTCAPTURE_EXPR_41]], align 4
3540 // CHECK13-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 4
3541 // CHECK13-NEXT:    [[SUB43:%.*]] = sub nsw i32 [[TMP27]], 0
3542 // CHECK13-NEXT:    [[DIV44:%.*]] = sdiv i32 [[SUB43]], 1
3543 // CHECK13-NEXT:    [[SUB45:%.*]] = sub nsw i32 [[DIV44]], 1
3544 // CHECK13-NEXT:    store i32 [[SUB45]], ptr [[DOTCAPTURE_EXPR_42]], align 4
3545 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB46]], align 4
3546 // CHECK13-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_42]], align 4
3547 // CHECK13-NEXT:    store i32 [[TMP28]], ptr [[DOTOMP_UB47]], align 4
3548 // CHECK13-NEXT:    store i32 0, ptr [[I48]], align 4
3549 // CHECK13-NEXT:    [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 4
3550 // CHECK13-NEXT:    [[CMP49:%.*]] = icmp slt i32 0, [[TMP29]]
3551 // CHECK13-NEXT:    br i1 [[CMP49]], label [[SIMD_IF_THEN50:%.*]], label [[SIMD_IF_END68:%.*]]
3552 // CHECK13:       simd.if.then50:
3553 // CHECK13-NEXT:    [[TMP30:%.*]] = load i32, ptr [[DOTOMP_LB46]], align 4
3554 // CHECK13-NEXT:    store i32 [[TMP30]], ptr [[DOTOMP_IV51]], align 4
3555 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND53:%.*]]
3556 // CHECK13:       omp.inner.for.cond53:
3557 // CHECK13-NEXT:    [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IV51]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
3558 // CHECK13-NEXT:    [[TMP32:%.*]] = load i32, ptr [[DOTOMP_UB47]], align 4, !llvm.access.group [[ACC_GRP9]]
3559 // CHECK13-NEXT:    [[CMP54:%.*]] = icmp sle i32 [[TMP31]], [[TMP32]]
3560 // CHECK13-NEXT:    br i1 [[CMP54]], label [[OMP_INNER_FOR_BODY55:%.*]], label [[OMP_INNER_FOR_END63:%.*]]
3561 // CHECK13:       omp.inner.for.body55:
3562 // CHECK13-NEXT:    [[TMP33:%.*]] = load i32, ptr [[DOTOMP_IV51]], align 4, !llvm.access.group [[ACC_GRP9]]
3563 // CHECK13-NEXT:    [[MUL56:%.*]] = mul nsw i32 [[TMP33]], 1
3564 // CHECK13-NEXT:    [[ADD57:%.*]] = add nsw i32 0, [[MUL56]]
3565 // CHECK13-NEXT:    store i32 [[ADD57]], ptr [[I52]], align 4, !llvm.access.group [[ACC_GRP9]]
3566 // CHECK13-NEXT:    [[TMP34:%.*]] = load i32, ptr [[I52]], align 4, !llvm.access.group [[ACC_GRP9]]
3567 // CHECK13-NEXT:    [[IDXPROM58:%.*]] = sext i32 [[TMP34]] to i64
3568 // CHECK13-NEXT:    [[ARRAYIDX59:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i64 [[IDXPROM58]]
3569 // CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX59]], align 4, !llvm.access.group [[ACC_GRP9]]
3570 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE60:%.*]]
3571 // CHECK13:       omp.body.continue60:
3572 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC61:%.*]]
3573 // CHECK13:       omp.inner.for.inc61:
3574 // CHECK13-NEXT:    [[TMP35:%.*]] = load i32, ptr [[DOTOMP_IV51]], align 4, !llvm.access.group [[ACC_GRP9]]
3575 // CHECK13-NEXT:    [[ADD62:%.*]] = add nsw i32 [[TMP35]], 1
3576 // CHECK13-NEXT:    store i32 [[ADD62]], ptr [[DOTOMP_IV51]], align 4, !llvm.access.group [[ACC_GRP9]]
3577 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND53]], !llvm.loop [[LOOP10:![0-9]+]]
3578 // CHECK13:       omp.inner.for.end63:
3579 // CHECK13-NEXT:    [[TMP36:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 4
3580 // CHECK13-NEXT:    [[SUB64:%.*]] = sub nsw i32 [[TMP36]], 0
3581 // CHECK13-NEXT:    [[DIV65:%.*]] = sdiv i32 [[SUB64]], 1
3582 // CHECK13-NEXT:    [[MUL66:%.*]] = mul nsw i32 [[DIV65]], 1
3583 // CHECK13-NEXT:    [[ADD67:%.*]] = add nsw i32 0, [[MUL66]]
3584 // CHECK13-NEXT:    store i32 [[ADD67]], ptr [[I52]], align 4
3585 // CHECK13-NEXT:    br label [[SIMD_IF_END68]]
3586 // CHECK13:       simd.if.end68:
3587 // CHECK13-NEXT:    [[TMP37:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
3588 // CHECK13-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP37]])
3589 // CHECK13-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
3590 // CHECK13-NEXT:    [[TMP38:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8
3591 // CHECK13-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP38]])
3592 // CHECK13-NEXT:    [[TMP39:%.*]] = load i32, ptr [[RETVAL]], align 4
3593 // CHECK13-NEXT:    ret i32 [[TMP39]]
3594 //
3595 //
3596 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
3597 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
3598 // CHECK13-NEXT:  entry:
3599 // CHECK13-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
3600 // CHECK13-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
3601 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3602 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3603 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3604 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3605 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
3606 // CHECK13-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
3607 // CHECK13-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3608 // CHECK13-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3609 // CHECK13-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3610 // CHECK13-NEXT:    [[I6:%.*]] = alloca i32, align 4
3611 // CHECK13-NEXT:    [[_TMP18:%.*]] = alloca i32, align 4
3612 // CHECK13-NEXT:    [[DOTOMP_LB19:%.*]] = alloca i32, align 4
3613 // CHECK13-NEXT:    [[DOTOMP_UB20:%.*]] = alloca i32, align 4
3614 // CHECK13-NEXT:    [[DOTOMP_IV21:%.*]] = alloca i32, align 4
3615 // CHECK13-NEXT:    [[I22:%.*]] = alloca i32, align 4
3616 // CHECK13-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
3617 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3618 // CHECK13-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
3619 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3620 // CHECK13-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
3621 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3622 // CHECK13:       omp.inner.for.cond:
3623 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]
3624 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP12]]
3625 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3626 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3627 // CHECK13:       omp.inner.for.body:
3628 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]
3629 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3630 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3631 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]]
3632 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]]
3633 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64
3634 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
3635 // CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP12]]
3636 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3637 // CHECK13:       omp.body.continue:
3638 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3639 // CHECK13:       omp.inner.for.inc:
3640 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]
3641 // CHECK13-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1
3642 // CHECK13-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]
3643 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
3644 // CHECK13:       omp.inner.for.end:
3645 // CHECK13-NEXT:    store i32 10, ptr [[I]], align 4
3646 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB3]], align 4
3647 // CHECK13-NEXT:    store i32 9, ptr [[DOTOMP_UB4]], align 4
3648 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4
3649 // CHECK13-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV5]], align 4
3650 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
3651 // CHECK13:       omp.inner.for.cond7:
3652 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
3653 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP15]]
3654 // CHECK13-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3655 // CHECK13-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END17:%.*]]
3656 // CHECK13:       omp.inner.for.body9:
3657 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP15]]
3658 // CHECK13-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1
3659 // CHECK13-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3660 // CHECK13-NEXT:    store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP15]]
3661 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP15]]
3662 // CHECK13-NEXT:    [[IDXPROM12:%.*]] = sext i32 [[TMP10]] to i64
3663 // CHECK13-NEXT:    [[ARRAYIDX13:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i64 0, i64 [[IDXPROM12]]
3664 // CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX13]], align 4, !llvm.access.group [[ACC_GRP15]]
3665 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE14:%.*]]
3666 // CHECK13:       omp.body.continue14:
3667 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC15:%.*]]
3668 // CHECK13:       omp.inner.for.inc15:
3669 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP15]]
3670 // CHECK13-NEXT:    [[ADD16:%.*]] = add nsw i32 [[TMP11]], 1
3671 // CHECK13-NEXT:    store i32 [[ADD16]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP15]]
3672 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP16:![0-9]+]]
3673 // CHECK13:       omp.inner.for.end17:
3674 // CHECK13-NEXT:    store i32 10, ptr [[I6]], align 4
3675 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB19]], align 4
3676 // CHECK13-NEXT:    store i32 9, ptr [[DOTOMP_UB20]], align 4
3677 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB19]], align 4
3678 // CHECK13-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV21]], align 4
3679 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND23:%.*]]
3680 // CHECK13:       omp.inner.for.cond23:
3681 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
3682 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB20]], align 4, !llvm.access.group [[ACC_GRP18]]
3683 // CHECK13-NEXT:    [[CMP24:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
3684 // CHECK13-NEXT:    br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END33:%.*]]
3685 // CHECK13:       omp.inner.for.body25:
3686 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP18]]
3687 // CHECK13-NEXT:    [[MUL26:%.*]] = mul nsw i32 [[TMP15]], 1
3688 // CHECK13-NEXT:    [[ADD27:%.*]] = add nsw i32 0, [[MUL26]]
3689 // CHECK13-NEXT:    store i32 [[ADD27]], ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP18]]
3690 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP18]]
3691 // CHECK13-NEXT:    [[IDXPROM28:%.*]] = sext i32 [[TMP16]] to i64
3692 // CHECK13-NEXT:    [[ARRAYIDX29:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i64 0, i64 [[IDXPROM28]]
3693 // CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX29]], align 4, !llvm.access.group [[ACC_GRP18]]
3694 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE30:%.*]]
3695 // CHECK13:       omp.body.continue30:
3696 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC31:%.*]]
3697 // CHECK13:       omp.inner.for.inc31:
3698 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP18]]
3699 // CHECK13-NEXT:    [[ADD32:%.*]] = add nsw i32 [[TMP17]], 1
3700 // CHECK13-NEXT:    store i32 [[ADD32]], ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP18]]
3701 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP19:![0-9]+]]
3702 // CHECK13:       omp.inner.for.end33:
3703 // CHECK13-NEXT:    store i32 10, ptr [[I22]], align 4
3704 // CHECK13-NEXT:    ret i32 0
3705 //
3706 //
3707 // CHECK15-LABEL: define {{[^@]+}}@main
3708 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
3709 // CHECK15-NEXT:  entry:
3710 // CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3711 // CHECK15-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
3712 // CHECK15-NEXT:    [[ARGV_ADDR:%.*]] = alloca ptr, align 4
3713 // CHECK15-NEXT:    [[N:%.*]] = alloca i32, align 4
3714 // CHECK15-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 4
3715 // CHECK15-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 4
3716 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3717 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
3718 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
3719 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3720 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3721 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
3722 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3723 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
3724 // CHECK15-NEXT:    [[_TMP10:%.*]] = alloca i32, align 4
3725 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_11:%.*]] = alloca i32, align 4
3726 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_12:%.*]] = alloca i32, align 4
3727 // CHECK15-NEXT:    [[DOTOMP_LB16:%.*]] = alloca i32, align 4
3728 // CHECK15-NEXT:    [[DOTOMP_UB17:%.*]] = alloca i32, align 4
3729 // CHECK15-NEXT:    [[I18:%.*]] = alloca i32, align 4
3730 // CHECK15-NEXT:    [[DOTOMP_IV21:%.*]] = alloca i32, align 4
3731 // CHECK15-NEXT:    [[I22:%.*]] = alloca i32, align 4
3732 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_38:%.*]] = alloca i32, align 4
3733 // CHECK15-NEXT:    [[_TMP39:%.*]] = alloca i32, align 4
3734 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4
3735 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
3736 // CHECK15-NEXT:    [[DOTOMP_LB45:%.*]] = alloca i32, align 4
3737 // CHECK15-NEXT:    [[DOTOMP_UB46:%.*]] = alloca i32, align 4
3738 // CHECK15-NEXT:    [[I47:%.*]] = alloca i32, align 4
3739 // CHECK15-NEXT:    [[DOTOMP_IV50:%.*]] = alloca i32, align 4
3740 // CHECK15-NEXT:    [[I51:%.*]] = alloca i32, align 4
3741 // CHECK15-NEXT:    store i32 0, ptr [[RETVAL]], align 4
3742 // CHECK15-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
3743 // CHECK15-NEXT:    store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 4
3744 // CHECK15-NEXT:    store i32 100, ptr [[N]], align 4
3745 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 4
3746 // CHECK15-NEXT:    [[TMP1:%.*]] = call ptr @llvm.stacksave.p0()
3747 // CHECK15-NEXT:    store ptr [[TMP1]], ptr [[SAVED_STACK]], align 4
3748 // CHECK15-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
3749 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 4
3750 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N]], align 4
3751 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
3752 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
3753 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
3754 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
3755 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
3756 // CHECK15-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
3757 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3758 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
3759 // CHECK15-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4
3760 // CHECK15-NEXT:    store i32 0, ptr [[I]], align 4
3761 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
3762 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
3763 // CHECK15-NEXT:    br i1 [[CMP]], label [[SIMD_IF_THEN:%.*]], label [[SIMD_IF_END:%.*]]
3764 // CHECK15:       simd.if.then:
3765 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3766 // CHECK15-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
3767 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3768 // CHECK15:       omp.inner.for.cond:
3769 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]]
3770 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]]
3771 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3772 // CHECK15-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3773 // CHECK15:       omp.inner.for.body:
3774 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]
3775 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
3776 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3777 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP3]]
3778 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP3]]
3779 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 [[TMP10]]
3780 // CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP3]]
3781 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3782 // CHECK15:       omp.body.continue:
3783 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3784 // CHECK15:       omp.inner.for.inc:
3785 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]
3786 // CHECK15-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP11]], 1
3787 // CHECK15-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]
3788 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
3789 // CHECK15:       omp.inner.for.end:
3790 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
3791 // CHECK15-NEXT:    [[SUB6:%.*]] = sub nsw i32 [[TMP12]], 0
3792 // CHECK15-NEXT:    [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
3793 // CHECK15-NEXT:    [[MUL8:%.*]] = mul nsw i32 [[DIV7]], 1
3794 // CHECK15-NEXT:    [[ADD9:%.*]] = add nsw i32 0, [[MUL8]]
3795 // CHECK15-NEXT:    store i32 [[ADD9]], ptr [[I3]], align 4
3796 // CHECK15-NEXT:    br label [[SIMD_IF_END]]
3797 // CHECK15:       simd.if.end:
3798 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[N]], align 4
3799 // CHECK15-NEXT:    store i32 [[TMP13]], ptr [[DOTCAPTURE_EXPR_11]], align 4
3800 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 4
3801 // CHECK15-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[TMP14]], 0
3802 // CHECK15-NEXT:    [[DIV14:%.*]] = sdiv i32 [[SUB13]], 1
3803 // CHECK15-NEXT:    [[SUB15:%.*]] = sub nsw i32 [[DIV14]], 1
3804 // CHECK15-NEXT:    store i32 [[SUB15]], ptr [[DOTCAPTURE_EXPR_12]], align 4
3805 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB16]], align 4
3806 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_12]], align 4
3807 // CHECK15-NEXT:    store i32 [[TMP15]], ptr [[DOTOMP_UB17]], align 4
3808 // CHECK15-NEXT:    store i32 0, ptr [[I18]], align 4
3809 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 4
3810 // CHECK15-NEXT:    [[CMP19:%.*]] = icmp slt i32 0, [[TMP16]]
3811 // CHECK15-NEXT:    br i1 [[CMP19]], label [[SIMD_IF_THEN20:%.*]], label [[SIMD_IF_END37:%.*]]
3812 // CHECK15:       simd.if.then20:
3813 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB16]], align 4
3814 // CHECK15-NEXT:    store i32 [[TMP17]], ptr [[DOTOMP_IV21]], align 4
3815 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND23:%.*]]
3816 // CHECK15:       omp.inner.for.cond23:
3817 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]]
3818 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB17]], align 4, !llvm.access.group [[ACC_GRP7]]
3819 // CHECK15-NEXT:    [[CMP24:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
3820 // CHECK15-NEXT:    br i1 [[CMP24]], label [[OMP_INNER_FOR_BODY25:%.*]], label [[OMP_INNER_FOR_END32:%.*]]
3821 // CHECK15:       omp.inner.for.body25:
3822 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP7]]
3823 // CHECK15-NEXT:    [[MUL26:%.*]] = mul nsw i32 [[TMP20]], 1
3824 // CHECK15-NEXT:    [[ADD27:%.*]] = add nsw i32 0, [[MUL26]]
3825 // CHECK15-NEXT:    store i32 [[ADD27]], ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP7]]
3826 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, ptr [[I22]], align 4, !llvm.access.group [[ACC_GRP7]]
3827 // CHECK15-NEXT:    [[ARRAYIDX28:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 [[TMP21]]
3828 // CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX28]], align 4, !llvm.access.group [[ACC_GRP7]]
3829 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE29:%.*]]
3830 // CHECK15:       omp.body.continue29:
3831 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC30:%.*]]
3832 // CHECK15:       omp.inner.for.inc30:
3833 // CHECK15-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP7]]
3834 // CHECK15-NEXT:    [[ADD31:%.*]] = add nsw i32 [[TMP22]], 1
3835 // CHECK15-NEXT:    store i32 [[ADD31]], ptr [[DOTOMP_IV21]], align 4, !llvm.access.group [[ACC_GRP7]]
3836 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND23]], !llvm.loop [[LOOP8:![0-9]+]]
3837 // CHECK15:       omp.inner.for.end32:
3838 // CHECK15-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_11]], align 4
3839 // CHECK15-NEXT:    [[SUB33:%.*]] = sub nsw i32 [[TMP23]], 0
3840 // CHECK15-NEXT:    [[DIV34:%.*]] = sdiv i32 [[SUB33]], 1
3841 // CHECK15-NEXT:    [[MUL35:%.*]] = mul nsw i32 [[DIV34]], 1
3842 // CHECK15-NEXT:    [[ADD36:%.*]] = add nsw i32 0, [[MUL35]]
3843 // CHECK15-NEXT:    store i32 [[ADD36]], ptr [[I22]], align 4
3844 // CHECK15-NEXT:    br label [[SIMD_IF_END37]]
3845 // CHECK15:       simd.if.end37:
3846 // CHECK15-NEXT:    [[TMP24:%.*]] = load i32, ptr [[N]], align 4
3847 // CHECK15-NEXT:    store i32 [[TMP24]], ptr [[DOTCAPTURE_EXPR_38]], align 4
3848 // CHECK15-NEXT:    [[TMP25:%.*]] = load i32, ptr [[N]], align 4
3849 // CHECK15-NEXT:    store i32 [[TMP25]], ptr [[DOTCAPTURE_EXPR_40]], align 4
3850 // CHECK15-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 4
3851 // CHECK15-NEXT:    [[SUB42:%.*]] = sub nsw i32 [[TMP26]], 0
3852 // CHECK15-NEXT:    [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1
3853 // CHECK15-NEXT:    [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1
3854 // CHECK15-NEXT:    store i32 [[SUB44]], ptr [[DOTCAPTURE_EXPR_41]], align 4
3855 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB45]], align 4
3856 // CHECK15-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 4
3857 // CHECK15-NEXT:    store i32 [[TMP27]], ptr [[DOTOMP_UB46]], align 4
3858 // CHECK15-NEXT:    store i32 0, ptr [[I47]], align 4
3859 // CHECK15-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 4
3860 // CHECK15-NEXT:    [[CMP48:%.*]] = icmp slt i32 0, [[TMP28]]
3861 // CHECK15-NEXT:    br i1 [[CMP48]], label [[SIMD_IF_THEN49:%.*]], label [[SIMD_IF_END66:%.*]]
3862 // CHECK15:       simd.if.then49:
3863 // CHECK15-NEXT:    [[TMP29:%.*]] = load i32, ptr [[DOTOMP_LB45]], align 4
3864 // CHECK15-NEXT:    store i32 [[TMP29]], ptr [[DOTOMP_IV50]], align 4
3865 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND52:%.*]]
3866 // CHECK15:       omp.inner.for.cond52:
3867 // CHECK15-NEXT:    [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV50]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]
3868 // CHECK15-NEXT:    [[TMP31:%.*]] = load i32, ptr [[DOTOMP_UB46]], align 4, !llvm.access.group [[ACC_GRP10]]
3869 // CHECK15-NEXT:    [[CMP53:%.*]] = icmp sle i32 [[TMP30]], [[TMP31]]
3870 // CHECK15-NEXT:    br i1 [[CMP53]], label [[OMP_INNER_FOR_BODY54:%.*]], label [[OMP_INNER_FOR_END61:%.*]]
3871 // CHECK15:       omp.inner.for.body54:
3872 // CHECK15-NEXT:    [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV50]], align 4, !llvm.access.group [[ACC_GRP10]]
3873 // CHECK15-NEXT:    [[MUL55:%.*]] = mul nsw i32 [[TMP32]], 1
3874 // CHECK15-NEXT:    [[ADD56:%.*]] = add nsw i32 0, [[MUL55]]
3875 // CHECK15-NEXT:    store i32 [[ADD56]], ptr [[I51]], align 4, !llvm.access.group [[ACC_GRP10]]
3876 // CHECK15-NEXT:    [[TMP33:%.*]] = load i32, ptr [[I51]], align 4, !llvm.access.group [[ACC_GRP10]]
3877 // CHECK15-NEXT:    [[ARRAYIDX57:%.*]] = getelementptr inbounds i32, ptr [[VLA]], i32 [[TMP33]]
3878 // CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX57]], align 4, !llvm.access.group [[ACC_GRP10]]
3879 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE58:%.*]]
3880 // CHECK15:       omp.body.continue58:
3881 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC59:%.*]]
3882 // CHECK15:       omp.inner.for.inc59:
3883 // CHECK15-NEXT:    [[TMP34:%.*]] = load i32, ptr [[DOTOMP_IV50]], align 4, !llvm.access.group [[ACC_GRP10]]
3884 // CHECK15-NEXT:    [[ADD60:%.*]] = add nsw i32 [[TMP34]], 1
3885 // CHECK15-NEXT:    store i32 [[ADD60]], ptr [[DOTOMP_IV50]], align 4, !llvm.access.group [[ACC_GRP10]]
3886 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND52]], !llvm.loop [[LOOP11:![0-9]+]]
3887 // CHECK15:       omp.inner.for.end61:
3888 // CHECK15-NEXT:    [[TMP35:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 4
3889 // CHECK15-NEXT:    [[SUB62:%.*]] = sub nsw i32 [[TMP35]], 0
3890 // CHECK15-NEXT:    [[DIV63:%.*]] = sdiv i32 [[SUB62]], 1
3891 // CHECK15-NEXT:    [[MUL64:%.*]] = mul nsw i32 [[DIV63]], 1
3892 // CHECK15-NEXT:    [[ADD65:%.*]] = add nsw i32 0, [[MUL64]]
3893 // CHECK15-NEXT:    store i32 [[ADD65]], ptr [[I51]], align 4
3894 // CHECK15-NEXT:    br label [[SIMD_IF_END66]]
3895 // CHECK15:       simd.if.end66:
3896 // CHECK15-NEXT:    [[TMP36:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
3897 // CHECK15-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP36]])
3898 // CHECK15-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
3899 // CHECK15-NEXT:    [[TMP37:%.*]] = load ptr, ptr [[SAVED_STACK]], align 4
3900 // CHECK15-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP37]])
3901 // CHECK15-NEXT:    [[TMP38:%.*]] = load i32, ptr [[RETVAL]], align 4
3902 // CHECK15-NEXT:    ret i32 [[TMP38]]
3903 //
3904 //
3905 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
3906 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR2:[0-9]+]] comdat {
3907 // CHECK15-NEXT:  entry:
3908 // CHECK15-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
3909 // CHECK15-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
3910 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3911 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3912 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3913 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3914 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
3915 // CHECK15-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
3916 // CHECK15-NEXT:    [[DOTOMP_LB3:%.*]] = alloca i32, align 4
3917 // CHECK15-NEXT:    [[DOTOMP_UB4:%.*]] = alloca i32, align 4
3918 // CHECK15-NEXT:    [[DOTOMP_IV5:%.*]] = alloca i32, align 4
3919 // CHECK15-NEXT:    [[I6:%.*]] = alloca i32, align 4
3920 // CHECK15-NEXT:    [[_TMP17:%.*]] = alloca i32, align 4
3921 // CHECK15-NEXT:    [[DOTOMP_LB18:%.*]] = alloca i32, align 4
3922 // CHECK15-NEXT:    [[DOTOMP_UB19:%.*]] = alloca i32, align 4
3923 // CHECK15-NEXT:    [[DOTOMP_IV20:%.*]] = alloca i32, align 4
3924 // CHECK15-NEXT:    [[I21:%.*]] = alloca i32, align 4
3925 // CHECK15-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
3926 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3927 // CHECK15-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
3928 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3929 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
3930 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3931 // CHECK15:       omp.inner.for.cond:
3932 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]
3933 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]]
3934 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
3935 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3936 // CHECK15:       omp.inner.for.body:
3937 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
3938 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
3939 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3940 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]]
3941 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]]
3942 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i32 0, i32 [[TMP4]]
3943 // CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP13]]
3944 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3945 // CHECK15:       omp.body.continue:
3946 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3947 // CHECK15:       omp.inner.for.inc:
3948 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
3949 // CHECK15-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP5]], 1
3950 // CHECK15-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
3951 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
3952 // CHECK15:       omp.inner.for.end:
3953 // CHECK15-NEXT:    store i32 10, ptr [[I]], align 4
3954 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB3]], align 4
3955 // CHECK15-NEXT:    store i32 9, ptr [[DOTOMP_UB4]], align 4
3956 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB3]], align 4
3957 // CHECK15-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV5]], align 4
3958 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND7:%.*]]
3959 // CHECK15:       omp.inner.for.cond7:
3960 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]]
3961 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB4]], align 4, !llvm.access.group [[ACC_GRP16]]
3962 // CHECK15-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3963 // CHECK15-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY9:%.*]], label [[OMP_INNER_FOR_END16:%.*]]
3964 // CHECK15:       omp.inner.for.body9:
3965 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP16]]
3966 // CHECK15-NEXT:    [[MUL10:%.*]] = mul nsw i32 [[TMP9]], 1
3967 // CHECK15-NEXT:    [[ADD11:%.*]] = add nsw i32 0, [[MUL10]]
3968 // CHECK15-NEXT:    store i32 [[ADD11]], ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP16]]
3969 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[I6]], align 4, !llvm.access.group [[ACC_GRP16]]
3970 // CHECK15-NEXT:    [[ARRAYIDX12:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i32 0, i32 [[TMP10]]
3971 // CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX12]], align 4, !llvm.access.group [[ACC_GRP16]]
3972 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE13:%.*]]
3973 // CHECK15:       omp.body.continue13:
3974 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC14:%.*]]
3975 // CHECK15:       omp.inner.for.inc14:
3976 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP16]]
3977 // CHECK15-NEXT:    [[ADD15:%.*]] = add nsw i32 [[TMP11]], 1
3978 // CHECK15-NEXT:    store i32 [[ADD15]], ptr [[DOTOMP_IV5]], align 4, !llvm.access.group [[ACC_GRP16]]
3979 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND7]], !llvm.loop [[LOOP17:![0-9]+]]
3980 // CHECK15:       omp.inner.for.end16:
3981 // CHECK15-NEXT:    store i32 10, ptr [[I6]], align 4
3982 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB18]], align 4
3983 // CHECK15-NEXT:    store i32 9, ptr [[DOTOMP_UB19]], align 4
3984 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB18]], align 4
3985 // CHECK15-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV20]], align 4
3986 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND22:%.*]]
3987 // CHECK15:       omp.inner.for.cond22:
3988 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV20]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]]
3989 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB19]], align 4, !llvm.access.group [[ACC_GRP19]]
3990 // CHECK15-NEXT:    [[CMP23:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
3991 // CHECK15-NEXT:    br i1 [[CMP23]], label [[OMP_INNER_FOR_BODY24:%.*]], label [[OMP_INNER_FOR_END31:%.*]]
3992 // CHECK15:       omp.inner.for.body24:
3993 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV20]], align 4, !llvm.access.group [[ACC_GRP19]]
3994 // CHECK15-NEXT:    [[MUL25:%.*]] = mul nsw i32 [[TMP15]], 1
3995 // CHECK15-NEXT:    [[ADD26:%.*]] = add nsw i32 0, [[MUL25]]
3996 // CHECK15-NEXT:    store i32 [[ADD26]], ptr [[I21]], align 4, !llvm.access.group [[ACC_GRP19]]
3997 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I21]], align 4, !llvm.access.group [[ACC_GRP19]]
3998 // CHECK15-NEXT:    [[ARRAYIDX27:%.*]] = getelementptr inbounds [10 x i32], ptr [[A]], i32 0, i32 [[TMP16]]
3999 // CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX27]], align 4, !llvm.access.group [[ACC_GRP19]]
4000 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE28:%.*]]
4001 // CHECK15:       omp.body.continue28:
4002 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC29:%.*]]
4003 // CHECK15:       omp.inner.for.inc29:
4004 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV20]], align 4, !llvm.access.group [[ACC_GRP19]]
4005 // CHECK15-NEXT:    [[ADD30:%.*]] = add nsw i32 [[TMP17]], 1
4006 // CHECK15-NEXT:    store i32 [[ADD30]], ptr [[DOTOMP_IV20]], align 4, !llvm.access.group [[ACC_GRP19]]
4007 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND22]], !llvm.loop [[LOOP20:![0-9]+]]
4008 // CHECK15:       omp.inner.for.end31:
4009 // CHECK15-NEXT:    store i32 10, ptr [[I21]], align 4
4010 // CHECK15-NEXT:    ret i32 0
4011 //