1 // RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-feature +d \
2 // RUN: -target-feature +zve32x -target-feature +zfh \
3 // RUN: -disable-O0-optnone -o - -fsyntax-only %s -verify
4 // REQUIRES: riscv-registered-target
5 #include <riscv_vector.h>
7 vfloat32m1_t
foo() { /* expected-error {{RISC-V type 'vfloat32m1_t' (aka '__rvv_float32m1_t') requires the 'zve32f' extension}} */
8 vfloat32m1_t f32m1
; /* expected-error {{RISC-V type 'vfloat32m1_t' (aka '__rvv_float32m1_t') requires the 'zve32f' extension}} */
10 (void)f32m1
; /* expected-error {{RISC-V type 'vfloat32m1_t' (aka '__rvv_float32m1_t') requires the 'zve32f' extension}} */
12 return f32m1
; /* expected-error {{RISC-V type 'vfloat32m1_t' (aka '__rvv_float32m1_t') requires the 'zve32f' extension}} */
15 vfloat32m1x2_t
bar() { /* expected-error {{RISC-V type 'vfloat32m1x2_t' (aka '__rvv_float32m1x2_t') requires the 'zve32f' extension}} */
16 vfloat32m1x2_t f32m1x2
; /* expected-error {{RISC-V type 'vfloat32m1x2_t' (aka '__rvv_float32m1x2_t') requires the 'zve32f' extension}} */
18 (void)f32m1x2
; /* expected-error {{RISC-V type 'vfloat32m1x2_t' (aka '__rvv_float32m1x2_t') requires the 'zve32f' extension}} */
20 return f32m1x2
; /* expected-error {{RISC-V type 'vfloat32m1x2_t' (aka '__rvv_float32m1x2_t') requires the 'zve32f' extension}} */