1 /*===---- immintrin.h - Intel intrinsics -----------------------------------===
3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 * See https://llvm.org/LICENSE.txt for license information.
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 *===-----------------------------------------------------------------------===
13 #if !defined(__i386__) && !defined(__x86_64__)
14 #error "This header is only meant to be used on x86 and x64 architecture"
17 #include <x86gprintrin.h>
19 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
24 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
26 #include <xmmintrin.h>
29 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
31 #include <emmintrin.h>
34 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
36 #include <pmmintrin.h>
39 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
41 #include <tmmintrin.h>
44 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
45 (defined(__SSE4_2__) || defined(__SSE4_1__))
46 #include <smmintrin.h>
49 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
50 (defined(__AES__) || defined(__PCLMUL__))
51 #include <wmmintrin.h>
54 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
55 defined(__CLFLUSHOPT__)
56 #include <clflushoptintrin.h>
59 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
61 #include <clwbintrin.h>
64 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
66 #include <avxintrin.h>
69 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
71 #include <avx2intrin.h>
74 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
76 #include <f16cintrin.h>
79 /* No feature check desired due to internal checks */
80 #include <bmiintrin.h>
82 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
84 #include <bmi2intrin.h>
87 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
89 #include <lzcntintrin.h>
92 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
94 #include <popcntintrin.h>
97 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
99 #include <fmaintrin.h>
102 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
104 #include <avx512fintrin.h>
107 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
108 defined(__AVX512VL__)
109 #include <avx512vlintrin.h>
112 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
113 defined(__AVX512BW__)
114 #include <avx512bwintrin.h>
117 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
118 defined(__AVX512BITALG__)
119 #include <avx512bitalgintrin.h>
122 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
123 defined(__AVX512CD__)
124 #include <avx512cdintrin.h>
127 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
128 defined(__AVX512VPOPCNTDQ__)
129 #include <avx512vpopcntdqintrin.h>
132 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
133 (defined(__AVX512VL__) && defined(__AVX512VPOPCNTDQ__))
134 #include <avx512vpopcntdqvlintrin.h>
137 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
138 defined(__AVX512VNNI__)
139 #include <avx512vnniintrin.h>
142 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
143 (defined(__AVX512VL__) && defined(__AVX512VNNI__))
144 #include <avx512vlvnniintrin.h>
147 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
149 #include <avxvnniintrin.h>
152 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
153 defined(__AVX512DQ__)
154 #include <avx512dqintrin.h>
157 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
158 (defined(__AVX512VL__) && defined(__AVX512BITALG__))
159 #include <avx512vlbitalgintrin.h>
162 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
163 (defined(__AVX512VL__) && defined(__AVX512BW__))
164 #include <avx512vlbwintrin.h>
167 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
168 (defined(__AVX512VL__) && defined(__AVX512CD__))
169 #include <avx512vlcdintrin.h>
172 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
173 (defined(__AVX512VL__) && defined(__AVX512DQ__))
174 #include <avx512vldqintrin.h>
177 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
178 defined(__AVX512ER__)
179 #include <avx512erintrin.h>
182 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
183 defined(__AVX512IFMA__)
184 #include <avx512ifmaintrin.h>
187 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
188 (defined(__AVX512IFMA__) && defined(__AVX512VL__))
189 #include <avx512ifmavlintrin.h>
192 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
194 #include <avxifmaintrin.h>
197 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
198 defined(__AVX512VBMI__)
199 #include <avx512vbmiintrin.h>
202 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
203 (defined(__AVX512VBMI__) && defined(__AVX512VL__))
204 #include <avx512vbmivlintrin.h>
207 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
208 defined(__AVX512VBMI2__)
209 #include <avx512vbmi2intrin.h>
212 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
213 (defined(__AVX512VBMI2__) && defined(__AVX512VL__))
214 #include <avx512vlvbmi2intrin.h>
217 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
218 defined(__AVX512PF__)
219 #include <avx512pfintrin.h>
222 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
223 defined(__AVX512FP16__)
224 #include <avx512fp16intrin.h>
227 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
228 (defined(__AVX512VL__) && defined(__AVX512FP16__))
229 #include <avx512vlfp16intrin.h>
232 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
233 defined(__AVX512BF16__)
234 #include <avx512bf16intrin.h>
237 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
238 (defined(__AVX512VL__) && defined(__AVX512BF16__))
239 #include <avx512vlbf16intrin.h>
242 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
244 #include <pkuintrin.h>
247 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
248 defined(__VPCLMULQDQ__)
249 #include <vpclmulqdqintrin.h>
252 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
254 #include <vaesintrin.h>
257 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
259 #include <gfniintrin.h>
262 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
263 defined(__AVXVNNIINT8__)
264 #include <avxvnniint8intrin.h>
267 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
268 defined(__AVXNECONVERT__)
269 #include <avxneconvertintrin.h>
272 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
274 #include <sha512intrin.h>
277 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
279 #include <sm3intrin.h>
282 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
284 #include <sm4intrin.h>
287 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
288 defined(__AVXVNNIINT16__)
289 #include <avxvnniint16intrin.h>
292 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
294 /// Reads the value of the IA32_TSC_AUX MSR (0xc0000103).
296 /// \headerfile <immintrin.h>
298 /// This intrinsic corresponds to the <c> RDPID </c> instruction.
300 /// \returns The 32-bit contents of the MSR.
301 static __inline__
unsigned int __attribute__((__always_inline__
, __nodebug__
, __target__("rdpid")))
303 return __builtin_ia32_rdpid();
307 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
309 /// Returns a 16-bit hardware-generated random value.
311 /// \headerfile <immintrin.h>
313 /// This intrinsic corresponds to the <c> RDRAND </c> instruction.
316 /// A pointer to a 16-bit memory location to place the random value.
317 /// \returns 1 if the value was successfully generated, 0 otherwise.
318 static __inline__
int __attribute__((__always_inline__
, __nodebug__
, __target__("rdrnd")))
319 _rdrand16_step(unsigned short *__p
)
321 return (int)__builtin_ia32_rdrand16_step(__p
);
324 /// Returns a 32-bit hardware-generated random value.
326 /// \headerfile <immintrin.h>
328 /// This intrinsic corresponds to the <c> RDRAND </c> instruction.
331 /// A pointer to a 32-bit memory location to place the random value.
332 /// \returns 1 if the value was successfully generated, 0 otherwise.
333 static __inline__
int __attribute__((__always_inline__
, __nodebug__
, __target__("rdrnd")))
334 _rdrand32_step(unsigned int *__p
)
336 return (int)__builtin_ia32_rdrand32_step(__p
);
339 /// Returns a 64-bit hardware-generated random value.
341 /// \headerfile <immintrin.h>
343 /// This intrinsic corresponds to the <c> RDRAND </c> instruction.
346 /// A pointer to a 64-bit memory location to place the random value.
347 /// \returns 1 if the value was successfully generated, 0 otherwise.
348 static __inline__
int __attribute__((__always_inline__
, __nodebug__
, __target__("rdrnd")))
349 _rdrand64_step(unsigned long long *__p
)
352 return (int)__builtin_ia32_rdrand64_step(__p
);
354 // We need to emulate the functionality of 64-bit rdrand with 2 32-bit
355 // rdrand instructions.
356 unsigned int __lo
, __hi
;
357 unsigned int __res_lo
= __builtin_ia32_rdrand32_step(&__lo
);
358 unsigned int __res_hi
= __builtin_ia32_rdrand32_step(&__hi
);
359 if (__res_lo
&& __res_hi
) {
360 *__p
= ((unsigned long long)__hi
<< 32) | (unsigned long long)__lo
;
368 #endif /* __RDRND__ */
370 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
371 defined(__FSGSBASE__)
373 /// Reads the FS base register.
375 /// \headerfile <immintrin.h>
377 /// This intrinsic corresponds to the <c> RDFSBASE </c> instruction.
379 /// \returns The lower 32 bits of the FS base register.
380 static __inline__
unsigned int __attribute__((__always_inline__
, __nodebug__
, __target__("fsgsbase")))
381 _readfsbase_u32(void)
383 return __builtin_ia32_rdfsbase32();
386 /// Reads the FS base register.
388 /// \headerfile <immintrin.h>
390 /// This intrinsic corresponds to the <c> RDFSBASE </c> instruction.
392 /// \returns The contents of the FS base register.
393 static __inline__
unsigned long long __attribute__((__always_inline__
, __nodebug__
, __target__("fsgsbase")))
394 _readfsbase_u64(void)
396 return __builtin_ia32_rdfsbase64();
399 /// Reads the GS base register.
401 /// \headerfile <immintrin.h>
403 /// This intrinsic corresponds to the <c> RDGSBASE </c> instruction.
405 /// \returns The lower 32 bits of the GS base register.
406 static __inline__
unsigned int __attribute__((__always_inline__
, __nodebug__
, __target__("fsgsbase")))
407 _readgsbase_u32(void)
409 return __builtin_ia32_rdgsbase32();
412 /// Reads the GS base register.
414 /// \headerfile <immintrin.h>
416 /// This intrinsic corresponds to the <c> RDGSBASE </c> instruction.
418 /// \returns The contents of the GS base register.
419 static __inline__
unsigned long long __attribute__((__always_inline__
, __nodebug__
, __target__("fsgsbase")))
420 _readgsbase_u64(void)
422 return __builtin_ia32_rdgsbase64();
425 /// Modifies the FS base register.
427 /// \headerfile <immintrin.h>
429 /// This intrinsic corresponds to the <c> WRFSBASE </c> instruction.
432 /// Value to use for the lower 32 bits of the FS base register.
433 static __inline__
void __attribute__((__always_inline__
, __nodebug__
, __target__("fsgsbase")))
434 _writefsbase_u32(unsigned int __V
)
436 __builtin_ia32_wrfsbase32(__V
);
439 /// Modifies the FS base register.
441 /// \headerfile <immintrin.h>
443 /// This intrinsic corresponds to the <c> WRFSBASE </c> instruction.
446 /// Value to use for the FS base register.
447 static __inline__
void __attribute__((__always_inline__
, __nodebug__
, __target__("fsgsbase")))
448 _writefsbase_u64(unsigned long long __V
)
450 __builtin_ia32_wrfsbase64(__V
);
453 /// Modifies the GS base register.
455 /// \headerfile <immintrin.h>
457 /// This intrinsic corresponds to the <c> WRGSBASE </c> instruction.
460 /// Value to use for the lower 32 bits of the GS base register.
461 static __inline__
void __attribute__((__always_inline__
, __nodebug__
, __target__("fsgsbase")))
462 _writegsbase_u32(unsigned int __V
)
464 __builtin_ia32_wrgsbase32(__V
);
467 /// Modifies the GS base register.
469 /// \headerfile <immintrin.h>
471 /// This intrinsic corresponds to the <c> WRFSBASE </c> instruction.
474 /// Value to use for GS base register.
475 static __inline__
void __attribute__((__always_inline__
, __nodebug__
, __target__("fsgsbase")))
476 _writegsbase_u64(unsigned long long __V
)
478 __builtin_ia32_wrgsbase64(__V
);
482 #endif /* __FSGSBASE__ */
484 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
487 /* The structs used below are to force the load/store to be unaligned. This
488 * is accomplished with the __packed__ attribute. The __may_alias__ prevents
489 * tbaa metadata from being generated based on the struct and the type of the
490 * field inside of it.
493 static __inline__
short __attribute__((__always_inline__
, __nodebug__
, __target__("movbe")))
494 _loadbe_i16(void const * __P
) {
497 } __attribute__((__packed__
, __may_alias__
));
498 return (short)__builtin_bswap16(((const struct __loadu_i16
*)__P
)->__v
);
501 static __inline__
void __attribute__((__always_inline__
, __nodebug__
, __target__("movbe")))
502 _storebe_i16(void * __P
, short __D
) {
503 struct __storeu_i16
{
505 } __attribute__((__packed__
, __may_alias__
));
506 ((struct __storeu_i16
*)__P
)->__v
= __builtin_bswap16((unsigned short)__D
);
509 static __inline__
int __attribute__((__always_inline__
, __nodebug__
, __target__("movbe")))
510 _loadbe_i32(void const * __P
) {
513 } __attribute__((__packed__
, __may_alias__
));
514 return (int)__builtin_bswap32(((const struct __loadu_i32
*)__P
)->__v
);
517 static __inline__
void __attribute__((__always_inline__
, __nodebug__
, __target__("movbe")))
518 _storebe_i32(void * __P
, int __D
) {
519 struct __storeu_i32
{
521 } __attribute__((__packed__
, __may_alias__
));
522 ((struct __storeu_i32
*)__P
)->__v
= __builtin_bswap32((unsigned int)__D
);
526 static __inline__
long long __attribute__((__always_inline__
, __nodebug__
, __target__("movbe")))
527 _loadbe_i64(void const * __P
) {
529 unsigned long long __v
;
530 } __attribute__((__packed__
, __may_alias__
));
531 return (long long)__builtin_bswap64(((const struct __loadu_i64
*)__P
)->__v
);
534 static __inline__
void __attribute__((__always_inline__
, __nodebug__
, __target__("movbe")))
535 _storebe_i64(void * __P
, long long __D
) {
536 struct __storeu_i64
{
537 unsigned long long __v
;
538 } __attribute__((__packed__
, __may_alias__
));
539 ((struct __storeu_i64
*)__P
)->__v
= __builtin_bswap64((unsigned long long)__D
);
544 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
546 #include <rtmintrin.h>
547 #include <xtestintrin.h>
550 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
552 #include <shaintrin.h>
555 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
557 #include <fxsrintrin.h>
560 /* No feature check desired due to internal MSC_VER checks */
561 #include <xsaveintrin.h>
563 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
564 defined(__XSAVEOPT__)
565 #include <xsaveoptintrin.h>
568 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
570 #include <xsavecintrin.h>
573 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
575 #include <xsavesintrin.h>
578 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
580 #include <cetintrin.h>
583 /* Some intrinsics inside adxintrin.h are available only on processors with ADX,
584 * whereas others are also available at all times. */
585 #include <adxintrin.h>
587 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
589 #include <rdseedintrin.h>
592 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
593 defined(__WBNOINVD__)
594 #include <wbnoinvdintrin.h>
597 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
598 defined(__CLDEMOTE__)
599 #include <cldemoteintrin.h>
602 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
604 #include <waitpkgintrin.h>
607 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
608 defined(__MOVDIRI__) || defined(__MOVDIR64B__)
609 #include <movdirintrin.h>
612 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
614 #include <pconfigintrin.h>
617 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
619 #include <sgxintrin.h>
622 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
624 #include <ptwriteintrin.h>
627 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
629 #include <invpcidintrin.h>
631 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
632 defined(__AMX_FP16__)
633 #include <amxfp16intrin.h>
636 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
637 defined(__KL__) || defined(__WIDEKL__)
638 #include <keylockerintrin.h>
641 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
642 defined(__AMX_TILE__) || defined(__AMX_INT8__) || defined(__AMX_BF16__)
643 #include <amxintrin.h>
646 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
647 defined(__AMX_COMPLEX__)
648 #include <amxcomplexintrin.h>
651 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
652 defined(__AVX512VP2INTERSECT__)
653 #include <avx512vp2intersectintrin.h>
656 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
657 (defined(__AVX512VL__) && defined(__AVX512VP2INTERSECT__))
658 #include <avx512vlvp2intersectintrin.h>
661 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
663 #include <enqcmdintrin.h>
666 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
667 defined(__SERIALIZE__)
668 #include <serializeintrin.h>
671 #if !(defined(_MSC_VER) || defined(__SCE__)) || __has_feature(modules) || \
672 defined(__TSXLDTRK__)
673 #include <tsxldtrkintrin.h>
676 #if defined(_MSC_VER) && __has_extension(gnu_asm)
677 /* Define the default attributes for these intrinsics */
678 #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__))
682 /*----------------------------------------------------------------------------*\
683 |* Interlocked Exchange HLE
684 \*----------------------------------------------------------------------------*/
685 #if defined(__i386__) || defined(__x86_64__)
686 static __inline__
long __DEFAULT_FN_ATTRS
687 _InterlockedExchange_HLEAcquire(long volatile *_Target
, long _Value
) {
688 __asm__
__volatile__(".byte 0xf2 ; lock ; xchg {%0, %1|%1, %0}"
689 : "+r" (_Value
), "+m" (*_Target
) :: "memory");
692 static __inline__
long __DEFAULT_FN_ATTRS
693 _InterlockedExchange_HLERelease(long volatile *_Target
, long _Value
) {
694 __asm__
__volatile__(".byte 0xf3 ; lock ; xchg {%0, %1|%1, %0}"
695 : "+r" (_Value
), "+m" (*_Target
) :: "memory");
699 #if defined(__x86_64__)
700 static __inline__ __int64 __DEFAULT_FN_ATTRS
701 _InterlockedExchange64_HLEAcquire(__int64
volatile *_Target
, __int64 _Value
) {
702 __asm__
__volatile__(".byte 0xf2 ; lock ; xchg {%0, %1|%1, %0}"
703 : "+r" (_Value
), "+m" (*_Target
) :: "memory");
706 static __inline__ __int64 __DEFAULT_FN_ATTRS
707 _InterlockedExchange64_HLERelease(__int64
volatile *_Target
, __int64 _Value
) {
708 __asm__
__volatile__(".byte 0xf3 ; lock ; xchg {%0, %1|%1, %0}"
709 : "+r" (_Value
), "+m" (*_Target
) :: "memory");
713 /*----------------------------------------------------------------------------*\
714 |* Interlocked Compare Exchange HLE
715 \*----------------------------------------------------------------------------*/
716 #if defined(__i386__) || defined(__x86_64__)
717 static __inline__
long __DEFAULT_FN_ATTRS
718 _InterlockedCompareExchange_HLEAcquire(long volatile *_Destination
,
719 long _Exchange
, long _Comparand
) {
720 __asm__
__volatile__(".byte 0xf2 ; lock ; cmpxchg {%2, %1|%1, %2}"
721 : "+a" (_Comparand
), "+m" (*_Destination
)
722 : "r" (_Exchange
) : "memory");
725 static __inline__
long __DEFAULT_FN_ATTRS
726 _InterlockedCompareExchange_HLERelease(long volatile *_Destination
,
727 long _Exchange
, long _Comparand
) {
728 __asm__
__volatile__(".byte 0xf3 ; lock ; cmpxchg {%2, %1|%1, %2}"
729 : "+a" (_Comparand
), "+m" (*_Destination
)
730 : "r" (_Exchange
) : "memory");
734 #if defined(__x86_64__)
735 static __inline__ __int64 __DEFAULT_FN_ATTRS
736 _InterlockedCompareExchange64_HLEAcquire(__int64
volatile *_Destination
,
737 __int64 _Exchange
, __int64 _Comparand
) {
738 __asm__
__volatile__(".byte 0xf2 ; lock ; cmpxchg {%2, %1|%1, %2}"
739 : "+a" (_Comparand
), "+m" (*_Destination
)
740 : "r" (_Exchange
) : "memory");
743 static __inline__ __int64 __DEFAULT_FN_ATTRS
744 _InterlockedCompareExchange64_HLERelease(__int64
volatile *_Destination
,
745 __int64 _Exchange
, __int64 _Comparand
) {
746 __asm__
__volatile__(".byte 0xf3 ; lock ; cmpxchg {%2, %1|%1, %2}"
747 : "+a" (_Comparand
), "+m" (*_Destination
)
748 : "r" (_Exchange
) : "memory");
756 #undef __DEFAULT_FN_ATTRS
758 #endif /* defined(_MSC_VER) && __has_extension(gnu_asm) */
760 #endif /* __IMMINTRIN_H */