1 //===- X86EncodingOptimizationForImmediate.def.def
---------------*- C
++ -*-==//
3 // Part of the LLVM Project
, under the Apache License v2.0 with LLVM Exceptions.
4 // See https
://llvm.org
/LICENSE.txt for license information.
5 // SPDX
-License
-Identifier
: Apache
-2.0 WITH LLVM
-exception
7 //===----------------------------------------------------------------------===//
9 // This file defines all the entries of X86 instruction relaxation for immediate
10 //===----------------------------------------------------------------------===//
13 #define
ENTRY(LONG
, SHORT
)
15 ENTRY(ADC16mi
, ADC16mi8
)
16 ENTRY(ADC16ri
, ADC16ri8
)
17 ENTRY(ADC32mi
, ADC32mi8
)
18 ENTRY(ADC32ri
, ADC32ri8
)
19 ENTRY(ADC64mi32
, ADC64mi8
)
20 ENTRY(ADC64ri32
, ADC64ri8
)
21 ENTRY(SBB16mi
, SBB16mi8
)
22 ENTRY(SBB16ri
, SBB16ri8
)
23 ENTRY(SBB32mi
, SBB32mi8
)
24 ENTRY(SBB32ri
, SBB32ri8
)
25 ENTRY(SBB64mi32
, SBB64mi8
)
26 ENTRY(SBB64ri32
, SBB64ri8
)
27 ENTRY(ADD16mi
, ADD16mi8
)
28 ENTRY(ADD16ri
, ADD16ri8
)
29 ENTRY(ADD32mi
, ADD32mi8
)
30 ENTRY(ADD32ri
, ADD32ri8
)
31 ENTRY(ADD64mi32
, ADD64mi8
)
32 ENTRY(ADD64ri32
, ADD64ri8
)
33 ENTRY(AND16mi
, AND16mi8
)
34 ENTRY(AND16ri
, AND16ri8
)
35 ENTRY(AND32mi
, AND32mi8
)
36 ENTRY(AND32ri
, AND32ri8
)
37 ENTRY(AND64mi32
, AND64mi8
)
38 ENTRY(AND64ri32
, AND64ri8
)
39 ENTRY(OR16mi
, OR16mi8
)
40 ENTRY(OR16ri
, OR16ri8
)
41 ENTRY(OR32mi
, OR32mi8
)
42 ENTRY(OR32ri
, OR32ri8
)
43 ENTRY(OR64mi32
, OR64mi8
)
44 ENTRY(OR64ri32
, OR64ri8
)
45 ENTRY(SUB16mi
, SUB16mi8
)
46 ENTRY(SUB16ri
, SUB16ri8
)
47 ENTRY(SUB32mi
, SUB32mi8
)
48 ENTRY(SUB32ri
, SUB32ri8
)
49 ENTRY(SUB64mi32
, SUB64mi8
)
50 ENTRY(SUB64ri32
, SUB64ri8
)
51 ENTRY(XOR16mi
, XOR16mi8
)
52 ENTRY(XOR16ri
, XOR16ri8
)
53 ENTRY(XOR32mi
, XOR32mi8
)
54 ENTRY(XOR32ri
, XOR32ri8
)
55 ENTRY(XOR64mi32
, XOR64mi8
)
56 ENTRY(XOR64ri32
, XOR64ri8
)
57 ENTRY(CMP16mi
, CMP16mi8
)
58 ENTRY(CMP16ri
, CMP16ri8
)
59 ENTRY(CMP32mi
, CMP32mi8
)
60 ENTRY(CMP32ri
, CMP32ri8
)
61 ENTRY(CMP64mi32
, CMP64mi8
)
62 ENTRY(CMP64ri32
, CMP64ri8
)
63 ENTRY(IMUL16rmi
, IMUL16rmi8
)
64 ENTRY(IMUL16rri
, IMUL16rri8
)
65 ENTRY(IMUL32rmi
, IMUL32rmi8
)
66 ENTRY(IMUL32rri
, IMUL32rri8
)
67 ENTRY(IMUL64rmi32
, IMUL64rmi8
)
68 ENTRY(IMUL64rri32
, IMUL64rri8
)
69 ENTRY(PUSH16i
, PUSH16i8
)
70 ENTRY(PUSH32i
, PUSH32i8
)
71 ENTRY(PUSH64i32
, PUSH64i8
)
