1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
2 # RUN: llc -mtriple=arm64-unknown-unknown -global-isel -run-pass=aarch64-prelegalizer-combiner %s -o - | FileCheck %s
7 tracksRegLiveness: true
10 liveins: $w0, $w1, $w2
12 ; CHECK-LABEL: name: fshl_i8
13 ; CHECK: liveins: $w0, $w1, $w2
15 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
16 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
17 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
18 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)
19 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $w2
20 ; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:_(s8) = G_TRUNC [[COPY2]](s32)
21 ; CHECK-NEXT: [[FSHL:%[0-9]+]]:_(s8) = G_FSHL [[TRUNC]], [[TRUNC1]], [[TRUNC2]](s8)
22 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FSHL]](s8)
23 ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
24 ; CHECK-NEXT: RET_ReallyLR implicit $w0
26 %0:_(s8) = G_TRUNC %3(s32)
28 %1:_(s8) = G_TRUNC %4(s32)
30 %2:_(s8) = G_TRUNC %5(s32)
31 %6:_(s8) = G_FSHL %0, %1, %2(s8)
32 %7:_(s32) = G_ANYEXT %6(s8)
34 RET_ReallyLR implicit $w0
41 tracksRegLiveness: true
44 liveins: $w0, $w1, $w2
46 ; CHECK-LABEL: name: fshl_i16
47 ; CHECK: liveins: $w0, $w1, $w2
49 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
50 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
51 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
52 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
53 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $w2
54 ; CHECK-NEXT: [[TRUNC2:%[0-9]+]]:_(s16) = G_TRUNC [[COPY2]](s32)
55 ; CHECK-NEXT: [[FSHL:%[0-9]+]]:_(s16) = G_FSHL [[TRUNC]], [[TRUNC1]], [[TRUNC2]](s16)
56 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FSHL]](s16)
57 ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
58 ; CHECK-NEXT: RET_ReallyLR implicit $w0
60 %0:_(s16) = G_TRUNC %3(s32)
62 %1:_(s16) = G_TRUNC %4(s32)
64 %2:_(s16) = G_TRUNC %5(s32)
65 %6:_(s16) = G_FSHL %0, %1, %2(s16)
66 %7:_(s32) = G_ANYEXT %6(s16)
68 RET_ReallyLR implicit $w0
75 tracksRegLiveness: true
78 liveins: $w0, $w1, $w2
80 ; CHECK-LABEL: name: fshl_i32
81 ; CHECK: liveins: $w0, $w1, $w2
83 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
84 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
85 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $w2
86 ; CHECK-NEXT: [[FSHL:%[0-9]+]]:_(s32) = G_FSHL [[COPY]], [[COPY1]], [[COPY2]](s32)
87 ; CHECK-NEXT: $w0 = COPY [[FSHL]](s32)
88 ; CHECK-NEXT: RET_ReallyLR implicit $w0
92 %3:_(s32) = G_FSHL %0, %1, %2(s32)
94 RET_ReallyLR implicit $w0
101 tracksRegLiveness: true
104 liveins: $x0, $x1, $x2
106 ; CHECK-LABEL: name: fshl_i64
107 ; CHECK: liveins: $x0, $x1, $x2
109 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
110 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
111 ; CHECK-NEXT: [[COPY2:%[0-9]+]]:_(s64) = COPY $x2
112 ; CHECK-NEXT: [[FSHL:%[0-9]+]]:_(s64) = G_FSHL [[COPY]], [[COPY1]], [[COPY2]](s64)
113 ; CHECK-NEXT: $x0 = COPY [[FSHL]](s64)
114 ; CHECK-NEXT: RET_ReallyLR implicit $x0
118 %3:_(s64) = G_FSHL %0, %1, %2(s64)
120 RET_ReallyLR implicit $x0
125 name: fshl_i8_const_shift
127 tracksRegLiveness: true
132 ; CHECK-LABEL: name: fshl_i8_const_shift
133 ; CHECK: liveins: $w0, $w1
135 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
136 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
137 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
138 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)
139 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 5
140 ; CHECK-NEXT: [[FSHL:%[0-9]+]]:_(s8) = G_FSHL [[TRUNC]], [[TRUNC1]], [[C]](s8)
141 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FSHL]](s8)
142 ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
143 ; CHECK-NEXT: RET_ReallyLR implicit $w0
145 %0:_(s8) = G_TRUNC %2(s32)
147 %1:_(s8) = G_TRUNC %3(s32)
148 %4:_(s8) = G_CONSTANT i8 5
149 %5:_(s8) = G_FSHL %0, %1, %4(s8)
150 %6:_(s32) = G_ANYEXT %5(s8)
152 RET_ReallyLR implicit $w0
157 name: fshl_i8_const_overshift
159 tracksRegLiveness: true
164 ; CHECK-LABEL: name: fshl_i8_const_overshift
165 ; CHECK: liveins: $w0, $w1
167 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
168 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
169 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
170 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY1]](s32)
171 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 2
172 ; CHECK-NEXT: [[FSHL:%[0-9]+]]:_(s8) = G_FSHL [[TRUNC]], [[TRUNC1]], [[C]](s8)
173 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FSHL]](s8)
174 ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
175 ; CHECK-NEXT: RET_ReallyLR implicit $w0
177 %0:_(s8) = G_TRUNC %2(s32)
179 %1:_(s8) = G_TRUNC %3(s32)
180 %4:_(s8) = G_CONSTANT i8 10
181 %5:_(s8) = G_FSHL %0, %1, %4(s8)
182 %6:_(s32) = G_ANYEXT %5(s8)
184 RET_ReallyLR implicit $w0
189 name: fshl_i8_shift_by_bidwidth
191 tracksRegLiveness: true
196 ; CHECK-LABEL: name: fshl_i8_shift_by_bidwidth
197 ; CHECK: liveins: $w0, $w1
199 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
200 ; CHECK-NEXT: $w0 = COPY [[COPY]](s32)
201 ; CHECK-NEXT: RET_ReallyLR implicit $w0
203 %0:_(s8) = G_TRUNC %2(s32)
205 %1:_(s8) = G_TRUNC %3(s32)
206 %4:_(s8) = G_CONSTANT i8 8
207 %5:_(s8) = G_FSHL %0, %1, %4(s8)
208 %6:_(s32) = G_ANYEXT %5(s8)
210 RET_ReallyLR implicit $w0
215 name: fshl_i16_const_shift
217 tracksRegLiveness: true
222 ; CHECK-LABEL: name: fshl_i16_const_shift
223 ; CHECK: liveins: $w0, $w1
225 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
226 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
227 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
228 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
229 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 5
230 ; CHECK-NEXT: [[FSHL:%[0-9]+]]:_(s16) = G_FSHL [[TRUNC]], [[TRUNC1]], [[C]](s16)
231 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FSHL]](s16)
232 ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
233 ; CHECK-NEXT: RET_ReallyLR implicit $w0
235 %0:_(s16) = G_TRUNC %2(s32)
237 %1:_(s16) = G_TRUNC %3(s32)
238 %4:_(s16) = G_CONSTANT i16 5
239 %5:_(s16) = G_FSHL %0, %1, %4(s16)
240 %6:_(s32) = G_ANYEXT %5(s16)
242 RET_ReallyLR implicit $w0
247 name: fshl_i16_const_overshift
249 tracksRegLiveness: true
254 ; CHECK-LABEL: name: fshl_i16_const_overshift
255 ; CHECK: liveins: $w0, $w1
257 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
258 ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s16) = G_TRUNC [[COPY]](s32)
259 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
260 ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s16) = G_TRUNC [[COPY1]](s32)
261 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s16) = G_CONSTANT i16 4
262 ; CHECK-NEXT: [[FSHL:%[0-9]+]]:_(s16) = G_FSHL [[TRUNC]], [[TRUNC1]], [[C]](s16)
263 ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FSHL]](s16)
264 ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32)
265 ; CHECK-NEXT: RET_ReallyLR implicit $w0
267 %0:_(s16) = G_TRUNC %2(s32)
269 %1:_(s16) = G_TRUNC %3(s32)
270 %4:_(s16) = G_CONSTANT i16 20
271 %5:_(s16) = G_FSHL %0, %1, %4(s16)
272 %6:_(s32) = G_ANYEXT %5(s16)
274 RET_ReallyLR implicit $w0
279 name: fshl_i16_shift_by_bidwidth
281 tracksRegLiveness: true
286 ; CHECK-LABEL: name: fshl_i16_shift_by_bidwidth
287 ; CHECK: liveins: $w0, $w1
289 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
290 ; CHECK-NEXT: $w0 = COPY [[COPY]](s32)
291 ; CHECK-NEXT: RET_ReallyLR implicit $w0
293 %0:_(s16) = G_TRUNC %2(s32)
295 %1:_(s16) = G_TRUNC %3(s32)
296 %4:_(s16) = G_CONSTANT i16 16
297 %5:_(s16) = G_FSHL %0, %1, %4(s16)
298 %6:_(s32) = G_ANYEXT %5(s16)
300 RET_ReallyLR implicit $w0
305 name: fshl_i32_const_shift
307 tracksRegLiveness: true
312 ; CHECK-LABEL: name: fshl_i32_const_shift
313 ; CHECK: liveins: $w0, $w1
315 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
316 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
317 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 5
318 ; CHECK-NEXT: [[FSHL:%[0-9]+]]:_(s32) = G_FSHL [[COPY]], [[COPY1]], [[C]](s32)
319 ; CHECK-NEXT: $w0 = COPY [[FSHL]](s32)
320 ; CHECK-NEXT: RET_ReallyLR implicit $w0
323 %2:_(s32) = G_CONSTANT i32 5
324 %3:_(s32) = G_FSHL %0, %1, %2(s32)
326 RET_ReallyLR implicit $w0
331 name: fshl_i32_const_overshift
333 tracksRegLiveness: true
338 ; CHECK-LABEL: name: fshl_i32_const_overshift
339 ; CHECK: liveins: $w0, $w1
341 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
342 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $w1
343 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 10
344 ; CHECK-NEXT: [[FSHL:%[0-9]+]]:_(s32) = G_FSHL [[COPY]], [[COPY1]], [[C]](s32)
345 ; CHECK-NEXT: $w0 = COPY [[FSHL]](s32)
346 ; CHECK-NEXT: RET_ReallyLR implicit $w0
349 %2:_(s32) = G_CONSTANT i32 42
350 %3:_(s32) = G_FSHL %0, %1, %2(s32)
352 RET_ReallyLR implicit $w0
357 name: fshl_i32_shift_by_bidwidth
359 tracksRegLiveness: true
364 ; CHECK-LABEL: name: fshl_i32_shift_by_bidwidth
365 ; CHECK: liveins: $w0, $w1
367 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $w0
368 ; CHECK-NEXT: $w0 = COPY [[COPY]](s32)
369 ; CHECK-NEXT: RET_ReallyLR implicit $w0
372 %2:_(s32) = G_CONSTANT i32 32
373 %3:_(s32) = G_FSHL %0, %1, %2(s32)
375 RET_ReallyLR implicit $w0
380 name: fshl_i64_const_shift
382 tracksRegLiveness: true
387 ; CHECK-LABEL: name: fshl_i64_const_shift
388 ; CHECK: liveins: $x0, $x1
390 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
391 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
392 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 5
393 ; CHECK-NEXT: [[FSHL:%[0-9]+]]:_(s64) = G_FSHL [[COPY]], [[COPY1]], [[C]](s64)
394 ; CHECK-NEXT: $x0 = COPY [[FSHL]](s64)
395 ; CHECK-NEXT: RET_ReallyLR implicit $x0
398 %2:_(s64) = G_CONSTANT i64 5
399 %3:_(s64) = G_FSHL %0, %1, %2(s64)
401 RET_ReallyLR implicit $x0
406 name: fshl_i64_const_overshift
408 tracksRegLiveness: true
413 ; CHECK-LABEL: name: fshl_i64_const_overshift
414 ; CHECK: liveins: $x0, $x1
416 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
417 ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x1
418 ; CHECK-NEXT: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 8
419 ; CHECK-NEXT: [[FSHL:%[0-9]+]]:_(s64) = G_FSHL [[COPY]], [[COPY1]], [[C]](s64)
420 ; CHECK-NEXT: $x0 = COPY [[FSHL]](s64)
421 ; CHECK-NEXT: RET_ReallyLR implicit $x0
424 %2:_(s64) = G_CONSTANT i64 72
425 %3:_(s64) = G_FSHL %0, %1, %2(s64)
427 RET_ReallyLR implicit $x0
432 name: fshl_i64_shift_by_bidwidth
434 tracksRegLiveness: true
439 ; CHECK-LABEL: name: fshl_i64_shift_by_bidwidth
440 ; CHECK: liveins: $x0, $x1
442 ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
443 ; CHECK-NEXT: $x0 = COPY [[COPY]](s64)
444 ; CHECK-NEXT: RET_ReallyLR implicit $x0
447 %2:_(s64) = G_CONSTANT i64 64
448 %3:_(s64) = G_FSHL %0, %1, %2(s64)
450 RET_ReallyLR implicit $x0