1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mtriple aarch64 -run-pass=aarch64-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s
8 tracksRegLiveness: true
13 ; CHECK-LABEL: name: sextload
15 ; CHECK: %x0:_(p0) = COPY $x0
16 ; CHECK: %sextload:_(s32) = G_SEXTLOAD %x0(p0) :: (load (s16))
17 ; CHECK: $w0 = COPY %sextload(s32)
19 %sextload:_(s32) = G_SEXTLOAD %x0:_(p0) :: (load (s16))
20 %sext_inreg:_(s32) = G_SEXT_INREG %sextload:_(s32), 24
21 $w0 = COPY %sext_inreg(s32)
26 tracksRegLiveness: true
30 ; The G_ASSERT_SEXT says we already sign extended from 24 bits, so the
31 ; G_SEXT_INREG is not necessary.
33 ; CHECK-LABEL: name: assert_sext
35 ; CHECK: %w0:_(s32) = COPY $w0
36 ; CHECK: %assert_sext:_(s32) = G_ASSERT_SEXT %w0, 24
37 ; CHECK: $w0 = COPY %assert_sext(s32)
39 %assert_sext:_(s32) = G_ASSERT_SEXT %w0, 24
40 %sext_inreg:_(s32) = G_SEXT_INREG %assert_sext:_(s32), 24
41 $w0 = COPY %sext_inreg(s32)
44 name: assert_sext_greater_width
46 tracksRegLiveness: true
50 ; The G_ASSERT_SEXT is from a wider width than the G_SEXT_INREG, so we
53 ; CHECK-LABEL: name: assert_sext_greater_width
55 ; CHECK: %w0:_(s32) = COPY $w0
56 ; CHECK: %assert_sext:_(s32) = G_ASSERT_SEXT %w0, 24
57 ; CHECK: %sext_inreg:_(s32) = G_SEXT_INREG %assert_sext, 12
58 ; CHECK: $w0 = COPY %sext_inreg(s32)
60 %assert_sext:_(s32) = G_ASSERT_SEXT %w0, 24
61 %sext_inreg:_(s32) = G_SEXT_INREG %assert_sext:_(s32), 12
62 $w0 = COPY %sext_inreg(s32)
65 name: assert_sext_smaller_width
67 tracksRegLiveness: true
71 ; The G_ASSERT_SEXT is from a smaller width, so the G_SEXT_INREG is not
74 ; CHECK-LABEL: name: assert_sext_smaller_width
76 ; CHECK: %w0:_(s32) = COPY $w0
77 ; CHECK: %assert_sext:_(s32) = G_ASSERT_SEXT %w0, 8
78 ; CHECK: $w0 = COPY %assert_sext(s32)
80 %assert_sext:_(s32) = G_ASSERT_SEXT %w0, 8
81 %sext_inreg:_(s32) = G_SEXT_INREG %assert_sext:_(s32), 12
82 $w0 = COPY %sext_inreg(s32)