1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -mtriple aarch64 -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s
7 tracksRegLiveness: true
11 ; CHECK-LABEL: name: add_64_mask_32
12 ; CHECK: liveins: $x0, $x1
13 ; CHECK: %binop_lhs:_(s64) = COPY $x0
14 ; CHECK: %binop_rhs:_(s64) = COPY $x1
15 ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC %binop_lhs(s64)
16 ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC %binop_rhs(s64)
17 ; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[TRUNC]], [[TRUNC1]]
18 ; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[ADD]](s32)
19 ; CHECK: $x0 = COPY [[ZEXT]](s64)
20 ; CHECK: RET_ReallyLR implicit $x0
21 %binop_lhs:_(s64) = COPY $x0
22 %binop_rhs:_(s64) = COPY $x1
23 %mask_32:_(s64) = G_CONSTANT i64 4294967295
24 %binop:_(s64) = G_ADD %binop_lhs, %binop_rhs
25 %and:_(s64) = G_AND %binop, %mask_32
27 RET_ReallyLR implicit $x0
31 tracksRegLiveness: true
35 ; CHECK-LABEL: name: sub_64_mask_32
36 ; CHECK: liveins: $x0, $x1
37 ; CHECK: %binop_lhs:_(s64) = COPY $x0
38 ; CHECK: %binop_rhs:_(s64) = COPY $x1
39 ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC %binop_lhs(s64)
40 ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC %binop_rhs(s64)
41 ; CHECK: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[TRUNC]], [[TRUNC1]]
42 ; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[SUB]](s32)
43 ; CHECK: $x0 = COPY [[ZEXT]](s64)
44 ; CHECK: RET_ReallyLR implicit $x0
45 %binop_lhs:_(s64) = COPY $x0
46 %binop_rhs:_(s64) = COPY $x1
47 %mask_32:_(s64) = G_CONSTANT i64 4294967295
48 %binop:_(s64) = G_SUB %binop_lhs, %binop_rhs
49 %and:_(s64) = G_AND %binop, %mask_32
51 RET_ReallyLR implicit $x0
55 tracksRegLiveness: true
59 ; CHECK-LABEL: name: mul_64_mask_32
60 ; CHECK: liveins: $x0, $x1
61 ; CHECK: %binop_lhs:_(s64) = COPY $x0
62 ; CHECK: %binop_rhs:_(s64) = COPY $x1
63 ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC %binop_lhs(s64)
64 ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC %binop_rhs(s64)
65 ; CHECK: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[TRUNC]], [[TRUNC1]]
66 ; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[MUL]](s32)
67 ; CHECK: $x0 = COPY [[ZEXT]](s64)
68 ; CHECK: RET_ReallyLR implicit $x0
69 %binop_lhs:_(s64) = COPY $x0
70 %binop_rhs:_(s64) = COPY $x1
71 %mask_32:_(s64) = G_CONSTANT i64 4294967295
72 %binop:_(s64) = G_MUL %binop_lhs, %binop_rhs
73 %and:_(s64) = G_AND %binop, %mask_32
75 RET_ReallyLR implicit $x0
79 tracksRegLiveness: true
83 ; CHECK-LABEL: name: and_64_mask_32
84 ; CHECK: liveins: $x0, $x1
85 ; CHECK: %binop_lhs:_(s64) = COPY $x0
86 ; CHECK: %binop_rhs:_(s64) = COPY $x1
87 ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC %binop_lhs(s64)
88 ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC %binop_rhs(s64)
89 ; CHECK: [[AND:%[0-9]+]]:_(s32) = G_AND [[TRUNC]], [[TRUNC1]]
90 ; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[AND]](s32)
91 ; CHECK: $x0 = COPY [[ZEXT]](s64)
92 ; CHECK: RET_ReallyLR implicit $x0
93 %binop_lhs:_(s64) = COPY $x0
94 %binop_rhs:_(s64) = COPY $x1
95 %mask_32:_(s64) = G_CONSTANT i64 4294967295
96 %binop:_(s64) = G_AND %binop_lhs, %binop_rhs
97 %and:_(s64) = G_AND %binop, %mask_32
99 RET_ReallyLR implicit $x0
103 tracksRegLiveness: true
107 ; CHECK-LABEL: name: or_64_mask_32
108 ; CHECK: liveins: $x0, $x1
109 ; CHECK: %binop_lhs:_(s64) = COPY $x0
110 ; CHECK: %binop_rhs:_(s64) = COPY $x1
111 ; CHECK: %mask_32:_(s64) = G_CONSTANT i64 4294967295
112 ; CHECK: %binop:_(s64) = G_SUB %binop_lhs, %binop_rhs
113 ; CHECK: %and:_(s64) = G_OR %binop, %mask_32
114 ; CHECK: $x0 = COPY %and(s64)
115 ; CHECK: RET_ReallyLR implicit $x0
116 %binop_lhs:_(s64) = COPY $x0
117 %binop_rhs:_(s64) = COPY $x1
118 %mask_32:_(s64) = G_CONSTANT i64 4294967295
119 %binop:_(s64) = G_SUB %binop_lhs, %binop_rhs
120 %and:_(s64) = G_OR %binop, %mask_32
122 RET_ReallyLR implicit $x0
126 tracksRegLiveness: true
130 ; CHECK-LABEL: name: xor_64_mask_32
131 ; CHECK: liveins: $x0, $x1
132 ; CHECK: %binop_lhs:_(s64) = COPY $x0
133 ; CHECK: %binop_rhs:_(s64) = COPY $x1
134 ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC %binop_lhs(s64)
135 ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC %binop_rhs(s64)
136 ; CHECK: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[TRUNC]], [[TRUNC1]]
137 ; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[XOR]](s32)
138 ; CHECK: $x0 = COPY [[ZEXT]](s64)
139 ; CHECK: RET_ReallyLR implicit $x0
140 %binop_lhs:_(s64) = COPY $x0
141 %binop_rhs:_(s64) = COPY $x1
142 %mask_32:_(s64) = G_CONSTANT i64 4294967295
143 %binop:_(s64) = G_XOR %binop_lhs, %binop_rhs
144 %and:_(s64) = G_AND %binop, %mask_32
146 RET_ReallyLR implicit $x0
150 tracksRegLiveness: true
154 ; CHECK-LABEL: name: walk_thru_copy
155 ; CHECK: liveins: $x0, $x1
156 ; CHECK: %binop_lhs:_(s64) = COPY $x0
157 ; CHECK: %binop_rhs:_(s64) = COPY $x1
158 ; CHECK: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC %binop_lhs(s64)
159 ; CHECK: [[TRUNC1:%[0-9]+]]:_(s32) = G_TRUNC %binop_rhs(s64)
160 ; CHECK: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[TRUNC]], [[TRUNC1]]
161 ; CHECK: [[ZEXT:%[0-9]+]]:_(s64) = G_ZEXT [[ADD]](s32)
162 ; CHECK: $x0 = COPY [[ZEXT]](s64)
163 ; CHECK: RET_ReallyLR implicit $x0
164 %binop_lhs:_(s64) = COPY $x0
165 %binop_rhs:_(s64) = COPY $x1
166 %mask_32:_(s64) = G_CONSTANT i64 4294967295
167 %binop:_(s64) = G_ADD %binop_lhs, %binop_rhs
168 %copy:_(s64) = COPY %binop
169 %and:_(s64) = G_AND %copy, %mask_32
171 RET_ReallyLR implicit $x0
174 name: dont_combine_zext_not_free_add_64_mask_16
175 tracksRegLiveness: true
179 ; CHECK-LABEL: name: dont_combine_zext_not_free_add_64_mask_16
180 ; CHECK: liveins: $x0, $x1
181 ; CHECK: %binop_lhs:_(s64) = COPY $x0
182 ; CHECK: %binop_rhs:_(s64) = COPY $x1
183 ; CHECK: %mask_16:_(s64) = G_CONSTANT i64 65535
184 ; CHECK: %binop:_(s64) = G_ADD %binop_lhs, %binop_rhs
185 ; CHECK: %and:_(s64) = G_AND %binop, %mask_16
186 ; CHECK: $x0 = COPY %and(s64)
187 ; CHECK: RET_ReallyLR implicit $x0
188 %binop_lhs:_(s64) = COPY $x0
189 %binop_rhs:_(s64) = COPY $x1
190 %mask_16:_(s64) = G_CONSTANT i64 65535
191 %binop:_(s64) = G_ADD %binop_lhs, %binop_rhs
192 %and:_(s64) = G_AND %binop, %mask_16
194 RET_ReallyLR implicit $x0
197 name: dont_combine_zext_not_free_add_64_mask_8
198 tracksRegLiveness: true
202 ; CHECK-LABEL: name: dont_combine_zext_not_free_add_64_mask_8
203 ; CHECK: liveins: $x0, $x1
204 ; CHECK: %binop_lhs:_(s64) = COPY $x0
205 ; CHECK: %binop_rhs:_(s64) = COPY $x1
206 ; CHECK: %mask_8:_(s64) = G_CONSTANT i64 255
207 ; CHECK: %binop:_(s64) = G_ADD %binop_lhs, %binop_rhs
208 ; CHECK: %and:_(s64) = G_AND %binop, %mask_8
209 ; CHECK: $x0 = COPY %and(s64)
210 ; CHECK: RET_ReallyLR implicit $x0
211 %binop_lhs:_(s64) = COPY $x0
212 %binop_rhs:_(s64) = COPY $x1
213 %mask_8:_(s64) = G_CONSTANT i64 255
214 %binop:_(s64) = G_ADD %binop_lhs, %binop_rhs
215 %and:_(s64) = G_AND %binop, %mask_8
217 RET_ReallyLR implicit $x0
220 name: dont_combine_not_a_mask
221 tracksRegLiveness: true
225 ; CHECK-LABEL: name: dont_combine_not_a_mask
226 ; CHECK: liveins: $x0, $x1
227 ; CHECK: %binop_lhs:_(s64) = COPY $x0
228 ; CHECK: %binop_rhs:_(s64) = COPY $x1
229 ; CHECK: %not_a_mask:_(s64) = G_CONSTANT i64 26
230 ; CHECK: %binop:_(s64) = G_ADD %binop_lhs, %binop_rhs
231 ; CHECK: %and:_(s64) = G_AND %binop, %not_a_mask
232 ; CHECK: $x0 = COPY %and(s64)
233 ; CHECK: RET_ReallyLR implicit $x0
234 %binop_lhs:_(s64) = COPY $x0
235 %binop_rhs:_(s64) = COPY $x1
236 %not_a_mask:_(s64) = G_CONSTANT i64 26
237 %binop:_(s64) = G_ADD %binop_lhs, %binop_rhs
238 %and:_(s64) = G_AND %binop, %not_a_mask
240 RET_ReallyLR implicit $x0
243 name: dont_combine_more_than_one_use
244 tracksRegLiveness: true
248 ; CHECK-LABEL: name: dont_combine_more_than_one_use
249 ; CHECK: liveins: $x0, $x1
250 ; CHECK: %binop_lhs:_(s64) = COPY $x0
251 ; CHECK: %binop_rhs:_(s64) = COPY $x1
252 ; CHECK: %not_a_mask:_(s64) = G_CONSTANT i64 26
253 ; CHECK: %binop:_(s64) = G_ADD %binop_lhs, %binop_rhs
254 ; CHECK: %and:_(s64) = G_AND %binop, %not_a_mask
255 ; CHECK: %or:_(s64) = G_OR %and, %binop
256 ; CHECK: $x0 = COPY %or(s64)
257 ; CHECK: RET_ReallyLR implicit $x0
258 %binop_lhs:_(s64) = COPY $x0
259 %binop_rhs:_(s64) = COPY $x1
260 %not_a_mask:_(s64) = G_CONSTANT i64 26
261 %binop:_(s64) = G_ADD %binop_lhs, %binop_rhs
262 %and:_(s64) = G_AND %binop, %not_a_mask
263 %or:_(s64) = G_OR %and, %binop
265 RET_ReallyLR implicit $x0
268 name: dont_combine_vector
269 tracksRegLiveness: true
273 ; CHECK-LABEL: name: dont_combine_vector
274 ; CHECK: liveins: $q0, $q1
275 ; CHECK: %binop_lhs:_(<2 x s64>) = COPY $q0
276 ; CHECK: %binop_rhs:_(<2 x s64>) = COPY $q1
277 ; CHECK: %mask_elt:_(s64) = G_CONSTANT i64 4294967295
278 ; CHECK: %mask:_(<2 x s64>) = G_BUILD_VECTOR %mask_elt(s64), %mask_elt(s64)
279 ; CHECK: %binop:_(<2 x s64>) = G_ADD %binop_lhs, %binop_rhs
280 ; CHECK: %and:_(<2 x s64>) = G_AND %binop, %mask
281 ; CHECK: $q0 = COPY %and(<2 x s64>)
282 ; CHECK: RET_ReallyLR implicit $q0
283 %binop_lhs:_(<2 x s64>) = COPY $q0
284 %binop_rhs:_(<2 x s64>) = COPY $q1
285 %mask_elt:_(s64) = G_CONSTANT i64 4294967295
286 %mask:_(<2 x s64>) = G_BUILD_VECTOR %mask_elt, %mask_elt
287 %binop:_(<2 x s64>) = G_ADD %binop_lhs, %binop_rhs
288 %and:_(<2 x s64>) = G_AND %binop, %mask
289 $q0 = COPY %and(<2 x s64>)
290 RET_ReallyLR implicit $q0
293 name: dont_combine_add_64_mask_64
294 tracksRegLiveness: true
298 ; CHECK-LABEL: name: dont_combine_add_64_mask_64
299 ; CHECK: liveins: $x0, $x1
300 ; CHECK: %binop_lhs:_(s64) = COPY $x0
301 ; CHECK: %binop_rhs:_(s64) = COPY $x1
302 ; CHECK: %binop:_(s64) = G_ADD %binop_lhs, %binop_rhs
303 ; CHECK: $x0 = COPY %binop(s64)
304 ; CHECK: RET_ReallyLR implicit $x0
305 %binop_lhs:_(s64) = COPY $x0
306 %binop_rhs:_(s64) = COPY $x1
307 %mask_64:_(s64) = G_CONSTANT i64 18446744073709551615
308 %binop:_(s64) = G_ADD %binop_lhs, %binop_rhs
309 %and:_(s64) = G_AND %binop, %mask_64
311 RET_ReallyLR implicit $x0
314 name: dont_combine_copy_from_physreg
315 tracksRegLiveness: true
319 ; CHECK-LABEL: name: dont_combine_copy_from_physreg
320 ; CHECK: liveins: $x0, $x1
321 ; CHECK: %copy_from_physreg:_(s64) = COPY $x0
322 ; CHECK: %mask_32:_(s64) = G_CONSTANT i64 4294967295
323 ; CHECK: %and:_(s64) = G_AND %copy_from_physreg, %mask_32
324 ; CHECK: $x0 = COPY %and(s64)
325 ; CHECK: RET_ReallyLR implicit $x0
326 %copy_from_physreg:_(s64) = COPY $x0
327 %binop_rhs:_(s64) = COPY $x1
328 %mask_32:_(s64) = G_CONSTANT i64 4294967295
329 %copy:_(s64) = COPY %copy_from_physreg
330 %and:_(s64) = G_AND %copy, %mask_32
332 RET_ReallyLR implicit $x0