1 ; RUN: llc -mtriple=arm64 -o - %s -mcpu=cyclone | FileCheck %s
2 ; RUN: llc -mtriple=arm64 -o - %s -O0 -fast-isel -mcpu=cyclone | FileCheck %s --check-prefix=CHECK-FAST
4 @var8 = external dso_local global i8, align 1
5 @var16 = external dso_local global i16, align 2
6 @var32 = external dso_local global i32, align 4
7 @var64 = external dso_local global i64, align 8
9 define i8 @test_i8(i8 %new) {
10 %val = load i8, ptr @var8, align 1
11 store i8 %new, ptr @var8
13 ; CHECK-LABEL: test_i8:
14 ; CHECK: adrp x[[HIREG:[0-9]+]], var8
15 ; CHECK: ldrb {{w[0-9]+}}, [x[[HIREG]], :lo12:var8]
16 ; CHECK: strb {{w[0-9]+}}, [x[[HIREG]], :lo12:var8]
18 ; CHECK-PIC-LABEL: test_i8:
19 ; CHECK-PIC: adrp x[[HIREG:[0-9]+]], :got:var8
20 ; CHECK-PIC: ldr x[[VAR_ADDR:[0-9]+]], [x[[HIREG]], :got_lo12:var8]
21 ; CHECK-PIC: ldrb {{w[0-9]+}}, [x[[VAR_ADDR]]]
23 ; CHECK-FAST-LABEL: test_i8:
24 ; CHECK-FAST: adrp x[[HIREG:[0-9]+]], var8
25 ; CHECK-FAST: ldrb {{w[0-9]+}}, [x[[HIREG]], :lo12:var8]
28 define i16 @test_i16(i16 %new) {
29 %val = load i16, ptr @var16, align 2
30 store i16 %new, ptr @var16
32 ; CHECK-LABEL: test_i16:
33 ; CHECK: adrp x[[HIREG:[0-9]+]], var16
34 ; CHECK: ldrh {{w[0-9]+}}, [x[[HIREG]], :lo12:var16]
35 ; CHECK: strh {{w[0-9]+}}, [x[[HIREG]], :lo12:var16]
37 ; CHECK-FAST-LABEL: test_i16:
38 ; CHECK-FAST: adrp x[[HIREG:[0-9]+]], var16
39 ; CHECK-FAST: ldrh {{w[0-9]+}}, [x[[HIREG]], :lo12:var16]
42 define i32 @test_i32(i32 %new) {
43 %val = load i32, ptr @var32, align 4
44 store i32 %new, ptr @var32
46 ; CHECK-LABEL: test_i32:
47 ; CHECK: adrp x[[HIREG:[0-9]+]], var32
48 ; CHECK: ldr {{w[0-9]+}}, [x[[HIREG]], :lo12:var32]
49 ; CHECK: str {{w[0-9]+}}, [x[[HIREG]], :lo12:var32]
51 ; CHECK-FAST-LABEL: test_i32:
52 ; CHECK-FAST: adrp x[[HIREG:[0-9]+]], var32
53 ; CHECK-FAST: add {{x[0-9]+}}, x[[HIREG]], :lo12:var32
56 define i64 @test_i64(i64 %new) {
57 %val = load i64, ptr @var64, align 8
58 store i64 %new, ptr @var64
60 ; CHECK-LABEL: test_i64:
61 ; CHECK: adrp x[[HIREG:[0-9]+]], var64
62 ; CHECK: ldr {{x[0-9]+}}, [x[[HIREG]], :lo12:var64]
63 ; CHECK: str {{x[0-9]+}}, [x[[HIREG]], :lo12:var64]
65 ; CHECK-FAST-LABEL: test_i64:
66 ; CHECK-FAST: adrp x[[HIREG:[0-9]+]], var64
67 ; CHECK-FAST: add {{x[0-9]+}}, x[[HIREG]], :lo12:var64
70 define ptr @test_addr() {
72 ; CHECK-LABEL: test_addr:
73 ; CHECK: adrp [[HIREG:x[0-9]+]], var64
74 ; CHECK: add x0, [[HIREG]], :lo12:var64
76 ; CHECK-FAST-LABEL: test_addr:
77 ; CHECK-FAST: adrp [[HIREG:x[0-9]+]], var64
78 ; CHECK-FAST: add x0, [[HIREG]], :lo12:var64
81 @var_default = external dso_local global [2 x i32]
83 define i32 @test_default_align() {
84 %val = load i32, ptr @var_default
86 ; CHECK-LABEL: test_default_align:
87 ; CHECK: adrp x[[HIREG:[0-9]+]], var_default
88 ; CHECK: ldr w0, [x[[HIREG]], :lo12:var_default]
91 define i64 @test_default_unaligned() {
92 %val = load i64, ptr @var_default
94 ; CHECK-LABEL: test_default_unaligned:
95 ; CHECK: adrp [[HIREG:x[0-9]+]], var_default
96 ; CHECK: add x[[ADDR:[0-9]+]], [[HIREG]], :lo12:var_default
97 ; CHECK: ldr x0, [x[[ADDR]]]