1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=aarch64-linux-gnu -aarch64-neon-syntax=apple -verify-machineinstrs -o - %s | FileCheck %s
4 ; Test signed conversion.
5 define <2 x float> @test1(<2 x i32> %in) {
7 ; CHECK: // %bb.0: // %entry
8 ; CHECK-NEXT: scvtf.2s v0, v0, #4
11 %vcvt.i = sitofp <2 x i32> %in to <2 x float>
12 %div.i = fdiv <2 x float> %vcvt.i, <float 16.0, float 16.0>
13 ret <2 x float> %div.i
16 ; Test unsigned conversion.
17 define <2 x float> @test2(<2 x i32> %in) {
19 ; CHECK: // %bb.0: // %entry
20 ; CHECK-NEXT: ucvtf.2s v0, v0, #3
23 %vcvt.i = uitofp <2 x i32> %in to <2 x float>
24 %div.i = fdiv <2 x float> %vcvt.i, <float 8.0, float 8.0>
25 ret <2 x float> %div.i
28 ; Test which should not fold due to non-power of 2.
29 define <2 x float> @test3(<2 x i32> %in) {
31 ; CHECK: // %bb.0: // %entry
32 ; CHECK-NEXT: fmov.2s v1, #9.00000000
33 ; CHECK-NEXT: scvtf.2s v0, v0
34 ; CHECK-NEXT: fdiv.2s v0, v0, v1
37 %vcvt.i = sitofp <2 x i32> %in to <2 x float>
38 %div.i = fdiv <2 x float> %vcvt.i, <float 9.0, float 9.0>
39 ret <2 x float> %div.i
42 ; Test which should not fold due to power of 2 out of range.
43 define <2 x float> @test4(<2 x i32> %in) {
45 ; CHECK: // %bb.0: // %entry
46 ; CHECK-NEXT: movi.2s v1, #80, lsl #24
47 ; CHECK-NEXT: scvtf.2s v0, v0
48 ; CHECK-NEXT: fdiv.2s v0, v0, v1
51 %vcvt.i = sitofp <2 x i32> %in to <2 x float>
52 %div.i = fdiv <2 x float> %vcvt.i, <float 0x4200000000000000, float 0x4200000000000000>
53 ret <2 x float> %div.i
56 ; Test case where const is max power of 2 (i.e., 2^32).
57 define <2 x float> @test5(<2 x i32> %in) {
59 ; CHECK: // %bb.0: // %entry
60 ; CHECK-NEXT: scvtf.2s v0, v0, #32
63 %vcvt.i = sitofp <2 x i32> %in to <2 x float>
64 %div.i = fdiv <2 x float> %vcvt.i, <float 0x41F0000000000000, float 0x41F0000000000000>
65 ret <2 x float> %div.i
69 define <4 x float> @test6(<4 x i32> %in) {
71 ; CHECK: // %bb.0: // %entry
72 ; CHECK-NEXT: scvtf.4s v0, v0, #2
75 %vcvt.i = sitofp <4 x i32> %in to <4 x float>
76 %div.i = fdiv <4 x float> %vcvt.i, <float 4.0, float 4.0, float 4.0, float 4.0>
77 ret <4 x float> %div.i
80 ; Test unsigned i16 to float
81 define <4 x float> @test7(<4 x i16> %in) {
84 ; CHECK-NEXT: ushll.4s v0, v0, #0
85 ; CHECK-NEXT: ucvtf.4s v0, v0, #1
87 %conv = uitofp <4 x i16> %in to <4 x float>
88 %shift = fdiv <4 x float> %conv, <float 2.0, float 2.0, float 2.0, float 2.0>
89 ret <4 x float> %shift
92 ; Test signed i16 to float
93 define <4 x float> @test8(<4 x i16> %in) {
96 ; CHECK-NEXT: sshll.4s v0, v0, #0
97 ; CHECK-NEXT: scvtf.4s v0, v0, #2
99 %conv = sitofp <4 x i16> %in to <4 x float>
100 %shift = fdiv <4 x float> %conv, <float 4.0, float 4.0, float 4.0, float 4.0>
101 ret <4 x float> %shift
104 ; Can't convert i64 to float.
105 define <2 x float> @test9(<2 x i64> %in) {
106 ; CHECK-LABEL: test9:
108 ; CHECK-NEXT: ucvtf.2d v0, v0
109 ; CHECK-NEXT: movi.2s v1, #64, lsl #24
110 ; CHECK-NEXT: fcvtn v0.2s, v0.2d
111 ; CHECK-NEXT: fdiv.2s v0, v0, v1
113 %conv = uitofp <2 x i64> %in to <2 x float>
114 %shift = fdiv <2 x float> %conv, <float 2.0, float 2.0>
115 ret <2 x float> %shift
118 define <2 x double> @test10(<2 x i64> %in) {
119 ; CHECK-LABEL: test10:
121 ; CHECK-NEXT: ucvtf.2d v0, v0, #1
123 %conv = uitofp <2 x i64> %in to <2 x double>
124 %shift = fdiv <2 x double> %conv, <double 2.0, double 2.0>
125 ret <2 x double> %shift