| blob | fd427687c7a77d3df0a5f95a543a76b5645298e6 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2 ; RUN: llc -mtriple=aarch64-none-eabi -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-NOFP16
3 ; RUN: llc -mtriple=aarch64-none-eabi -mattr=+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD,CHECK-SD-FP16
4 ; RUN: llc -mtriple=aarch64-none-eabi -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-NOFP16
5 ; RUN: llc -mtriple=aarch64-none-eabi -mattr=+fullfp16 -global-isel -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI,CHECK-GI-FP16
7 define double @fabs_f64(double %a) {
8 ; CHECK-LABEL: fabs_f64:
9 ; CHECK: // %bb.0: // %entry
10 ; CHECK-NEXT: fneg d0, d0
11 ; CHECK-NEXT: ret
12 entry:
13 %c = fneg double %a
14 ret double %c
15 }
17 define float @fabs_f32(float %a) {
18 ; CHECK-LABEL: fabs_f32:
19 ; CHECK: // %bb.0: // %entry
20 ; CHECK-NEXT: fneg s0, s0
21 ; CHECK-NEXT: ret
22 entry:
23 %c = fneg float %a
24 ret float %c
25 }
27 define half @fabs_f16(half %a) {
28 ; CHECK-SD-NOFP16-LABEL: fabs_f16:
29 ; CHECK-SD-NOFP16: // %bb.0: // %entry
30 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
31 ; CHECK-SD-NOFP16-NEXT: fneg s0, s0
32 ; CHECK-SD-NOFP16-NEXT: fcvt h0, s0
33 ; CHECK-SD-NOFP16-NEXT: ret
34 ;
35 ; CHECK-SD-FP16-LABEL: fabs_f16:
36 ; CHECK-SD-FP16: // %bb.0: // %entry
37 ; CHECK-SD-FP16-NEXT: fneg h0, h0
38 ; CHECK-SD-FP16-NEXT: ret
39 ;
40 ; CHECK-GI-NOFP16-LABEL: fabs_f16:
41 ; CHECK-GI-NOFP16: // %bb.0: // %entry
42 ; CHECK-GI-NOFP16-NEXT: fcvt s0, h0
43 ; CHECK-GI-NOFP16-NEXT: fneg s0, s0
44 ; CHECK-GI-NOFP16-NEXT: fcvt h0, s0
45 ; CHECK-GI-NOFP16-NEXT: ret
46 ;
47 ; CHECK-GI-FP16-LABEL: fabs_f16:
48 ; CHECK-GI-FP16: // %bb.0: // %entry
49 ; CHECK-GI-FP16-NEXT: fneg h0, h0
50 ; CHECK-GI-FP16-NEXT: ret
51 entry:
52 %c = fneg half %a
53 ret half %c
54 }
56 define <2 x double> @fabs_v2f64(<2 x double> %a) {
57 ; CHECK-LABEL: fabs_v2f64:
58 ; CHECK: // %bb.0: // %entry
59 ; CHECK-NEXT: fneg v0.2d, v0.2d
60 ; CHECK-NEXT: ret
61 entry:
62 %c = fneg <2 x double> %a
63 ret <2 x double> %c
64 }
66 define <3 x double> @fabs_v3f64(<3 x double> %a) {
67 ; CHECK-SD-LABEL: fabs_v3f64:
68 ; CHECK-SD: // %bb.0: // %entry
69 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
70 ; CHECK-SD-NEXT: // kill: def $d1 killed $d1 def $q1
71 ; CHECK-SD-NEXT: // kill: def $d2 killed $d2 def $q2
72 ; CHECK-SD-NEXT: mov v0.d[1], v1.d[0]
73 ; CHECK-SD-NEXT: fneg v2.2d, v2.2d
74 ; CHECK-SD-NEXT: // kill: def $d2 killed $d2 killed $q2
75 ; CHECK-SD-NEXT: fneg v0.2d, v0.2d
76 ; CHECK-SD-NEXT: ext v1.16b, v0.16b, v0.16b, #8
77 ; CHECK-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
78 ; CHECK-SD-NEXT: // kill: def $d1 killed $d1 killed $q1
79 ; CHECK-SD-NEXT: ret
80 ;
81 ; CHECK-GI-LABEL: fabs_v3f64:
82 ; CHECK-GI: // %bb.0: // %entry
83 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
84 ; CHECK-GI-NEXT: // kill: def $d1 killed $d1 def $q1
85 ; CHECK-GI-NEXT: fneg d2, d2
86 ; CHECK-GI-NEXT: mov v0.d[1], v1.d[0]
87 ; CHECK-GI-NEXT: fneg v0.2d, v0.2d
88 ; CHECK-GI-NEXT: mov d1, v0.d[1]
89 ; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
90 ; CHECK-GI-NEXT: ret
91 entry:
92 %c = fneg <3 x double> %a
93 ret <3 x double> %c
94 }
96 define <4 x double> @fabs_v4f64(<4 x double> %a) {
97 ; CHECK-LABEL: fabs_v4f64:
98 ; CHECK: // %bb.0: // %entry
99 ; CHECK-NEXT: fneg v0.2d, v0.2d
100 ; CHECK-NEXT: fneg v1.2d, v1.2d
101 ; CHECK-NEXT: ret
102 entry:
103 %c = fneg <4 x double> %a
104 ret <4 x double> %c
105 }
107 define <2 x float> @fabs_v2f32(<2 x float> %a) {
108 ; CHECK-LABEL: fabs_v2f32:
109 ; CHECK: // %bb.0: // %entry
110 ; CHECK-NEXT: fneg v0.2s, v0.2s
111 ; CHECK-NEXT: ret
112 entry:
113 %c = fneg <2 x float> %a
114 ret <2 x float> %c
115 }
117 define <3 x float> @fabs_v3f32(<3 x float> %a) {
118 ; CHECK-LABEL: fabs_v3f32:
119 ; CHECK: // %bb.0: // %entry
120 ; CHECK-NEXT: fneg v0.4s, v0.4s
121 ; CHECK-NEXT: ret
122 entry:
123 %c = fneg <3 x float> %a
124 ret <3 x float> %c
125 }
127 define <4 x float> @fabs_v4f32(<4 x float> %a) {
128 ; CHECK-LABEL: fabs_v4f32:
129 ; CHECK: // %bb.0: // %entry
130 ; CHECK-NEXT: fneg v0.4s, v0.4s
131 ; CHECK-NEXT: ret
132 entry:
133 %c = fneg <4 x float> %a
134 ret <4 x float> %c
135 }
137 define <8 x float> @fabs_v8f32(<8 x float> %a) {
138 ; CHECK-LABEL: fabs_v8f32:
139 ; CHECK: // %bb.0: // %entry
140 ; CHECK-NEXT: fneg v0.4s, v0.4s
141 ; CHECK-NEXT: fneg v1.4s, v1.4s
142 ; CHECK-NEXT: ret
143 entry:
144 %c = fneg <8 x float> %a
145 ret <8 x float> %c
146 }
148 define <7 x half> @fabs_v7f16(<7 x half> %a) {
149 ; CHECK-SD-NOFP16-LABEL: fabs_v7f16:
150 ; CHECK-SD-NOFP16: // %bb.0: // %entry
151 ; CHECK-SD-NOFP16-NEXT: mov h1, v0.h[1]
152 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h0
153 ; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[2]
154 ; CHECK-SD-NOFP16-NEXT: mov h4, v0.h[3]
155 ; CHECK-SD-NOFP16-NEXT: mov h6, v0.h[4]
156 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
157 ; CHECK-SD-NOFP16-NEXT: fneg s2, s2
158 ; CHECK-SD-NOFP16-NEXT: fcvt s3, h3
159 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
160 ; CHECK-SD-NOFP16-NEXT: fneg s5, s1
161 ; CHECK-SD-NOFP16-NEXT: fcvt h1, s2
162 ; CHECK-SD-NOFP16-NEXT: fneg s2, s3
163 ; CHECK-SD-NOFP16-NEXT: fneg s4, s4
164 ; CHECK-SD-NOFP16-NEXT: fcvt h3, s5
165 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h6
166 ; CHECK-SD-NOFP16-NEXT: fcvt h2, s2
167 ; CHECK-SD-NOFP16-NEXT: fcvt h4, s4
168 ; CHECK-SD-NOFP16-NEXT: mov v1.h[1], v3.h[0]
169 ; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[5]
170 ; CHECK-SD-NOFP16-NEXT: fneg s5, s5
171 ; CHECK-SD-NOFP16-NEXT: mov v1.h[2], v2.h[0]
172 ; CHECK-SD-NOFP16-NEXT: mov h2, v0.h[6]
173 ; CHECK-SD-NOFP16-NEXT: fcvt s3, h3
174 ; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[7]
175 ; CHECK-SD-NOFP16-NEXT: mov v1.h[3], v4.h[0]
176 ; CHECK-SD-NOFP16-NEXT: fcvt h4, s5
177 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h2
178 ; CHECK-SD-NOFP16-NEXT: fneg s3, s3
179 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
180 ; CHECK-SD-NOFP16-NEXT: mov v1.h[4], v4.h[0]
181 ; CHECK-SD-NOFP16-NEXT: fneg s2, s2
182 ; CHECK-SD-NOFP16-NEXT: fcvt h3, s3
183 ; CHECK-SD-NOFP16-NEXT: fneg s0, s0
184 ; CHECK-SD-NOFP16-NEXT: fcvt h2, s2
185 ; CHECK-SD-NOFP16-NEXT: mov v1.h[5], v3.h[0]
186 ; CHECK-SD-NOFP16-NEXT: fcvt h0, s0
187 ; CHECK-SD-NOFP16-NEXT: mov v1.h[6], v2.h[0]
188 ; CHECK-SD-NOFP16-NEXT: mov v1.h[7], v0.h[0]
189 ; CHECK-SD-NOFP16-NEXT: mov v0.16b, v1.16b
190 ; CHECK-SD-NOFP16-NEXT: ret
191 ;
192 ; CHECK-SD-FP16-LABEL: fabs_v7f16:
193 ; CHECK-SD-FP16: // %bb.0: // %entry
194 ; CHECK-SD-FP16-NEXT: fneg v0.8h, v0.8h
195 ; CHECK-SD-FP16-NEXT: ret
196 ;
197 ; CHECK-GI-NOFP16-LABEL: fabs_v7f16:
198 ; CHECK-GI-NOFP16: // %bb.0: // %entry
199 ; CHECK-GI-NOFP16-NEXT: mov h1, v0.h[4]
200 ; CHECK-GI-NOFP16-NEXT: mov h2, v0.h[5]
201 ; CHECK-GI-NOFP16-NEXT: fcvtl v3.4s, v0.4h
202 ; CHECK-GI-NOFP16-NEXT: mov h0, v0.h[6]
203 ; CHECK-GI-NOFP16-NEXT: mov v1.h[1], v2.h[0]
204 ; CHECK-GI-NOFP16-NEXT: fneg v2.4s, v3.4s
205 ; CHECK-GI-NOFP16-NEXT: mov v1.h[2], v0.h[0]
206 ; CHECK-GI-NOFP16-NEXT: fcvtn v0.4h, v2.4s
207 ; CHECK-GI-NOFP16-NEXT: mov v1.h[3], v0.h[0]
208 ; CHECK-GI-NOFP16-NEXT: mov h2, v0.h[1]
209 ; CHECK-GI-NOFP16-NEXT: mov h3, v0.h[2]
210 ; CHECK-GI-NOFP16-NEXT: mov h4, v0.h[3]
211 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v1.4h
212 ; CHECK-GI-NOFP16-NEXT: mov v0.h[1], v2.h[0]
213 ; CHECK-GI-NOFP16-NEXT: fneg v1.4s, v1.4s
214 ; CHECK-GI-NOFP16-NEXT: mov v0.h[2], v3.h[0]
215 ; CHECK-GI-NOFP16-NEXT: fcvtn v1.4h, v1.4s
216 ; CHECK-GI-NOFP16-NEXT: mov v0.h[3], v4.h[0]
217 ; CHECK-GI-NOFP16-NEXT: mov h2, v1.h[1]
218 ; CHECK-GI-NOFP16-NEXT: mov v0.h[4], v1.h[0]
219 ; CHECK-GI-NOFP16-NEXT: mov h1, v1.h[2]
220 ; CHECK-GI-NOFP16-NEXT: mov v0.h[5], v2.h[0]
221 ; CHECK-GI-NOFP16-NEXT: mov v0.h[6], v1.h[0]
222 ; CHECK-GI-NOFP16-NEXT: mov v0.h[7], v0.h[0]
223 ; CHECK-GI-NOFP16-NEXT: ret
224 ;
225 ; CHECK-GI-FP16-LABEL: fabs_v7f16:
226 ; CHECK-GI-FP16: // %bb.0: // %entry
227 ; CHECK-GI-FP16-NEXT: fneg v0.8h, v0.8h
228 ; CHECK-GI-FP16-NEXT: ret
229 entry:
230 %c = fneg <7 x half> %a
231 ret <7 x half> %c
232 }
234 define <4 x half> @fabs_v4f16(<4 x half> %a) {
235 ; CHECK-SD-NOFP16-LABEL: fabs_v4f16:
236 ; CHECK-SD-NOFP16: // %bb.0: // %entry
237 ; CHECK-SD-NOFP16-NEXT: // kill: def $d0 killed $d0 def $q0
238 ; CHECK-SD-NOFP16-NEXT: mov h1, v0.h[1]
239 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h0
240 ; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[2]
241 ; CHECK-SD-NOFP16-NEXT: mov h4, v0.h[3]
242 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
243 ; CHECK-SD-NOFP16-NEXT: fneg s0, s2
244 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h3
245 ; CHECK-SD-NOFP16-NEXT: fcvt s3, h4
246 ; CHECK-SD-NOFP16-NEXT: fneg s1, s1
247 ; CHECK-SD-NOFP16-NEXT: fcvt h0, s0
248 ; CHECK-SD-NOFP16-NEXT: fneg s2, s2
249 ; CHECK-SD-NOFP16-NEXT: fcvt h1, s1
250 ; CHECK-SD-NOFP16-NEXT: mov v0.h[1], v1.h[0]
251 ; CHECK-SD-NOFP16-NEXT: fcvt h1, s2
252 ; CHECK-SD-NOFP16-NEXT: fneg s2, s3
253 ; CHECK-SD-NOFP16-NEXT: mov v0.h[2], v1.h[0]
254 ; CHECK-SD-NOFP16-NEXT: fcvt h1, s2
255 ; CHECK-SD-NOFP16-NEXT: mov v0.h[3], v1.h[0]
256 ; CHECK-SD-NOFP16-NEXT: // kill: def $d0 killed $d0 killed $q0
257 ; CHECK-SD-NOFP16-NEXT: ret
258 ;
259 ; CHECK-SD-FP16-LABEL: fabs_v4f16:
260 ; CHECK-SD-FP16: // %bb.0: // %entry
261 ; CHECK-SD-FP16-NEXT: fneg v0.4h, v0.4h
262 ; CHECK-SD-FP16-NEXT: ret
263 ;
264 ; CHECK-GI-NOFP16-LABEL: fabs_v4f16:
265 ; CHECK-GI-NOFP16: // %bb.0: // %entry
266 ; CHECK-GI-NOFP16-NEXT: fcvtl v0.4s, v0.4h
267 ; CHECK-GI-NOFP16-NEXT: fneg v0.4s, v0.4s
268 ; CHECK-GI-NOFP16-NEXT: fcvtn v0.4h, v0.4s
269 ; CHECK-GI-NOFP16-NEXT: ret
270 ;
271 ; CHECK-GI-FP16-LABEL: fabs_v4f16:
272 ; CHECK-GI-FP16: // %bb.0: // %entry
273 ; CHECK-GI-FP16-NEXT: fneg v0.4h, v0.4h
274 ; CHECK-GI-FP16-NEXT: ret
275 entry:
276 %c = fneg <4 x half> %a
277 ret <4 x half> %c
278 }
280 define <8 x half> @fabs_v8f16(<8 x half> %a) {
281 ; CHECK-SD-NOFP16-LABEL: fabs_v8f16:
282 ; CHECK-SD-NOFP16: // %bb.0: // %entry
283 ; CHECK-SD-NOFP16-NEXT: mov h1, v0.h[1]
284 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h0
285 ; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[2]
286 ; CHECK-SD-NOFP16-NEXT: mov h4, v0.h[3]
287 ; CHECK-SD-NOFP16-NEXT: mov h6, v0.h[4]
288 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
289 ; CHECK-SD-NOFP16-NEXT: fneg s2, s2
290 ; CHECK-SD-NOFP16-NEXT: fcvt s3, h3
291 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h4
292 ; CHECK-SD-NOFP16-NEXT: fneg s5, s1
293 ; CHECK-SD-NOFP16-NEXT: fcvt h1, s2
294 ; CHECK-SD-NOFP16-NEXT: fneg s2, s3
295 ; CHECK-SD-NOFP16-NEXT: fneg s4, s4
296 ; CHECK-SD-NOFP16-NEXT: fcvt h3, s5
297 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h6
298 ; CHECK-SD-NOFP16-NEXT: fcvt h2, s2
299 ; CHECK-SD-NOFP16-NEXT: fcvt h4, s4
300 ; CHECK-SD-NOFP16-NEXT: mov v1.h[1], v3.h[0]
301 ; CHECK-SD-NOFP16-NEXT: mov h3, v0.h[5]
302 ; CHECK-SD-NOFP16-NEXT: fneg s5, s5
303 ; CHECK-SD-NOFP16-NEXT: mov v1.h[2], v2.h[0]
304 ; CHECK-SD-NOFP16-NEXT: mov h2, v0.h[6]
305 ; CHECK-SD-NOFP16-NEXT: fcvt s3, h3
306 ; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[7]
307 ; CHECK-SD-NOFP16-NEXT: mov v1.h[3], v4.h[0]
308 ; CHECK-SD-NOFP16-NEXT: fcvt h4, s5
309 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h2
310 ; CHECK-SD-NOFP16-NEXT: fneg s3, s3
311 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
312 ; CHECK-SD-NOFP16-NEXT: mov v1.h[4], v4.h[0]
313 ; CHECK-SD-NOFP16-NEXT: fneg s2, s2
314 ; CHECK-SD-NOFP16-NEXT: fcvt h3, s3
315 ; CHECK-SD-NOFP16-NEXT: fneg s0, s0
316 ; CHECK-SD-NOFP16-NEXT: fcvt h2, s2
317 ; CHECK-SD-NOFP16-NEXT: mov v1.h[5], v3.h[0]
318 ; CHECK-SD-NOFP16-NEXT: fcvt h0, s0
319 ; CHECK-SD-NOFP16-NEXT: mov v1.h[6], v2.h[0]
320 ; CHECK-SD-NOFP16-NEXT: mov v1.h[7], v0.h[0]
321 ; CHECK-SD-NOFP16-NEXT: mov v0.16b, v1.16b
322 ; CHECK-SD-NOFP16-NEXT: ret
323 ;
324 ; CHECK-SD-FP16-LABEL: fabs_v8f16:
325 ; CHECK-SD-FP16: // %bb.0: // %entry
326 ; CHECK-SD-FP16-NEXT: fneg v0.8h, v0.8h
327 ; CHECK-SD-FP16-NEXT: ret
328 ;
329 ; CHECK-GI-NOFP16-LABEL: fabs_v8f16:
330 ; CHECK-GI-NOFP16: // %bb.0: // %entry
331 ; CHECK-GI-NOFP16-NEXT: fcvtl v1.4s, v0.4h
332 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
333 ; CHECK-GI-NOFP16-NEXT: fneg v1.4s, v1.4s
334 ; CHECK-GI-NOFP16-NEXT: fneg v2.4s, v0.4s
335 ; CHECK-GI-NOFP16-NEXT: fcvtn v0.4h, v1.4s
336 ; CHECK-GI-NOFP16-NEXT: fcvtn2 v0.8h, v2.4s
337 ; CHECK-GI-NOFP16-NEXT: ret
338 ;
339 ; CHECK-GI-FP16-LABEL: fabs_v8f16:
340 ; CHECK-GI-FP16: // %bb.0: // %entry
341 ; CHECK-GI-FP16-NEXT: fneg v0.8h, v0.8h
342 ; CHECK-GI-FP16-NEXT: ret
343 entry:
344 %c = fneg <8 x half> %a
345 ret <8 x half> %c
346 }
348 define <16 x half> @fabs_v16f16(<16 x half> %a) {
349 ; CHECK-SD-NOFP16-LABEL: fabs_v16f16:
350 ; CHECK-SD-NOFP16: // %bb.0: // %entry
351 ; CHECK-SD-NOFP16-NEXT: mov h2, v0.h[1]
352 ; CHECK-SD-NOFP16-NEXT: mov h3, v1.h[1]
353 ; CHECK-SD-NOFP16-NEXT: fcvt s4, h0
354 ; CHECK-SD-NOFP16-NEXT: mov h5, v0.h[2]
355 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h1
356 ; CHECK-SD-NOFP16-NEXT: mov h7, v1.h[2]
357 ; CHECK-SD-NOFP16-NEXT: mov h16, v0.h[3]
358 ; CHECK-SD-NOFP16-NEXT: mov h17, v1.h[3]
359 ; CHECK-SD-NOFP16-NEXT: mov h20, v0.h[4]
360 ; CHECK-SD-NOFP16-NEXT: mov h21, v1.h[4]
361 ; CHECK-SD-NOFP16-NEXT: fcvt s2, h2
362 ; CHECK-SD-NOFP16-NEXT: fcvt s3, h3
363 ; CHECK-SD-NOFP16-NEXT: fneg s4, s4
364 ; CHECK-SD-NOFP16-NEXT: fcvt s5, h5
365 ; CHECK-SD-NOFP16-NEXT: fneg s6, s6
366 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h7
367 ; CHECK-SD-NOFP16-NEXT: fcvt s16, h16
368 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h17
369 ; CHECK-SD-NOFP16-NEXT: fneg s18, s2
370 ; CHECK-SD-NOFP16-NEXT: fneg s19, s3
371 ; CHECK-SD-NOFP16-NEXT: fcvt h2, s4
372 ; CHECK-SD-NOFP16-NEXT: fneg s4, s5
373 ; CHECK-SD-NOFP16-NEXT: fcvt h3, s6
374 ; CHECK-SD-NOFP16-NEXT: fneg s6, s7
375 ; CHECK-SD-NOFP16-NEXT: fneg s16, s16
376 ; CHECK-SD-NOFP16-NEXT: fcvt h5, s18
377 ; CHECK-SD-NOFP16-NEXT: fcvt h7, s19
378 ; CHECK-SD-NOFP16-NEXT: fcvt s18, h20
379 ; CHECK-SD-NOFP16-NEXT: fcvt s19, h21
380 ; CHECK-SD-NOFP16-NEXT: fcvt h4, s4
381 ; CHECK-SD-NOFP16-NEXT: fcvt h6, s6
382 ; CHECK-SD-NOFP16-NEXT: fcvt h16, s16
383 ; CHECK-SD-NOFP16-NEXT: mov v2.h[1], v5.h[0]
384 ; CHECK-SD-NOFP16-NEXT: fneg s5, s17
385 ; CHECK-SD-NOFP16-NEXT: mov v3.h[1], v7.h[0]
386 ; CHECK-SD-NOFP16-NEXT: mov h7, v0.h[5]
387 ; CHECK-SD-NOFP16-NEXT: mov h17, v1.h[5]
388 ; CHECK-SD-NOFP16-NEXT: fneg s18, s18
389 ; CHECK-SD-NOFP16-NEXT: mov v2.h[2], v4.h[0]
390 ; CHECK-SD-NOFP16-NEXT: fneg s4, s19
391 ; CHECK-SD-NOFP16-NEXT: fcvt h5, s5
392 ; CHECK-SD-NOFP16-NEXT: mov v3.h[2], v6.h[0]
393 ; CHECK-SD-NOFP16-NEXT: mov h6, v0.h[6]
394 ; CHECK-SD-NOFP16-NEXT: fcvt s7, h7
395 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h17
396 ; CHECK-SD-NOFP16-NEXT: mov h19, v1.h[6]
397 ; CHECK-SD-NOFP16-NEXT: mov h0, v0.h[7]
398 ; CHECK-SD-NOFP16-NEXT: mov h1, v1.h[7]
399 ; CHECK-SD-NOFP16-NEXT: mov v2.h[3], v16.h[0]
400 ; CHECK-SD-NOFP16-NEXT: fcvt h4, s4
401 ; CHECK-SD-NOFP16-NEXT: mov v3.h[3], v5.h[0]
402 ; CHECK-SD-NOFP16-NEXT: fcvt h5, s18
403 ; CHECK-SD-NOFP16-NEXT: fcvt s6, h6
404 ; CHECK-SD-NOFP16-NEXT: fneg s7, s7
405 ; CHECK-SD-NOFP16-NEXT: fneg s16, s17
406 ; CHECK-SD-NOFP16-NEXT: fcvt s17, h19
407 ; CHECK-SD-NOFP16-NEXT: fcvt s0, h0
408 ; CHECK-SD-NOFP16-NEXT: fcvt s1, h1
409 ; CHECK-SD-NOFP16-NEXT: mov v2.h[4], v5.h[0]
410 ; CHECK-SD-NOFP16-NEXT: mov v3.h[4], v4.h[0]
411 ; CHECK-SD-NOFP16-NEXT: fneg s4, s6
412 ; CHECK-SD-NOFP16-NEXT: fcvt h5, s7
413 ; CHECK-SD-NOFP16-NEXT: fcvt h6, s16
414 ; CHECK-SD-NOFP16-NEXT: fneg s7, s17
415 ; CHECK-SD-NOFP16-NEXT: fneg s0, s0
416 ; CHECK-SD-NOFP16-NEXT: fneg s1, s1
417 ; CHECK-SD-NOFP16-NEXT: fcvt h4, s4
418 ; CHECK-SD-NOFP16-NEXT: mov v2.h[5], v5.h[0]
419 ; CHECK-SD-NOFP16-NEXT: mov v3.h[5], v6.h[0]
420 ; CHECK-SD-NOFP16-NEXT: fcvt h5, s7
421 ; CHECK-SD-NOFP16-NEXT: fcvt h0, s0
422 ; CHECK-SD-NOFP16-NEXT: fcvt h1, s1
423 ; CHECK-SD-NOFP16-NEXT: mov v2.h[6], v4.h[0]
424 ; CHECK-SD-NOFP16-NEXT: mov v3.h[6], v5.h[0]
425 ; CHECK-SD-NOFP16-NEXT: mov v2.h[7], v0.h[0]
426 ; CHECK-SD-NOFP16-NEXT: mov v3.h[7], v1.h[0]
427 ; CHECK-SD-NOFP16-NEXT: mov v0.16b, v2.16b
428 ; CHECK-SD-NOFP16-NEXT: mov v1.16b, v3.16b
429 ; CHECK-SD-NOFP16-NEXT: ret
430 ;
431 ; CHECK-SD-FP16-LABEL: fabs_v16f16:
432 ; CHECK-SD-FP16: // %bb.0: // %entry
433 ; CHECK-SD-FP16-NEXT: fneg v0.8h, v0.8h
434 ; CHECK-SD-FP16-NEXT: fneg v1.8h, v1.8h
435 ; CHECK-SD-FP16-NEXT: ret
436 ;
437 ; CHECK-GI-NOFP16-LABEL: fabs_v16f16:
438 ; CHECK-GI-NOFP16: // %bb.0: // %entry
439 ; CHECK-GI-NOFP16-NEXT: fcvtl v2.4s, v0.4h
440 ; CHECK-GI-NOFP16-NEXT: fcvtl v3.4s, v1.4h
441 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v0.4s, v0.8h
442 ; CHECK-GI-NOFP16-NEXT: fcvtl2 v1.4s, v1.8h
443 ; CHECK-GI-NOFP16-NEXT: fneg v2.4s, v2.4s
444 ; CHECK-GI-NOFP16-NEXT: fneg v3.4s, v3.4s
445 ; CHECK-GI-NOFP16-NEXT: fneg v4.4s, v0.4s
446 ; CHECK-GI-NOFP16-NEXT: fneg v5.4s, v1.4s
447 ; CHECK-GI-NOFP16-NEXT: fcvtn v0.4h, v2.4s
448 ; CHECK-GI-NOFP16-NEXT: fcvtn v1.4h, v3.4s
449 ; CHECK-GI-NOFP16-NEXT: fcvtn2 v0.8h, v4.4s
450 ; CHECK-GI-NOFP16-NEXT: fcvtn2 v1.8h, v5.4s
451 ; CHECK-GI-NOFP16-NEXT: ret
452 ;
453 ; CHECK-GI-FP16-LABEL: fabs_v16f16:
454 ; CHECK-GI-FP16: // %bb.0: // %entry
455 ; CHECK-GI-FP16-NEXT: fneg v0.8h, v0.8h
456 ; CHECK-GI-FP16-NEXT: fneg v1.8h, v1.8h
457 ; CHECK-GI-FP16-NEXT: ret
458 entry:
459 %c = fneg <16 x half> %a
460 ret <16 x half> %c
461 }