1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -aarch64-sve-vector-bits-min=128 < %s | not grep ptrue
3 ; RUN: llc -aarch64-sve-vector-bits-min=256 < %s | FileCheck %s -check-prefixes=CHECK,VBITS_GE_256
4 ; RUN: llc -aarch64-sve-vector-bits-min=384 < %s | FileCheck %s -check-prefixes=CHECK,VBITS_GE_256
5 ; RUN: llc -aarch64-sve-vector-bits-min=512 < %s | FileCheck %s -check-prefixes=CHECK,VBITS_GE_512
6 ; RUN: llc -aarch64-sve-vector-bits-min=640 < %s | FileCheck %s -check-prefixes=CHECK,VBITS_GE_512
7 ; RUN: llc -aarch64-sve-vector-bits-min=768 < %s | FileCheck %s -check-prefixes=CHECK,VBITS_GE_512
8 ; RUN: llc -aarch64-sve-vector-bits-min=896 < %s | FileCheck %s -check-prefixes=CHECK,VBITS_GE_512
9 ; RUN: llc -aarch64-sve-vector-bits-min=1024 < %s | FileCheck %s -check-prefixes=CHECK,VBITS_GE_1024
10 ; RUN: llc -aarch64-sve-vector-bits-min=1152 < %s | FileCheck %s -check-prefixes=CHECK,VBITS_GE_1024
11 ; RUN: llc -aarch64-sve-vector-bits-min=1280 < %s | FileCheck %s -check-prefixes=CHECK,VBITS_GE_1024
12 ; RUN: llc -aarch64-sve-vector-bits-min=1408 < %s | FileCheck %s -check-prefixes=CHECK,VBITS_GE_1024
13 ; RUN: llc -aarch64-sve-vector-bits-min=1536 < %s | FileCheck %s -check-prefixes=CHECK,VBITS_GE_1024
14 ; RUN: llc -aarch64-sve-vector-bits-min=1664 < %s | FileCheck %s -check-prefixes=CHECK,VBITS_GE_1024
15 ; RUN: llc -aarch64-sve-vector-bits-min=1792 < %s | FileCheck %s -check-prefixes=CHECK,VBITS_GE_1024
16 ; RUN: llc -aarch64-sve-vector-bits-min=1920 < %s | FileCheck %s -check-prefixes=CHECK,VBITS_GE_1024
17 ; RUN: llc -aarch64-sve-vector-bits-min=2048 < %s | FileCheck %s -check-prefixes=CHECK,VBITS_GE_2048
19 target triple = "aarch64-unknown-linux-gnu"
21 ; Don't use SVE for 64-bit vectors.
22 define void @store_v2f32(ptr %a) #0 {
23 ; CHECK-LABEL: store_v2f32:
25 ; CHECK-NEXT: str xzr, [x0]
27 store <2 x float> zeroinitializer, ptr %a
31 ; Don't use SVE for 128-bit vectors.
32 define void @store_v4f32(ptr %a) #0 {
33 ; CHECK-LABEL: store_v4f32:
35 ; CHECK-NEXT: stp xzr, xzr, [x0]
37 store <4 x float> zeroinitializer, ptr %a
41 define void @store_v8f32(ptr %a) #0 {
42 ; CHECK-LABEL: store_v8f32:
44 ; CHECK-NEXT: ptrue p0.s, vl8
45 ; CHECK-NEXT: mov z0.s, #0 // =0x0
46 ; CHECK-NEXT: st1w { z0.s }, p0, [x0]
48 store <8 x float> zeroinitializer, ptr %a
52 define void @store_v16f32(ptr %a) #0 {
53 ; VBITS_GE_256-LABEL: store_v16f32:
54 ; VBITS_GE_256: // %bb.0:
55 ; VBITS_GE_256-NEXT: ptrue p0.s, vl8
56 ; VBITS_GE_256-NEXT: mov z0.s, #0 // =0x0
57 ; VBITS_GE_256-NEXT: mov x8, #8 // =0x8
58 ; VBITS_GE_256-NEXT: st1w { z0.s }, p0, [x0, x8, lsl #2]
59 ; VBITS_GE_256-NEXT: st1w { z0.s }, p0, [x0]
60 ; VBITS_GE_256-NEXT: ret
62 ; VBITS_GE_512-LABEL: store_v16f32:
63 ; VBITS_GE_512: // %bb.0:
64 ; VBITS_GE_512-NEXT: ptrue p0.s, vl16
65 ; VBITS_GE_512-NEXT: mov z0.s, #0 // =0x0
66 ; VBITS_GE_512-NEXT: st1w { z0.s }, p0, [x0]
67 ; VBITS_GE_512-NEXT: ret
69 ; VBITS_GE_1024-LABEL: store_v16f32:
70 ; VBITS_GE_1024: // %bb.0:
71 ; VBITS_GE_1024-NEXT: ptrue p0.s, vl16
72 ; VBITS_GE_1024-NEXT: mov z0.s, #0 // =0x0
73 ; VBITS_GE_1024-NEXT: st1w { z0.s }, p0, [x0]
74 ; VBITS_GE_1024-NEXT: ret
76 ; VBITS_GE_2048-LABEL: store_v16f32:
77 ; VBITS_GE_2048: // %bb.0:
78 ; VBITS_GE_2048-NEXT: ptrue p0.s, vl16
79 ; VBITS_GE_2048-NEXT: mov z0.s, #0 // =0x0
80 ; VBITS_GE_2048-NEXT: st1w { z0.s }, p0, [x0]
81 ; VBITS_GE_2048-NEXT: ret
82 store <16 x float> zeroinitializer, ptr %a
86 define void @store_v32f32(ptr %a) #0 {
87 ; VBITS_GE_256-LABEL: store_v32f32:
88 ; VBITS_GE_256: // %bb.0:
89 ; VBITS_GE_256-NEXT: ptrue p0.s, vl8
90 ; VBITS_GE_256-NEXT: mov z0.s, #0 // =0x0
91 ; VBITS_GE_256-NEXT: mov x8, #24 // =0x18
92 ; VBITS_GE_256-NEXT: mov x9, #16 // =0x10
93 ; VBITS_GE_256-NEXT: st1w { z0.s }, p0, [x0, x8, lsl #2]
94 ; VBITS_GE_256-NEXT: mov x8, #8 // =0x8
95 ; VBITS_GE_256-NEXT: st1w { z0.s }, p0, [x0, x9, lsl #2]
96 ; VBITS_GE_256-NEXT: st1w { z0.s }, p0, [x0, x8, lsl #2]
97 ; VBITS_GE_256-NEXT: st1w { z0.s }, p0, [x0]
98 ; VBITS_GE_256-NEXT: ret
100 ; VBITS_GE_512-LABEL: store_v32f32:
101 ; VBITS_GE_512: // %bb.0:
102 ; VBITS_GE_512-NEXT: ptrue p0.s, vl16
103 ; VBITS_GE_512-NEXT: mov z0.s, #0 // =0x0
104 ; VBITS_GE_512-NEXT: mov x8, #16 // =0x10
105 ; VBITS_GE_512-NEXT: st1w { z0.s }, p0, [x0, x8, lsl #2]
106 ; VBITS_GE_512-NEXT: st1w { z0.s }, p0, [x0]
107 ; VBITS_GE_512-NEXT: ret
109 ; VBITS_GE_1024-LABEL: store_v32f32:
110 ; VBITS_GE_1024: // %bb.0:
111 ; VBITS_GE_1024-NEXT: ptrue p0.s, vl32
112 ; VBITS_GE_1024-NEXT: mov z0.s, #0 // =0x0
113 ; VBITS_GE_1024-NEXT: st1w { z0.s }, p0, [x0]
114 ; VBITS_GE_1024-NEXT: ret
116 ; VBITS_GE_2048-LABEL: store_v32f32:
117 ; VBITS_GE_2048: // %bb.0:
118 ; VBITS_GE_2048-NEXT: ptrue p0.s, vl32
119 ; VBITS_GE_2048-NEXT: mov z0.s, #0 // =0x0
120 ; VBITS_GE_2048-NEXT: st1w { z0.s }, p0, [x0]
121 ; VBITS_GE_2048-NEXT: ret
122 store <32 x float> zeroinitializer, ptr %a
126 define void @store_v64f32(ptr %a) #0 {
127 ; VBITS_GE_256-LABEL: store_v64f32:
128 ; VBITS_GE_256: // %bb.0:
129 ; VBITS_GE_256-NEXT: ptrue p0.s, vl8
130 ; VBITS_GE_256-NEXT: mov z0.s, #0 // =0x0
131 ; VBITS_GE_256-NEXT: mov x8, #56 // =0x38
132 ; VBITS_GE_256-NEXT: st1w { z0.s }, p0, [x0, x8, lsl #2]
133 ; VBITS_GE_256-NEXT: mov x8, #48 // =0x30
134 ; VBITS_GE_256-NEXT: st1w { z0.s }, p0, [x0, x8, lsl #2]
135 ; VBITS_GE_256-NEXT: mov x8, #40 // =0x28
136 ; VBITS_GE_256-NEXT: st1w { z0.s }, p0, [x0, x8, lsl #2]
137 ; VBITS_GE_256-NEXT: mov x8, #32 // =0x20
138 ; VBITS_GE_256-NEXT: st1w { z0.s }, p0, [x0, x8, lsl #2]
139 ; VBITS_GE_256-NEXT: mov x8, #24 // =0x18
140 ; VBITS_GE_256-NEXT: st1w { z0.s }, p0, [x0, x8, lsl #2]
141 ; VBITS_GE_256-NEXT: mov x8, #16 // =0x10
142 ; VBITS_GE_256-NEXT: st1w { z0.s }, p0, [x0, x8, lsl #2]
143 ; VBITS_GE_256-NEXT: mov x8, #8 // =0x8
144 ; VBITS_GE_256-NEXT: st1w { z0.s }, p0, [x0, x8, lsl #2]
145 ; VBITS_GE_256-NEXT: st1w { z0.s }, p0, [x0]
146 ; VBITS_GE_256-NEXT: ret
148 ; VBITS_GE_512-LABEL: store_v64f32:
149 ; VBITS_GE_512: // %bb.0:
150 ; VBITS_GE_512-NEXT: ptrue p0.s, vl16
151 ; VBITS_GE_512-NEXT: mov z0.s, #0 // =0x0
152 ; VBITS_GE_512-NEXT: mov x8, #48 // =0x30
153 ; VBITS_GE_512-NEXT: mov x9, #32 // =0x20
154 ; VBITS_GE_512-NEXT: st1w { z0.s }, p0, [x0, x8, lsl #2]
155 ; VBITS_GE_512-NEXT: mov x8, #16 // =0x10
156 ; VBITS_GE_512-NEXT: st1w { z0.s }, p0, [x0, x9, lsl #2]
157 ; VBITS_GE_512-NEXT: st1w { z0.s }, p0, [x0, x8, lsl #2]
158 ; VBITS_GE_512-NEXT: st1w { z0.s }, p0, [x0]
159 ; VBITS_GE_512-NEXT: ret
161 ; VBITS_GE_1024-LABEL: store_v64f32:
162 ; VBITS_GE_1024: // %bb.0:
163 ; VBITS_GE_1024-NEXT: ptrue p0.s, vl32
164 ; VBITS_GE_1024-NEXT: mov z0.s, #0 // =0x0
165 ; VBITS_GE_1024-NEXT: mov x8, #32 // =0x20
166 ; VBITS_GE_1024-NEXT: st1w { z0.s }, p0, [x0, x8, lsl #2]
167 ; VBITS_GE_1024-NEXT: st1w { z0.s }, p0, [x0]
168 ; VBITS_GE_1024-NEXT: ret
170 ; VBITS_GE_2048-LABEL: store_v64f32:
171 ; VBITS_GE_2048: // %bb.0:
172 ; VBITS_GE_2048-NEXT: ptrue p0.s, vl64
173 ; VBITS_GE_2048-NEXT: mov z0.s, #0 // =0x0
174 ; VBITS_GE_2048-NEXT: st1w { z0.s }, p0, [x0]
175 ; VBITS_GE_2048-NEXT: ret
176 store <64 x float> zeroinitializer, ptr %a
180 attributes #0 = { "target-features"="+sve" }