| blob | e09179b726a6ea1ae275149b782157df1083b136 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mattr=+sve -force-streaming-compatible-sve < %s | FileCheck %s
4 target triple = "aarch64-unknown-linux-gnu"
6 define void @bitcast_v4i8(ptr %a, ptr %b) {
7 ; CHECK-LABEL: bitcast_v4i8:
8 ; CHECK: // %bb.0:
9 ; CHECK-NEXT: ptrue p0.h, vl4
10 ; CHECK-NEXT: ld1b { z0.h }, p0/z, [x0]
11 ; CHECK-NEXT: st1b { z0.h }, p0, [x1]
12 ; CHECK-NEXT: ret
13 %load = load volatile <4 x i8>, ptr %a
14 %cast = bitcast <4 x i8> %load to <4 x i8>
15 store volatile <4 x i8> %cast, ptr %b
16 ret void
17 }
19 define void @bitcast_v8i8(ptr %a, ptr %b) {
20 ; CHECK-LABEL: bitcast_v8i8:
21 ; CHECK: // %bb.0:
22 ; CHECK-NEXT: ldr d0, [x0]
23 ; CHECK-NEXT: str d0, [x1]
24 ; CHECK-NEXT: ret
25 %load = load volatile <8 x i8>, ptr %a
26 %cast = bitcast <8 x i8> %load to <8 x i8>
27 store volatile <8 x i8> %cast, ptr %b
28 ret void
29 }
31 define void @bitcast_v16i8(ptr %a, ptr %b) {
32 ; CHECK-LABEL: bitcast_v16i8:
33 ; CHECK: // %bb.0:
34 ; CHECK-NEXT: ldr q0, [x0]
35 ; CHECK-NEXT: str q0, [x1]
36 ; CHECK-NEXT: ret
37 %load = load volatile <16 x i8>, ptr %a
38 %cast = bitcast <16 x i8> %load to <16 x i8>
39 store volatile <16 x i8> %cast, ptr %b
40 ret void
41 }
43 define void @bitcast_v32i8(ptr %a, ptr %b) {
44 ; CHECK-LABEL: bitcast_v32i8:
45 ; CHECK: // %bb.0:
46 ; CHECK-NEXT: ldr q0, [x0]
47 ; CHECK-NEXT: ldr q1, [x0, #16]
48 ; CHECK-NEXT: str q1, [x1, #16]
49 ; CHECK-NEXT: str q0, [x1]
50 ; CHECK-NEXT: ret
51 %load = load volatile <32 x i8>, ptr %a
52 %cast = bitcast <32 x i8> %load to <32 x i8>
53 store volatile <32 x i8> %cast, ptr %b
54 ret void
55 }
57 define void @bitcast_v2i16(ptr %a, ptr %b) {
58 ; CHECK-LABEL: bitcast_v2i16:
59 ; CHECK: // %bb.0:
60 ; CHECK-NEXT: sub sp, sp, #16
61 ; CHECK-NEXT: .cfi_def_cfa_offset 16
62 ; CHECK-NEXT: ldrh w8, [x0, #2]
63 ; CHECK-NEXT: str w8, [sp, #4]
64 ; CHECK-NEXT: ldrh w8, [x0]
65 ; CHECK-NEXT: str w8, [sp]
66 ; CHECK-NEXT: ldr d0, [sp]
67 ; CHECK-NEXT: mov z1.s, z0.s[1]
68 ; CHECK-NEXT: fmov w8, s0
69 ; CHECK-NEXT: strh w8, [sp, #8]
70 ; CHECK-NEXT: fmov w8, s1
71 ; CHECK-NEXT: strh w8, [sp, #10]
72 ; CHECK-NEXT: ldr d0, [sp, #8]
73 ; CHECK-NEXT: fmov w8, s0
74 ; CHECK-NEXT: str w8, [x1]
75 ; CHECK-NEXT: add sp, sp, #16
76 ; CHECK-NEXT: ret
77 %load = load volatile <2 x i16>, ptr %a
78 %cast = bitcast <2 x i16> %load to <2 x half>
79 store volatile <2 x half> %cast, ptr %b
80 ret void
81 }
83 define void @bitcast_v4i16(ptr %a, ptr %b) {
84 ; CHECK-LABEL: bitcast_v4i16:
85 ; CHECK: // %bb.0:
86 ; CHECK-NEXT: ldr d0, [x0]
87 ; CHECK-NEXT: str d0, [x1]
88 ; CHECK-NEXT: ret
89 %load = load volatile <4 x i16>, ptr %a
90 %cast = bitcast <4 x i16> %load to <4 x half>
91 store volatile <4 x half> %cast, ptr %b
92 ret void
93 }
95 define void @bitcast_v8i16(ptr %a, ptr %b) {
96 ; CHECK-LABEL: bitcast_v8i16:
97 ; CHECK: // %bb.0:
98 ; CHECK-NEXT: ldr q0, [x0]
99 ; CHECK-NEXT: str q0, [x1]
100 ; CHECK-NEXT: ret
101 %load = load volatile <8 x i16>, ptr %a
102 %cast = bitcast <8 x i16> %load to <8 x half>
103 store volatile <8 x half> %cast, ptr %b
104 ret void
105 }
107 define void @bitcast_v16i16(ptr %a, ptr %b) {
108 ; CHECK-LABEL: bitcast_v16i16:
109 ; CHECK: // %bb.0:
110 ; CHECK-NEXT: ldr q0, [x0]
111 ; CHECK-NEXT: ldr q1, [x0, #16]
112 ; CHECK-NEXT: str q1, [x1, #16]
113 ; CHECK-NEXT: str q0, [x1]
114 ; CHECK-NEXT: ret
115 %load = load volatile <16 x i16>, ptr %a
116 %cast = bitcast <16 x i16> %load to <16 x half>
117 store volatile <16 x half> %cast, ptr %b
118 ret void
119 }
121 define void @bitcast_v2i32(ptr %a, ptr %b) {
122 ; CHECK-LABEL: bitcast_v2i32:
123 ; CHECK: // %bb.0:
124 ; CHECK-NEXT: ldr d0, [x0]
125 ; CHECK-NEXT: str d0, [x1]
126 ; CHECK-NEXT: ret
127 %load = load volatile <2 x i32>, ptr %a
128 %cast = bitcast <2 x i32> %load to <2 x float>
129 store volatile <2 x float> %cast, ptr %b
130 ret void
131 }
133 define void @bitcast_v4i32(ptr %a, ptr %b) {
134 ; CHECK-LABEL: bitcast_v4i32:
135 ; CHECK: // %bb.0:
136 ; CHECK-NEXT: ldr q0, [x0]
137 ; CHECK-NEXT: str q0, [x1]
138 ; CHECK-NEXT: ret
139 %load = load volatile <4 x i32>, ptr %a
140 %cast = bitcast <4 x i32> %load to <4 x float>
141 store volatile <4 x float> %cast, ptr %b
142 ret void
143 }
145 define void @bitcast_v8i32(ptr %a, ptr %b) {
146 ; CHECK-LABEL: bitcast_v8i32:
147 ; CHECK: // %bb.0:
148 ; CHECK-NEXT: ldr q0, [x0]
149 ; CHECK-NEXT: ldr q1, [x0, #16]
150 ; CHECK-NEXT: str q1, [x1, #16]
151 ; CHECK-NEXT: str q0, [x1]
152 ; CHECK-NEXT: ret
153 %load = load volatile <8 x i32>, ptr %a
154 %cast = bitcast <8 x i32> %load to <8 x float>
155 store volatile <8 x float> %cast, ptr %b
156 ret void
157 }
159 define void @bitcast_v1i64(ptr %a, ptr %b) {
160 ; CHECK-LABEL: bitcast_v1i64:
161 ; CHECK: // %bb.0:
162 ; CHECK-NEXT: ldr d0, [x0]
163 ; CHECK-NEXT: str d0, [x1]
164 ; CHECK-NEXT: ret
165 %load = load volatile <1 x i64>, ptr %a
166 %cast = bitcast <1 x i64> %load to <1 x double>
167 store volatile <1 x double> %cast, ptr %b
168 ret void
169 }
171 define void @bitcast_v2i64(ptr %a, ptr %b) {
172 ; CHECK-LABEL: bitcast_v2i64:
173 ; CHECK: // %bb.0:
174 ; CHECK-NEXT: ldr q0, [x0]
175 ; CHECK-NEXT: str q0, [x1]
176 ; CHECK-NEXT: ret
177 %load = load volatile <2 x i64>, ptr %a
178 %cast = bitcast <2 x i64> %load to <2 x double>
179 store volatile <2 x double> %cast, ptr %b
180 ret void
181 }
183 define void @bitcast_v4i64(ptr %a, ptr %b) {
184 ; CHECK-LABEL: bitcast_v4i64:
185 ; CHECK: // %bb.0:
186 ; CHECK-NEXT: ldr q0, [x0]
187 ; CHECK-NEXT: ldr q1, [x0, #16]
188 ; CHECK-NEXT: str q1, [x1, #16]
189 ; CHECK-NEXT: str q0, [x1]
190 ; CHECK-NEXT: ret
191 %load = load volatile <4 x i64>, ptr %a
192 %cast = bitcast <4 x i64> %load to <4 x double>
193 store volatile <4 x double> %cast, ptr %b
194 ret void
195 }