| blob | 8123ca6d1b54ff4612d1379260878f438d65047e |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-NOFP --check-prefix=CHECK-NOFP-SD
3 ; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -mattr=+neon,+fullfp16 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FP --check-prefix=CHECK-FP-SD
4 ; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -mattr=+neon -global-isel -global-isel-abort=2 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-NOFP --check-prefix=CHECK-NOFP-GI
5 ; RUN: llc < %s -mtriple=aarch64-none-linux-gnu -mattr=+neon,+fullfp16 -global-isel -global-isel-abort=2 2>&1 | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-FP --check-prefix=CHECK-FP-GI
7 ; CHECK-NOFP-GI: warning: Instruction selection used fallback path for test_v11f16
8 ; CHECK-NOFP-GI-NEXT: warning: Instruction selection used fallback path for test_v3f32
9 ; CHECK-NOFP-GI-NEXT: warning: Instruction selection used fallback path for test_v3f32_ninf
10 ;
11 ; CHECK-FP-GI: warning: Instruction selection used fallback path for test_v11f16
12 ; CHECK-FP-GI-NEXT: warning: Instruction selection used fallback path for test_v3f32
13 ; CHECK-FP-GI-NEXT: warning: Instruction selection used fallback path for test_v3f32_ninf
15 declare half @llvm.vector.reduce.fminimum.v1f16(<1 x half> %a)
16 declare float @llvm.vector.reduce.fminimum.v1f32(<1 x float> %a)
17 declare double @llvm.vector.reduce.fminimum.v1f64(<1 x double> %a)
18 declare fp128 @llvm.vector.reduce.fminimum.v1f128(<1 x fp128> %a)
20 declare half @llvm.vector.reduce.fminimum.v4f16(<4 x half> %a)
21 declare half @llvm.vector.reduce.fminimum.v8f16(<8 x half> %a)
22 declare half @llvm.vector.reduce.fminimum.v16f16(<16 x half> %a)
23 declare float @llvm.vector.reduce.fminimum.v2f32(<2 x float> %a)
24 declare float @llvm.vector.reduce.fminimum.v4f32(<4 x float> %a)
25 declare float @llvm.vector.reduce.fminimum.v8f32(<8 x float> %a)
26 declare float @llvm.vector.reduce.fminimum.v16f32(<16 x float> %a)
27 declare double @llvm.vector.reduce.fminimum.v2f64(<2 x double> %a)
28 declare double @llvm.vector.reduce.fminimum.v4f64(<4 x double> %a)
30 declare half @llvm.vector.reduce.fminimum.v11f16(<11 x half> %a)
31 declare float @llvm.vector.reduce.fminimum.v3f32(<3 x float> %a)
32 declare fp128 @llvm.vector.reduce.fminimum.v2f128(<2 x fp128> %a)
34 define half @test_v1f16(<1 x half> %a) nounwind {
35 ; CHECK-LABEL: test_v1f16:
36 ; CHECK: // %bb.0:
37 ; CHECK-NEXT: ret
38 %b = call half @llvm.vector.reduce.fminimum.v1f16(<1 x half> %a)
39 ret half %b
40 }
42 define float @test_v1f32(<1 x float> %a) nounwind {
43 ; CHECK-NOFP-SD-LABEL: test_v1f32:
44 ; CHECK-NOFP-SD: // %bb.0:
45 ; CHECK-NOFP-SD-NEXT: // kill: def $d0 killed $d0 def $q0
46 ; CHECK-NOFP-SD-NEXT: // kill: def $s0 killed $s0 killed $q0
47 ; CHECK-NOFP-SD-NEXT: ret
48 ;
49 ; CHECK-FP-SD-LABEL: test_v1f32:
50 ; CHECK-FP-SD: // %bb.0:
51 ; CHECK-FP-SD-NEXT: // kill: def $d0 killed $d0 def $q0
52 ; CHECK-FP-SD-NEXT: // kill: def $s0 killed $s0 killed $q0
53 ; CHECK-FP-SD-NEXT: ret
54 ;
55 ; CHECK-NOFP-GI-LABEL: test_v1f32:
56 ; CHECK-NOFP-GI: // %bb.0:
57 ; CHECK-NOFP-GI-NEXT: fmov x8, d0
58 ; CHECK-NOFP-GI-NEXT: fmov s0, w8
59 ; CHECK-NOFP-GI-NEXT: ret
60 ;
61 ; CHECK-FP-GI-LABEL: test_v1f32:
62 ; CHECK-FP-GI: // %bb.0:
63 ; CHECK-FP-GI-NEXT: fmov x8, d0
64 ; CHECK-FP-GI-NEXT: fmov s0, w8
65 ; CHECK-FP-GI-NEXT: ret
66 %b = call float @llvm.vector.reduce.fminimum.v1f32(<1 x float> %a)
67 ret float %b
68 }
70 define double @test_v1f64(<1 x double> %a) nounwind {
71 ; CHECK-LABEL: test_v1f64:
72 ; CHECK: // %bb.0:
73 ; CHECK-NEXT: ret
74 %b = call double @llvm.vector.reduce.fminimum.v1f64(<1 x double> %a)
75 ret double %b
76 }
78 define fp128 @test_v1f128(<1 x fp128> %a) nounwind {
79 ; CHECK-LABEL: test_v1f128:
80 ; CHECK: // %bb.0:
81 ; CHECK-NEXT: ret
82 %b = call fp128 @llvm.vector.reduce.fminimum.v1f128(<1 x fp128> %a)
83 ret fp128 %b
84 }
86 define half @test_v4f16(<4 x half> %a) nounwind {
87 ; CHECK-NOFP-SD-LABEL: test_v4f16:
88 ; CHECK-NOFP-SD: // %bb.0:
89 ; CHECK-NOFP-SD-NEXT: // kill: def $d0 killed $d0 def $q0
90 ; CHECK-NOFP-SD-NEXT: mov h1, v0.h[1]
91 ; CHECK-NOFP-SD-NEXT: fcvt s2, h0
92 ; CHECK-NOFP-SD-NEXT: fcvt s1, h1
93 ; CHECK-NOFP-SD-NEXT: fmin s1, s2, s1
94 ; CHECK-NOFP-SD-NEXT: mov h2, v0.h[2]
95 ; CHECK-NOFP-SD-NEXT: mov h0, v0.h[3]
96 ; CHECK-NOFP-SD-NEXT: fcvt h1, s1
97 ; CHECK-NOFP-SD-NEXT: fcvt s2, h2
98 ; CHECK-NOFP-SD-NEXT: fcvt s0, h0
99 ; CHECK-NOFP-SD-NEXT: fcvt s1, h1
100 ; CHECK-NOFP-SD-NEXT: fmin s1, s1, s2
101 ; CHECK-NOFP-SD-NEXT: fcvt h1, s1
102 ; CHECK-NOFP-SD-NEXT: fcvt s1, h1
103 ; CHECK-NOFP-SD-NEXT: fmin s0, s1, s0
104 ; CHECK-NOFP-SD-NEXT: fcvt h0, s0
105 ; CHECK-NOFP-SD-NEXT: ret
106 ;
107 ; CHECK-FP-LABEL: test_v4f16:
108 ; CHECK-FP: // %bb.0:
109 ; CHECK-FP-NEXT: fminv h0, v0.4h
110 ; CHECK-FP-NEXT: ret
111 ;
112 ; CHECK-NOFP-GI-LABEL: test_v4f16:
113 ; CHECK-NOFP-GI: // %bb.0:
114 ; CHECK-NOFP-GI-NEXT: fcvtl v0.4s, v0.4h
115 ; CHECK-NOFP-GI-NEXT: fminv s0, v0.4s
116 ; CHECK-NOFP-GI-NEXT: fcvt h0, s0
117 ; CHECK-NOFP-GI-NEXT: ret
118 %b = call half @llvm.vector.reduce.fminimum.v4f16(<4 x half> %a)
119 ret half %b
120 }
122 define half @test_v8f16(<8 x half> %a) nounwind {
123 ; CHECK-NOFP-SD-LABEL: test_v8f16:
124 ; CHECK-NOFP-SD: // %bb.0:
125 ; CHECK-NOFP-SD-NEXT: mov h1, v0.h[1]
126 ; CHECK-NOFP-SD-NEXT: fcvt s2, h0
127 ; CHECK-NOFP-SD-NEXT: fcvt s1, h1
128 ; CHECK-NOFP-SD-NEXT: fmin s1, s2, s1
129 ; CHECK-NOFP-SD-NEXT: mov h2, v0.h[2]
130 ; CHECK-NOFP-SD-NEXT: fcvt h1, s1
131 ; CHECK-NOFP-SD-NEXT: fcvt s2, h2
132 ; CHECK-NOFP-SD-NEXT: fcvt s1, h1
133 ; CHECK-NOFP-SD-NEXT: fmin s1, s1, s2
134 ; CHECK-NOFP-SD-NEXT: mov h2, v0.h[3]
135 ; CHECK-NOFP-SD-NEXT: fcvt h1, s1
136 ; CHECK-NOFP-SD-NEXT: fcvt s2, h2
137 ; CHECK-NOFP-SD-NEXT: fcvt s1, h1
138 ; CHECK-NOFP-SD-NEXT: fmin s1, s1, s2
139 ; CHECK-NOFP-SD-NEXT: mov h2, v0.h[4]
140 ; CHECK-NOFP-SD-NEXT: fcvt h1, s1
141 ; CHECK-NOFP-SD-NEXT: fcvt s2, h2
142 ; CHECK-NOFP-SD-NEXT: fcvt s1, h1
143 ; CHECK-NOFP-SD-NEXT: fmin s1, s1, s2
144 ; CHECK-NOFP-SD-NEXT: mov h2, v0.h[5]
145 ; CHECK-NOFP-SD-NEXT: fcvt h1, s1
146 ; CHECK-NOFP-SD-NEXT: fcvt s2, h2
147 ; CHECK-NOFP-SD-NEXT: fcvt s1, h1
148 ; CHECK-NOFP-SD-NEXT: fmin s1, s1, s2
149 ; CHECK-NOFP-SD-NEXT: mov h2, v0.h[6]
150 ; CHECK-NOFP-SD-NEXT: mov h0, v0.h[7]
151 ; CHECK-NOFP-SD-NEXT: fcvt h1, s1
152 ; CHECK-NOFP-SD-NEXT: fcvt s2, h2
153 ; CHECK-NOFP-SD-NEXT: fcvt s0, h0
154 ; CHECK-NOFP-SD-NEXT: fcvt s1, h1
155 ; CHECK-NOFP-SD-NEXT: fmin s1, s1, s2
156 ; CHECK-NOFP-SD-NEXT: fcvt h1, s1
157 ; CHECK-NOFP-SD-NEXT: fcvt s1, h1
158 ; CHECK-NOFP-SD-NEXT: fmin s0, s1, s0
159 ; CHECK-NOFP-SD-NEXT: fcvt h0, s0
160 ; CHECK-NOFP-SD-NEXT: ret
161 ;
162 ; CHECK-FP-LABEL: test_v8f16:
163 ; CHECK-FP: // %bb.0:
164 ; CHECK-FP-NEXT: fminv h0, v0.8h
165 ; CHECK-FP-NEXT: ret
166 ;
167 ; CHECK-NOFP-GI-LABEL: test_v8f16:
168 ; CHECK-NOFP-GI: // %bb.0:
169 ; CHECK-NOFP-GI-NEXT: fcvtl v1.4s, v0.4h
170 ; CHECK-NOFP-GI-NEXT: fcvtl2 v0.4s, v0.8h
171 ; CHECK-NOFP-GI-NEXT: fmin v0.4s, v1.4s, v0.4s
172 ; CHECK-NOFP-GI-NEXT: fminv s0, v0.4s
173 ; CHECK-NOFP-GI-NEXT: fcvt h0, s0
174 ; CHECK-NOFP-GI-NEXT: ret
175 %b = call nnan half @llvm.vector.reduce.fminimum.v8f16(<8 x half> %a)
176 ret half %b
177 }
179 define half @test_v16f16(<16 x half> %a) nounwind {
180 ; CHECK-NOFP-SD-LABEL: test_v16f16:
181 ; CHECK-NOFP-SD: // %bb.0:
182 ; CHECK-NOFP-SD-NEXT: mov h2, v1.h[1]
183 ; CHECK-NOFP-SD-NEXT: mov h3, v0.h[1]
184 ; CHECK-NOFP-SD-NEXT: fcvt s4, h1
185 ; CHECK-NOFP-SD-NEXT: fcvt s5, h0
186 ; CHECK-NOFP-SD-NEXT: fcvt s2, h2
187 ; CHECK-NOFP-SD-NEXT: fcvt s3, h3
188 ; CHECK-NOFP-SD-NEXT: fmin s4, s5, s4
189 ; CHECK-NOFP-SD-NEXT: mov h5, v0.h[2]
190 ; CHECK-NOFP-SD-NEXT: fmin s2, s3, s2
191 ; CHECK-NOFP-SD-NEXT: mov h3, v1.h[2]
192 ; CHECK-NOFP-SD-NEXT: fcvt h4, s4
193 ; CHECK-NOFP-SD-NEXT: fcvt s5, h5
194 ; CHECK-NOFP-SD-NEXT: fcvt h2, s2
195 ; CHECK-NOFP-SD-NEXT: fcvt s3, h3
196 ; CHECK-NOFP-SD-NEXT: fcvt s4, h4
197 ; CHECK-NOFP-SD-NEXT: fcvt s2, h2
198 ; CHECK-NOFP-SD-NEXT: fmin s3, s5, s3
199 ; CHECK-NOFP-SD-NEXT: mov h5, v0.h[3]
200 ; CHECK-NOFP-SD-NEXT: fmin s2, s4, s2
201 ; CHECK-NOFP-SD-NEXT: mov h4, v1.h[3]
202 ; CHECK-NOFP-SD-NEXT: fcvt h3, s3
203 ; CHECK-NOFP-SD-NEXT: fcvt s5, h5
204 ; CHECK-NOFP-SD-NEXT: fcvt h2, s2
205 ; CHECK-NOFP-SD-NEXT: fcvt s4, h4
206 ; CHECK-NOFP-SD-NEXT: fcvt s3, h3
207 ; CHECK-NOFP-SD-NEXT: fcvt s2, h2
208 ; CHECK-NOFP-SD-NEXT: fmin s4, s5, s4
209 ; CHECK-NOFP-SD-NEXT: mov h5, v0.h[4]
210 ; CHECK-NOFP-SD-NEXT: fmin s2, s2, s3
211 ; CHECK-NOFP-SD-NEXT: mov h3, v1.h[4]
212 ; CHECK-NOFP-SD-NEXT: fcvt h4, s4
213 ; CHECK-NOFP-SD-NEXT: fcvt s5, h5
214 ; CHECK-NOFP-SD-NEXT: fcvt h2, s2
215 ; CHECK-NOFP-SD-NEXT: fcvt s3, h3
216 ; CHECK-NOFP-SD-NEXT: fcvt s4, h4
217 ; CHECK-NOFP-SD-NEXT: fcvt s2, h2
218 ; CHECK-NOFP-SD-NEXT: fmin s3, s5, s3
219 ; CHECK-NOFP-SD-NEXT: mov h5, v0.h[5]
220 ; CHECK-NOFP-SD-NEXT: fmin s2, s2, s4
221 ; CHECK-NOFP-SD-NEXT: mov h4, v1.h[5]
222 ; CHECK-NOFP-SD-NEXT: fcvt h3, s3
223 ; CHECK-NOFP-SD-NEXT: fcvt s5, h5
224 ; CHECK-NOFP-SD-NEXT: fcvt h2, s2
225 ; CHECK-NOFP-SD-NEXT: fcvt s4, h4
226 ; CHECK-NOFP-SD-NEXT: fcvt s3, h3
227 ; CHECK-NOFP-SD-NEXT: fcvt s2, h2
228 ; CHECK-NOFP-SD-NEXT: fmin s4, s5, s4
229 ; CHECK-NOFP-SD-NEXT: mov h5, v0.h[6]
230 ; CHECK-NOFP-SD-NEXT: mov h0, v0.h[7]
231 ; CHECK-NOFP-SD-NEXT: fmin s2, s2, s3
232 ; CHECK-NOFP-SD-NEXT: fcvt h3, s4
233 ; CHECK-NOFP-SD-NEXT: mov h4, v1.h[6]
234 ; CHECK-NOFP-SD-NEXT: fcvt s5, h5
235 ; CHECK-NOFP-SD-NEXT: mov h1, v1.h[7]
236 ; CHECK-NOFP-SD-NEXT: fcvt s0, h0
237 ; CHECK-NOFP-SD-NEXT: fcvt h2, s2
238 ; CHECK-NOFP-SD-NEXT: fcvt s3, h3
239 ; CHECK-NOFP-SD-NEXT: fcvt s4, h4
240 ; CHECK-NOFP-SD-NEXT: fcvt s1, h1
241 ; CHECK-NOFP-SD-NEXT: fcvt s2, h2
242 ; CHECK-NOFP-SD-NEXT: fmin s0, s0, s1
243 ; CHECK-NOFP-SD-NEXT: fmin s2, s2, s3
244 ; CHECK-NOFP-SD-NEXT: fmin s3, s5, s4
245 ; CHECK-NOFP-SD-NEXT: fcvt h0, s0
246 ; CHECK-NOFP-SD-NEXT: fcvt h2, s2
247 ; CHECK-NOFP-SD-NEXT: fcvt h3, s3
248 ; CHECK-NOFP-SD-NEXT: fcvt s0, h0
249 ; CHECK-NOFP-SD-NEXT: fcvt s2, h2
250 ; CHECK-NOFP-SD-NEXT: fcvt s3, h3
251 ; CHECK-NOFP-SD-NEXT: fmin s2, s2, s3
252 ; CHECK-NOFP-SD-NEXT: fcvt h1, s2
253 ; CHECK-NOFP-SD-NEXT: fcvt s1, h1
254 ; CHECK-NOFP-SD-NEXT: fmin s0, s1, s0
255 ; CHECK-NOFP-SD-NEXT: fcvt h0, s0
256 ; CHECK-NOFP-SD-NEXT: ret
257 ;
258 ; CHECK-FP-LABEL: test_v16f16:
259 ; CHECK-FP: // %bb.0:
260 ; CHECK-FP-NEXT: fmin v0.8h, v0.8h, v1.8h
261 ; CHECK-FP-NEXT: fminv h0, v0.8h
262 ; CHECK-FP-NEXT: ret
263 ;
264 ; CHECK-NOFP-GI-LABEL: test_v16f16:
265 ; CHECK-NOFP-GI: // %bb.0:
266 ; CHECK-NOFP-GI-NEXT: fcvtl v2.4s, v0.4h
267 ; CHECK-NOFP-GI-NEXT: fcvtl2 v0.4s, v0.8h
268 ; CHECK-NOFP-GI-NEXT: fcvtl v3.4s, v1.4h
269 ; CHECK-NOFP-GI-NEXT: fcvtl2 v1.4s, v1.8h
270 ; CHECK-NOFP-GI-NEXT: fmin v0.4s, v2.4s, v0.4s
271 ; CHECK-NOFP-GI-NEXT: fmin v1.4s, v3.4s, v1.4s
272 ; CHECK-NOFP-GI-NEXT: fmin v0.4s, v0.4s, v1.4s
273 ; CHECK-NOFP-GI-NEXT: fminv s0, v0.4s
274 ; CHECK-NOFP-GI-NEXT: fcvt h0, s0
275 ; CHECK-NOFP-GI-NEXT: ret
276 %b = call nnan half @llvm.vector.reduce.fminimum.v16f16(<16 x half> %a)
277 ret half %b
278 }
280 define float @test_v2f32(<2 x float> %a) nounwind {
281 ; CHECK-LABEL: test_v2f32:
282 ; CHECK: // %bb.0:
283 ; CHECK-NEXT: fminp s0, v0.2s
284 ; CHECK-NEXT: ret
285 %b = call nnan float @llvm.vector.reduce.fminimum.v2f32(<2 x float> %a)
286 ret float %b
287 }
289 define float @test_v4f32(<4 x float> %a) nounwind {
290 ; CHECK-LABEL: test_v4f32:
291 ; CHECK: // %bb.0:
292 ; CHECK-NEXT: fminv s0, v0.4s
293 ; CHECK-NEXT: ret
294 %b = call nnan float @llvm.vector.reduce.fminimum.v4f32(<4 x float> %a)
295 ret float %b
296 }
298 define float @test_v8f32(<8 x float> %a) nounwind {
299 ; CHECK-LABEL: test_v8f32:
300 ; CHECK: // %bb.0:
301 ; CHECK-NEXT: fmin v0.4s, v0.4s, v1.4s
302 ; CHECK-NEXT: fminv s0, v0.4s
303 ; CHECK-NEXT: ret
304 %b = call nnan float @llvm.vector.reduce.fminimum.v8f32(<8 x float> %a)
305 ret float %b
306 }
308 define float @test_v16f32(<16 x float> %a) nounwind {
309 ; CHECK-NOFP-SD-LABEL: test_v16f32:
310 ; CHECK-NOFP-SD: // %bb.0:
311 ; CHECK-NOFP-SD-NEXT: fmin v1.4s, v1.4s, v3.4s
312 ; CHECK-NOFP-SD-NEXT: fmin v0.4s, v0.4s, v2.4s
313 ; CHECK-NOFP-SD-NEXT: fmin v0.4s, v0.4s, v1.4s
314 ; CHECK-NOFP-SD-NEXT: fminv s0, v0.4s
315 ; CHECK-NOFP-SD-NEXT: ret
316 ;
317 ; CHECK-FP-SD-LABEL: test_v16f32:
318 ; CHECK-FP-SD: // %bb.0:
319 ; CHECK-FP-SD-NEXT: fmin v1.4s, v1.4s, v3.4s
320 ; CHECK-FP-SD-NEXT: fmin v0.4s, v0.4s, v2.4s
321 ; CHECK-FP-SD-NEXT: fmin v0.4s, v0.4s, v1.4s
322 ; CHECK-FP-SD-NEXT: fminv s0, v0.4s
323 ; CHECK-FP-SD-NEXT: ret
324 ;
325 ; CHECK-NOFP-GI-LABEL: test_v16f32:
326 ; CHECK-NOFP-GI: // %bb.0:
327 ; CHECK-NOFP-GI-NEXT: fmin v0.4s, v0.4s, v1.4s
328 ; CHECK-NOFP-GI-NEXT: fmin v1.4s, v2.4s, v3.4s
329 ; CHECK-NOFP-GI-NEXT: fmin v0.4s, v0.4s, v1.4s
330 ; CHECK-NOFP-GI-NEXT: fminv s0, v0.4s
331 ; CHECK-NOFP-GI-NEXT: ret
332 ;
333 ; CHECK-FP-GI-LABEL: test_v16f32:
334 ; CHECK-FP-GI: // %bb.0:
335 ; CHECK-FP-GI-NEXT: fmin v0.4s, v0.4s, v1.4s
336 ; CHECK-FP-GI-NEXT: fmin v1.4s, v2.4s, v3.4s
337 ; CHECK-FP-GI-NEXT: fmin v0.4s, v0.4s, v1.4s
338 ; CHECK-FP-GI-NEXT: fminv s0, v0.4s
339 ; CHECK-FP-GI-NEXT: ret
340 %b = call nnan float @llvm.vector.reduce.fminimum.v16f32(<16 x float> %a)
341 ret float %b
342 }
344 define double @test_v2f64(<2 x double> %a) nounwind {
345 ; CHECK-LABEL: test_v2f64:
346 ; CHECK: // %bb.0:
347 ; CHECK-NEXT: fminp d0, v0.2d
348 ; CHECK-NEXT: ret
349 %b = call double @llvm.vector.reduce.fminimum.v2f64(<2 x double> %a)
350 ret double %b
351 }
353 define double @test_v4f64(<4 x double> %a) nounwind {
354 ; CHECK-LABEL: test_v4f64:
355 ; CHECK: // %bb.0:
356 ; CHECK-NEXT: fmin v0.2d, v0.2d, v1.2d
357 ; CHECK-NEXT: fminp d0, v0.2d
358 ; CHECK-NEXT: ret
359 %b = call double @llvm.vector.reduce.fminimum.v4f64(<4 x double> %a)
360 ret double %b
361 }
363 define half @test_v11f16(<11 x half> %a) nounwind {
364 ; CHECK-NOFP-LABEL: test_v11f16:
365 ; CHECK-NOFP: // %bb.0:
366 ; CHECK-NOFP-NEXT: ldr h16, [sp, #8]
367 ; CHECK-NOFP-NEXT: ldr h17, [sp]
368 ; CHECK-NOFP-NEXT: fcvt s1, h1
369 ; CHECK-NOFP-NEXT: fcvt s0, h0
370 ; CHECK-NOFP-NEXT: fcvt s2, h2
371 ; CHECK-NOFP-NEXT: fcvt s16, h16
372 ; CHECK-NOFP-NEXT: fcvt s17, h17
373 ; CHECK-NOFP-NEXT: fmin s1, s1, s16
374 ; CHECK-NOFP-NEXT: fmin s0, s0, s17
375 ; CHECK-NOFP-NEXT: ldr h16, [sp, #16]
376 ; CHECK-NOFP-NEXT: fcvt s16, h16
377 ; CHECK-NOFP-NEXT: fcvt h1, s1
378 ; CHECK-NOFP-NEXT: fcvt h0, s0
379 ; CHECK-NOFP-NEXT: fcvt s1, h1
380 ; CHECK-NOFP-NEXT: fcvt s0, h0
381 ; CHECK-NOFP-NEXT: fmin s0, s0, s1
382 ; CHECK-NOFP-NEXT: fmin s1, s2, s16
383 ; CHECK-NOFP-NEXT: fcvt h0, s0
384 ; CHECK-NOFP-NEXT: fcvt h1, s1
385 ; CHECK-NOFP-NEXT: fcvt s0, h0
386 ; CHECK-NOFP-NEXT: fcvt s1, h1
387 ; CHECK-NOFP-NEXT: fmin s0, s0, s1
388 ; CHECK-NOFP-NEXT: fcvt s1, h3
389 ; CHECK-NOFP-NEXT: fcvt h0, s0
390 ; CHECK-NOFP-NEXT: fcvt s0, h0
391 ; CHECK-NOFP-NEXT: fmin s0, s0, s1
392 ; CHECK-NOFP-NEXT: fcvt s1, h4
393 ; CHECK-NOFP-NEXT: fcvt h0, s0
394 ; CHECK-NOFP-NEXT: fcvt s0, h0
395 ; CHECK-NOFP-NEXT: fmin s0, s0, s1
396 ; CHECK-NOFP-NEXT: fcvt s1, h5
397 ; CHECK-NOFP-NEXT: fcvt h0, s0
398 ; CHECK-NOFP-NEXT: fcvt s0, h0
399 ; CHECK-NOFP-NEXT: fmin s0, s0, s1
400 ; CHECK-NOFP-NEXT: fcvt s1, h6
401 ; CHECK-NOFP-NEXT: fcvt h0, s0
402 ; CHECK-NOFP-NEXT: fcvt s0, h0
403 ; CHECK-NOFP-NEXT: fmin s0, s0, s1
404 ; CHECK-NOFP-NEXT: fcvt s1, h7
405 ; CHECK-NOFP-NEXT: fcvt h0, s0
406 ; CHECK-NOFP-NEXT: fcvt s0, h0
407 ; CHECK-NOFP-NEXT: fmin s0, s0, s1
408 ; CHECK-NOFP-NEXT: fcvt h0, s0
409 ; CHECK-NOFP-NEXT: ret
410 ;
411 ; CHECK-FP-LABEL: test_v11f16:
412 ; CHECK-FP: // %bb.0:
413 ; CHECK-FP-NEXT: // kill: def $h0 killed $h0 def $q0
414 ; CHECK-FP-NEXT: // kill: def $h1 killed $h1 def $q1
415 ; CHECK-FP-NEXT: // kill: def $h2 killed $h2 def $q2
416 ; CHECK-FP-NEXT: // kill: def $h3 killed $h3 def $q3
417 ; CHECK-FP-NEXT: // kill: def $h4 killed $h4 def $q4
418 ; CHECK-FP-NEXT: // kill: def $h5 killed $h5 def $q5
419 ; CHECK-FP-NEXT: mov x8, sp
420 ; CHECK-FP-NEXT: // kill: def $h6 killed $h6 def $q6
421 ; CHECK-FP-NEXT: // kill: def $h7 killed $h7 def $q7
422 ; CHECK-FP-NEXT: mov v0.h[1], v1.h[0]
423 ; CHECK-FP-NEXT: movi v1.8h, #124, lsl #8
424 ; CHECK-FP-NEXT: mov v0.h[2], v2.h[0]
425 ; CHECK-FP-NEXT: ld1 { v1.h }[0], [x8]
426 ; CHECK-FP-NEXT: add x8, sp, #8
427 ; CHECK-FP-NEXT: ld1 { v1.h }[1], [x8]
428 ; CHECK-FP-NEXT: add x8, sp, #16
429 ; CHECK-FP-NEXT: mov v0.h[3], v3.h[0]
430 ; CHECK-FP-NEXT: ld1 { v1.h }[2], [x8]
431 ; CHECK-FP-NEXT: mov v0.h[4], v4.h[0]
432 ; CHECK-FP-NEXT: mov v0.h[5], v5.h[0]
433 ; CHECK-FP-NEXT: mov v0.h[6], v6.h[0]
434 ; CHECK-FP-NEXT: mov v0.h[7], v7.h[0]
435 ; CHECK-FP-NEXT: fmin v0.8h, v0.8h, v1.8h
436 ; CHECK-FP-NEXT: fminv h0, v0.8h
437 ; CHECK-FP-NEXT: ret
438 %b = call half @llvm.vector.reduce.fminimum.v11f16(<11 x half> %a)
439 ret half %b
440 }
442 ; Neutral element is negative infinity which is chosen for padding the widened
443 ; vector.
444 define float @test_v3f32(<3 x float> %a) nounwind {
445 ; CHECK-LABEL: test_v3f32:
446 ; CHECK: // %bb.0:
447 ; CHECK-NEXT: mov w8, #2139095040 // =0x7f800000
448 ; CHECK-NEXT: fmov s1, w8
449 ; CHECK-NEXT: mov v0.s[3], v1.s[0]
450 ; CHECK-NEXT: fminv s0, v0.4s
451 ; CHECK-NEXT: ret
452 %b = call float @llvm.vector.reduce.fminimum.v3f32(<3 x float> %a)
453 ret float %b
454 }
456 ; Neutral element chosen for padding the widened vector is not negative infinity.
457 define float @test_v3f32_ninf(<3 x float> %a) nounwind {
458 ; CHECK-LABEL: test_v3f32_ninf:
459 ; CHECK: // %bb.0:
460 ; CHECK-NEXT: mov w8, #2139095039 // =0x7f7fffff
461 ; CHECK-NEXT: fmov s1, w8
462 ; CHECK-NEXT: mov v0.s[3], v1.s[0]
463 ; CHECK-NEXT: fminv s0, v0.4s
464 ; CHECK-NEXT: ret
465 %b = call ninf float @llvm.vector.reduce.fminimum.v3f32(<3 x float> %a)
466 ret float %b
467 }
469 ; Cannot legalize f128. See PR63267 - The underlying fminimum has no default
470 ; expansion and no libcalls.
471 ;define fp128 @test_v2f128(<2 x fp128> %a) nounwind {
472 ; %b = call fp128 @llvm.vector.reduce.fminimum.v2f128(<2 x fp128> %a)
473 ; ret fp128 %b
474 ;}