1 ; RUN: llc -march=hexagon -O3 -verify-machineinstrs < %s | FileCheck %s
4 ; Check for sane output. This testcase used to crash.
7 target triple = "hexagon"
9 @g0 = external hidden unnamed_addr constant [9 x i16], align 8
11 ; Function Attrs: nounwind readnone
12 define i64 @fred(i32 %a0) local_unnamed_addr #0 {
14 %v2 = icmp slt i32 %a0, 1
15 br i1 %v2, label %b26, label %b3
18 %v4 = tail call i32 @llvm.hexagon.S2.clb(i32 %a0)
19 %v5 = add nsw i32 %v4, -12
20 %v6 = add nsw i32 %v4, -28
21 %v7 = tail call i32 @llvm.hexagon.S2.asl.r.r(i32 %a0, i32 %v6)
22 %v8 = add nsw i32 %v7, -8
23 %v9 = tail call i32 @llvm.hexagon.S2.asl.r.r(i32 %a0, i32 %v5)
24 %v10 = getelementptr inbounds [9 x i16], ptr @g0, i32 0, i32 %v8
25 %v11 = load i16, ptr %v10, align 2
26 %v12 = sext i16 %v11 to i32
27 %v13 = shl nsw i32 %v12, 16
28 %v14 = add nsw i32 %v7, -7
29 %v15 = getelementptr inbounds [9 x i16], ptr @g0, i32 0, i32 %v14
30 %v16 = load i16, ptr %v15, align 2
31 %v17 = sub i16 %v11, %v16
32 %v18 = and i32 %v9, 65535
33 %v19 = zext i16 %v17 to i32
34 %v20 = tail call i32 @llvm.hexagon.M2.mpyu.nac.ll.s0(i32 %v13, i32 %v18, i32 %v19) #1
35 %v21 = add nsw i32 %v4, -32
36 %v22 = zext i32 %v21 to i64
37 %v23 = shl nuw i64 %v22, 32
38 %v24 = zext i32 %v20 to i64
39 %v25 = or i64 %v23, %v24
42 b26: ; preds = %b3, %b1
43 %v27 = phi i64 [ %v25, %b3 ], [ 2147483648, %b1 ]
47 declare i32 @llvm.hexagon.S2.clb(i32) #1
48 declare i32 @llvm.hexagon.S2.asl.r.r(i32, i32) #1
49 declare i32 @llvm.hexagon.M2.mpyu.nac.ll.s0(i32, i32, i32) #1
51 attributes #0 = { nounwind readnone "target-cpu"="hexagonv55" "target-features"="-hvx,-long-calls" }
52 attributes #1 = { nounwind readnone }