| blob | b86487acc96bc531484a6d35ebe3af63968fcab5 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2 ; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \
3 ; RUN: -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s \
4 ; RUN: --check-prefix=SMALL64
5 ; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \
6 ; RUN: -mtriple powerpc64-ibm-aix-xcoff --code-model=large < %s \
7 ; RUN: | FileCheck %s --check-prefix=LARGE64
8 ; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \
9 ; RUN: -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s \
10 ; RUN: --check-prefix=SMALL32
11 ; RUN: llc -verify-machineinstrs -mcpu=pwr7 -ppc-asm-full-reg-names \
12 ; RUN: -mtriple powerpc-ibm-aix-xcoff --code-model=large < %s \
13 ; RUN: | FileCheck %s --check-prefix=LARGE32
15 @ThreadLocalVarInit = thread_local(localexec) global i32 1, align 4
16 @VarInit = global i32 87, align 4
17 @IThreadLocalVarUninit = internal thread_local(localexec) global i32 0, align 4
18 @IThreadLocalVarInit = internal thread_local(localexec) global i32 1, align 4
19 @ThreadLocalVarUninit = thread_local(localexec) global i32 0, align 4
20 declare nonnull ptr @llvm.threadlocal.address.p0(ptr nonnull) #1
22 define void @storeITLUninit(i32 noundef signext %x) {
23 ; SMALL64-LABEL: storeITLUninit:
24 ; SMALL64: # %bb.0: # %entry
25 ; SMALL64-NEXT: ld r4, L..C0(r2) # target-flags(ppc-tprel) @IThreadLocalVarUninit
26 ; SMALL64-NEXT: stwx r3, r13, r4
27 ; SMALL64-NEXT: blr
28 ;
29 ; LARGE64-LABEL: storeITLUninit:
30 ; LARGE64: # %bb.0: # %entry
31 ; LARGE64-NEXT: addis r4, L..C0@u(r2)
32 ; LARGE64-NEXT: ld r4, L..C0@l(r4)
33 ; LARGE64-NEXT: stwx r3, r13, r4
34 ; LARGE64-NEXT: blr
35 ;
36 ; SMALL32-LABEL: storeITLUninit:
37 ; SMALL32: # %bb.0: # %entry
38 ; SMALL32-NEXT: mflr r0
39 ; SMALL32-NEXT: stwu r1, -32(r1)
40 ; SMALL32-NEXT: lwz r5, L..C0(r2) # target-flags(ppc-tprel) @IThreadLocalVarUninit
41 ; SMALL32-NEXT: mr r4, r3
42 ; SMALL32-NEXT: bla .__get_tpointer[PR]
43 ; SMALL32-NEXT: stw r0, 40(r1)
44 ; SMALL32-NEXT: stwx r4, r3, r5
45 ; SMALL32-NEXT: addi r1, r1, 32
46 ; SMALL32-NEXT: lwz r0, 8(r1)
47 ; SMALL32-NEXT: mtlr r0
48 ; SMALL32-NEXT: blr
49 ;
50 ; LARGE32-LABEL: storeITLUninit:
51 ; LARGE32: # %bb.0: # %entry
52 ; LARGE32-NEXT: mflr r0
53 ; LARGE32-NEXT: stwu r1, -32(r1)
54 ; LARGE32-NEXT: stw r0, 40(r1)
55 ; LARGE32-NEXT: mr r4, r3
56 ; LARGE32-NEXT: addis r3, L..C0@u(r2)
57 ; LARGE32-NEXT: lwz r5, L..C0@l(r3)
58 ; LARGE32-NEXT: bla .__get_tpointer[PR]
59 ; LARGE32-NEXT: stwx r4, r3, r5
60 ; LARGE32-NEXT: addi r1, r1, 32
61 ; LARGE32-NEXT: lwz r0, 8(r1)
62 ; LARGE32-NEXT: mtlr r0
63 ; LARGE32-NEXT: blr
64 entry:
65 %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @IThreadLocalVarUninit)
66 store i32 %x, ptr %0, align 4
67 ret void
68 }
70 define void @storeITLInit(i32 noundef signext %x) {
71 ; SMALL64-LABEL: storeITLInit:
72 ; SMALL64: # %bb.0: # %entry
73 ; SMALL64-NEXT: ld r4, L..C1(r2) # target-flags(ppc-tprel) @IThreadLocalVarInit
74 ; SMALL64-NEXT: stwx r3, r13, r4
75 ; SMALL64-NEXT: blr
76 ;
77 ; LARGE64-LABEL: storeITLInit:
78 ; LARGE64: # %bb.0: # %entry
79 ; LARGE64-NEXT: addis r4, L..C1@u(r2)
80 ; LARGE64-NEXT: ld r4, L..C1@l(r4)
81 ; LARGE64-NEXT: stwx r3, r13, r4
82 ; LARGE64-NEXT: blr
83 ;
84 ; SMALL32-LABEL: storeITLInit:
85 ; SMALL32: # %bb.0: # %entry
86 ; SMALL32-NEXT: mflr r0
87 ; SMALL32-NEXT: stwu r1, -32(r1)
88 ; SMALL32-NEXT: lwz r5, L..C1(r2) # target-flags(ppc-tprel) @IThreadLocalVarInit
89 ; SMALL32-NEXT: mr r4, r3
90 ; SMALL32-NEXT: bla .__get_tpointer[PR]
91 ; SMALL32-NEXT: stw r0, 40(r1)
92 ; SMALL32-NEXT: stwx r4, r3, r5
93 ; SMALL32-NEXT: addi r1, r1, 32
94 ; SMALL32-NEXT: lwz r0, 8(r1)
95 ; SMALL32-NEXT: mtlr r0
96 ; SMALL32-NEXT: blr
97 ;
98 ; LARGE32-LABEL: storeITLInit:
99 ; LARGE32: # %bb.0: # %entry
100 ; LARGE32-NEXT: mflr r0
101 ; LARGE32-NEXT: stwu r1, -32(r1)
102 ; LARGE32-NEXT: stw r0, 40(r1)
103 ; LARGE32-NEXT: mr r4, r3
104 ; LARGE32-NEXT: addis r3, L..C1@u(r2)
105 ; LARGE32-NEXT: lwz r5, L..C1@l(r3)
106 ; LARGE32-NEXT: bla .__get_tpointer[PR]
107 ; LARGE32-NEXT: stwx r4, r3, r5
108 ; LARGE32-NEXT: addi r1, r1, 32
109 ; LARGE32-NEXT: lwz r0, 8(r1)
110 ; LARGE32-NEXT: mtlr r0
111 ; LARGE32-NEXT: blr
112 entry:
113 %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @IThreadLocalVarInit)
114 store i32 %x, ptr %0, align 4
115 ret void
116 }
118 define void @storeTLUninit(i32 noundef signext %x) {
119 ; SMALL64-LABEL: storeTLUninit:
120 ; SMALL64: # %bb.0: # %entry
121 ; SMALL64-NEXT: ld r4, L..C2(r2) # target-flags(ppc-tprel) @ThreadLocalVarUninit
122 ; SMALL64-NEXT: stwx r3, r13, r4
123 ; SMALL64-NEXT: blr
124 ;
125 ; LARGE64-LABEL: storeTLUninit:
126 ; LARGE64: # %bb.0: # %entry
127 ; LARGE64-NEXT: addis r4, L..C2@u(r2)
128 ; LARGE64-NEXT: ld r4, L..C2@l(r4)
129 ; LARGE64-NEXT: stwx r3, r13, r4
130 ; LARGE64-NEXT: blr
131 ;
132 ; SMALL32-LABEL: storeTLUninit:
133 ; SMALL32: # %bb.0: # %entry
134 ; SMALL32-NEXT: mflr r0
135 ; SMALL32-NEXT: stwu r1, -32(r1)
136 ; SMALL32-NEXT: lwz r5, L..C2(r2) # target-flags(ppc-tprel) @ThreadLocalVarUninit
137 ; SMALL32-NEXT: mr r4, r3
138 ; SMALL32-NEXT: bla .__get_tpointer[PR]
139 ; SMALL32-NEXT: stw r0, 40(r1)
140 ; SMALL32-NEXT: stwx r4, r3, r5
141 ; SMALL32-NEXT: addi r1, r1, 32
142 ; SMALL32-NEXT: lwz r0, 8(r1)
143 ; SMALL32-NEXT: mtlr r0
144 ; SMALL32-NEXT: blr
145 ;
146 ; LARGE32-LABEL: storeTLUninit:
147 ; LARGE32: # %bb.0: # %entry
148 ; LARGE32-NEXT: mflr r0
149 ; LARGE32-NEXT: stwu r1, -32(r1)
150 ; LARGE32-NEXT: stw r0, 40(r1)
151 ; LARGE32-NEXT: mr r4, r3
152 ; LARGE32-NEXT: addis r3, L..C2@u(r2)
153 ; LARGE32-NEXT: lwz r5, L..C2@l(r3)
154 ; LARGE32-NEXT: bla .__get_tpointer[PR]
155 ; LARGE32-NEXT: stwx r4, r3, r5
156 ; LARGE32-NEXT: addi r1, r1, 32
157 ; LARGE32-NEXT: lwz r0, 8(r1)
158 ; LARGE32-NEXT: mtlr r0
159 ; LARGE32-NEXT: blr
160 entry:
161 %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @ThreadLocalVarUninit)
162 store i32 %x, ptr %0, align 4
163 ret void
164 }
166 define void @storeTLInit(i32 noundef signext %x) {
167 ; SMALL64-LABEL: storeTLInit:
168 ; SMALL64: # %bb.0: # %entry
169 ; SMALL64-NEXT: ld r4, L..C3(r2) # target-flags(ppc-tprel) @ThreadLocalVarInit
170 ; SMALL64-NEXT: stwx r3, r13, r4
171 ; SMALL64-NEXT: blr
172 ;
173 ; LARGE64-LABEL: storeTLInit:
174 ; LARGE64: # %bb.0: # %entry
175 ; LARGE64-NEXT: addis r4, L..C3@u(r2)
176 ; LARGE64-NEXT: ld r4, L..C3@l(r4)
177 ; LARGE64-NEXT: stwx r3, r13, r4
178 ; LARGE64-NEXT: blr
179 ;
180 ; SMALL32-LABEL: storeTLInit:
181 ; SMALL32: # %bb.0: # %entry
182 ; SMALL32-NEXT: mflr r0
183 ; SMALL32-NEXT: stwu r1, -32(r1)
184 ; SMALL32-NEXT: lwz r5, L..C3(r2) # target-flags(ppc-tprel) @ThreadLocalVarInit
185 ; SMALL32-NEXT: mr r4, r3
186 ; SMALL32-NEXT: bla .__get_tpointer[PR]
187 ; SMALL32-NEXT: stw r0, 40(r1)
188 ; SMALL32-NEXT: stwx r4, r3, r5
189 ; SMALL32-NEXT: addi r1, r1, 32
190 ; SMALL32-NEXT: lwz r0, 8(r1)
191 ; SMALL32-NEXT: mtlr r0
192 ; SMALL32-NEXT: blr
193 ;
194 ; LARGE32-LABEL: storeTLInit:
195 ; LARGE32: # %bb.0: # %entry
196 ; LARGE32-NEXT: mflr r0
197 ; LARGE32-NEXT: stwu r1, -32(r1)
198 ; LARGE32-NEXT: stw r0, 40(r1)
199 ; LARGE32-NEXT: mr r4, r3
200 ; LARGE32-NEXT: addis r3, L..C3@u(r2)
201 ; LARGE32-NEXT: lwz r5, L..C3@l(r3)
202 ; LARGE32-NEXT: bla .__get_tpointer[PR]
203 ; LARGE32-NEXT: stwx r4, r3, r5
204 ; LARGE32-NEXT: addi r1, r1, 32
205 ; LARGE32-NEXT: lwz r0, 8(r1)
206 ; LARGE32-NEXT: mtlr r0
207 ; LARGE32-NEXT: blr
208 entry:
209 %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @ThreadLocalVarInit)
210 store i32 %x, ptr %0, align 4
211 ret void
212 }
214 define signext i32 @loadITLUninit() {
215 ; SMALL64-LABEL: loadITLUninit:
216 ; SMALL64: # %bb.0: # %entry
217 ; SMALL64-NEXT: ld r3, L..C0(r2) # target-flags(ppc-tprel) @IThreadLocalVarUninit
218 ; SMALL64-NEXT: lwax r3, r13, r3
219 ; SMALL64-NEXT: blr
220 ;
221 ; LARGE64-LABEL: loadITLUninit:
222 ; LARGE64: # %bb.0: # %entry
223 ; LARGE64-NEXT: addis r3, L..C0@u(r2)
224 ; LARGE64-NEXT: ld r3, L..C0@l(r3)
225 ; LARGE64-NEXT: lwax r3, r13, r3
226 ; LARGE64-NEXT: blr
227 ;
228 ; SMALL32-LABEL: loadITLUninit:
229 ; SMALL32: # %bb.0: # %entry
230 ; SMALL32-NEXT: mflr r0
231 ; SMALL32-NEXT: stwu r1, -32(r1)
232 ; SMALL32-NEXT: lwz r4, L..C0(r2) # target-flags(ppc-tprel) @IThreadLocalVarUninit
233 ; SMALL32-NEXT: stw r0, 40(r1)
234 ; SMALL32-NEXT: bla .__get_tpointer[PR]
235 ; SMALL32-NEXT: lwzx r3, r3, r4
236 ; SMALL32-NEXT: addi r1, r1, 32
237 ; SMALL32-NEXT: lwz r0, 8(r1)
238 ; SMALL32-NEXT: mtlr r0
239 ; SMALL32-NEXT: blr
240 ;
241 ; LARGE32-LABEL: loadITLUninit:
242 ; LARGE32: # %bb.0: # %entry
243 ; LARGE32-NEXT: mflr r0
244 ; LARGE32-NEXT: stwu r1, -32(r1)
245 ; LARGE32-NEXT: stw r0, 40(r1)
246 ; LARGE32-NEXT: addis r3, L..C0@u(r2)
247 ; LARGE32-NEXT: lwz r4, L..C0@l(r3)
248 ; LARGE32-NEXT: bla .__get_tpointer[PR]
249 ; LARGE32-NEXT: lwzx r3, r3, r4
250 ; LARGE32-NEXT: addi r1, r1, 32
251 ; LARGE32-NEXT: lwz r0, 8(r1)
252 ; LARGE32-NEXT: mtlr r0
253 ; LARGE32-NEXT: blr
254 entry:
255 %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @IThreadLocalVarUninit)
256 %1 = load i32, ptr %0, align 4
257 ret i32 %1
258 }
260 define signext i32 @loadITLUninit2() {
261 ; SMALL64-LABEL: loadITLUninit2:
262 ; SMALL64: # %bb.0: # %entry
263 ; SMALL64-NEXT: ld r3, L..C0(r2) # target-flags(ppc-tprel) @IThreadLocalVarUninit
264 ; SMALL64-NEXT: ld r4, L..C4(r2) # @VarInit
265 ; SMALL64-NEXT: lwzx r3, r13, r3
266 ; SMALL64-NEXT: lwz r4, 0(r4)
267 ; SMALL64-NEXT: add r3, r4, r3
268 ; SMALL64-NEXT: extsw r3, r3
269 ; SMALL64-NEXT: blr
270 ;
271 ; LARGE64-LABEL: loadITLUninit2:
272 ; LARGE64: # %bb.0: # %entry
273 ; LARGE64-NEXT: addis r3, L..C0@u(r2)
274 ; LARGE64-NEXT: addis r4, L..C4@u(r2)
275 ; LARGE64-NEXT: ld r3, L..C0@l(r3)
276 ; LARGE64-NEXT: ld r4, L..C4@l(r4)
277 ; LARGE64-NEXT: lwzx r3, r13, r3
278 ; LARGE64-NEXT: lwz r4, 0(r4)
279 ; LARGE64-NEXT: add r3, r4, r3
280 ; LARGE64-NEXT: extsw r3, r3
281 ; LARGE64-NEXT: blr
282 ;
283 ; SMALL32-LABEL: loadITLUninit2:
284 ; SMALL32: # %bb.0: # %entry
285 ; SMALL32-NEXT: mflr r0
286 ; SMALL32-NEXT: stwu r1, -32(r1)
287 ; SMALL32-NEXT: lwz r4, L..C0(r2) # target-flags(ppc-tprel) @IThreadLocalVarUninit
288 ; SMALL32-NEXT: lwz r5, L..C4(r2) # @VarInit
289 ; SMALL32-NEXT: stw r0, 40(r1)
290 ; SMALL32-NEXT: bla .__get_tpointer[PR]
291 ; SMALL32-NEXT: lwzx r3, r3, r4
292 ; SMALL32-NEXT: lwz r4, 0(r5)
293 ; SMALL32-NEXT: add r3, r4, r3
294 ; SMALL32-NEXT: addi r1, r1, 32
295 ; SMALL32-NEXT: lwz r0, 8(r1)
296 ; SMALL32-NEXT: mtlr r0
297 ; SMALL32-NEXT: blr
298 ;
299 ; LARGE32-LABEL: loadITLUninit2:
300 ; LARGE32: # %bb.0: # %entry
301 ; LARGE32-NEXT: mflr r0
302 ; LARGE32-NEXT: stwu r1, -32(r1)
303 ; LARGE32-NEXT: stw r0, 40(r1)
304 ; LARGE32-NEXT: addis r3, L..C0@u(r2)
305 ; LARGE32-NEXT: lwz r4, L..C0@l(r3)
306 ; LARGE32-NEXT: bla .__get_tpointer[PR]
307 ; LARGE32-NEXT: lwzx r3, r3, r4
308 ; LARGE32-NEXT: addis r4, L..C4@u(r2)
309 ; LARGE32-NEXT: lwz r4, L..C4@l(r4)
310 ; LARGE32-NEXT: lwz r4, 0(r4)
311 ; LARGE32-NEXT: add r3, r4, r3
312 ; LARGE32-NEXT: addi r1, r1, 32
313 ; LARGE32-NEXT: lwz r0, 8(r1)
314 ; LARGE32-NEXT: mtlr r0
315 ; LARGE32-NEXT: blr
316 entry:
317 %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @IThreadLocalVarUninit)
318 %1 = load i32, ptr %0, align 4
319 %2 = load i32, ptr @VarInit, align 4
320 %add = add nsw i32 %2, %1
321 ret i32 %add
322 }
324 define signext i32 @loadITLInit() {
325 ; SMALL64-LABEL: loadITLInit:
326 ; SMALL64: # %bb.0: # %entry
327 ; SMALL64-NEXT: ld r3, L..C1(r2) # target-flags(ppc-tprel) @IThreadLocalVarInit
328 ; SMALL64-NEXT: lwax r3, r13, r3
329 ; SMALL64-NEXT: blr
330 ;
331 ; LARGE64-LABEL: loadITLInit:
332 ; LARGE64: # %bb.0: # %entry
333 ; LARGE64-NEXT: addis r3, L..C1@u(r2)
334 ; LARGE64-NEXT: ld r3, L..C1@l(r3)
335 ; LARGE64-NEXT: lwax r3, r13, r3
336 ; LARGE64-NEXT: blr
337 ;
338 ; SMALL32-LABEL: loadITLInit:
339 ; SMALL32: # %bb.0: # %entry
340 ; SMALL32-NEXT: mflr r0
341 ; SMALL32-NEXT: stwu r1, -32(r1)
342 ; SMALL32-NEXT: lwz r4, L..C1(r2) # target-flags(ppc-tprel) @IThreadLocalVarInit
343 ; SMALL32-NEXT: stw r0, 40(r1)
344 ; SMALL32-NEXT: bla .__get_tpointer[PR]
345 ; SMALL32-NEXT: lwzx r3, r3, r4
346 ; SMALL32-NEXT: addi r1, r1, 32
347 ; SMALL32-NEXT: lwz r0, 8(r1)
348 ; SMALL32-NEXT: mtlr r0
349 ; SMALL32-NEXT: blr
350 ;
351 ; LARGE32-LABEL: loadITLInit:
352 ; LARGE32: # %bb.0: # %entry
353 ; LARGE32-NEXT: mflr r0
354 ; LARGE32-NEXT: stwu r1, -32(r1)
355 ; LARGE32-NEXT: stw r0, 40(r1)
356 ; LARGE32-NEXT: addis r3, L..C1@u(r2)
357 ; LARGE32-NEXT: lwz r4, L..C1@l(r3)
358 ; LARGE32-NEXT: bla .__get_tpointer[PR]
359 ; LARGE32-NEXT: lwzx r3, r3, r4
360 ; LARGE32-NEXT: addi r1, r1, 32
361 ; LARGE32-NEXT: lwz r0, 8(r1)
362 ; LARGE32-NEXT: mtlr r0
363 ; LARGE32-NEXT: blr
364 entry:
365 %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @IThreadLocalVarInit)
366 %1 = load i32, ptr %0, align 4
367 ret i32 %1
368 }
370 define signext i32 @loadITLInit2() {
371 ; SMALL64-LABEL: loadITLInit2:
372 ; SMALL64: # %bb.0: # %entry
373 ; SMALL64-NEXT: ld r3, L..C1(r2) # target-flags(ppc-tprel) @IThreadLocalVarInit
374 ; SMALL64-NEXT: ld r4, L..C4(r2) # @VarInit
375 ; SMALL64-NEXT: lwzx r3, r13, r3
376 ; SMALL64-NEXT: lwz r4, 0(r4)
377 ; SMALL64-NEXT: add r3, r4, r3
378 ; SMALL64-NEXT: extsw r3, r3
379 ; SMALL64-NEXT: blr
380 ;
381 ; LARGE64-LABEL: loadITLInit2:
382 ; LARGE64: # %bb.0: # %entry
383 ; LARGE64-NEXT: addis r3, L..C1@u(r2)
384 ; LARGE64-NEXT: addis r4, L..C4@u(r2)
385 ; LARGE64-NEXT: ld r3, L..C1@l(r3)
386 ; LARGE64-NEXT: ld r4, L..C4@l(r4)
387 ; LARGE64-NEXT: lwzx r3, r13, r3
388 ; LARGE64-NEXT: lwz r4, 0(r4)
389 ; LARGE64-NEXT: add r3, r4, r3
390 ; LARGE64-NEXT: extsw r3, r3
391 ; LARGE64-NEXT: blr
392 ;
393 ; SMALL32-LABEL: loadITLInit2:
394 ; SMALL32: # %bb.0: # %entry
395 ; SMALL32-NEXT: mflr r0
396 ; SMALL32-NEXT: stwu r1, -32(r1)
397 ; SMALL32-NEXT: lwz r4, L..C1(r2) # target-flags(ppc-tprel) @IThreadLocalVarInit
398 ; SMALL32-NEXT: lwz r5, L..C4(r2) # @VarInit
399 ; SMALL32-NEXT: stw r0, 40(r1)
400 ; SMALL32-NEXT: bla .__get_tpointer[PR]
401 ; SMALL32-NEXT: lwzx r3, r3, r4
402 ; SMALL32-NEXT: lwz r4, 0(r5)
403 ; SMALL32-NEXT: add r3, r4, r3
404 ; SMALL32-NEXT: addi r1, r1, 32
405 ; SMALL32-NEXT: lwz r0, 8(r1)
406 ; SMALL32-NEXT: mtlr r0
407 ; SMALL32-NEXT: blr
408 ;
409 ; LARGE32-LABEL: loadITLInit2:
410 ; LARGE32: # %bb.0: # %entry
411 ; LARGE32-NEXT: mflr r0
412 ; LARGE32-NEXT: stwu r1, -32(r1)
413 ; LARGE32-NEXT: stw r0, 40(r1)
414 ; LARGE32-NEXT: addis r3, L..C1@u(r2)
415 ; LARGE32-NEXT: lwz r4, L..C1@l(r3)
416 ; LARGE32-NEXT: bla .__get_tpointer[PR]
417 ; LARGE32-NEXT: lwzx r3, r3, r4
418 ; LARGE32-NEXT: addis r4, L..C4@u(r2)
419 ; LARGE32-NEXT: lwz r4, L..C4@l(r4)
420 ; LARGE32-NEXT: lwz r4, 0(r4)
421 ; LARGE32-NEXT: add r3, r4, r3
422 ; LARGE32-NEXT: addi r1, r1, 32
423 ; LARGE32-NEXT: lwz r0, 8(r1)
424 ; LARGE32-NEXT: mtlr r0
425 ; LARGE32-NEXT: blr
426 entry:
427 %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @IThreadLocalVarInit)
428 %1 = load i32, ptr %0, align 4
429 %2 = load i32, ptr @VarInit, align 4
430 %add = add nsw i32 %2, %1
431 ret i32 %add
432 }
434 define signext i32 @loadTLUninit() {
435 ; SMALL64-LABEL: loadTLUninit:
436 ; SMALL64: # %bb.0: # %entry
437 ; SMALL64-NEXT: ld r3, L..C2(r2) # target-flags(ppc-tprel) @ThreadLocalVarUninit
438 ; SMALL64-NEXT: lwax r3, r13, r3
439 ; SMALL64-NEXT: blr
440 ;
441 ; LARGE64-LABEL: loadTLUninit:
442 ; LARGE64: # %bb.0: # %entry
443 ; LARGE64-NEXT: addis r3, L..C2@u(r2)
444 ; LARGE64-NEXT: ld r3, L..C2@l(r3)
445 ; LARGE64-NEXT: lwax r3, r13, r3
446 ; LARGE64-NEXT: blr
447 ;
448 ; SMALL32-LABEL: loadTLUninit:
449 ; SMALL32: # %bb.0: # %entry
450 ; SMALL32-NEXT: mflr r0
451 ; SMALL32-NEXT: stwu r1, -32(r1)
452 ; SMALL32-NEXT: lwz r4, L..C2(r2) # target-flags(ppc-tprel) @ThreadLocalVarUninit
453 ; SMALL32-NEXT: stw r0, 40(r1)
454 ; SMALL32-NEXT: bla .__get_tpointer[PR]
455 ; SMALL32-NEXT: lwzx r3, r3, r4
456 ; SMALL32-NEXT: addi r1, r1, 32
457 ; SMALL32-NEXT: lwz r0, 8(r1)
458 ; SMALL32-NEXT: mtlr r0
459 ; SMALL32-NEXT: blr
460 ;
461 ; LARGE32-LABEL: loadTLUninit:
462 ; LARGE32: # %bb.0: # %entry
463 ; LARGE32-NEXT: mflr r0
464 ; LARGE32-NEXT: stwu r1, -32(r1)
465 ; LARGE32-NEXT: stw r0, 40(r1)
466 ; LARGE32-NEXT: addis r3, L..C2@u(r2)
467 ; LARGE32-NEXT: lwz r4, L..C2@l(r3)
468 ; LARGE32-NEXT: bla .__get_tpointer[PR]
469 ; LARGE32-NEXT: lwzx r3, r3, r4
470 ; LARGE32-NEXT: addi r1, r1, 32
471 ; LARGE32-NEXT: lwz r0, 8(r1)
472 ; LARGE32-NEXT: mtlr r0
473 ; LARGE32-NEXT: blr
474 entry:
475 %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @ThreadLocalVarUninit)
476 %1 = load i32, ptr %0, align 4
477 ret i32 %1
478 }
480 define signext i32 @loadTLUninit2() {
481 ; SMALL64-LABEL: loadTLUninit2:
482 ; SMALL64: # %bb.0: # %entry
483 ; SMALL64-NEXT: ld r3, L..C2(r2) # target-flags(ppc-tprel) @ThreadLocalVarUninit
484 ; SMALL64-NEXT: ld r4, L..C4(r2) # @VarInit
485 ; SMALL64-NEXT: lwzx r3, r13, r3
486 ; SMALL64-NEXT: lwz r4, 0(r4)
487 ; SMALL64-NEXT: add r3, r4, r3
488 ; SMALL64-NEXT: extsw r3, r3
489 ; SMALL64-NEXT: blr
490 ;
491 ; LARGE64-LABEL: loadTLUninit2:
492 ; LARGE64: # %bb.0: # %entry
493 ; LARGE64-NEXT: addis r3, L..C2@u(r2)
494 ; LARGE64-NEXT: addis r4, L..C4@u(r2)
495 ; LARGE64-NEXT: ld r3, L..C2@l(r3)
496 ; LARGE64-NEXT: ld r4, L..C4@l(r4)
497 ; LARGE64-NEXT: lwzx r3, r13, r3
498 ; LARGE64-NEXT: lwz r4, 0(r4)
499 ; LARGE64-NEXT: add r3, r4, r3
500 ; LARGE64-NEXT: extsw r3, r3
501 ; LARGE64-NEXT: blr
502 ;
503 ; SMALL32-LABEL: loadTLUninit2:
504 ; SMALL32: # %bb.0: # %entry
505 ; SMALL32-NEXT: mflr r0
506 ; SMALL32-NEXT: stwu r1, -32(r1)
507 ; SMALL32-NEXT: lwz r4, L..C2(r2) # target-flags(ppc-tprel) @ThreadLocalVarUninit
508 ; SMALL32-NEXT: lwz r5, L..C4(r2) # @VarInit
509 ; SMALL32-NEXT: stw r0, 40(r1)
510 ; SMALL32-NEXT: bla .__get_tpointer[PR]
511 ; SMALL32-NEXT: lwzx r3, r3, r4
512 ; SMALL32-NEXT: lwz r4, 0(r5)
513 ; SMALL32-NEXT: add r3, r4, r3
514 ; SMALL32-NEXT: addi r1, r1, 32
515 ; SMALL32-NEXT: lwz r0, 8(r1)
516 ; SMALL32-NEXT: mtlr r0
517 ; SMALL32-NEXT: blr
518 ;
519 ; LARGE32-LABEL: loadTLUninit2:
520 ; LARGE32: # %bb.0: # %entry
521 ; LARGE32-NEXT: mflr r0
522 ; LARGE32-NEXT: stwu r1, -32(r1)
523 ; LARGE32-NEXT: stw r0, 40(r1)
524 ; LARGE32-NEXT: addis r3, L..C2@u(r2)
525 ; LARGE32-NEXT: lwz r4, L..C2@l(r3)
526 ; LARGE32-NEXT: bla .__get_tpointer[PR]
527 ; LARGE32-NEXT: lwzx r3, r3, r4
528 ; LARGE32-NEXT: addis r4, L..C4@u(r2)
529 ; LARGE32-NEXT: lwz r4, L..C4@l(r4)
530 ; LARGE32-NEXT: lwz r4, 0(r4)
531 ; LARGE32-NEXT: add r3, r4, r3
532 ; LARGE32-NEXT: addi r1, r1, 32
533 ; LARGE32-NEXT: lwz r0, 8(r1)
534 ; LARGE32-NEXT: mtlr r0
535 ; LARGE32-NEXT: blr
536 entry:
537 %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @ThreadLocalVarUninit)
538 %1 = load i32, ptr %0, align 4
539 %2 = load i32, ptr @VarInit, align 4
540 %add = add nsw i32 %2, %1
541 ret i32 %add
542 }
544 define signext i32 @loadTLInit() {
545 ; SMALL64-LABEL: loadTLInit:
546 ; SMALL64: # %bb.0: # %entry
547 ; SMALL64-NEXT: ld r3, L..C3(r2) # target-flags(ppc-tprel) @ThreadLocalVarInit
548 ; SMALL64-NEXT: lwax r3, r13, r3
549 ; SMALL64-NEXT: blr
550 ;
551 ; LARGE64-LABEL: loadTLInit:
552 ; LARGE64: # %bb.0: # %entry
553 ; LARGE64-NEXT: addis r3, L..C3@u(r2)
554 ; LARGE64-NEXT: ld r3, L..C3@l(r3)
555 ; LARGE64-NEXT: lwax r3, r13, r3
556 ; LARGE64-NEXT: blr
557 ;
558 ; SMALL32-LABEL: loadTLInit:
559 ; SMALL32: # %bb.0: # %entry
560 ; SMALL32-NEXT: mflr r0
561 ; SMALL32-NEXT: stwu r1, -32(r1)
562 ; SMALL32-NEXT: lwz r4, L..C3(r2) # target-flags(ppc-tprel) @ThreadLocalVarInit
563 ; SMALL32-NEXT: stw r0, 40(r1)
564 ; SMALL32-NEXT: bla .__get_tpointer[PR]
565 ; SMALL32-NEXT: lwzx r3, r3, r4
566 ; SMALL32-NEXT: addi r1, r1, 32
567 ; SMALL32-NEXT: lwz r0, 8(r1)
568 ; SMALL32-NEXT: mtlr r0
569 ; SMALL32-NEXT: blr
570 ;
571 ; LARGE32-LABEL: loadTLInit:
572 ; LARGE32: # %bb.0: # %entry
573 ; LARGE32-NEXT: mflr r0
574 ; LARGE32-NEXT: stwu r1, -32(r1)
575 ; LARGE32-NEXT: stw r0, 40(r1)
576 ; LARGE32-NEXT: addis r3, L..C3@u(r2)
577 ; LARGE32-NEXT: lwz r4, L..C3@l(r3)
578 ; LARGE32-NEXT: bla .__get_tpointer[PR]
579 ; LARGE32-NEXT: lwzx r3, r3, r4
580 ; LARGE32-NEXT: addi r1, r1, 32
581 ; LARGE32-NEXT: lwz r0, 8(r1)
582 ; LARGE32-NEXT: mtlr r0
583 ; LARGE32-NEXT: blr
584 entry:
585 %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @ThreadLocalVarInit)
586 %1 = load i32, ptr %0, align 4
587 ret i32 %1
588 }
590 define signext i32 @loadTLInit2() {
591 ; SMALL64-LABEL: loadTLInit2:
592 ; SMALL64: # %bb.0: # %entry
593 ; SMALL64-NEXT: ld r3, L..C3(r2) # target-flags(ppc-tprel) @ThreadLocalVarInit
594 ; SMALL64-NEXT: ld r4, L..C4(r2) # @VarInit
595 ; SMALL64-NEXT: lwzx r3, r13, r3
596 ; SMALL64-NEXT: lwz r4, 0(r4)
597 ; SMALL64-NEXT: add r3, r4, r3
598 ; SMALL64-NEXT: extsw r3, r3
599 ; SMALL64-NEXT: blr
600 ;
601 ; LARGE64-LABEL: loadTLInit2:
602 ; LARGE64: # %bb.0: # %entry
603 ; LARGE64-NEXT: addis r3, L..C3@u(r2)
604 ; LARGE64-NEXT: addis r4, L..C4@u(r2)
605 ; LARGE64-NEXT: ld r3, L..C3@l(r3)
606 ; LARGE64-NEXT: ld r4, L..C4@l(r4)
607 ; LARGE64-NEXT: lwzx r3, r13, r3
608 ; LARGE64-NEXT: lwz r4, 0(r4)
609 ; LARGE64-NEXT: add r3, r4, r3
610 ; LARGE64-NEXT: extsw r3, r3
611 ; LARGE64-NEXT: blr
612 ;
613 ; SMALL32-LABEL: loadTLInit2:
614 ; SMALL32: # %bb.0: # %entry
615 ; SMALL32-NEXT: mflr r0
616 ; SMALL32-NEXT: stwu r1, -32(r1)
617 ; SMALL32-NEXT: lwz r4, L..C3(r2) # target-flags(ppc-tprel) @ThreadLocalVarInit
618 ; SMALL32-NEXT: lwz r5, L..C4(r2) # @VarInit
619 ; SMALL32-NEXT: stw r0, 40(r1)
620 ; SMALL32-NEXT: bla .__get_tpointer[PR]
621 ; SMALL32-NEXT: lwzx r3, r3, r4
622 ; SMALL32-NEXT: lwz r4, 0(r5)
623 ; SMALL32-NEXT: add r3, r4, r3
624 ; SMALL32-NEXT: addi r1, r1, 32
625 ; SMALL32-NEXT: lwz r0, 8(r1)
626 ; SMALL32-NEXT: mtlr r0
627 ; SMALL32-NEXT: blr
628 ;
629 ; LARGE32-LABEL: loadTLInit2:
630 ; LARGE32: # %bb.0: # %entry
631 ; LARGE32-NEXT: mflr r0
632 ; LARGE32-NEXT: stwu r1, -32(r1)
633 ; LARGE32-NEXT: stw r0, 40(r1)
634 ; LARGE32-NEXT: addis r3, L..C3@u(r2)
635 ; LARGE32-NEXT: lwz r4, L..C3@l(r3)
636 ; LARGE32-NEXT: bla .__get_tpointer[PR]
637 ; LARGE32-NEXT: lwzx r3, r3, r4
638 ; LARGE32-NEXT: addis r4, L..C4@u(r2)
639 ; LARGE32-NEXT: lwz r4, L..C4@l(r4)
640 ; LARGE32-NEXT: lwz r4, 0(r4)
641 ; LARGE32-NEXT: add r3, r4, r3
642 ; LARGE32-NEXT: addi r1, r1, 32
643 ; LARGE32-NEXT: lwz r0, 8(r1)
644 ; LARGE32-NEXT: mtlr r0
645 ; LARGE32-NEXT: blr
646 entry:
647 %0 = tail call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @ThreadLocalVarInit)
648 %1 = load i32, ptr %0, align 4
649 %2 = load i32, ptr @VarInit, align 4
650 %add = add nsw i32 %2, %1
651 ret i32 %add
652 }
654 ; TOC Entry Checks.
656 ; SMALL64-LABEL: .toc
657 ; SMALL64-LABEL: L..C0:
658 ; SMALL64-NEXT: .tc IThreadLocalVarUninit[TC],IThreadLocalVarUninit[UL]@le
659 ; SMALL64-LABEL: L..C1:
660 ; SMALL64-NEXT: .tc IThreadLocalVarInit[TC],IThreadLocalVarInit[TL]@le
661 ; SMALL64-LABEL: L..C2:
662 ; SMALL64-NEXT: .tc ThreadLocalVarUninit[TC],ThreadLocalVarUninit[TL]@le
663 ; SMALL64-LABEL: L..C3:
664 ; SMALL64-NEXT: .tc ThreadLocalVarInit[TC],ThreadLocalVarInit[TL]@le
665 ; SMALL64-LABEL: L..C4:
666 ; SMALL64-NEXT: .tc VarInit[TC],VarInit[RW]
668 ; LARGE64-LABEL: .toc
669 ; LARGE64-LABEL: L..C0:
670 ; LARGE64-NEXT: .tc IThreadLocalVarUninit[TE],IThreadLocalVarUninit[UL]@le
671 ; LARGE64-LABEL: L..C1:
672 ; LARGE64-NEXT: .tc IThreadLocalVarInit[TE],IThreadLocalVarInit[TL]@le
673 ; LARGE64-LABEL: L..C2:
674 ; LARGE64-NEXT: .tc ThreadLocalVarUninit[TE],ThreadLocalVarUninit[TL]@le
675 ; LARGE64-LABEL: L..C3:
676 ; LARGE64-NEXT: .tc ThreadLocalVarInit[TE],ThreadLocalVarInit[TL]@le
677 ; LARGE64-LABEL: L..C4:
678 ; LARGE64-NEXT: .tc VarInit[TE],VarInit[RW]
680 ; SMALL32-LABEL: .toc
681 ; SMALL32-LABEL: L..C0:
682 ; SMALL32-NEXT: .tc IThreadLocalVarUninit[TC],IThreadLocalVarUninit[UL]@le
683 ; SMALL32-LABEL: L..C1:
684 ; SMALL32-NEXT: .tc IThreadLocalVarInit[TC],IThreadLocalVarInit[TL]@le
685 ; SMALL32-LABEL: L..C2:
686 ; SMALL32-NEXT: .tc ThreadLocalVarUninit[TC],ThreadLocalVarUninit[TL]@le
687 ; SMALL32-LABEL: L..C3:
688 ; SMALL32-NEXT: .tc ThreadLocalVarInit[TC],ThreadLocalVarInit[TL]@le
689 ; SMALL32-LABEL: L..C4:
690 ; SMALL32-NEXT: .tc VarInit[TC],VarInit[RW]
692 ; LARGE32-LABEL: .toc
693 ; LARGE32-LABEL: L..C0:
694 ; LARGE32-NEXT: .tc IThreadLocalVarUninit[TE],IThreadLocalVarUninit[UL]@le
695 ; LARGE32-LABEL: L..C1:
696 ; LARGE32-NEXT: .tc IThreadLocalVarInit[TE],IThreadLocalVarInit[TL]@le
697 ; LARGE32-LABEL: L..C2:
698 ; LARGE32-NEXT: .tc ThreadLocalVarUninit[TE],ThreadLocalVarUninit[TL]@le
699 ; LARGE32-LABEL: L..C3:
700 ; LARGE32-NEXT: .tc ThreadLocalVarInit[TE],ThreadLocalVarInit[TL]@le
701 ; LARGE32-LABEL: L..C4:
702 ; LARGE32-NEXT: .tc VarInit[TE],VarInit[RW]