| blob | a9feb93627b06fa969d143f39d080cee5fcf6c80 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-- \
3 ; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names < %s | FileCheck %s
4 ; RUN: llc -verify-machineinstrs -target-abi=elfv2 -mtriple=powerpc64-- \
5 ; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names < %s | FileCheck %s
6 ; RUN: llc -verify-machineinstrs -target-abi=elfv2 -mtriple=powerpc64-- \
7 ; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names < %s | FileCheck %s --check-prefix=CHECK-P9
9 define float @FloatConstantPool() {
10 ; CHECK-LABEL: FloatConstantPool:
11 ; CHECK: # %bb.0: # %entry
12 ; CHECK-NEXT: xxsplti32dx vs1, 0, 940572664
13 ; CHECK-NEXT: xxsplti32dx vs1, 1, 1073741824
14 ; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
15 ; CHECK-NEXT: blr
16 ;
17 ; CHECK-P9-LABEL: FloatConstantPool:
18 ; CHECK-P9: # %bb.0: # %entry
19 ; CHECK-P9-NEXT: addis r3, r2, .LCPI0_0@toc@ha
20 ; CHECK-P9-NEXT: lfs f1, .LCPI0_0@toc@l(r3)
21 ; CHECK-P9-NEXT: blr
22 entry:
23 ret float 0x380FFFF840000000
24 }
26 define double @DoubleConstantPool() {
27 ; CHECK-LABEL: DoubleConstantPool:
28 ; CHECK: # %bb.0: # %entry
29 ; CHECK-NEXT: xxsplti32dx vs1, 0, 1048574
30 ; CHECK-NEXT: xxsplti32dx vs1, 1, 780229072
31 ; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
32 ; CHECK-NEXT: blr
33 ;
34 ; CHECK-P9-LABEL: DoubleConstantPool:
35 ; CHECK-P9: # %bb.0: # %entry
36 ; CHECK-P9-NEXT: addis r3, r2, .LCPI1_0@toc@ha
37 ; CHECK-P9-NEXT: lfd f1, .LCPI1_0@toc@l(r3)
38 ; CHECK-P9-NEXT: blr
39 entry:
40 ret double 2.225070e-308
41 }
43 define ppc_fp128 @LongDoubleConstantPool() {
44 ; CHECK-LABEL: LongDoubleConstantPool:
45 ; CHECK: # %bb.0: # %entry
46 ; CHECK-NEXT: xxsplti32dx vs1, 0, 56623104
47 ; CHECK-NEXT: xxsplti32dx vs2, 0, -2146625897
48 ; CHECK-NEXT: xxsplti32dx vs1, 1, -609716532
49 ; CHECK-NEXT: xxsplti32dx vs2, 1, 1339675259
50 ; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
51 ; CHECK-NEXT: # kill: def $f2 killed $f2 killed $vsl2
52 ; CHECK-NEXT: blr
53 ;
54 ; CHECK-P9-LABEL: LongDoubleConstantPool:
55 ; CHECK-P9: # %bb.0: # %entry
56 ; CHECK-P9-NEXT: addis r3, r2, .LCPI2_0@toc@ha
57 ; CHECK-P9-NEXT: lfd f1, .LCPI2_0@toc@l(r3)
58 ; CHECK-P9-NEXT: addis r3, r2, .LCPI2_1@toc@ha
59 ; CHECK-P9-NEXT: lfd f2, .LCPI2_1@toc@l(r3)
60 ; CHECK-P9-NEXT: blr
61 entry:
62 ret ppc_fp128 0xM03600000DBA876CC800D16974FD9D27B
63 }
65 define fp128 @__Float128ConstantPool() {
66 ; CHECK-LABEL: __Float128ConstantPool:
67 ; CHECK: # %bb.0: # %entry
68 ; CHECK-NEXT: plxv vs34, .LCPI3_0@PCREL(0), 1
69 ; CHECK-NEXT: blr
70 ;
71 ; CHECK-P9-LABEL: __Float128ConstantPool:
72 ; CHECK-P9: # %bb.0: # %entry
73 ; CHECK-P9-NEXT: addis r3, r2, .LCPI3_0@toc@ha
74 ; CHECK-P9-NEXT: addi r3, r3, .LCPI3_0@toc@l
75 ; CHECK-P9-NEXT: lxv vs34, 0(r3)
76 ; CHECK-P9-NEXT: blr
77 entry:
78 ret fp128 0xL00000000000000003C00FFFFC5D02B3A
79 }
81 define <16 x i8> @VectorCharConstantPool() {
82 ; CHECK-LABEL: VectorCharConstantPool:
83 ; CHECK: # %bb.0: # %entry
84 ; CHECK-NEXT: plxv vs34, .LCPI4_0@PCREL(0), 1
85 ; CHECK-NEXT: blr
86 ;
87 ; CHECK-P9-LABEL: VectorCharConstantPool:
88 ; CHECK-P9: # %bb.0: # %entry
89 ; CHECK-P9-NEXT: addis r3, r2, .LCPI4_0@toc@ha
90 ; CHECK-P9-NEXT: addi r3, r3, .LCPI4_0@toc@l
91 ; CHECK-P9-NEXT: lxv vs34, 0(r3)
92 ; CHECK-P9-NEXT: blr
93 entry:
94 ret <16 x i8> <i8 -128, i8 -127, i8 -126, i8 -125, i8 -124, i8 -123, i8 -122, i8 -121, i8 -120, i8 -119, i8 -118, i8 -117, i8 -116, i8 -115, i8 -114, i8 -113>
95 }
97 define <8 x i16> @VectorShortConstantPool() {
98 ; CHECK-LABEL: VectorShortConstantPool:
99 ; CHECK: # %bb.0: # %entry
100 ; CHECK-NEXT: plxv vs34, .LCPI5_0@PCREL(0), 1
101 ; CHECK-NEXT: blr
102 ;
103 ; CHECK-P9-LABEL: VectorShortConstantPool:
104 ; CHECK-P9: # %bb.0: # %entry
105 ; CHECK-P9-NEXT: addis r3, r2, .LCPI5_0@toc@ha
106 ; CHECK-P9-NEXT: addi r3, r3, .LCPI5_0@toc@l
107 ; CHECK-P9-NEXT: lxv vs34, 0(r3)
108 ; CHECK-P9-NEXT: blr
109 entry:
110 ret <8 x i16> <i16 -32768, i16 -32767, i16 -32766, i16 -32765, i16 -32764, i16 -32763, i16 -32762, i16 -32761>
111 }
113 define <4 x i32> @VectorIntConstantPool() {
114 ; CHECK-LABEL: VectorIntConstantPool:
115 ; CHECK: # %bb.0: # %entry
116 ; CHECK-NEXT: plxv vs34, .LCPI6_0@PCREL(0), 1
117 ; CHECK-NEXT: blr
118 ;
119 ; CHECK-P9-LABEL: VectorIntConstantPool:
120 ; CHECK-P9: # %bb.0: # %entry
121 ; CHECK-P9-NEXT: addis r3, r2, .LCPI6_0@toc@ha
122 ; CHECK-P9-NEXT: addi r3, r3, .LCPI6_0@toc@l
123 ; CHECK-P9-NEXT: lxv vs34, 0(r3)
124 ; CHECK-P9-NEXT: blr
125 entry:
126 ret <4 x i32> <i32 -2147483648, i32 -2147483647, i32 -2147483646, i32 -2147483645>
127 }
129 define <2 x i64> @VectorLongLongConstantPool() {
130 ; CHECK-LABEL: VectorLongLongConstantPool:
131 ; CHECK: # %bb.0: # %entry
132 ; CHECK-NEXT: plxv vs34, .LCPI7_0@PCREL(0), 1
133 ; CHECK-NEXT: blr
134 ;
135 ; CHECK-P9-LABEL: VectorLongLongConstantPool:
136 ; CHECK-P9: # %bb.0: # %entry
137 ; CHECK-P9-NEXT: addis r3, r2, .LCPI7_0@toc@ha
138 ; CHECK-P9-NEXT: addi r3, r3, .LCPI7_0@toc@l
139 ; CHECK-P9-NEXT: lxv vs34, 0(r3)
140 ; CHECK-P9-NEXT: blr
141 entry:
142 ret <2 x i64> <i64 -9223372036854775808, i64 -9223372036854775807>
143 }
145 define <1 x i128> @VectorInt128ConstantPool() {
146 ; CHECK-LABEL: VectorInt128ConstantPool:
147 ; CHECK: # %bb.0: # %entry
148 ; CHECK-NEXT: plxv vs34, .LCPI8_0@PCREL(0), 1
149 ; CHECK-NEXT: blr
150 ;
151 ; CHECK-P9-LABEL: VectorInt128ConstantPool:
152 ; CHECK-P9: # %bb.0: # %entry
153 ; CHECK-P9-NEXT: addis r3, r2, .LCPI8_0@toc@ha
154 ; CHECK-P9-NEXT: addi r3, r3, .LCPI8_0@toc@l
155 ; CHECK-P9-NEXT: lxv vs34, 0(r3)
156 ; CHECK-P9-NEXT: blr
157 entry:
158 ret <1 x i128> <i128 -27670116110564327424>
159 }
161 define <4 x float> @VectorFloatConstantPool() {
162 ; CHECK-LABEL: VectorFloatConstantPool:
163 ; CHECK: # %bb.0: # %entry
164 ; CHECK-NEXT: plxv vs34, .LCPI9_0@PCREL(0), 1
165 ; CHECK-NEXT: blr
166 ;
167 ; CHECK-P9-LABEL: VectorFloatConstantPool:
168 ; CHECK-P9: # %bb.0: # %entry
169 ; CHECK-P9-NEXT: addis r3, r2, .LCPI9_0@toc@ha
170 ; CHECK-P9-NEXT: addi r3, r3, .LCPI9_0@toc@l
171 ; CHECK-P9-NEXT: lxv vs34, 0(r3)
172 ; CHECK-P9-NEXT: blr
173 entry:
174 ret <4 x float> <float 0x380FFFF840000000, float 0x380FFF57C0000000, float 0x3843FFFB20000000, float 0x3843FF96C0000000>
175 }
177 define <2 x double> @VectorDoubleConstantPool() {
178 ; CHECK-LABEL: VectorDoubleConstantPool:
179 ; CHECK: # %bb.0: # %entry
180 ; CHECK-NEXT: plxv vs34, .LCPI10_0@PCREL(0), 1
181 ; CHECK-NEXT: blr
182 ;
183 ; CHECK-P9-LABEL: VectorDoubleConstantPool:
184 ; CHECK-P9: # %bb.0: # %entry
185 ; CHECK-P9-NEXT: addis r3, r2, .LCPI10_0@toc@ha
186 ; CHECK-P9-NEXT: addi r3, r3, .LCPI10_0@toc@l
187 ; CHECK-P9-NEXT: lxv vs34, 0(r3)
188 ; CHECK-P9-NEXT: blr
189 entry:
190 ret <2 x double> <double 2.225070e-308, double 2.225000e-308>
191 }
193 define double @two_constants(double %a) {
194 ; CHECK-LABEL: two_constants:
195 ; CHECK: # %bb.0: # %entry
196 ; CHECK-NEXT: xxsplti32dx vs0, 0, 1074446467
197 ; CHECK-NEXT: xxsplti32dx vs0, 1, 309237645
198 ; CHECK-NEXT: xsadddp f0, f1, f0
199 ; CHECK-NEXT: xxsplti32dx vs1, 0, 1073922179
200 ; CHECK-NEXT: xxsplti32dx vs1, 1, 309237645
201 ; CHECK-NEXT: xsadddp f1, f0, f1
202 ; CHECK-NEXT: blr
203 ;
204 ; CHECK-P9-LABEL: two_constants:
205 ; CHECK-P9: # %bb.0: # %entry
206 ; CHECK-P9-NEXT: addis r3, r2, .LCPI11_0@toc@ha
207 ; CHECK-P9-NEXT: lfd f0, .LCPI11_0@toc@l(r3)
208 ; CHECK-P9-NEXT: addis r3, r2, .LCPI11_1@toc@ha
209 ; CHECK-P9-NEXT: xsadddp f0, f1, f0
210 ; CHECK-P9-NEXT: lfd f1, .LCPI11_1@toc@l(r3)
211 ; CHECK-P9-NEXT: xsadddp f1, f0, f1
212 ; CHECK-P9-NEXT: blr
213 entry:
214 %0 = fadd double %a, 3.344000e+00
215 %1 = fadd double %0, 2.344000e+00
216 ret double %1
217 }
219 define double @two_constants_two_bb(i32 %m, double %a) {
220 ; CHECK-LABEL: two_constants_two_bb:
221 ; CHECK: # %bb.0: # %entry
222 ; CHECK-NEXT: cmplwi r3, 0
223 ; CHECK-NEXT: beq cr0, .LBB12_2
224 ; CHECK-NEXT: # %bb.1:
225 ; CHECK-NEXT: xxsplti32dx vs1, 0, 1074935889
226 ; CHECK-NEXT: xxsplti32dx vs1, 1, -343597384
227 ; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
228 ; CHECK-NEXT: blr
229 ; CHECK-NEXT: .LBB12_2: # %if.end
230 ; CHECK-NEXT: xxsplti32dx vs0, 0, 1076085391
231 ; CHECK-NEXT: xxsplti32dx vs0, 1, 1546188227
232 ; CHECK-NEXT: xsadddp f1, f1, f0
233 ; CHECK-NEXT: # kill: def $f1 killed $f1 killed $vsl1
234 ; CHECK-NEXT: blr
235 ;
236 ; CHECK-P9-LABEL: two_constants_two_bb:
237 ; CHECK-P9: # %bb.0: # %entry
238 ; CHECK-P9-NEXT: cmplwi r3, 0
239 ; CHECK-P9-NEXT: beq cr0, .LBB12_2
240 ; CHECK-P9-NEXT: # %bb.1:
241 ; CHECK-P9-NEXT: addis r3, r2, .LCPI12_0@toc@ha
242 ; CHECK-P9-NEXT: lfd f1, .LCPI12_0@toc@l(r3)
243 ; CHECK-P9-NEXT: blr
244 ; CHECK-P9-NEXT: .LBB12_2: # %if.end
245 ; CHECK-P9-NEXT: addis r3, r2, .LCPI12_1@toc@ha
246 ; CHECK-P9-NEXT: lfd f0, .LCPI12_1@toc@l(r3)
247 ; CHECK-P9-NEXT: xsadddp f1, f1, f0
248 ; CHECK-P9-NEXT: blr
249 entry:
250 %tobool.not = icmp eq i32 %m, 0
251 br i1 %tobool.not, label %if.end, label %return
253 if.end:
254 %add = fadd double %a, 9.880000e+00
255 br label %return
257 return:
258 %retval.0 = phi double [ %add, %if.end ], [ 4.555000e+00, %entry ]
259 ret double %retval.0
260 }
262 define double @three_constants_f64(double %a, double %c) {
263 ; CHECK-LABEL: three_constants_f64:
264 ; CHECK: # %bb.0: # %entry
265 ; CHECK-NEXT: xxsplti32dx vs0, 0, 1074446467
266 ; CHECK-NEXT: xxsplti32dx vs0, 1, 309237645
267 ; CHECK-NEXT: xsadddp f0, f1, f0
268 ; CHECK-NEXT: xxsplti32dx vs1, 0, 1073922179
269 ; CHECK-NEXT: xxsplti32dx vs1, 1, 309237645
270 ; CHECK-NEXT: xsadddp f0, f0, f1
271 ; CHECK-NEXT: xxsplti32dx vs1, 0, 1073948393
272 ; CHECK-NEXT: xxsplti32dx vs1, 1, 2027224564
273 ; CHECK-NEXT: xsadddp f1, f0, f1
274 ; CHECK-NEXT: blr
275 ;
276 ; CHECK-P9-LABEL: three_constants_f64:
277 ; CHECK-P9: # %bb.0: # %entry
278 ; CHECK-P9-NEXT: addis r3, r2, .LCPI13_0@toc@ha
279 ; CHECK-P9-NEXT: lfd f0, .LCPI13_0@toc@l(r3)
280 ; CHECK-P9-NEXT: addis r3, r2, .LCPI13_1@toc@ha
281 ; CHECK-P9-NEXT: xsadddp f0, f1, f0
282 ; CHECK-P9-NEXT: lfd f1, .LCPI13_1@toc@l(r3)
283 ; CHECK-P9-NEXT: addis r3, r2, .LCPI13_2@toc@ha
284 ; CHECK-P9-NEXT: xsadddp f0, f0, f1
285 ; CHECK-P9-NEXT: lfd f1, .LCPI13_2@toc@l(r3)
286 ; CHECK-P9-NEXT: xsadddp f1, f0, f1
287 ; CHECK-P9-NEXT: blr
288 entry:
289 %0 = fadd double %a, 3.344000e+00
290 %1 = fadd double %0, 2.344000e+00
291 %2 = fadd double %1, 2.394000e+00
292 ret double %2
293 }
295 define float @three_constants_f32(float %a, float %c) {
296 ; CHECK-LABEL: three_constants_f32:
297 ; CHECK: # %bb.0: # %entry
298 ; CHECK-NEXT: xxspltidp vs0, 1083294351
299 ; CHECK-NEXT: xsaddsp f0, f1, f0
300 ; CHECK-NEXT: xxspltidp vs1, 1083296911
301 ; CHECK-NEXT: xsaddsp f0, f0, f1
302 ; CHECK-NEXT: xxspltidp vs1, 1083292559
303 ; CHECK-NEXT: xsaddsp f1, f0, f1
304 ; CHECK-NEXT: blr
305 ;
306 ; CHECK-P9-LABEL: three_constants_f32:
307 ; CHECK-P9: # %bb.0: # %entry
308 ; CHECK-P9-NEXT: addis r3, r2, .LCPI14_0@toc@ha
309 ; CHECK-P9-NEXT: lfs f0, .LCPI14_0@toc@l(r3)
310 ; CHECK-P9-NEXT: addis r3, r2, .LCPI14_1@toc@ha
311 ; CHECK-P9-NEXT: xsaddsp f0, f1, f0
312 ; CHECK-P9-NEXT: lfs f1, .LCPI14_1@toc@l(r3)
313 ; CHECK-P9-NEXT: addis r3, r2, .LCPI14_2@toc@ha
314 ; CHECK-P9-NEXT: xsaddsp f0, f0, f1
315 ; CHECK-P9-NEXT: lfs f1, .LCPI14_2@toc@l(r3)
316 ; CHECK-P9-NEXT: xsaddsp f1, f0, f1
317 ; CHECK-P9-NEXT: blr
318 entry:
319 %0 = fadd float %a, 0x40123851E0000000
320 %1 = fadd float %0, 0x40123991E0000000
321 %2 = fadd float %1, 0x40123771E0000000
322 ret float %2
323 }
325 define fp128 @three_constants_f128(fp128 %a, fp128 %c) {
326 ; CHECK-LABEL: three_constants_f128:
327 ; CHECK: # %bb.0: # %entry
328 ; CHECK-NEXT: plxv vs35, .LCPI15_0@PCREL(0), 1
329 ; CHECK-NEXT: xsaddqp v2, v2, v3
330 ; CHECK-NEXT: plxv vs35, .LCPI15_1@PCREL(0), 1
331 ; CHECK-NEXT: xsaddqp v2, v2, v3
332 ; CHECK-NEXT: plxv vs35, .LCPI15_2@PCREL(0), 1
333 ; CHECK-NEXT: xsaddqp v2, v2, v3
334 ; CHECK-NEXT: blr
335 ;
336 ; CHECK-P9-LABEL: three_constants_f128:
337 ; CHECK-P9: # %bb.0: # %entry
338 ; CHECK-P9-NEXT: addis r3, r2, .LCPI15_0@toc@ha
339 ; CHECK-P9-NEXT: addi r3, r3, .LCPI15_0@toc@l
340 ; CHECK-P9-NEXT: lxv vs35, 0(r3)
341 ; CHECK-P9-NEXT: addis r3, r2, .LCPI15_1@toc@ha
342 ; CHECK-P9-NEXT: addi r3, r3, .LCPI15_1@toc@l
343 ; CHECK-P9-NEXT: xsaddqp v2, v2, v3
344 ; CHECK-P9-NEXT: lxv vs35, 0(r3)
345 ; CHECK-P9-NEXT: addis r3, r2, .LCPI15_2@toc@ha
346 ; CHECK-P9-NEXT: addi r3, r3, .LCPI15_2@toc@l
347 ; CHECK-P9-NEXT: xsaddqp v2, v2, v3
348 ; CHECK-P9-NEXT: lxv vs35, 0(r3)
349 ; CHECK-P9-NEXT: xsaddqp v2, v2, v3
350 ; CHECK-P9-NEXT: blr
351 entry:
352 %0 = fadd fp128 %a, 0xL8000000000000000400123851EB851EB
353 %1 = fadd fp128 %0, 0xL8000000000000000400123851EB991EB
354 %2 = fadd fp128 %1, 0xL8000000000000000400123851EB771EB
355 ret fp128 %2
356 }
358 define ppc_fp128 @three_constants_ppcf128(ppc_fp128 %a, ppc_fp128 %c) {
359 ; CHECK-LABEL: three_constants_ppcf128:
360 ; CHECK: # %bb.0: # %entry
361 ; CHECK-NEXT: mflr r0
362 ; CHECK-NEXT: std r0, 16(r1)
363 ; CHECK-NEXT: stdu r1, -48(r1)
364 ; CHECK-NEXT: .cfi_def_cfa_offset 48
365 ; CHECK-NEXT: .cfi_offset lr, 16
366 ; CHECK-NEXT: .cfi_offset v31, -16
367 ; CHECK-NEXT: xxsplti32dx vs3, 0, 1074935889
368 ; CHECK-NEXT: xxlxor f4, f4, f4
369 ; CHECK-NEXT: stxv vs63, 32(r1) # 16-byte Folded Spill
370 ; CHECK-NEXT: xxsplti32dx vs63, 0, 1074935889
371 ; CHECK-NEXT: xxsplti32dx vs3, 1, -343597384
372 ; CHECK-NEXT: # kill: def $f3 killed $f3 killed $vsl3
373 ; CHECK-NEXT: bl __gcc_qadd@notoc
374 ; CHECK-NEXT: xxsplti32dx vs3, 0, 1074935889
375 ; CHECK-NEXT: xxlxor f4, f4, f4
376 ; CHECK-NEXT: xxsplti32dx vs3, 1, -1719329096
377 ; CHECK-NEXT: # kill: def $f3 killed $f3 killed $vsl3
378 ; CHECK-NEXT: bl __gcc_qadd@notoc
379 ; CHECK-NEXT: xxsplti32dx vs63, 1, 8724152
380 ; CHECK-NEXT: xxlxor f4, f4, f4
381 ; CHECK-NEXT: xscpsgndp f3, vs63, vs63
382 ; CHECK-NEXT: bl __gcc_qadd@notoc
383 ; CHECK-NEXT: lxv vs63, 32(r1) # 16-byte Folded Reload
384 ; CHECK-NEXT: addi r1, r1, 48
385 ; CHECK-NEXT: ld r0, 16(r1)
386 ; CHECK-NEXT: mtlr r0
387 ; CHECK-NEXT: blr
388 ;
389 ; CHECK-P9-LABEL: three_constants_ppcf128:
390 ; CHECK-P9: # %bb.0: # %entry
391 ; CHECK-P9-NEXT: mflr r0
392 ; CHECK-P9-NEXT: stdu r1, -32(r1)
393 ; CHECK-P9-NEXT: std r0, 48(r1)
394 ; CHECK-P9-NEXT: .cfi_def_cfa_offset 32
395 ; CHECK-P9-NEXT: .cfi_offset lr, 16
396 ; CHECK-P9-NEXT: addis r3, r2, .LCPI16_0@toc@ha
397 ; CHECK-P9-NEXT: xxlxor f4, f4, f4
398 ; CHECK-P9-NEXT: lfd f3, .LCPI16_0@toc@l(r3)
399 ; CHECK-P9-NEXT: bl __gcc_qadd
400 ; CHECK-P9-NEXT: nop
401 ; CHECK-P9-NEXT: addis r3, r2, .LCPI16_1@toc@ha
402 ; CHECK-P9-NEXT: xxlxor f4, f4, f4
403 ; CHECK-P9-NEXT: lfd f3, .LCPI16_1@toc@l(r3)
404 ; CHECK-P9-NEXT: bl __gcc_qadd
405 ; CHECK-P9-NEXT: nop
406 ; CHECK-P9-NEXT: addis r3, r2, .LCPI16_2@toc@ha
407 ; CHECK-P9-NEXT: xxlxor f4, f4, f4
408 ; CHECK-P9-NEXT: lfd f3, .LCPI16_2@toc@l(r3)
409 ; CHECK-P9-NEXT: bl __gcc_qadd
410 ; CHECK-P9-NEXT: nop
411 ; CHECK-P9-NEXT: addi r1, r1, 32
412 ; CHECK-P9-NEXT: ld r0, 16(r1)
413 ; CHECK-P9-NEXT: mtlr r0
414 ; CHECK-P9-NEXT: blr
415 entry:
416 %0 = fadd ppc_fp128 %a, 0xM40123851EB851EB80000000000000000
417 %1 = fadd ppc_fp128 %0, 0xM4012385199851EB80000000000000000
418 %2 = fadd ppc_fp128 %1, 0xM4012385100851EB80000000000000000
419 ret ppc_fp128 %2
420 }
422 define <2 x double> @three_constants_vector(<2 x double> %a, <2 x double> %c) {
423 ; CHECK-LABEL: three_constants_vector:
424 ; CHECK: # %bb.0: # %entry
425 ; CHECK-NEXT: plxv vs0, .LCPI17_0@PCREL(0), 1
426 ; CHECK-NEXT: plxv vs2, .LCPI17_1@PCREL(0), 1
427 ; CHECK-NEXT: xvadddp vs1, vs34, vs0
428 ; CHECK-NEXT: xvadddp vs1, vs1, vs2
429 ; CHECK-NEXT: xvadddp vs34, vs1, vs0
430 ; CHECK-NEXT: blr
431 ;
432 ; CHECK-P9-LABEL: three_constants_vector:
433 ; CHECK-P9: # %bb.0: # %entry
434 ; CHECK-P9-NEXT: addis r3, r2, .LCPI17_0@toc@ha
435 ; CHECK-P9-NEXT: addi r3, r3, .LCPI17_0@toc@l
436 ; CHECK-P9-NEXT: lxv vs0, 0(r3)
437 ; CHECK-P9-NEXT: addis r3, r2, .LCPI17_1@toc@ha
438 ; CHECK-P9-NEXT: addi r3, r3, .LCPI17_1@toc@l
439 ; CHECK-P9-NEXT: lxv vs2, 0(r3)
440 ; CHECK-P9-NEXT: xvadddp vs1, vs34, vs0
441 ; CHECK-P9-NEXT: xvadddp vs1, vs1, vs2
442 ; CHECK-P9-NEXT: xvadddp vs34, vs1, vs0
443 ; CHECK-P9-NEXT: blr
444 entry:
445 %0 = fadd <2 x double> %a, <double 4.555000e+00, double 9.880000e+00>
446 %1 = fadd <2 x double> %0, <double 4.555000e+00, double 9.980000e+00>
447 %2 = fadd <2 x double> %1, <double 4.555000e+00, double 9.880000e+00>
448 ret <2 x double> %2
449 }