| blob | d2b9e2b421e31d45a4a4baacdf626f831f7b8645 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-linux-gnu < %s | FileCheck %s
4 declare float @fminf(float, float)
5 declare double @fmin(double, double)
6 declare ppc_fp128 @fminl(ppc_fp128, ppc_fp128)
7 declare float @llvm.minnum.f32(float, float)
8 declare double @llvm.minnum.f64(double, double)
9 declare ppc_fp128 @llvm.minnum.ppcf128(ppc_fp128, ppc_fp128)
11 declare <2 x float> @llvm.minnum.v2f32(<2 x float>, <2 x float>)
12 declare <4 x float> @llvm.minnum.v4f32(<4 x float>, <4 x float>)
13 declare <8 x float> @llvm.minnum.v8f32(<8 x float>, <8 x float>)
15 define float @test_fminf(float %x, float %y) {
16 ; CHECK-LABEL: test_fminf:
17 ; CHECK: # %bb.0:
18 ; CHECK-NEXT: mflr 0
19 ; CHECK-NEXT: stwu 1, -16(1)
20 ; CHECK-NEXT: stw 0, 20(1)
21 ; CHECK-NEXT: .cfi_def_cfa_offset 16
22 ; CHECK-NEXT: .cfi_offset lr, 4
23 ; CHECK-NEXT: bl fminf
24 ; CHECK-NEXT: lwz 0, 20(1)
25 ; CHECK-NEXT: addi 1, 1, 16
26 ; CHECK-NEXT: mtlr 0
27 ; CHECK-NEXT: blr
28 %z = call float @fminf(float %x, float %y) readnone
29 ret float %z
30 }
32 define double @test_fmin(double %x, double %y) {
33 ; CHECK-LABEL: test_fmin:
34 ; CHECK: # %bb.0:
35 ; CHECK-NEXT: mflr 0
36 ; CHECK-NEXT: stwu 1, -16(1)
37 ; CHECK-NEXT: stw 0, 20(1)
38 ; CHECK-NEXT: .cfi_def_cfa_offset 16
39 ; CHECK-NEXT: .cfi_offset lr, 4
40 ; CHECK-NEXT: bl fmin
41 ; CHECK-NEXT: lwz 0, 20(1)
42 ; CHECK-NEXT: addi 1, 1, 16
43 ; CHECK-NEXT: mtlr 0
44 ; CHECK-NEXT: blr
45 %z = call double @fmin(double %x, double %y) readnone
46 ret double %z
47 }
49 define ppc_fp128 @test_fminl(ppc_fp128 %x, ppc_fp128 %y) {
50 ; CHECK-LABEL: test_fminl:
51 ; CHECK: # %bb.0:
52 ; CHECK-NEXT: mflr 0
53 ; CHECK-NEXT: stwu 1, -112(1)
54 ; CHECK-NEXT: stw 0, 116(1)
55 ; CHECK-NEXT: .cfi_def_cfa_offset 112
56 ; CHECK-NEXT: .cfi_offset lr, 4
57 ; CHECK-NEXT: stfd 1, 40(1)
58 ; CHECK-NEXT: lwz 3, 44(1)
59 ; CHECK-NEXT: stfd 2, 32(1)
60 ; CHECK-NEXT: stw 3, 60(1)
61 ; CHECK-NEXT: lwz 3, 40(1)
62 ; CHECK-NEXT: stfd 3, 72(1)
63 ; CHECK-NEXT: stw 3, 56(1)
64 ; CHECK-NEXT: lwz 3, 36(1)
65 ; CHECK-NEXT: stfd 4, 64(1)
66 ; CHECK-NEXT: stw 3, 52(1)
67 ; CHECK-NEXT: lwz 3, 32(1)
68 ; CHECK-NEXT: lfd 1, 56(1)
69 ; CHECK-NEXT: stw 3, 48(1)
70 ; CHECK-NEXT: lwz 3, 76(1)
71 ; CHECK-NEXT: lfd 2, 48(1)
72 ; CHECK-NEXT: stw 3, 92(1)
73 ; CHECK-NEXT: lwz 3, 72(1)
74 ; CHECK-NEXT: stw 3, 88(1)
75 ; CHECK-NEXT: lwz 3, 68(1)
76 ; CHECK-NEXT: lfd 3, 88(1)
77 ; CHECK-NEXT: stw 3, 84(1)
78 ; CHECK-NEXT: lwz 3, 64(1)
79 ; CHECK-NEXT: stw 3, 80(1)
80 ; CHECK-NEXT: lfd 4, 80(1)
81 ; CHECK-NEXT: bl fminl
82 ; CHECK-NEXT: stfd 1, 16(1)
83 ; CHECK-NEXT: lwz 3, 20(1)
84 ; CHECK-NEXT: stfd 2, 24(1)
85 ; CHECK-NEXT: stw 3, 108(1)
86 ; CHECK-NEXT: lwz 3, 16(1)
87 ; CHECK-NEXT: stw 3, 104(1)
88 ; CHECK-NEXT: lwz 3, 28(1)
89 ; CHECK-NEXT: lfd 1, 104(1)
90 ; CHECK-NEXT: stw 3, 100(1)
91 ; CHECK-NEXT: lwz 3, 24(1)
92 ; CHECK-NEXT: stw 3, 96(1)
93 ; CHECK-NEXT: lfd 2, 96(1)
94 ; CHECK-NEXT: lwz 0, 116(1)
95 ; CHECK-NEXT: addi 1, 1, 112
96 ; CHECK-NEXT: mtlr 0
97 ; CHECK-NEXT: blr
98 %z = call ppc_fp128 @fminl(ppc_fp128 %x, ppc_fp128 %y) readnone
99 ret ppc_fp128 %z
100 }
102 define float @test_intrinsic_fmin_f32(float %x, float %y) {
103 ; CHECK-LABEL: test_intrinsic_fmin_f32:
104 ; CHECK: # %bb.0:
105 ; CHECK-NEXT: mflr 0
106 ; CHECK-NEXT: stwu 1, -16(1)
107 ; CHECK-NEXT: stw 0, 20(1)
108 ; CHECK-NEXT: .cfi_def_cfa_offset 16
109 ; CHECK-NEXT: .cfi_offset lr, 4
110 ; CHECK-NEXT: bl fminf
111 ; CHECK-NEXT: lwz 0, 20(1)
112 ; CHECK-NEXT: addi 1, 1, 16
113 ; CHECK-NEXT: mtlr 0
114 ; CHECK-NEXT: blr
115 %z = call float @llvm.minnum.f32(float %x, float %y) readnone
116 ret float %z
117 }
119 define double @test_intrinsic_fmin_f64(double %x, double %y) {
120 ; CHECK-LABEL: test_intrinsic_fmin_f64:
121 ; CHECK: # %bb.0:
122 ; CHECK-NEXT: mflr 0
123 ; CHECK-NEXT: stwu 1, -16(1)
124 ; CHECK-NEXT: stw 0, 20(1)
125 ; CHECK-NEXT: .cfi_def_cfa_offset 16
126 ; CHECK-NEXT: .cfi_offset lr, 4
127 ; CHECK-NEXT: bl fmin
128 ; CHECK-NEXT: lwz 0, 20(1)
129 ; CHECK-NEXT: addi 1, 1, 16
130 ; CHECK-NEXT: mtlr 0
131 ; CHECK-NEXT: blr
132 %z = call double @llvm.minnum.f64(double %x, double %y) readnone
133 ret double %z
134 }
136 define ppc_fp128 @test_intrinsic_fmin_f128(ppc_fp128 %x, ppc_fp128 %y) {
137 ; CHECK-LABEL: test_intrinsic_fmin_f128:
138 ; CHECK: # %bb.0:
139 ; CHECK-NEXT: mflr 0
140 ; CHECK-NEXT: stwu 1, -112(1)
141 ; CHECK-NEXT: stw 0, 116(1)
142 ; CHECK-NEXT: .cfi_def_cfa_offset 112
143 ; CHECK-NEXT: .cfi_offset lr, 4
144 ; CHECK-NEXT: stfd 1, 40(1)
145 ; CHECK-NEXT: lwz 3, 44(1)
146 ; CHECK-NEXT: stfd 2, 32(1)
147 ; CHECK-NEXT: stw 3, 60(1)
148 ; CHECK-NEXT: lwz 3, 40(1)
149 ; CHECK-NEXT: stfd 3, 72(1)
150 ; CHECK-NEXT: stw 3, 56(1)
151 ; CHECK-NEXT: lwz 3, 36(1)
152 ; CHECK-NEXT: stfd 4, 64(1)
153 ; CHECK-NEXT: stw 3, 52(1)
154 ; CHECK-NEXT: lwz 3, 32(1)
155 ; CHECK-NEXT: lfd 1, 56(1)
156 ; CHECK-NEXT: stw 3, 48(1)
157 ; CHECK-NEXT: lwz 3, 76(1)
158 ; CHECK-NEXT: lfd 2, 48(1)
159 ; CHECK-NEXT: stw 3, 92(1)
160 ; CHECK-NEXT: lwz 3, 72(1)
161 ; CHECK-NEXT: stw 3, 88(1)
162 ; CHECK-NEXT: lwz 3, 68(1)
163 ; CHECK-NEXT: lfd 3, 88(1)
164 ; CHECK-NEXT: stw 3, 84(1)
165 ; CHECK-NEXT: lwz 3, 64(1)
166 ; CHECK-NEXT: stw 3, 80(1)
167 ; CHECK-NEXT: lfd 4, 80(1)
168 ; CHECK-NEXT: bl fminl
169 ; CHECK-NEXT: stfd 1, 16(1)
170 ; CHECK-NEXT: lwz 3, 20(1)
171 ; CHECK-NEXT: stfd 2, 24(1)
172 ; CHECK-NEXT: stw 3, 108(1)
173 ; CHECK-NEXT: lwz 3, 16(1)
174 ; CHECK-NEXT: stw 3, 104(1)
175 ; CHECK-NEXT: lwz 3, 28(1)
176 ; CHECK-NEXT: lfd 1, 104(1)
177 ; CHECK-NEXT: stw 3, 100(1)
178 ; CHECK-NEXT: lwz 3, 24(1)
179 ; CHECK-NEXT: stw 3, 96(1)
180 ; CHECK-NEXT: lfd 2, 96(1)
181 ; CHECK-NEXT: lwz 0, 116(1)
182 ; CHECK-NEXT: addi 1, 1, 112
183 ; CHECK-NEXT: mtlr 0
184 ; CHECK-NEXT: blr
185 %z = call ppc_fp128 @llvm.minnum.ppcf128(ppc_fp128 %x, ppc_fp128 %y) readnone
186 ret ppc_fp128 %z
187 }
189 define <2 x float> @test_intrinsic_fminf_v2f32(<2 x float> %x, <2 x float> %y) {
190 ; CHECK-LABEL: test_intrinsic_fminf_v2f32:
191 ; CHECK: # %bb.0:
192 ; CHECK-NEXT: mflr 0
193 ; CHECK-NEXT: stwu 1, -32(1)
194 ; CHECK-NEXT: stw 0, 36(1)
195 ; CHECK-NEXT: .cfi_def_cfa_offset 32
196 ; CHECK-NEXT: .cfi_offset lr, 4
197 ; CHECK-NEXT: .cfi_offset f29, -24
198 ; CHECK-NEXT: .cfi_offset f30, -16
199 ; CHECK-NEXT: .cfi_offset f31, -8
200 ; CHECK-NEXT: stfd 30, 16(1) # 8-byte Folded Spill
201 ; CHECK-NEXT: fmr 30, 2
202 ; CHECK-NEXT: fmr 2, 3
203 ; CHECK-NEXT: stfd 29, 8(1) # 8-byte Folded Spill
204 ; CHECK-NEXT: stfd 31, 24(1) # 8-byte Folded Spill
205 ; CHECK-NEXT: fmr 31, 4
206 ; CHECK-NEXT: bl fminf
207 ; CHECK-NEXT: fmr 29, 1
208 ; CHECK-NEXT: fmr 1, 30
209 ; CHECK-NEXT: fmr 2, 31
210 ; CHECK-NEXT: bl fminf
211 ; CHECK-NEXT: fmr 2, 1
212 ; CHECK-NEXT: fmr 1, 29
213 ; CHECK-NEXT: lfd 31, 24(1) # 8-byte Folded Reload
214 ; CHECK-NEXT: lfd 30, 16(1) # 8-byte Folded Reload
215 ; CHECK-NEXT: lfd 29, 8(1) # 8-byte Folded Reload
216 ; CHECK-NEXT: lwz 0, 36(1)
217 ; CHECK-NEXT: addi 1, 1, 32
218 ; CHECK-NEXT: mtlr 0
219 ; CHECK-NEXT: blr
220 %z = call <2 x float> @llvm.minnum.v2f32(<2 x float> %x, <2 x float> %y) readnone
221 ret <2 x float> %z
222 }
224 define <4 x float> @test_intrinsic_fmin_v4f32(<4 x float> %x, <4 x float> %y) {
225 ; CHECK-LABEL: test_intrinsic_fmin_v4f32:
226 ; CHECK: # %bb.0:
227 ; CHECK-NEXT: mflr 0
228 ; CHECK-NEXT: stwu 1, -64(1)
229 ; CHECK-NEXT: stw 0, 68(1)
230 ; CHECK-NEXT: .cfi_def_cfa_offset 64
231 ; CHECK-NEXT: .cfi_offset lr, 4
232 ; CHECK-NEXT: .cfi_offset f25, -56
233 ; CHECK-NEXT: .cfi_offset f26, -48
234 ; CHECK-NEXT: .cfi_offset f27, -40
235 ; CHECK-NEXT: .cfi_offset f28, -32
236 ; CHECK-NEXT: .cfi_offset f29, -24
237 ; CHECK-NEXT: .cfi_offset f30, -16
238 ; CHECK-NEXT: .cfi_offset f31, -8
239 ; CHECK-NEXT: stfd 26, 16(1) # 8-byte Folded Spill
240 ; CHECK-NEXT: fmr 26, 2
241 ; CHECK-NEXT: fmr 2, 5
242 ; CHECK-NEXT: stfd 25, 8(1) # 8-byte Folded Spill
243 ; CHECK-NEXT: stfd 27, 24(1) # 8-byte Folded Spill
244 ; CHECK-NEXT: fmr 27, 3
245 ; CHECK-NEXT: stfd 28, 32(1) # 8-byte Folded Spill
246 ; CHECK-NEXT: fmr 28, 4
247 ; CHECK-NEXT: stfd 29, 40(1) # 8-byte Folded Spill
248 ; CHECK-NEXT: fmr 29, 6
249 ; CHECK-NEXT: stfd 30, 48(1) # 8-byte Folded Spill
250 ; CHECK-NEXT: fmr 30, 7
251 ; CHECK-NEXT: stfd 31, 56(1) # 8-byte Folded Spill
252 ; CHECK-NEXT: fmr 31, 8
253 ; CHECK-NEXT: bl fminf
254 ; CHECK-NEXT: fmr 25, 1
255 ; CHECK-NEXT: fmr 1, 26
256 ; CHECK-NEXT: fmr 2, 29
257 ; CHECK-NEXT: bl fminf
258 ; CHECK-NEXT: fmr 29, 1
259 ; CHECK-NEXT: fmr 1, 27
260 ; CHECK-NEXT: fmr 2, 30
261 ; CHECK-NEXT: bl fminf
262 ; CHECK-NEXT: fmr 30, 1
263 ; CHECK-NEXT: fmr 1, 28
264 ; CHECK-NEXT: fmr 2, 31
265 ; CHECK-NEXT: bl fminf
266 ; CHECK-NEXT: fmr 4, 1
267 ; CHECK-NEXT: fmr 1, 25
268 ; CHECK-NEXT: fmr 2, 29
269 ; CHECK-NEXT: fmr 3, 30
270 ; CHECK-NEXT: lfd 31, 56(1) # 8-byte Folded Reload
271 ; CHECK-NEXT: lfd 30, 48(1) # 8-byte Folded Reload
272 ; CHECK-NEXT: lfd 29, 40(1) # 8-byte Folded Reload
273 ; CHECK-NEXT: lfd 28, 32(1) # 8-byte Folded Reload
274 ; CHECK-NEXT: lfd 27, 24(1) # 8-byte Folded Reload
275 ; CHECK-NEXT: lfd 26, 16(1) # 8-byte Folded Reload
276 ; CHECK-NEXT: lfd 25, 8(1) # 8-byte Folded Reload
277 ; CHECK-NEXT: lwz 0, 68(1)
278 ; CHECK-NEXT: addi 1, 1, 64
279 ; CHECK-NEXT: mtlr 0
280 ; CHECK-NEXT: blr
281 %z = call <4 x float> @llvm.minnum.v4f32(<4 x float> %x, <4 x float> %y) readnone
282 ret <4 x float> %z
283 }
285 define <8 x float> @test_intrinsic_fmin_v8f32(<8 x float> %x, <8 x float> %y) {
286 ; CHECK-LABEL: test_intrinsic_fmin_v8f32:
287 ; CHECK: # %bb.0:
288 ; CHECK-NEXT: mflr 0
289 ; CHECK-NEXT: stwu 1, -128(1)
290 ; CHECK-NEXT: stw 0, 132(1)
291 ; CHECK-NEXT: .cfi_def_cfa_offset 128
292 ; CHECK-NEXT: .cfi_offset lr, 4
293 ; CHECK-NEXT: .cfi_offset f17, -120
294 ; CHECK-NEXT: .cfi_offset f18, -112
295 ; CHECK-NEXT: .cfi_offset f19, -104
296 ; CHECK-NEXT: .cfi_offset f20, -96
297 ; CHECK-NEXT: .cfi_offset f21, -88
298 ; CHECK-NEXT: .cfi_offset f22, -80
299 ; CHECK-NEXT: .cfi_offset f23, -72
300 ; CHECK-NEXT: .cfi_offset f24, -64
301 ; CHECK-NEXT: .cfi_offset f25, -56
302 ; CHECK-NEXT: .cfi_offset f26, -48
303 ; CHECK-NEXT: .cfi_offset f27, -40
304 ; CHECK-NEXT: .cfi_offset f28, -32
305 ; CHECK-NEXT: .cfi_offset f29, -24
306 ; CHECK-NEXT: .cfi_offset f30, -16
307 ; CHECK-NEXT: .cfi_offset f31, -8
308 ; CHECK-NEXT: stfd 25, 72(1) # 8-byte Folded Spill
309 ; CHECK-NEXT: fmr 25, 2
310 ; CHECK-NEXT: lfs 2, 136(1)
311 ; CHECK-NEXT: stfd 17, 8(1) # 8-byte Folded Spill
312 ; CHECK-NEXT: stfd 18, 16(1) # 8-byte Folded Spill
313 ; CHECK-NEXT: stfd 19, 24(1) # 8-byte Folded Spill
314 ; CHECK-NEXT: stfd 20, 32(1) # 8-byte Folded Spill
315 ; CHECK-NEXT: stfd 21, 40(1) # 8-byte Folded Spill
316 ; CHECK-NEXT: stfd 22, 48(1) # 8-byte Folded Spill
317 ; CHECK-NEXT: stfd 23, 56(1) # 8-byte Folded Spill
318 ; CHECK-NEXT: stfd 24, 64(1) # 8-byte Folded Spill
319 ; CHECK-NEXT: stfd 26, 80(1) # 8-byte Folded Spill
320 ; CHECK-NEXT: fmr 26, 3
321 ; CHECK-NEXT: stfd 27, 88(1) # 8-byte Folded Spill
322 ; CHECK-NEXT: fmr 27, 4
323 ; CHECK-NEXT: stfd 28, 96(1) # 8-byte Folded Spill
324 ; CHECK-NEXT: fmr 28, 5
325 ; CHECK-NEXT: stfd 29, 104(1) # 8-byte Folded Spill
326 ; CHECK-NEXT: fmr 29, 6
327 ; CHECK-NEXT: stfd 30, 112(1) # 8-byte Folded Spill
328 ; CHECK-NEXT: fmr 30, 7
329 ; CHECK-NEXT: stfd 31, 120(1) # 8-byte Folded Spill
330 ; CHECK-NEXT: fmr 31, 8
331 ; CHECK-NEXT: lfs 24, 164(1)
332 ; CHECK-NEXT: lfs 23, 160(1)
333 ; CHECK-NEXT: lfs 22, 156(1)
334 ; CHECK-NEXT: lfs 21, 152(1)
335 ; CHECK-NEXT: lfs 20, 148(1)
336 ; CHECK-NEXT: lfs 19, 144(1)
337 ; CHECK-NEXT: lfs 18, 140(1)
338 ; CHECK-NEXT: bl fminf
339 ; CHECK-NEXT: fmr 17, 1
340 ; CHECK-NEXT: fmr 1, 25
341 ; CHECK-NEXT: fmr 2, 18
342 ; CHECK-NEXT: bl fminf
343 ; CHECK-NEXT: fmr 25, 1
344 ; CHECK-NEXT: fmr 1, 26
345 ; CHECK-NEXT: fmr 2, 19
346 ; CHECK-NEXT: bl fminf
347 ; CHECK-NEXT: fmr 26, 1
348 ; CHECK-NEXT: fmr 1, 27
349 ; CHECK-NEXT: fmr 2, 20
350 ; CHECK-NEXT: bl fminf
351 ; CHECK-NEXT: fmr 27, 1
352 ; CHECK-NEXT: fmr 1, 28
353 ; CHECK-NEXT: fmr 2, 21
354 ; CHECK-NEXT: bl fminf
355 ; CHECK-NEXT: fmr 28, 1
356 ; CHECK-NEXT: fmr 1, 29
357 ; CHECK-NEXT: fmr 2, 22
358 ; CHECK-NEXT: bl fminf
359 ; CHECK-NEXT: fmr 29, 1
360 ; CHECK-NEXT: fmr 1, 30
361 ; CHECK-NEXT: fmr 2, 23
362 ; CHECK-NEXT: bl fminf
363 ; CHECK-NEXT: fmr 30, 1
364 ; CHECK-NEXT: fmr 1, 31
365 ; CHECK-NEXT: fmr 2, 24
366 ; CHECK-NEXT: bl fminf
367 ; CHECK-NEXT: fmr 8, 1
368 ; CHECK-NEXT: fmr 1, 17
369 ; CHECK-NEXT: fmr 2, 25
370 ; CHECK-NEXT: fmr 3, 26
371 ; CHECK-NEXT: fmr 4, 27
372 ; CHECK-NEXT: fmr 5, 28
373 ; CHECK-NEXT: fmr 6, 29
374 ; CHECK-NEXT: fmr 7, 30
375 ; CHECK-NEXT: lfd 31, 120(1) # 8-byte Folded Reload
376 ; CHECK-NEXT: lfd 30, 112(1) # 8-byte Folded Reload
377 ; CHECK-NEXT: lfd 29, 104(1) # 8-byte Folded Reload
378 ; CHECK-NEXT: lfd 28, 96(1) # 8-byte Folded Reload
379 ; CHECK-NEXT: lfd 27, 88(1) # 8-byte Folded Reload
380 ; CHECK-NEXT: lfd 26, 80(1) # 8-byte Folded Reload
381 ; CHECK-NEXT: lfd 25, 72(1) # 8-byte Folded Reload
382 ; CHECK-NEXT: lfd 24, 64(1) # 8-byte Folded Reload
383 ; CHECK-NEXT: lfd 23, 56(1) # 8-byte Folded Reload
384 ; CHECK-NEXT: lfd 22, 48(1) # 8-byte Folded Reload
385 ; CHECK-NEXT: lfd 21, 40(1) # 8-byte Folded Reload
386 ; CHECK-NEXT: lfd 20, 32(1) # 8-byte Folded Reload
387 ; CHECK-NEXT: lfd 19, 24(1) # 8-byte Folded Reload
388 ; CHECK-NEXT: lfd 18, 16(1) # 8-byte Folded Reload
389 ; CHECK-NEXT: lfd 17, 8(1) # 8-byte Folded Reload
390 ; CHECK-NEXT: lwz 0, 132(1)
391 ; CHECK-NEXT: addi 1, 1, 128
392 ; CHECK-NEXT: mtlr 0
393 ; CHECK-NEXT: blr
394 %z = call <8 x float> @llvm.minnum.v8f32(<8 x float> %x, <8 x float> %y) readnone
395 ret <8 x float> %z
396 }
398 define ppc_fp128 @fminnum_const(ppc_fp128 %0) {
399 ; CHECK-LABEL: fminnum_const:
400 ; CHECK: # %bb.0:
401 ; CHECK-NEXT: mflr 0
402 ; CHECK-NEXT: stwu 1, -96(1)
403 ; CHECK-NEXT: stw 0, 100(1)
404 ; CHECK-NEXT: .cfi_def_cfa_offset 96
405 ; CHECK-NEXT: .cfi_offset lr, 4
406 ; CHECK-NEXT: stfd 1, 40(1)
407 ; CHECK-NEXT: li 3, 0
408 ; CHECK-NEXT: stw 3, 76(1)
409 ; CHECK-NEXT: lis 4, 16368
410 ; CHECK-NEXT: stw 3, 68(1)
411 ; CHECK-NEXT: stw 3, 64(1)
412 ; CHECK-NEXT: lwz 3, 44(1)
413 ; CHECK-NEXT: stfd 2, 32(1)
414 ; CHECK-NEXT: stw 3, 60(1)
415 ; CHECK-NEXT: lwz 3, 40(1)
416 ; CHECK-NEXT: stw 4, 72(1)
417 ; CHECK-NEXT: stw 3, 56(1)
418 ; CHECK-NEXT: lwz 3, 36(1)
419 ; CHECK-NEXT: lfd 3, 72(1)
420 ; CHECK-NEXT: stw 3, 52(1)
421 ; CHECK-NEXT: lwz 3, 32(1)
422 ; CHECK-NEXT: lfd 4, 64(1)
423 ; CHECK-NEXT: stw 3, 48(1)
424 ; CHECK-NEXT: lfd 1, 56(1)
425 ; CHECK-NEXT: lfd 2, 48(1)
426 ; CHECK-NEXT: bl fminl
427 ; CHECK-NEXT: stfd 1, 16(1)
428 ; CHECK-NEXT: lwz 3, 20(1)
429 ; CHECK-NEXT: stfd 2, 24(1)
430 ; CHECK-NEXT: stw 3, 92(1)
431 ; CHECK-NEXT: lwz 3, 16(1)
432 ; CHECK-NEXT: stw 3, 88(1)
433 ; CHECK-NEXT: lwz 3, 28(1)
434 ; CHECK-NEXT: lfd 1, 88(1)
435 ; CHECK-NEXT: stw 3, 84(1)
436 ; CHECK-NEXT: lwz 3, 24(1)
437 ; CHECK-NEXT: stw 3, 80(1)
438 ; CHECK-NEXT: lfd 2, 80(1)
439 ; CHECK-NEXT: lwz 0, 100(1)
440 ; CHECK-NEXT: addi 1, 1, 96
441 ; CHECK-NEXT: mtlr 0
442 ; CHECK-NEXT: blr
443 %2 = tail call fast ppc_fp128 @llvm.minnum.ppcf128(ppc_fp128 %0, ppc_fp128 0xM3FF00000000000000000000000000000)
444 ret ppc_fp128 %2
445 }