| blob | c4807f58c167deb9a74e8252f17e8e9c6e4bae6a |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-- -mcpu=pwr7 %s -o - | FileCheck %s --check-prefix=PWR7
3 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-- -mcpu=pwr9 %s -o - | FileCheck %s --check-prefix=PWR9
5 @value8 = dso_local global { i8 } zeroinitializer, align 1
6 @value16 = dso_local global { i16 } zeroinitializer, align 2
7 @global_int = dso_local local_unnamed_addr global i32 0, align 4
9 define dso_local zeroext i32 @testI8(i8 zeroext %val) local_unnamed_addr #0 {
10 ; PWR7-LABEL: testI8:
11 ; PWR7: # %bb.0: # %entry
12 ; PWR7-NEXT: addis 4, 2, value8@toc@ha
13 ; PWR7-NEXT: li 6, 255
14 ; PWR7-NEXT: sync
15 ; PWR7-NEXT: addi 5, 4, value8@toc@l
16 ; PWR7-NEXT: rlwinm 4, 5, 3, 27, 28
17 ; PWR7-NEXT: rldicr 5, 5, 0, 61
18 ; PWR7-NEXT: xori 4, 4, 24
19 ; PWR7-NEXT: slw 7, 3, 4
20 ; PWR7-NEXT: slw 3, 6, 4
21 ; PWR7-NEXT: and 6, 7, 3
22 ; PWR7-NEXT: .LBB0_1: # %entry
23 ; PWR7-NEXT: #
24 ; PWR7-NEXT: lwarx 7, 0, 5
25 ; PWR7-NEXT: andc 8, 7, 3
26 ; PWR7-NEXT: or 8, 6, 8
27 ; PWR7-NEXT: stwcx. 8, 0, 5
28 ; PWR7-NEXT: bne 0, .LBB0_1
29 ; PWR7-NEXT: # %bb.2: # %entry
30 ; PWR7-NEXT: srw 3, 7, 4
31 ; PWR7-NEXT: addis 5, 2, global_int@toc@ha
32 ; PWR7-NEXT: lwsync
33 ; PWR7-NEXT: clrlwi 4, 3, 24
34 ; PWR7-NEXT: li 3, 55
35 ; PWR7-NEXT: stw 4, global_int@toc@l(5)
36 ; PWR7-NEXT: blr
37 ;
38 ; PWR9-LABEL: testI8:
39 ; PWR9: # %bb.0: # %entry
40 ; PWR9-NEXT: addis 4, 2, value8@toc@ha
41 ; PWR9-NEXT: sync
42 ; PWR9-NEXT: addi 5, 4, value8@toc@l
43 ; PWR9-NEXT: .LBB0_1: # %entry
44 ; PWR9-NEXT: #
45 ; PWR9-NEXT: lbarx 4, 0, 5
46 ; PWR9-NEXT: stbcx. 3, 0, 5
47 ; PWR9-NEXT: bne 0, .LBB0_1
48 ; PWR9-NEXT: # %bb.2: # %entry
49 ; PWR9-NEXT: addis 3, 2, global_int@toc@ha
50 ; PWR9-NEXT: lwsync
51 ; PWR9-NEXT: stw 4, global_int@toc@l(3)
52 ; PWR9-NEXT: li 3, 55
53 ; PWR9-NEXT: blr
54 entry:
55 %0 = atomicrmw xchg ptr @value8, i8 %val seq_cst, align 1
56 %conv = zext i8 %0 to i32
57 store i32 %conv, ptr @global_int, align 4
58 ret i32 55
59 }
61 define dso_local zeroext i32 @testI16(i16 zeroext %val) local_unnamed_addr #0 {
62 ; PWR7-LABEL: testI16:
63 ; PWR7: # %bb.0: # %entry
64 ; PWR7-NEXT: addis 4, 2, value16@toc@ha
65 ; PWR7-NEXT: li 6, 0
66 ; PWR7-NEXT: sync
67 ; PWR7-NEXT: addi 5, 4, value16@toc@l
68 ; PWR7-NEXT: ori 6, 6, 65535
69 ; PWR7-NEXT: rlwinm 4, 5, 3, 27, 27
70 ; PWR7-NEXT: rldicr 5, 5, 0, 61
71 ; PWR7-NEXT: xori 4, 4, 16
72 ; PWR7-NEXT: slw 7, 3, 4
73 ; PWR7-NEXT: slw 3, 6, 4
74 ; PWR7-NEXT: and 6, 7, 3
75 ; PWR7-NEXT: .LBB1_1: # %entry
76 ; PWR7-NEXT: #
77 ; PWR7-NEXT: lwarx 7, 0, 5
78 ; PWR7-NEXT: andc 8, 7, 3
79 ; PWR7-NEXT: or 8, 6, 8
80 ; PWR7-NEXT: stwcx. 8, 0, 5
81 ; PWR7-NEXT: bne 0, .LBB1_1
82 ; PWR7-NEXT: # %bb.2: # %entry
83 ; PWR7-NEXT: srw 3, 7, 4
84 ; PWR7-NEXT: addis 5, 2, global_int@toc@ha
85 ; PWR7-NEXT: lwsync
86 ; PWR7-NEXT: clrlwi 4, 3, 16
87 ; PWR7-NEXT: li 3, 55
88 ; PWR7-NEXT: stw 4, global_int@toc@l(5)
89 ; PWR7-NEXT: blr
90 ;
91 ; PWR9-LABEL: testI16:
92 ; PWR9: # %bb.0: # %entry
93 ; PWR9-NEXT: addis 4, 2, value16@toc@ha
94 ; PWR9-NEXT: sync
95 ; PWR9-NEXT: addi 5, 4, value16@toc@l
96 ; PWR9-NEXT: .LBB1_1: # %entry
97 ; PWR9-NEXT: #
98 ; PWR9-NEXT: lharx 4, 0, 5
99 ; PWR9-NEXT: sthcx. 3, 0, 5
100 ; PWR9-NEXT: bne 0, .LBB1_1
101 ; PWR9-NEXT: # %bb.2: # %entry
102 ; PWR9-NEXT: addis 3, 2, global_int@toc@ha
103 ; PWR9-NEXT: lwsync
104 ; PWR9-NEXT: stw 4, global_int@toc@l(3)
105 ; PWR9-NEXT: li 3, 55
106 ; PWR9-NEXT: blr
107 entry:
108 %0 = atomicrmw xchg ptr @value16, i16 %val seq_cst, align 2
109 %conv = zext i16 %0 to i32
110 store i32 %conv, ptr @global_int, align 4
111 ret i32 55
112 }
114 attributes #0 = { nounwind }