1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -O2 \
3 ; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
4 ; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
5 ; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu -O2 \
6 ; RUN: -ppc-gpr-icmps=all -ppc-asm-full-reg-names -mcpu=pwr8 < %s | FileCheck %s \
7 ; RUN: --implicit-check-not cmpw --implicit-check-not cmpd --implicit-check-not cmpl
9 @glob = dso_local local_unnamed_addr global i32 0, align 4
11 ; Function Attrs: norecurse nounwind readnone
12 define dso_local signext i32 @test_iltui(i32 zeroext %a, i32 zeroext %b) {
13 ; CHECK-LABEL: test_iltui:
14 ; CHECK: # %bb.0: # %entry
15 ; CHECK-NEXT: sub r3, r3, r4
16 ; CHECK-NEXT: rldicl r3, r3, 1, 63
19 %cmp = icmp ult i32 %a, %b
20 %conv = zext i1 %cmp to i32
24 ; Function Attrs: norecurse nounwind readnone
25 define dso_local signext i32 @test_iltui_sext(i32 zeroext %a, i32 zeroext %b) {
26 ; CHECK-LABEL: test_iltui_sext:
27 ; CHECK: # %bb.0: # %entry
28 ; CHECK-NEXT: sub r3, r3, r4
29 ; CHECK-NEXT: sradi r3, r3, 63
32 %cmp = icmp ult i32 %a, %b
33 %sub = sext i1 %cmp to i32
37 ; Function Attrs: norecurse nounwind
38 define dso_local void @test_iltui_store(i32 zeroext %a, i32 zeroext %b) {
39 ; CHECK-LABEL: test_iltui_store:
40 ; CHECK: # %bb.0: # %entry
41 ; CHECK-NEXT: sub r3, r3, r4
42 ; CHECK-NEXT: addis r4, r2, glob@toc@ha
43 ; CHECK-NEXT: rldicl r3, r3, 1, 63
44 ; CHECK-NEXT: stw r3, glob@toc@l(r4)
47 %cmp = icmp ult i32 %a, %b
48 %conv = zext i1 %cmp to i32
49 store i32 %conv, ptr @glob, align 4
53 ; Function Attrs: norecurse nounwind
54 define dso_local void @test_iltui_sext_store(i32 zeroext %a, i32 zeroext %b) {
55 ; CHECK-LABEL: test_iltui_sext_store:
56 ; CHECK: # %bb.0: # %entry
57 ; CHECK-NEXT: sub r3, r3, r4
58 ; CHECK-NEXT: addis r4, r2, glob@toc@ha
59 ; CHECK-NEXT: sradi r3, r3, 63
60 ; CHECK-NEXT: stw r3, glob@toc@l(r4)
63 %cmp = icmp ult i32 %a, %b
64 %sub = sext i1 %cmp to i32
65 store i32 %sub, ptr @glob, align 4