llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-imms.td

   1 // RUN: llvm-tblgen -I %p/../../../include -gen-global-isel-combiner \
   2 // RUN:     -combiners=MyCombiner %s | \
   3 // RUN: FileCheck %s
   4
   5 include "llvm/Target/Target.td"
   6 include "llvm/Target/GlobalISel/Combine.td"
   7
   8 def MyTargetISA : InstrInfo;
   9 def MyTarget : Target { let InstructionSet = MyTargetISA; }
  10
  11 // emits a imm
  12 def InstTest0 : GICombineRule<
  13   (defs root:$a),
  14   (match (COPY $a, (i32 0))),
  15   (apply (COPY $a, 0))>;
  16
  17 // implicitly emits a G_CONSTANT
  18 def InstTest1 : GICombineRule<
  19   (defs root:$a),
  20   (match (G_ZEXT $a, 0)),
  21   (apply (COPY $a, (i32 0)))>;
  22
  23 // emits a CImm because G_CONSTANT is a special case.
  24 def CImmInstTest1 : GICombineRule<
  25   (defs root:$a),
  26   (match (G_CONSTANT $a, (i32 0))),
  27   (apply (G_CONSTANT $a, (i32 42)))>;
  28
  29 def MyCombiner: GICombiner<"GenMyCombiner", [
  30   InstTest0,
  31   InstTest1,
  32   CImmInstTest1
  33 ]>;
  34
  35 // CHECK:      const int64_t *GenMyCombiner::getMatchTable() const {
  36 // CHECK-NEXT:   constexpr static int64_t MatchTable0[] = {
  37 // CHECK-NEXT:     GIM_Try, /*On fail goto*//*Label 0*/ 28, // Rule ID 0 //
  38 // CHECK-NEXT:       GIM_CheckSimplePredicate, GICXXPred_Simple_IsRule0Enabled,
  39 // CHECK-NEXT:       GIM_CheckOpcode, /*MI*/0, TargetOpcode::COPY,
  40 // CHECK-NEXT:       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
  41 // CHECK-NEXT:       // MIs[0] a
  42 // CHECK-NEXT:       // No operand predicates
  43 // CHECK-NEXT:       GIM_CheckConstantInt, /*MI*/0, /*Op*/1, 0,
  44 // CHECK-NEXT:       // Combiner Rule #0: InstTest0
  45 // CHECK-NEXT:       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
  46 // CHECK-NEXT:       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // a
  47 // CHECK-NEXT:       GIR_AddImm, /*InsnID*/0, /*Imm*/0,
  48 // CHECK-NEXT:       GIR_EraseFromParent, /*InsnID*/0,
  49 // CHECK-NEXT:       GIR_Done,
  50 // CHECK-NEXT:     // Label 0: @28
  51 // CHECK-NEXT:     GIM_Try, /*On fail goto*//*Label 1*/ 67, // Rule ID 1 //
  52 // CHECK-NEXT:       GIM_CheckSimplePredicate, GICXXPred_Simple_IsRule1Enabled,
  53 // CHECK-NEXT:       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ZEXT,
  54 // CHECK-NEXT:       // MIs[0] a
  55 // CHECK-NEXT:       // No operand predicates
  56 // CHECK-NEXT:       // MIs[0] Operand 1
  57 // CHECK-NEXT:       GIM_CheckConstantInt, /*MI*/0, /*Op*/1, 0,
  58 // CHECK-NEXT:       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
  59 // CHECK-NEXT:       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::G_CONSTANT,
  60 // CHECK-NEXT:       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/0,
  61 // CHECK-NEXT:       GIR_AddCImm, /*InsnID*/1, /*Type*/GILLT_s32, /*Imm*/0,
  62 // CHECK-NEXT:       // Combiner Rule #1: InstTest1
  63 // CHECK-NEXT:       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
  64 // CHECK-NEXT:       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // a
  65 // CHECK-NEXT:       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
  66 // CHECK-NEXT:       GIR_EraseFromParent, /*InsnID*/0,
  67 // CHECK-NEXT:       GIR_Done,
  68 // CHECK-NEXT:     // Label 1: @67
  69 // CHECK-NEXT:     GIM_Try, /*On fail goto*//*Label 2*/ 96, // Rule ID 2 //
  70 // CHECK-NEXT:       GIM_CheckSimplePredicate, GICXXPred_Simple_IsRule2Enabled,
  71 // CHECK-NEXT:       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_CONSTANT,
  72 // CHECK-NEXT:       GIM_CheckType, /*MI*/0, /*Op*/1, /*Type*/GILLT_s32,
  73 // CHECK-NEXT:       // MIs[0] a
  74 // CHECK-NEXT:       // No operand predicates
  75 // CHECK-NEXT:       GIM_CheckLiteralInt, /*MI*/0, /*Op*/1, 0,
  76 // CHECK-NEXT:       // Combiner Rule #2: CImmInstTest1
  77 // CHECK-NEXT:       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::G_CONSTANT,
  78 // CHECK-NEXT:       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // a
  79 // CHECK-NEXT:       GIR_AddCImm, /*InsnID*/0, /*Type*/GILLT_s32, /*Imm*/42,
  80 // CHECK-NEXT:       GIR_EraseFromParent, /*InsnID*/0,
  81 // CHECK-NEXT:       GIR_Done,
  82 // CHECK-NEXT:     // Label 2: @96
  83 // CHECK-NEXT:     GIM_Reject,
  84 // CHECK-NEXT:     };
  85 // CHECK-NEXT:   return MatchTable0;
  86 // CHECK-NEXT: }