llvm/test/TableGen/GlobalISelCombinerEmitter/match-table-patfrag-root.td

   1 // RUN: llvm-tblgen -I %p/../../../include -gen-global-isel-combiner \
   2 // RUN:     -combiners=MyCombiner -gicombiner-debug-cxxpreds %s | \
   3 // RUN: FileCheck %s
   4
   5 include "llvm/Target/Target.td"
   6 include "llvm/Target/GlobalISel/Combine.td"
   7
   8 def MyTargetISA : InstrInfo;
   9 def MyTarget : Target { let InstructionSet = MyTargetISA; }
  10
  11 def MatchFooPerms: GICombinePatFrag<
  12     (outs root:$foo),
  13     (ins gi_imm:$cst),
  14     [
  15       (pattern (G_ZEXT $foo, $b), (G_TRUNC $b, $x):$dbg0),
  16       (pattern (G_TRUNC $foo, $z):$dbg1),
  17       (pattern (G_FPEXT $foo, $z):$dbg1)
  18     ]>;
  19
  20 def Test0 : GICombineRule<
  21   (defs root:$root),
  22   (match (MatchFooPerms $root, (i32 10))),
  23   (apply (COPY $root, (i32 0)))>;
  24
  25 def MyCombiner: GICombiner<"GenMyCombiner", [
  26   Test0
  27 ]>;
  28
  29 // CHECK:      const int64_t *GenMyCombiner::getMatchTable() const {
  30 // CHECK-NEXT:   constexpr static int64_t MatchTable0[] = {
  31 // CHECK-NEXT:     GIM_Try, /*On fail goto*//*Label 0*/ 44, // Rule ID 0 //
  32 // CHECK-NEXT:       GIM_CheckSimplePredicate, GICXXPred_Simple_IsRule0Enabled,
  33 // CHECK-NEXT:       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_ZEXT,
  34 // CHECK-NEXT:       // MIs[0] root
  35 // CHECK-NEXT:       // No operand predicates
  36 // CHECK-NEXT:       // MIs[0] __Test0_match_0.b
  37 // CHECK-NEXT:       GIM_RecordInsnIgnoreCopies, /*DefineMI*/1, /*MI*/0, /*OpIdx*/1, // MIs[1]
  38 // CHECK-NEXT:       GIM_CheckOpcode, /*MI*/1, TargetOpcode::G_TRUNC,
  39 // CHECK-NEXT:       // MIs[1] __Test0_match_0.x
  40 // CHECK-NEXT:       // No operand predicates
  41 // CHECK-NEXT:       GIM_CheckIsSafeToFold, /*InsnID*/1,
  42 // CHECK-NEXT:       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
  43 // CHECK-NEXT:       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::G_CONSTANT,
  44 // CHECK-NEXT:       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/0,
  45 // CHECK-NEXT:       GIR_AddCImm, /*InsnID*/1, /*Type*/GILLT_s32, /*Imm*/0,
  46 // CHECK-NEXT:       // Combiner Rule #0: Test0 @ [__Test0_match_0[0]]
  47 // CHECK-NEXT:       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
  48 // CHECK-NEXT:       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // root
  49 // CHECK-NEXT:       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
  50 // CHECK-NEXT:       GIR_EraseFromParent, /*InsnID*/0,
  51 // CHECK-NEXT:       GIR_Done,
  52 // CHECK-NEXT:     // Label 0: @44
  53 // CHECK-NEXT:     GIM_Try, /*On fail goto*//*Label 1*/ 79, // Rule ID 1 //
  54 // CHECK-NEXT:       GIM_CheckSimplePredicate, GICXXPred_Simple_IsRule0Enabled,
  55 // CHECK-NEXT:       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_TRUNC,
  56 // CHECK-NEXT:       // MIs[0] root
  57 // CHECK-NEXT:       // No operand predicates
  58 // CHECK-NEXT:       // MIs[0] __Test0_match_0.z
  59 // CHECK-NEXT:       // No operand predicates
  60 // CHECK-NEXT:       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
  61 // CHECK-NEXT:       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::G_CONSTANT,
  62 // CHECK-NEXT:       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/0,
  63 // CHECK-NEXT:       GIR_AddCImm, /*InsnID*/1, /*Type*/GILLT_s32, /*Imm*/0,
  64 // CHECK-NEXT:       // Combiner Rule #0: Test0 @ [__Test0_match_0[1]]
  65 // CHECK-NEXT:       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
  66 // CHECK-NEXT:       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // root
  67 // CHECK-NEXT:       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
  68 // CHECK-NEXT:       GIR_EraseFromParent, /*InsnID*/0,
  69 // CHECK-NEXT:       GIR_Done,
  70 // CHECK-NEXT:     // Label 1: @79
  71 // CHECK-NEXT:     GIM_Try, /*On fail goto*//*Label 2*/ 114, // Rule ID 2 //
  72 // CHECK-NEXT:       GIM_CheckSimplePredicate, GICXXPred_Simple_IsRule0Enabled,
  73 // CHECK-NEXT:       GIM_CheckOpcode, /*MI*/0, TargetOpcode::G_FPEXT,
  74 // CHECK-NEXT:       // MIs[0] root
  75 // CHECK-NEXT:       // No operand predicates
  76 // CHECK-NEXT:       // MIs[0] __Test0_match_0.z
  77 // CHECK-NEXT:       // No operand predicates
  78 // CHECK-NEXT:       GIR_MakeTempReg, /*TempRegID*/0, /*TypeID*/GILLT_s32,
  79 // CHECK-NEXT:       GIR_BuildMI, /*InsnID*/1, /*Opcode*/TargetOpcode::G_CONSTANT,
  80 // CHECK-NEXT:       GIR_AddTempRegister, /*InsnID*/1, /*TempRegID*/0, /*TempRegFlags*/0,
  81 // CHECK-NEXT:       GIR_AddCImm, /*InsnID*/1, /*Type*/GILLT_s32, /*Imm*/0,
  82 // CHECK-NEXT:       // Combiner Rule #0: Test0 @ [__Test0_match_0[2]]
  83 // CHECK-NEXT:       GIR_BuildMI, /*InsnID*/0, /*Opcode*/TargetOpcode::COPY,
  84 // CHECK-NEXT:       GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // root
  85 // CHECK-NEXT:       GIR_AddTempRegister, /*InsnID*/0, /*TempRegID*/0, /*TempRegFlags*/0,
  86 // CHECK-NEXT:       GIR_EraseFromParent, /*InsnID*/0,
  87 // CHECK-NEXT:       GIR_Done,
  88 // CHECK-NEXT:     // Label 2: @114
  89 // CHECK-NEXT:     GIM_Reject,
  90 // CHECK-NEXT:     };
  91 // CHECK-NEXT:   return MatchTable0;
  92 // CHECK-NEXT: }