1 ; RUN: llc < %s -mtriple=armv7-eabi -mcpu=cortex-a8
4 module asm ".globl\09__aeabi_f2lz"
5 module asm ".set\09__aeabi_f2lz, __fixsfdi"
8 define arm_aapcs_vfpcc i64 @__fixsfdi(float %a) nounwind {
10 %0 = fcmp olt float %a, 0.000000e+00 ; <i1> [#uses=1]
11 br i1 %0, label %bb, label %bb1
14 %1 = fsub float -0.000000e+00, %a ; <float> [#uses=1]
15 %2 = tail call arm_aapcs_vfpcc i64 @__fixunssfdi(float %1) nounwind ; <i64> [#uses=1]
16 %3 = sub i64 0, %2 ; <i64> [#uses=1]
20 %4 = tail call arm_aapcs_vfpcc i64 @__fixunssfdi(float %a) nounwind ; <i64> [#uses=1]
24 declare arm_aapcs_vfpcc i64 @__fixunssfdi(float)