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1 User Guides\r
2 ===========\r
3 \r
4 NOTE: If you are a user who is only interested in using an LLVM-based compiler,\r
5 you should look into `Clang <https://clang.llvm.org>`_ instead. The\r
6 documentation here is intended for users who have a need to work with the\r
7 intermediate LLVM representation.\r
8 \r
9 .. contents::\r
10 :local:\r
11 \r
12 .. toctree::\r
13 :hidden:\r
14 \r
15 AArch64SME\r
16 AddingConstrainedIntrinsics\r
17 AdvancedBuilds\r
18 AliasAnalysis\r
19 AMDGPUUsage\r
20 Benchmarking\r
21 BigEndianNEON\r
22 BuildingADistribution\r
23 CFIVerify\r
24 CMake\r
25 CMakePrimer\r
26 CodeGenerator\r
27 CodeOfConduct\r
28 CommandLine\r
29 CompileCudaWithLLVM\r
30 CoverageMappingFormat\r
31 CycleTerminology\r
32 DebuggingJITedCode\r
33 DirectXUsage\r
34 Docker\r
35 FatLTO\r
36 ExtendingLLVM\r
37 GitHub\r
38 GoldPlugin\r
39 GlobalISel/MIRPatterns\r
40 HowToBuildOnARM\r
41 HowToBuildWithPGO\r
42 HowToBuildWindowsItaniumPrograms\r
43 HowToCrossCompileBuiltinsOnArm\r
44 HowToCrossCompileLLVM\r
45 HowToUpdateDebugInfo\r
46 InstrRefDebugInfo\r
47 LinkTimeOptimization\r
48 LoopTerminology\r
49 MarkdownQuickstartTemplate\r
50 MemorySSA\r
51 MergeFunctions\r
52 MCJITDesignAndImplementation\r
53 MisExpect\r
54 ORCv2\r
55 OpaquePointers\r
56 JITLink\r
57 NewPassManager\r
58 NVPTXUsage\r
59 Phabricator\r
60 Passes\r
61 ReportingGuide\r
62 ResponseGuide\r
63 Remarks\r
64 RISCVUsage\r
65 SourceLevelDebugging\r
66 SPIRVUsage\r
67 StackSafetyAnalysis\r
68 SupportLibrary\r
69 TableGen/index\r
70 TableGenFundamentals\r
71 Vectorizers\r
72 WritingAnLLVMPass\r
73 WritingAnLLVMNewPMPass\r
74 WritingAnLLVMBackend\r
75 yaml2obj\r
76 \r
77 Clang\r
78 -----\r
79 \r
80 :doc:`HowToBuildOnARM`\r
81 Notes on building and testing LLVM/Clang on ARM.\r
82 \r
83 :doc:`HowToBuildWithPGO`\r
84 Notes on building LLVM/Clang with PGO.\r
85 \r
86 :doc:`HowToCrossCompileLLVM`\r
87 Notes on cross-building and testing LLVM/Clang.\r
88 \r
89 `How to build the C, C++, ObjC, and ObjC++ front end`__\r
90 Instructions for building the clang front-end from source.\r
91 \r
92 .. __: https://clang.llvm.org/get_started.html\r
93 \r
94 :doc:`CoverageMappingFormat`\r
95 This describes the format and encoding used for LLVM’s code coverage mapping.\r
96 \r
97 :doc:`CFIVerify`\r
98 A description of the verification tool for Control Flow Integrity.\r
99 \r
100 LLVM Builds and Distributions\r
101 -----------------------------\r
102 \r
103 :doc:`BuildingADistribution`\r
104 A best-practices guide for using LLVM's CMake build system to package and\r
105 distribute LLVM-based tools.\r
106 \r
107 :doc:`CMake`\r
108 An addendum to the main Getting Started guide for those using the `CMake\r
109 build system <http://www.cmake.org>`_.\r
110 \r
111 :doc:`Docker`\r
112 A reference for using Dockerfiles provided with LLVM.\r
113 \r
114 :doc:`Support Library <SupportLibrary>`\r
115 This document describes the LLVM Support Library (``lib/Support``) and\r
116 how to keep LLVM source code portable.\r
117 \r
118 :doc:`AdvancedBuilds`\r
119 This document describes more advanced build configurations.\r
120 \r
121 Optimizations\r
122 -------------\r
123 \r
124 :doc:`WritingAnLLVMPass`\r
125 Information on how to write LLVM transformations and analyses.\r
126 \r
127 :doc:`WritingAnLLVMNewPMPass`\r
128 Information on how to write LLVM transformations under the new pass\r
129 manager.\r
130 \r
131 :doc:`Passes`\r
132 A list of optimizations and analyses implemented in LLVM.\r
133 \r
134 :doc:`StackSafetyAnalysis`\r
135 This document describes the design of the stack safety analysis of local\r
136 variables.\r
137 \r
138 :doc:`MergeFunctions`\r
139 Describes functions merging optimization.\r
140 \r
141 :doc:`AliasAnalysis`\r
142 Information on how to write a new alias analysis implementation or how to\r
143 use existing analyses.\r
144 \r
145 :doc:`MemorySSA`\r
146 Information about the MemorySSA utility in LLVM, as well as how to use it.\r
147 \r
148 :doc:`LoopTerminology`\r
149 A document describing Loops and associated terms as used in LLVM.\r
150 \r
151 :doc:`CycleTerminology`\r
152 A document describing cycles as a generalization of loops.\r
153 \r
154 :doc:`Vectorizers`\r
155 This document describes the current status of vectorization in LLVM.\r
156 \r
157 :doc:`LinkTimeOptimization`\r
158 This document describes the interface between LLVM intermodular optimizer\r
159 and the linker and its design\r
160 \r
161 :doc:`GoldPlugin`\r
162 How to build your programs with link-time optimization on Linux.\r
163 \r
164 :doc:`Remarks`\r
165 A reference on the implementation of remarks in LLVM.\r
166 \r
167 :doc:`Source Level Debugging with LLVM <SourceLevelDebugging>`\r
168 This document describes the design and philosophy behind the LLVM\r
169 source-level debugger.\r
170 \r
171 :doc:`How to Update Debug Info <HowToUpdateDebugInfo>`\r
172 This document specifies how to correctly update debug info in various kinds\r
173 of code transformations.\r
174 \r
175 :doc:`InstrRefDebugInfo`\r
176 This document explains how LLVM uses value tracking, or instruction\r
177 referencing, to determine variable locations for debug info in the final\r
178 stages of compilation.\r
179 \r
180 Code Generation\r
181 ---------------\r
182 \r
183 :doc:`WritingAnLLVMBackend`\r
184 Information on how to write LLVM backends for machine targets.\r
185 \r
186 :doc:`CodeGenerator`\r
187 The design and implementation of the LLVM code generator. Useful if you are\r
188 working on retargetting LLVM to a new architecture, designing a new codegen\r
189 pass, or enhancing existing components.\r
190 \r
191 :doc:`TableGen <TableGen/index>`\r
192 Describes the TableGen tool, which is used heavily by the LLVM code\r
193 generator.\r
194 \r
195 ==========\r
196 GlobalISel\r
197 ==========\r
198 \r
199 :doc:`MIRPatterns <GlobalISel/MIRPatterns>`\r
200 Describes the design of MIR Patterns and how to use them.\r
201 \r
202 ===\r
203 JIT\r
204 ===\r
205 \r
206 :doc:`MCJITDesignAndImplementation`\r
207 Describes the inner workings of MCJIT execution engine.\r
208 \r
209 :doc:`ORCv2`\r
210 Describes the design and implementation of the ORC APIs, including some\r
211 usage examples, and a guide for users transitioning from ORCv1 to ORCv2.\r
212 \r
213 :doc:`JITLink`\r
214 Describes the design and APIs for the JITLink library, ORC's new JIT\r
215 linker.\r
216 \r
217 :doc:`DebuggingJITedCode`\r
218 How to debug JITed code with GDB.\r
219 \r
220 Additional Topics\r
221 -----------------\r
222 \r
223 :doc:`CommandLine`\r
224 Provides information on using the command line parsing library.\r
225 \r
226 :doc:`ExtendingLLVM`\r
227 Look here to see how to add instructions and intrinsics to LLVM.\r
228 \r
229 :doc:`AddingConstrainedIntrinsics`\r
230 Gives the steps necessary when adding a new constrained math intrinsic\r
231 to LLVM.\r
232 \r
233 :doc:`HowToBuildWindowsItaniumPrograms`\r
234 Notes on assembling a Windows Itanium environment.\r
235 \r
236 :doc:`HowToCrossCompileBuiltinsOnArm`\r
237 Notes on cross-building and testing the compiler-rt builtins for Arm.\r
238 \r
239 :doc:`BigEndianNEON`\r
240 LLVM's support for generating NEON instructions on big endian ARM targets is\r
241 somewhat nonintuitive. This document explains the implementation and rationale.\r
242 \r
243 :doc:`AArch64SME`\r
244 LLVM's support for AArch64 SME ACLE and ABI.\r
245 \r
246 :doc:`CompileCudaWithLLVM`\r
247 LLVM support for CUDA.\r
248 \r
249 :doc:`NVPTXUsage`\r
250 This document describes using the NVPTX backend to compile GPU kernels.\r
251 \r
252 :doc:`AMDGPUUsage`\r
253 This document describes using the AMDGPU backend to compile GPU kernels.\r
254 \r
255 :doc:`AMDGPUDwarfExtensionsForHeterogeneousDebugging`\r
256 This document describes DWARF extensions to support heterogeneous debugging\r
257 for targets such as the AMDGPU backend.\r
258 \r
259 :doc:`AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack`\r
260 This document describes a DWARF extension to allow location descriptions on\r
261 the DWARF expression stack. It is part of\r
262 :doc:`AMDGPUDwarfExtensionsForHeterogeneousDebugging`.\r
263 \r
264 :doc:`SPIRVUsage`\r
265 This document describes using the SPIR-V target to compile GPU kernels.\r
266 \r
267 :doc:`DirectXUsage`\r
268 This document describes using the DirectX target to compile GPU code for the\r
269 DirectX runtime.\r
270 \r
271 :doc:`RISCVUsage`\r
272 This document describes using the RISCV-V target.\r