2 // RUN
: llvm-mc
-arm-add-build-attributes
-filetype
=obj
-triple
=armv7a-none-linux-gnueabi
%s
-o
%t
3 // RUN
: echo
"SECTIONS {" > %t.script
4 // RUN
: echo
" .text_low 0x130 : { *(.text) }" >> %t.script
5 // RUN
: echo
" .text_high 0xf0000000 : AT(0x1000) { *(.text_high) }" >> %t.script
6 // RUN
: echo
" } " >> %t.script
7 // RUN
: ld.lld
--script
%t.script
--pie
--static
%t -o
%t2
8 // RUN
: llvm-objdump
-d
--triple
=armv7a-none-linux-gnueabi
--no-show-raw-insn
%t2 | FileCheck
%s
10 // RUN
: llvm-mc
-arm-add-build-attributes
-filetype
=obj
-triple
=thumbv7a-none-linux-gnueabi
%s
-o
%t3
11 // RUN
: ld.lld
--script
%t.script
--pie
%t3
-o
%t4
12 // RUN
: llvm-objdump
-d
--no-show-raw-insn
%t4 | FileCheck
--check-prefix
=CHECK-THUMB
%s
14 // Check that we can create Arm
and Thumb v7a Position Independent Thunks that
15 // can span the address space without triggering overflow errors. We use an
16 // AT
(0x1000) for
.text_high to avoid creating an almost 4Gb size file.
20 .type _start, %function
25 .section .text_high, "ax", %progbits
32 // ARMv7a instructions
and relocations.
34 // CHECK
: Disassembly of section
.text_low:
36 // CHECK-NEXT
: <_start
>:
37 // CHECK-NEXT
: 130: bl 0x138 <__ARMV7PILongThunk_high
>
38 // CHECK-NEXT
: 134: bx
lr
40 // CHECK
: <__ARMV7PILongThunk_high
>:
41 // CHECK-NEXT
: 138: movw
r12, #65208
42 // CHECK-NEXT
: 13c
: movt
r12, #61439
43 // 0x140 + 0xEFFF0000 + 0x0000FEB8 + 8 = 0xf0000000 = high
44 // CHECK-NEXT
: 140: add r12, r12, pc
45 // CHECK-NEXT
: 144: bx
r12
47 // CHECK
: Disassembly of section
.text_high:
49 // CHECK-NEXT
: <high
>:
50 // CHECK-NEXT
: f0000000
: bl 0xf0000008 <__ARMV7PILongThunk__start
>
51 // CHECK-NEXT
: f0000004
: bx
lr
53 // CHECK
: <__ARMV7PILongThunk__start
>:
54 // CHECK-NEXT
: f0000008
: movw
r12, #280
55 // CHECK-NEXT
: f000000c
: movt
r12, #4096
56 // 0xf0000010 + 0x10000000 + 0x0000118 + 8 = bits32
(0x100000130),0x130 = _start
57 // CHECK-NEXT
: f0000010
: add r12, r12, pc
58 // CHECK-NEXT
: f0000014
: bx
r12
60 // Thumbv7a instructions
and relocations
61 // CHECK-THUMB
: Disassembly of section
.text_low:
63 // CHECK-THUMB-NEXT
: <_start
>:
64 // CHECK-THUMB-NEXT
: 130: bl 0x138 <__ThumbV7PILongThunk_high
>
65 // CHECK-THUMB-NEXT
: 134: bx
lr
67 // CHECK-THUMB
: <__ThumbV7PILongThunk_high
>:
68 // CHECK-THUMB-NEXT
: 138: movw
r12, #65213
69 // CHECK-THUMB-NEXT
: 13c
: movt
r12, #61439
70 // 0x140 + 0xEFFF0000 + 0x0000FEBD + 4 = 0xf0000001 = high
71 // CHECK-THUMB-NEXT
: 140: add r12, pc
72 // CHECK-THUMB-NEXT
: 142: bx
r12
74 // CHECK-THUMB
: Disassembly of section
.text_high:
76 // CHECK-THUMB-NEXT
: <high
>:
77 // CHECK-THUMB-NEXT
: f0000000
: bl 0xf0000008 <__ThumbV7PILongThunk__start
>
78 // CHECK-THUMB-NEXT
: f0000004
: bx
lr
80 // CHECK-THUMB
: <__ThumbV7PILongThunk__start
>:
81 // CHECK-THUMB-NEXT
: f0000008
: movw
r12, #285
82 // CHECK-THUMB-NEXT
: f000000c
: movt
r12, #4096
83 // 0xf0000010 + 0x10000000 + 0x000011d +4 = bits32
(0x100000131),0x131 = _start
84 // CHECK-THUMB-NEXT
: f0000010
: add r12, pc
85 // CHECK-THUMB-NEXT
: f0000012
: bx
r12