llvm/test/MC/AMDGPU/gfx8_asm_vintrp.s

   1 // RUN: llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s
   2
   3 v_interp_p1_f32 v5, v1, attr0.x
   4 // CHECK: [0x01,0x00,0x14,0xd4]
   5
   6 v_interp_p1_f32 v255, v1, attr0.x
   7 // CHECK: [0x01,0x00,0xfc,0xd7]
   8
   9 v_interp_p1_f32 v5, v255, attr0.x
  10 // CHECK: [0xff,0x00,0x14,0xd4]
  11
  12 v_interp_p1_f32 v5, v1, attr1.x
  13 // CHECK: [0x01,0x04,0x14,0xd4]
  14
  15 v_interp_p1_f32 v5, v1, attr31.x
  16 // CHECK: [0x01,0x7c,0x14,0xd4]
  17
  18 v_interp_p1_f32 v5, v1, attr32.x
  19 // CHECK: [0x01,0x80,0x14,0xd4]
  20
  21 v_interp_p1_f32 v5, v1, attr0.y
  22 // CHECK: [0x01,0x01,0x14,0xd4]
  23
  24 v_interp_p1_f32 v5, v1, attr0.z
  25 // CHECK: [0x01,0x02,0x14,0xd4]
  26
  27 v_interp_p1_f32 v5, v1, attr0.w
  28 // CHECK: [0x01,0x03,0x14,0xd4]
  29
  30 v_interp_p2_f32 v5, v1, attr0.x
  31 // CHECK: [0x01,0x00,0x15,0xd4]
  32
  33 v_interp_p2_f32 v255, v1, attr0.x
  34 // CHECK: [0x01,0x00,0xfd,0xd7]
  35
  36 v_interp_p2_f32 v5, v255, attr0.x
  37 // CHECK: [0xff,0x00,0x15,0xd4]
  38
  39 v_interp_p2_f32 v5, v1, attr1.x
  40 // CHECK: [0x01,0x04,0x15,0xd4]
  41
  42 v_interp_p2_f32 v5, v1, attr31.x
  43 // CHECK: [0x01,0x7c,0x15,0xd4]
  44
  45 v_interp_p2_f32 v5, v1, attr32.x
  46 // CHECK: [0x01,0x80,0x15,0xd4]
  47
  48 v_interp_p2_f32 v5, v1, attr0.y
  49 // CHECK: [0x01,0x01,0x15,0xd4]
  50
  51 v_interp_p2_f32 v5, v1, attr0.z
  52 // CHECK: [0x01,0x02,0x15,0xd4]
  53
  54 v_interp_p2_f32 v5, v1, attr0.w
  55 // CHECK: [0x01,0x03,0x15,0xd4]
  56
  57 v_interp_mov_f32 v5, p10, attr0.x
  58 // CHECK: [0x00,0x00,0x16,0xd4]
  59
  60 v_interp_mov_f32 v255, p10, attr0.x
  61 // CHECK: [0x00,0x00,0xfe,0xd7]
  62
  63 v_interp_mov_f32 v5, p20, attr0.x
  64 // CHECK: [0x01,0x00,0x16,0xd4]
  65
  66 v_interp_mov_f32 v5, p0, attr0.x
  67 // CHECK: [0x02,0x00,0x16,0xd4]
  68
  69 v_interp_mov_f32 v5, p10, attr1.x
  70 // CHECK: [0x00,0x04,0x16,0xd4]
  71
  72 v_interp_mov_f32 v5, p10, attr31.x
  73 // CHECK: [0x00,0x7c,0x16,0xd4]
  74
  75 v_interp_mov_f32 v5, p10, attr32.x
  76 // CHECK: [0x00,0x80,0x16,0xd4]
  77
  78 v_interp_mov_f32 v5, p10, attr0.y
  79 // CHECK: [0x00,0x01,0x16,0xd4]
  80
  81 v_interp_mov_f32 v5, p10, attr0.z
  82 // CHECK: [0x00,0x02,0x16,0xd4]
  83
  84 v_interp_mov_f32 v5, p10, attr0.w
  85 // CHECK: [0x00,0x03,0x16,0xd4]