llvm/test/MC/AMDGPU/gfx9_asm_vop1.s

   1 // RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
   2
   3 v_nop
   4 // CHECK: [0x00,0x00,0x00,0x7e]
   5
   6 v_mov_b32 v5, v1
   7 // CHECK: [0x01,0x03,0x0a,0x7e]
   8
   9 v_mov_b32 v255, v1
  10 // CHECK: [0x01,0x03,0xfe,0x7f]
  11
  12 v_mov_b32 v5, v255
  13 // CHECK: [0xff,0x03,0x0a,0x7e]
  14
  15 v_mov_b32 v5, s1
  16 // CHECK: [0x01,0x02,0x0a,0x7e]
  17
  18 v_mov_b32 v5, s101
  19 // CHECK: [0x65,0x02,0x0a,0x7e]
  20
  21 v_mov_b32 v5, flat_scratch_lo
  22 // CHECK: [0x66,0x02,0x0a,0x7e]
  23
  24 v_mov_b32 v5, flat_scratch_hi
  25 // CHECK: [0x67,0x02,0x0a,0x7e]
  26
  27 v_mov_b32 v5, vcc_lo
  28 // CHECK: [0x6a,0x02,0x0a,0x7e]
  29
  30 v_mov_b32 v5, vcc_hi
  31 // CHECK: [0x6b,0x02,0x0a,0x7e]
  32
  33 v_mov_b32 v5, ttmp15
  34 // CHECK: [0x7b,0x02,0x0a,0x7e]
  35
  36 v_mov_b32 v5, m0
  37 // CHECK: [0x7c,0x02,0x0a,0x7e]
  38
  39 v_mov_b32 v5, exec_lo
  40 // CHECK: [0x7e,0x02,0x0a,0x7e]
  41
  42 v_mov_b32 v5, exec_hi
  43 // CHECK: [0x7f,0x02,0x0a,0x7e]
  44
  45 v_mov_b32 v5, 0
  46 // CHECK: [0x80,0x02,0x0a,0x7e]
  47
  48 v_mov_b32 v5, -1
  49 // CHECK: [0xc1,0x02,0x0a,0x7e]
  50
  51 v_mov_b32 v5, 0.5
  52 // CHECK: [0xf0,0x02,0x0a,0x7e]
  53
  54 v_mov_b32 v5, -4.0
  55 // CHECK: [0xf7,0x02,0x0a,0x7e]
  56
  57 v_mov_b32 v5, src_vccz
  58 // CHECK: [0xfb,0x02,0x0a,0x7e]
  59
  60 v_mov_b32 v5, src_execz
  61 // CHECK: [0xfc,0x02,0x0a,0x7e]
  62
  63 v_mov_b32 v5, src_scc
  64 // CHECK: [0xfd,0x02,0x0a,0x7e]
  65
  66 v_mov_b32 v5, src_lds_direct
  67 // CHECK: [0xfe,0x02,0x0a,0x7e]
  68
  69 v_mov_b32 v5, 0xaf123456
  70 // CHECK: [0xff,0x02,0x0a,0x7e,0x56,0x34,0x12,0xaf]
  71
  72 v_mov_b32 v5, 0x3f717273
  73 // CHECK: [0xff,0x02,0x0a,0x7e,0x73,0x72,0x71,0x3f]
  74
  75 v_readfirstlane_b32 s5, v1
  76 // CHECK: [0x01,0x05,0x0a,0x7e]
  77
  78 v_readfirstlane_b32 s101, v1
  79 // CHECK: [0x01,0x05,0xca,0x7e]
  80
  81 v_readfirstlane_b32 flat_scratch_lo, v1
  82 // CHECK: [0x01,0x05,0xcc,0x7e]
  83
  84 v_readfirstlane_b32 flat_scratch_hi, v1
  85 // CHECK: [0x01,0x05,0xce,0x7e]
  86
  87 v_readfirstlane_b32 ttmp15, v1
  88 // CHECK: [0x01,0x05,0xf6,0x7e]
  89
  90 v_readfirstlane_b32 s5, v255
  91 // CHECK: [0xff,0x05,0x0a,0x7e]
  92
  93 v_readfirstlane_b32 s5, src_lds_direct
  94 // CHECK: [0xfe,0x04,0x0a,0x7e]
  95
  96 v_cvt_i32_f64 v5, v[1:2]
  97 // CHECK: [0x01,0x07,0x0a,0x7e]
  98
  99 v_cvt_i32_f64 v255, v[1:2]
 100 // CHECK: [0x01,0x07,0xfe,0x7f]
 101
 102 v_cvt_i32_f64 v5, v[254:255]
 103 // CHECK: [0xfe,0x07,0x0a,0x7e]
 104
 105 v_cvt_i32_f64 v5, s[2:3]
 106 // CHECK: [0x02,0x06,0x0a,0x7e]
 107
 108 v_cvt_i32_f64 v5, s[4:5]
 109 // CHECK: [0x04,0x06,0x0a,0x7e]
 110
 111 v_cvt_i32_f64 v5, s[100:101]
 112 // CHECK: [0x64,0x06,0x0a,0x7e]
 113
 114 v_cvt_i32_f64 v5, flat_scratch
 115 // CHECK: [0x66,0x06,0x0a,0x7e]
 116
 117 v_cvt_i32_f64 v5, vcc
 118 // CHECK: [0x6a,0x06,0x0a,0x7e]
 119
 120 v_cvt_i32_f64 v5, ttmp[14:15]
 121 // CHECK: [0x7a,0x06,0x0a,0x7e]
 122
 123 v_cvt_i32_f64 v5, exec
 124 // CHECK: [0x7e,0x06,0x0a,0x7e]
 125
 126 v_cvt_i32_f64 v5, 0
 127 // CHECK: [0x80,0x06,0x0a,0x7e]
 128
 129 v_cvt_i32_f64 v5, -1
 130 // CHECK: [0xc1,0x06,0x0a,0x7e]
 131
 132 v_cvt_i32_f64 v5, 0.5
 133 // CHECK: [0xf0,0x06,0x0a,0x7e]
 134
 135 v_cvt_i32_f64 v5, -4.0
 136 // CHECK: [0xf7,0x06,0x0a,0x7e]
 137
 138 v_cvt_i32_f64 v5, src_vccz
 139 // CHECK: [0xfb,0x06,0x0a,0x7e]
 140
 141 v_cvt_i32_f64 v5, src_execz
 142 // CHECK: [0xfc,0x06,0x0a,0x7e]
 143
 144 v_cvt_i32_f64 v5, src_scc
 145 // CHECK: [0xfd,0x06,0x0a,0x7e]
 146
 147 v_cvt_i32_f64 v5, 0xaf123456
 148 // CHECK: [0xff,0x06,0x0a,0x7e,0x56,0x34,0x12,0xaf]
 149
 150 v_cvt_i32_f64 v5, 0x3f717273
 151 // CHECK: [0xff,0x06,0x0a,0x7e,0x73,0x72,0x71,0x3f]
 152
 153 v_cvt_f64_i32 v[5:6], v1
 154 // CHECK: [0x01,0x09,0x0a,0x7e]
 155
 156 v_cvt_f64_i32 v[254:255], v1
 157 // CHECK: [0x01,0x09,0xfc,0x7f]
 158
 159 v_cvt_f64_i32 v[5:6], v255
 160 // CHECK: [0xff,0x09,0x0a,0x7e]
 161
 162 v_cvt_f64_i32 v[5:6], s1
 163 // CHECK: [0x01,0x08,0x0a,0x7e]
 164
 165 v_cvt_f64_i32 v[5:6], s101
 166 // CHECK: [0x65,0x08,0x0a,0x7e]
 167
 168 v_cvt_f64_i32 v[5:6], flat_scratch_lo
 169 // CHECK: [0x66,0x08,0x0a,0x7e]
 170
 171 v_cvt_f64_i32 v[5:6], flat_scratch_hi
 172 // CHECK: [0x67,0x08,0x0a,0x7e]
 173
 174 v_cvt_f64_i32 v[5:6], vcc_lo
 175 // CHECK: [0x6a,0x08,0x0a,0x7e]
 176
 177 v_cvt_f64_i32 v[5:6], vcc_hi
 178 // CHECK: [0x6b,0x08,0x0a,0x7e]
 179
 180 v_cvt_f64_i32 v[5:6], ttmp15
 181 // CHECK: [0x7b,0x08,0x0a,0x7e]
 182
 183 v_cvt_f64_i32 v[5:6], m0
 184 // CHECK: [0x7c,0x08,0x0a,0x7e]
 185
 186 v_cvt_f64_i32 v[5:6], exec_lo
 187 // CHECK: [0x7e,0x08,0x0a,0x7e]
 188
 189 v_cvt_f64_i32 v[5:6], exec_hi
 190 // CHECK: [0x7f,0x08,0x0a,0x7e]
 191
 192 v_cvt_f64_i32 v[5:6], 0
 193 // CHECK: [0x80,0x08,0x0a,0x7e]
 194
 195 v_cvt_f64_i32 v[5:6], -1
 196 // CHECK: [0xc1,0x08,0x0a,0x7e]
 197
 198 v_cvt_f64_i32 v[5:6], 0.5
 199 // CHECK: [0xf0,0x08,0x0a,0x7e]
 200
 201 v_cvt_f64_i32 v[5:6], -4.0
 202 // CHECK: [0xf7,0x08,0x0a,0x7e]
 203
 204 v_cvt_f64_i32 v[5:6], src_vccz
 205 // CHECK: [0xfb,0x08,0x0a,0x7e]
 206
 207 v_cvt_f64_i32 v[5:6], src_execz
 208 // CHECK: [0xfc,0x08,0x0a,0x7e]
 209
 210 v_cvt_f64_i32 v[5:6], src_scc
 211 // CHECK: [0xfd,0x08,0x0a,0x7e]
 212
 213 v_cvt_f64_i32 v[5:6], src_lds_direct
 214 // CHECK: [0xfe,0x08,0x0a,0x7e]
 215
 216 v_cvt_f64_i32 v[5:6], 0xaf123456
 217 // CHECK: [0xff,0x08,0x0a,0x7e,0x56,0x34,0x12,0xaf]
 218
 219 v_cvt_f64_i32 v[5:6], 0x3f717273
 220 // CHECK: [0xff,0x08,0x0a,0x7e,0x73,0x72,0x71,0x3f]
 221
 222 v_cvt_f32_i32 v5, v1
 223 // CHECK: [0x01,0x0b,0x0a,0x7e]
 224
 225 v_cvt_f32_i32 v255, v1
 226 // CHECK: [0x01,0x0b,0xfe,0x7f]
 227
 228 v_cvt_f32_i32 v5, v255
 229 // CHECK: [0xff,0x0b,0x0a,0x7e]
 230
 231 v_cvt_f32_i32 v5, s1
 232 // CHECK: [0x01,0x0a,0x0a,0x7e]
 233
 234 v_cvt_f32_i32 v5, s101
 235 // CHECK: [0x65,0x0a,0x0a,0x7e]
 236
 237 v_cvt_f32_i32 v5, flat_scratch_lo
 238 // CHECK: [0x66,0x0a,0x0a,0x7e]
 239
 240 v_cvt_f32_i32 v5, flat_scratch_hi
 241 // CHECK: [0x67,0x0a,0x0a,0x7e]
 242
 243 v_cvt_f32_i32 v5, vcc_lo
 244 // CHECK: [0x6a,0x0a,0x0a,0x7e]
 245
 246 v_cvt_f32_i32 v5, vcc_hi
 247 // CHECK: [0x6b,0x0a,0x0a,0x7e]
 248
 249 v_cvt_f32_i32 v5, ttmp15
 250 // CHECK: [0x7b,0x0a,0x0a,0x7e]
 251
 252 v_cvt_f32_i32 v5, m0
 253 // CHECK: [0x7c,0x0a,0x0a,0x7e]
 254
 255 v_cvt_f32_i32 v5, exec_lo
 256 // CHECK: [0x7e,0x0a,0x0a,0x7e]
 257
 258 v_cvt_f32_i32 v5, exec_hi
 259 // CHECK: [0x7f,0x0a,0x0a,0x7e]
 260
 261 v_cvt_f32_i32 v5, 0
 262 // CHECK: [0x80,0x0a,0x0a,0x7e]
 263
 264 v_cvt_f32_i32 v5, -1
 265 // CHECK: [0xc1,0x0a,0x0a,0x7e]
 266
 267 v_cvt_f32_i32 v5, 0.5
 268 // CHECK: [0xf0,0x0a,0x0a,0x7e]
 269
 270 v_cvt_f32_i32 v5, -4.0
 271 // CHECK: [0xf7,0x0a,0x0a,0x7e]
 272
 273 v_cvt_f32_i32 v5, src_vccz
 274 // CHECK: [0xfb,0x0a,0x0a,0x7e]
 275
 276 v_cvt_f32_i32 v5, src_execz
 277 // CHECK: [0xfc,0x0a,0x0a,0x7e]
 278
 279 v_cvt_f32_i32 v5, src_scc
 280 // CHECK: [0xfd,0x0a,0x0a,0x7e]
 281
 282 v_cvt_f32_i32 v5, src_lds_direct
 283 // CHECK: [0xfe,0x0a,0x0a,0x7e]
 284
 285 v_cvt_f32_i32 v5, 0xaf123456
 286 // CHECK: [0xff,0x0a,0x0a,0x7e,0x56,0x34,0x12,0xaf]
 287
 288 v_cvt_f32_i32 v5, 0x3f717273
 289 // CHECK: [0xff,0x0a,0x0a,0x7e,0x73,0x72,0x71,0x3f]
 290
 291 v_cvt_f32_u32 v5, v1
 292 // CHECK: [0x01,0x0d,0x0a,0x7e]
 293
 294 v_cvt_f32_u32 v255, v1
 295 // CHECK: [0x01,0x0d,0xfe,0x7f]
 296
 297 v_cvt_f32_u32 v5, v255
 298 // CHECK: [0xff,0x0d,0x0a,0x7e]
 299
 300 v_cvt_f32_u32 v5, s1
 301 // CHECK: [0x01,0x0c,0x0a,0x7e]
 302
 303 v_cvt_f32_u32 v5, s101
 304 // CHECK: [0x65,0x0c,0x0a,0x7e]
 305
 306 v_cvt_f32_u32 v5, flat_scratch_lo
 307 // CHECK: [0x66,0x0c,0x0a,0x7e]
 308
 309 v_cvt_f32_u32 v5, flat_scratch_hi
 310 // CHECK: [0x67,0x0c,0x0a,0x7e]
 311
 312 v_cvt_f32_u32 v5, vcc_lo
 313 // CHECK: [0x6a,0x0c,0x0a,0x7e]
 314
 315 v_cvt_f32_u32 v5, vcc_hi
 316 // CHECK: [0x6b,0x0c,0x0a,0x7e]
 317
 318 v_cvt_f32_u32 v5, ttmp15
 319 // CHECK: [0x7b,0x0c,0x0a,0x7e]
 320
 321 v_cvt_f32_u32 v5, m0
 322 // CHECK: [0x7c,0x0c,0x0a,0x7e]
 323
 324 v_cvt_f32_u32 v5, exec_lo
 325 // CHECK: [0x7e,0x0c,0x0a,0x7e]
 326
 327 v_cvt_f32_u32 v5, exec_hi
 328 // CHECK: [0x7f,0x0c,0x0a,0x7e]
 329
 330 v_cvt_f32_u32 v5, 0
 331 // CHECK: [0x80,0x0c,0x0a,0x7e]
 332
 333 v_cvt_f32_u32 v5, -1
 334 // CHECK: [0xc1,0x0c,0x0a,0x7e]
 335
 336 v_cvt_f32_u32 v5, 0.5
 337 // CHECK: [0xf0,0x0c,0x0a,0x7e]
 338
 339 v_cvt_f32_u32 v5, -4.0
 340 // CHECK: [0xf7,0x0c,0x0a,0x7e]
 341
 342 v_cvt_f32_u32 v5, src_vccz
 343 // CHECK: [0xfb,0x0c,0x0a,0x7e]
 344
 345 v_cvt_f32_u32 v5, src_execz
 346 // CHECK: [0xfc,0x0c,0x0a,0x7e]
 347
 348 v_cvt_f32_u32 v5, src_scc
 349 // CHECK: [0xfd,0x0c,0x0a,0x7e]
 350
 351 v_cvt_f32_u32 v5, src_lds_direct
 352 // CHECK: [0xfe,0x0c,0x0a,0x7e]
 353
 354 v_cvt_f32_u32 v5, 0xaf123456
 355 // CHECK: [0xff,0x0c,0x0a,0x7e,0x56,0x34,0x12,0xaf]
 356
 357 v_cvt_f32_u32 v5, 0x3f717273
 358 // CHECK: [0xff,0x0c,0x0a,0x7e,0x73,0x72,0x71,0x3f]
 359
 360 v_cvt_u32_f32 v5, v1
 361 // CHECK: [0x01,0x0f,0x0a,0x7e]
 362
 363 v_cvt_u32_f32 v255, v1
 364 // CHECK: [0x01,0x0f,0xfe,0x7f]
 365
 366 v_cvt_u32_f32 v5, v255
 367 // CHECK: [0xff,0x0f,0x0a,0x7e]
 368
 369 v_cvt_u32_f32 v5, s1
 370 // CHECK: [0x01,0x0e,0x0a,0x7e]
 371
 372 v_cvt_u32_f32 v5, s101
 373 // CHECK: [0x65,0x0e,0x0a,0x7e]
 374
 375 v_cvt_u32_f32 v5, flat_scratch_lo
 376 // CHECK: [0x66,0x0e,0x0a,0x7e]
 377
 378 v_cvt_u32_f32 v5, flat_scratch_hi
 379 // CHECK: [0x67,0x0e,0x0a,0x7e]
 380
 381 v_cvt_u32_f32 v5, vcc_lo
 382 // CHECK: [0x6a,0x0e,0x0a,0x7e]
 383
 384 v_cvt_u32_f32 v5, vcc_hi
 385 // CHECK: [0x6b,0x0e,0x0a,0x7e]
 386
 387 v_cvt_u32_f32 v5, ttmp15
 388 // CHECK: [0x7b,0x0e,0x0a,0x7e]
 389
 390 v_cvt_u32_f32 v5, m0
 391 // CHECK: [0x7c,0x0e,0x0a,0x7e]
 392
 393 v_cvt_u32_f32 v5, exec_lo
 394 // CHECK: [0x7e,0x0e,0x0a,0x7e]
 395
 396 v_cvt_u32_f32 v5, exec_hi
 397 // CHECK: [0x7f,0x0e,0x0a,0x7e]
 398
 399 v_cvt_u32_f32 v5, 0
 400 // CHECK: [0x80,0x0e,0x0a,0x7e]
 401
 402 v_cvt_u32_f32 v5, -1
 403 // CHECK: [0xc1,0x0e,0x0a,0x7e]
 404
 405 v_cvt_u32_f32 v5, 0.5
 406 // CHECK: [0xf0,0x0e,0x0a,0x7e]
 407
 408 v_cvt_u32_f32 v5, -4.0
 409 // CHECK: [0xf7,0x0e,0x0a,0x7e]
 410
 411 v_cvt_u32_f32 v5, src_vccz
 412 // CHECK: [0xfb,0x0e,0x0a,0x7e]
 413
 414 v_cvt_u32_f32 v5, src_execz
 415 // CHECK: [0xfc,0x0e,0x0a,0x7e]
 416
 417 v_cvt_u32_f32 v5, src_scc
 418 // CHECK: [0xfd,0x0e,0x0a,0x7e]
 419
 420 v_cvt_u32_f32 v5, src_lds_direct
 421 // CHECK: [0xfe,0x0e,0x0a,0x7e]
 422
 423 v_cvt_u32_f32 v5, 0xaf123456
 424 // CHECK: [0xff,0x0e,0x0a,0x7e,0x56,0x34,0x12,0xaf]
 425
 426 v_cvt_u32_f32 v5, 0x3f717273
 427 // CHECK: [0xff,0x0e,0x0a,0x7e,0x73,0x72,0x71,0x3f]
 428
 429 v_cvt_i32_f32 v5, v1
 430 // CHECK: [0x01,0x11,0x0a,0x7e]
 431
 432 v_cvt_i32_f32 v255, v1
 433 // CHECK: [0x01,0x11,0xfe,0x7f]
 434
 435 v_cvt_i32_f32 v5, v255
 436 // CHECK: [0xff,0x11,0x0a,0x7e]
 437
 438 v_cvt_i32_f32 v5, s1
 439 // CHECK: [0x01,0x10,0x0a,0x7e]
 440
 441 v_cvt_i32_f32 v5, s101
 442 // CHECK: [0x65,0x10,0x0a,0x7e]
 443
 444 v_cvt_i32_f32 v5, flat_scratch_lo
 445 // CHECK: [0x66,0x10,0x0a,0x7e]
 446
 447 v_cvt_i32_f32 v5, flat_scratch_hi
 448 // CHECK: [0x67,0x10,0x0a,0x7e]
 449
 450 v_cvt_i32_f32 v5, vcc_lo
 451 // CHECK: [0x6a,0x10,0x0a,0x7e]
 452
 453 v_cvt_i32_f32 v5, vcc_hi
 454 // CHECK: [0x6b,0x10,0x0a,0x7e]
 455
 456 v_cvt_i32_f32 v5, ttmp15
 457 // CHECK: [0x7b,0x10,0x0a,0x7e]
 458
 459 v_cvt_i32_f32 v5, m0
 460 // CHECK: [0x7c,0x10,0x0a,0x7e]
 461
 462 v_cvt_i32_f32 v5, exec_lo
 463 // CHECK: [0x7e,0x10,0x0a,0x7e]
 464
 465 v_cvt_i32_f32 v5, exec_hi
 466 // CHECK: [0x7f,0x10,0x0a,0x7e]
 467
 468 v_cvt_i32_f32 v5, 0
 469 // CHECK: [0x80,0x10,0x0a,0x7e]
 470
 471 v_cvt_i32_f32 v5, -1
 472 // CHECK: [0xc1,0x10,0x0a,0x7e]
 473
 474 v_cvt_i32_f32 v5, 0.5
 475 // CHECK: [0xf0,0x10,0x0a,0x7e]
 476
 477 v_cvt_i32_f32 v5, -4.0
 478 // CHECK: [0xf7,0x10,0x0a,0x7e]
 479
 480 v_cvt_i32_f32 v5, src_vccz
 481 // CHECK: [0xfb,0x10,0x0a,0x7e]
 482
 483 v_cvt_i32_f32 v5, src_execz
 484 // CHECK: [0xfc,0x10,0x0a,0x7e]
 485
 486 v_cvt_i32_f32 v5, src_scc
 487 // CHECK: [0xfd,0x10,0x0a,0x7e]
 488
 489 v_cvt_i32_f32 v5, src_lds_direct
 490 // CHECK: [0xfe,0x10,0x0a,0x7e]
 491
 492 v_cvt_i32_f32 v5, 0xaf123456
 493 // CHECK: [0xff,0x10,0x0a,0x7e,0x56,0x34,0x12,0xaf]
 494
 495 v_cvt_i32_f32 v5, 0x3f717273
 496 // CHECK: [0xff,0x10,0x0a,0x7e,0x73,0x72,0x71,0x3f]
 497
 498 v_cvt_f16_f32 v5, v1
 499 // CHECK: [0x01,0x15,0x0a,0x7e]
 500
 501 v_cvt_f16_f32 v255, v1
 502 // CHECK: [0x01,0x15,0xfe,0x7f]
 503
 504 v_cvt_f16_f32 v5, v255
 505 // CHECK: [0xff,0x15,0x0a,0x7e]
 506
 507 v_cvt_f16_f32 v5, s1
 508 // CHECK: [0x01,0x14,0x0a,0x7e]
 509
 510 v_cvt_f16_f32 v5, s101
 511 // CHECK: [0x65,0x14,0x0a,0x7e]
 512
 513 v_cvt_f16_f32 v5, flat_scratch_lo
 514 // CHECK: [0x66,0x14,0x0a,0x7e]
 515
 516 v_cvt_f16_f32 v5, flat_scratch_hi
 517 // CHECK: [0x67,0x14,0x0a,0x7e]
 518
 519 v_cvt_f16_f32 v5, vcc_lo
 520 // CHECK: [0x6a,0x14,0x0a,0x7e]
 521
 522 v_cvt_f16_f32 v5, vcc_hi
 523 // CHECK: [0x6b,0x14,0x0a,0x7e]
 524
 525 v_cvt_f16_f32 v5, ttmp15
 526 // CHECK: [0x7b,0x14,0x0a,0x7e]
 527
 528 v_cvt_f16_f32 v5, m0
 529 // CHECK: [0x7c,0x14,0x0a,0x7e]
 530
 531 v_cvt_f16_f32 v5, exec_lo
 532 // CHECK: [0x7e,0x14,0x0a,0x7e]
 533
 534 v_cvt_f16_f32 v5, exec_hi
 535 // CHECK: [0x7f,0x14,0x0a,0x7e]
 536
 537 v_cvt_f16_f32 v5, 0
 538 // CHECK: [0x80,0x14,0x0a,0x7e]
 539
 540 v_cvt_f16_f32 v5, -1
 541 // CHECK: [0xc1,0x14,0x0a,0x7e]
 542
 543 v_cvt_f16_f32 v5, 0.5
 544 // CHECK: [0xf0,0x14,0x0a,0x7e]
 545
 546 v_cvt_f16_f32 v5, -4.0
 547 // CHECK: [0xf7,0x14,0x0a,0x7e]
 548
 549 v_cvt_f16_f32 v5, src_vccz
 550 // CHECK: [0xfb,0x14,0x0a,0x7e]
 551
 552 v_cvt_f16_f32 v5, src_execz
 553 // CHECK: [0xfc,0x14,0x0a,0x7e]
 554
 555 v_cvt_f16_f32 v5, src_scc
 556 // CHECK: [0xfd,0x14,0x0a,0x7e]
 557
 558 v_cvt_f16_f32 v5, src_lds_direct
 559 // CHECK: [0xfe,0x14,0x0a,0x7e]
 560
 561 v_cvt_f16_f32 v5, 0xaf123456
 562 // CHECK: [0xff,0x14,0x0a,0x7e,0x56,0x34,0x12,0xaf]
 563
 564 v_cvt_f16_f32 v5, 0x3f717273
 565 // CHECK: [0xff,0x14,0x0a,0x7e,0x73,0x72,0x71,0x3f]
 566
 567 v_cvt_f32_f16 v5, v1
 568 // CHECK: [0x01,0x17,0x0a,0x7e]
 569
 570 v_cvt_f32_f16 v255, v1
 571 // CHECK: [0x01,0x17,0xfe,0x7f]
 572
 573 v_cvt_f32_f16 v5, v255
 574 // CHECK: [0xff,0x17,0x0a,0x7e]
 575
 576 v_cvt_f32_f16 v5, s1
 577 // CHECK: [0x01,0x16,0x0a,0x7e]
 578
 579 v_cvt_f32_f16 v5, s101
 580 // CHECK: [0x65,0x16,0x0a,0x7e]
 581
 582 v_cvt_f32_f16 v5, flat_scratch_lo
 583 // CHECK: [0x66,0x16,0x0a,0x7e]
 584
 585 v_cvt_f32_f16 v5, flat_scratch_hi
 586 // CHECK: [0x67,0x16,0x0a,0x7e]
 587
 588 v_cvt_f32_f16 v5, vcc_lo
 589 // CHECK: [0x6a,0x16,0x0a,0x7e]
 590
 591 v_cvt_f32_f16 v5, vcc_hi
 592 // CHECK: [0x6b,0x16,0x0a,0x7e]
 593
 594 v_cvt_f32_f16 v5, ttmp15
 595 // CHECK: [0x7b,0x16,0x0a,0x7e]
 596
 597 v_cvt_f32_f16 v5, m0
 598 // CHECK: [0x7c,0x16,0x0a,0x7e]
 599
 600 v_cvt_f32_f16 v5, exec_lo
 601 // CHECK: [0x7e,0x16,0x0a,0x7e]
 602
 603 v_cvt_f32_f16 v5, exec_hi
 604 // CHECK: [0x7f,0x16,0x0a,0x7e]
 605
 606 v_cvt_f32_f16 v5, 0
 607 // CHECK: [0x80,0x16,0x0a,0x7e]
 608
 609 v_cvt_f32_f16 v5, -1
 610 // CHECK: [0xc1,0x16,0x0a,0x7e]
 611
 612 v_cvt_f32_f16 v5, 0.5
 613 // CHECK: [0xf0,0x16,0x0a,0x7e]
 614
 615 v_cvt_f32_f16 v5, -4.0
 616 // CHECK: [0xf7,0x16,0x0a,0x7e]
 617
 618 v_cvt_f32_f16 v5, src_vccz
 619 // CHECK: [0xfb,0x16,0x0a,0x7e]
 620
 621 v_cvt_f32_f16 v5, src_execz
 622 // CHECK: [0xfc,0x16,0x0a,0x7e]
 623
 624 v_cvt_f32_f16 v5, src_scc
 625 // CHECK: [0xfd,0x16,0x0a,0x7e]
 626
 627 v_cvt_f32_f16 v5, src_lds_direct
 628 // CHECK: [0xfe,0x16,0x0a,0x7e]
 629
 630 v_cvt_f32_f16 v5, 0xfe0b
 631 // CHECK: [0xff,0x16,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
 632
 633 v_cvt_f32_f16 v5, 0x3456
 634 // CHECK: [0xff,0x16,0x0a,0x7e,0x56,0x34,0x00,0x00]
 635
 636 v_cvt_rpi_i32_f32 v5, v1
 637 // CHECK: [0x01,0x19,0x0a,0x7e]
 638
 639 v_cvt_rpi_i32_f32 v255, v1
 640 // CHECK: [0x01,0x19,0xfe,0x7f]
 641
 642 v_cvt_rpi_i32_f32 v5, v255
 643 // CHECK: [0xff,0x19,0x0a,0x7e]
 644
 645 v_cvt_rpi_i32_f32 v5, s1
 646 // CHECK: [0x01,0x18,0x0a,0x7e]
 647
 648 v_cvt_rpi_i32_f32 v5, s101
 649 // CHECK: [0x65,0x18,0x0a,0x7e]
 650
 651 v_cvt_rpi_i32_f32 v5, flat_scratch_lo
 652 // CHECK: [0x66,0x18,0x0a,0x7e]
 653
 654 v_cvt_rpi_i32_f32 v5, flat_scratch_hi
 655 // CHECK: [0x67,0x18,0x0a,0x7e]
 656
 657 v_cvt_rpi_i32_f32 v5, vcc_lo
 658 // CHECK: [0x6a,0x18,0x0a,0x7e]
 659
 660 v_cvt_rpi_i32_f32 v5, vcc_hi
 661 // CHECK: [0x6b,0x18,0x0a,0x7e]
 662
 663 v_cvt_rpi_i32_f32 v5, ttmp15
 664 // CHECK: [0x7b,0x18,0x0a,0x7e]
 665
 666 v_cvt_rpi_i32_f32 v5, m0
 667 // CHECK: [0x7c,0x18,0x0a,0x7e]
 668
 669 v_cvt_rpi_i32_f32 v5, exec_lo
 670 // CHECK: [0x7e,0x18,0x0a,0x7e]
 671
 672 v_cvt_rpi_i32_f32 v5, exec_hi
 673 // CHECK: [0x7f,0x18,0x0a,0x7e]
 674
 675 v_cvt_rpi_i32_f32 v5, 0
 676 // CHECK: [0x80,0x18,0x0a,0x7e]
 677
 678 v_cvt_rpi_i32_f32 v5, -1
 679 // CHECK: [0xc1,0x18,0x0a,0x7e]
 680
 681 v_cvt_rpi_i32_f32 v5, 0.5
 682 // CHECK: [0xf0,0x18,0x0a,0x7e]
 683
 684 v_cvt_rpi_i32_f32 v5, -4.0
 685 // CHECK: [0xf7,0x18,0x0a,0x7e]
 686
 687 v_cvt_rpi_i32_f32 v5, src_vccz
 688 // CHECK: [0xfb,0x18,0x0a,0x7e]
 689
 690 v_cvt_rpi_i32_f32 v5, src_execz
 691 // CHECK: [0xfc,0x18,0x0a,0x7e]
 692
 693 v_cvt_rpi_i32_f32 v5, src_scc
 694 // CHECK: [0xfd,0x18,0x0a,0x7e]
 695
 696 v_cvt_rpi_i32_f32 v5, src_lds_direct
 697 // CHECK: [0xfe,0x18,0x0a,0x7e]
 698
 699 v_cvt_rpi_i32_f32 v5, 0xaf123456
 700 // CHECK: [0xff,0x18,0x0a,0x7e,0x56,0x34,0x12,0xaf]
 701
 702 v_cvt_rpi_i32_f32 v5, 0x3f717273
 703 // CHECK: [0xff,0x18,0x0a,0x7e,0x73,0x72,0x71,0x3f]
 704
 705 v_cvt_flr_i32_f32 v5, v1
 706 // CHECK: [0x01,0x1b,0x0a,0x7e]
 707
 708 v_cvt_flr_i32_f32 v255, v1
 709 // CHECK: [0x01,0x1b,0xfe,0x7f]
 710
 711 v_cvt_flr_i32_f32 v5, v255
 712 // CHECK: [0xff,0x1b,0x0a,0x7e]
 713
 714 v_cvt_flr_i32_f32 v5, s1
 715 // CHECK: [0x01,0x1a,0x0a,0x7e]
 716
 717 v_cvt_flr_i32_f32 v5, s101
 718 // CHECK: [0x65,0x1a,0x0a,0x7e]
 719
 720 v_cvt_flr_i32_f32 v5, flat_scratch_lo
 721 // CHECK: [0x66,0x1a,0x0a,0x7e]
 722
 723 v_cvt_flr_i32_f32 v5, flat_scratch_hi
 724 // CHECK: [0x67,0x1a,0x0a,0x7e]
 725
 726 v_cvt_flr_i32_f32 v5, vcc_lo
 727 // CHECK: [0x6a,0x1a,0x0a,0x7e]
 728
 729 v_cvt_flr_i32_f32 v5, vcc_hi
 730 // CHECK: [0x6b,0x1a,0x0a,0x7e]
 731
 732 v_cvt_flr_i32_f32 v5, ttmp15
 733 // CHECK: [0x7b,0x1a,0x0a,0x7e]
 734
 735 v_cvt_flr_i32_f32 v5, m0
 736 // CHECK: [0x7c,0x1a,0x0a,0x7e]
 737
 738 v_cvt_flr_i32_f32 v5, exec_lo
 739 // CHECK: [0x7e,0x1a,0x0a,0x7e]
 740
 741 v_cvt_flr_i32_f32 v5, exec_hi
 742 // CHECK: [0x7f,0x1a,0x0a,0x7e]
 743
 744 v_cvt_flr_i32_f32 v5, 0
 745 // CHECK: [0x80,0x1a,0x0a,0x7e]
 746
 747 v_cvt_flr_i32_f32 v5, -1
 748 // CHECK: [0xc1,0x1a,0x0a,0x7e]
 749
 750 v_cvt_flr_i32_f32 v5, 0.5
 751 // CHECK: [0xf0,0x1a,0x0a,0x7e]
 752
 753 v_cvt_flr_i32_f32 v5, -4.0
 754 // CHECK: [0xf7,0x1a,0x0a,0x7e]
 755
 756 v_cvt_flr_i32_f32 v5, src_vccz
 757 // CHECK: [0xfb,0x1a,0x0a,0x7e]
 758
 759 v_cvt_flr_i32_f32 v5, src_execz
 760 // CHECK: [0xfc,0x1a,0x0a,0x7e]
 761
 762 v_cvt_flr_i32_f32 v5, src_scc
 763 // CHECK: [0xfd,0x1a,0x0a,0x7e]
 764
 765 v_cvt_flr_i32_f32 v5, src_lds_direct
 766 // CHECK: [0xfe,0x1a,0x0a,0x7e]
 767
 768 v_cvt_flr_i32_f32 v5, 0xaf123456
 769 // CHECK: [0xff,0x1a,0x0a,0x7e,0x56,0x34,0x12,0xaf]
 770
 771 v_cvt_flr_i32_f32 v5, 0x3f717273
 772 // CHECK: [0xff,0x1a,0x0a,0x7e,0x73,0x72,0x71,0x3f]
 773
 774 v_cvt_off_f32_i4 v5, v1
 775 // CHECK: [0x01,0x1d,0x0a,0x7e]
 776
 777 v_cvt_off_f32_i4 v255, v1
 778 // CHECK: [0x01,0x1d,0xfe,0x7f]
 779
 780 v_cvt_off_f32_i4 v5, v255
 781 // CHECK: [0xff,0x1d,0x0a,0x7e]
 782
 783 v_cvt_off_f32_i4 v5, s1
 784 // CHECK: [0x01,0x1c,0x0a,0x7e]
 785
 786 v_cvt_off_f32_i4 v5, s101
 787 // CHECK: [0x65,0x1c,0x0a,0x7e]
 788
 789 v_cvt_off_f32_i4 v5, flat_scratch_lo
 790 // CHECK: [0x66,0x1c,0x0a,0x7e]
 791
 792 v_cvt_off_f32_i4 v5, flat_scratch_hi
 793 // CHECK: [0x67,0x1c,0x0a,0x7e]
 794
 795 v_cvt_off_f32_i4 v5, vcc_lo
 796 // CHECK: [0x6a,0x1c,0x0a,0x7e]
 797
 798 v_cvt_off_f32_i4 v5, vcc_hi
 799 // CHECK: [0x6b,0x1c,0x0a,0x7e]
 800
 801 v_cvt_off_f32_i4 v5, ttmp15
 802 // CHECK: [0x7b,0x1c,0x0a,0x7e]
 803
 804 v_cvt_off_f32_i4 v5, m0
 805 // CHECK: [0x7c,0x1c,0x0a,0x7e]
 806
 807 v_cvt_off_f32_i4 v5, exec_lo
 808 // CHECK: [0x7e,0x1c,0x0a,0x7e]
 809
 810 v_cvt_off_f32_i4 v5, exec_hi
 811 // CHECK: [0x7f,0x1c,0x0a,0x7e]
 812
 813 v_cvt_off_f32_i4 v5, 0
 814 // CHECK: [0x80,0x1c,0x0a,0x7e]
 815
 816 v_cvt_off_f32_i4 v5, -1
 817 // CHECK: [0xc1,0x1c,0x0a,0x7e]
 818
 819 v_cvt_off_f32_i4 v5, 0.5
 820 // CHECK: [0xf0,0x1c,0x0a,0x7e]
 821
 822 v_cvt_off_f32_i4 v5, -4.0
 823 // CHECK: [0xf7,0x1c,0x0a,0x7e]
 824
 825 v_cvt_off_f32_i4 v5, src_vccz
 826 // CHECK: [0xfb,0x1c,0x0a,0x7e]
 827
 828 v_cvt_off_f32_i4 v5, src_execz
 829 // CHECK: [0xfc,0x1c,0x0a,0x7e]
 830
 831 v_cvt_off_f32_i4 v5, src_scc
 832 // CHECK: [0xfd,0x1c,0x0a,0x7e]
 833
 834 v_cvt_off_f32_i4 v5, src_lds_direct
 835 // CHECK: [0xfe,0x1c,0x0a,0x7e]
 836
 837 v_cvt_off_f32_i4 v5, 0x4f
 838 // CHECK: [0xff,0x1c,0x0a,0x7e,0x4f,0x00,0x00,0x00]
 839
 840 v_cvt_off_f32_i4 v5, 0x41
 841 // CHECK: [0xff,0x1c,0x0a,0x7e,0x41,0x00,0x00,0x00]
 842
 843 v_cvt_f32_f64 v5, v[1:2]
 844 // CHECK: [0x01,0x1f,0x0a,0x7e]
 845
 846 v_cvt_f32_f64 v255, v[1:2]
 847 // CHECK: [0x01,0x1f,0xfe,0x7f]
 848
 849 v_cvt_f32_f64 v5, v[254:255]
 850 // CHECK: [0xfe,0x1f,0x0a,0x7e]
 851
 852 v_cvt_f32_f64 v5, s[2:3]
 853 // CHECK: [0x02,0x1e,0x0a,0x7e]
 854
 855 v_cvt_f32_f64 v5, s[4:5]
 856 // CHECK: [0x04,0x1e,0x0a,0x7e]
 857
 858 v_cvt_f32_f64 v5, s[100:101]
 859 // CHECK: [0x64,0x1e,0x0a,0x7e]
 860
 861 v_cvt_f32_f64 v5, flat_scratch
 862 // CHECK: [0x66,0x1e,0x0a,0x7e]
 863
 864 v_cvt_f32_f64 v5, vcc
 865 // CHECK: [0x6a,0x1e,0x0a,0x7e]
 866
 867 v_cvt_f32_f64 v5, ttmp[14:15]
 868 // CHECK: [0x7a,0x1e,0x0a,0x7e]
 869
 870 v_cvt_f32_f64 v5, exec
 871 // CHECK: [0x7e,0x1e,0x0a,0x7e]
 872
 873 v_cvt_f32_f64 v5, 0
 874 // CHECK: [0x80,0x1e,0x0a,0x7e]
 875
 876 v_cvt_f32_f64 v5, -1
 877 // CHECK: [0xc1,0x1e,0x0a,0x7e]
 878
 879 v_cvt_f32_f64 v5, 0.5
 880 // CHECK: [0xf0,0x1e,0x0a,0x7e]
 881
 882 v_cvt_f32_f64 v5, -4.0
 883 // CHECK: [0xf7,0x1e,0x0a,0x7e]
 884
 885 v_cvt_f32_f64 v5, src_vccz
 886 // CHECK: [0xfb,0x1e,0x0a,0x7e]
 887
 888 v_cvt_f32_f64 v5, src_execz
 889 // CHECK: [0xfc,0x1e,0x0a,0x7e]
 890
 891 v_cvt_f32_f64 v5, src_scc
 892 // CHECK: [0xfd,0x1e,0x0a,0x7e]
 893
 894 v_cvt_f32_f64 v5, 0xaf123456
 895 // CHECK: [0xff,0x1e,0x0a,0x7e,0x56,0x34,0x12,0xaf]
 896
 897 v_cvt_f32_f64 v5, 0x3f717273
 898 // CHECK: [0xff,0x1e,0x0a,0x7e,0x73,0x72,0x71,0x3f]
 899
 900 v_cvt_f64_f32 v[5:6], v1
 901 // CHECK: [0x01,0x21,0x0a,0x7e]
 902
 903 v_cvt_f64_f32 v[254:255], v1
 904 // CHECK: [0x01,0x21,0xfc,0x7f]
 905
 906 v_cvt_f64_f32 v[5:6], v255
 907 // CHECK: [0xff,0x21,0x0a,0x7e]
 908
 909 v_cvt_f64_f32 v[5:6], s1
 910 // CHECK: [0x01,0x20,0x0a,0x7e]
 911
 912 v_cvt_f64_f32 v[5:6], s101
 913 // CHECK: [0x65,0x20,0x0a,0x7e]
 914
 915 v_cvt_f64_f32 v[5:6], flat_scratch_lo
 916 // CHECK: [0x66,0x20,0x0a,0x7e]
 917
 918 v_cvt_f64_f32 v[5:6], flat_scratch_hi
 919 // CHECK: [0x67,0x20,0x0a,0x7e]
 920
 921 v_cvt_f64_f32 v[5:6], vcc_lo
 922 // CHECK: [0x6a,0x20,0x0a,0x7e]
 923
 924 v_cvt_f64_f32 v[5:6], vcc_hi
 925 // CHECK: [0x6b,0x20,0x0a,0x7e]
 926
 927 v_cvt_f64_f32 v[5:6], ttmp15
 928 // CHECK: [0x7b,0x20,0x0a,0x7e]
 929
 930 v_cvt_f64_f32 v[5:6], m0
 931 // CHECK: [0x7c,0x20,0x0a,0x7e]
 932
 933 v_cvt_f64_f32 v[5:6], exec_lo
 934 // CHECK: [0x7e,0x20,0x0a,0x7e]
 935
 936 v_cvt_f64_f32 v[5:6], exec_hi
 937 // CHECK: [0x7f,0x20,0x0a,0x7e]
 938
 939 v_cvt_f64_f32 v[5:6], 0
 940 // CHECK: [0x80,0x20,0x0a,0x7e]
 941
 942 v_cvt_f64_f32 v[5:6], -1
 943 // CHECK: [0xc1,0x20,0x0a,0x7e]
 944
 945 v_cvt_f64_f32 v[5:6], 0.5
 946 // CHECK: [0xf0,0x20,0x0a,0x7e]
 947
 948 v_cvt_f64_f32 v[5:6], -4.0
 949 // CHECK: [0xf7,0x20,0x0a,0x7e]
 950
 951 v_cvt_f64_f32 v[5:6], src_vccz
 952 // CHECK: [0xfb,0x20,0x0a,0x7e]
 953
 954 v_cvt_f64_f32 v[5:6], src_execz
 955 // CHECK: [0xfc,0x20,0x0a,0x7e]
 956
 957 v_cvt_f64_f32 v[5:6], src_scc
 958 // CHECK: [0xfd,0x20,0x0a,0x7e]
 959
 960 v_cvt_f64_f32 v[5:6], src_lds_direct
 961 // CHECK: [0xfe,0x20,0x0a,0x7e]
 962
 963 v_cvt_f64_f32 v[5:6], 0xaf123456
 964 // CHECK: [0xff,0x20,0x0a,0x7e,0x56,0x34,0x12,0xaf]
 965
 966 v_cvt_f64_f32 v[5:6], 0x3f717273
 967 // CHECK: [0xff,0x20,0x0a,0x7e,0x73,0x72,0x71,0x3f]
 968
 969 v_cvt_f32_ubyte0 v5, v1
 970 // CHECK: [0x01,0x23,0x0a,0x7e]
 971
 972 v_cvt_f32_ubyte0 v255, v1
 973 // CHECK: [0x01,0x23,0xfe,0x7f]
 974
 975 v_cvt_f32_ubyte0 v5, v255
 976 // CHECK: [0xff,0x23,0x0a,0x7e]
 977
 978 v_cvt_f32_ubyte0 v5, s1
 979 // CHECK: [0x01,0x22,0x0a,0x7e]
 980
 981 v_cvt_f32_ubyte0 v5, s101
 982 // CHECK: [0x65,0x22,0x0a,0x7e]
 983
 984 v_cvt_f32_ubyte0 v5, flat_scratch_lo
 985 // CHECK: [0x66,0x22,0x0a,0x7e]
 986
 987 v_cvt_f32_ubyte0 v5, flat_scratch_hi
 988 // CHECK: [0x67,0x22,0x0a,0x7e]
 989
 990 v_cvt_f32_ubyte0 v5, vcc_lo
 991 // CHECK: [0x6a,0x22,0x0a,0x7e]
 992
 993 v_cvt_f32_ubyte0 v5, vcc_hi
 994 // CHECK: [0x6b,0x22,0x0a,0x7e]
 995
 996 v_cvt_f32_ubyte0 v5, ttmp15
 997 // CHECK: [0x7b,0x22,0x0a,0x7e]
 998
 999 v_cvt_f32_ubyte0 v5, m0
1000 // CHECK: [0x7c,0x22,0x0a,0x7e]
1001
1002 v_cvt_f32_ubyte0 v5, exec_lo
1003 // CHECK: [0x7e,0x22,0x0a,0x7e]
1004
1005 v_cvt_f32_ubyte0 v5, exec_hi
1006 // CHECK: [0x7f,0x22,0x0a,0x7e]
1007
1008 v_cvt_f32_ubyte0 v5, 0
1009 // CHECK: [0x80,0x22,0x0a,0x7e]
1010
1011 v_cvt_f32_ubyte0 v5, -1
1012 // CHECK: [0xc1,0x22,0x0a,0x7e]
1013
1014 v_cvt_f32_ubyte0 v5, 0.5
1015 // CHECK: [0xf0,0x22,0x0a,0x7e]
1016
1017 v_cvt_f32_ubyte0 v5, -4.0
1018 // CHECK: [0xf7,0x22,0x0a,0x7e]
1019
1020 v_cvt_f32_ubyte0 v5, src_vccz
1021 // CHECK: [0xfb,0x22,0x0a,0x7e]
1022
1023 v_cvt_f32_ubyte0 v5, src_execz
1024 // CHECK: [0xfc,0x22,0x0a,0x7e]
1025
1026 v_cvt_f32_ubyte0 v5, src_scc
1027 // CHECK: [0xfd,0x22,0x0a,0x7e]
1028
1029 v_cvt_f32_ubyte0 v5, src_lds_direct
1030 // CHECK: [0xfe,0x22,0x0a,0x7e]
1031
1032 v_cvt_f32_ubyte0 v5, 0xaf123456
1033 // CHECK: [0xff,0x22,0x0a,0x7e,0x56,0x34,0x12,0xaf]
1034
1035 v_cvt_f32_ubyte0 v5, 0x3f717273
1036 // CHECK: [0xff,0x22,0x0a,0x7e,0x73,0x72,0x71,0x3f]
1037
1038 v_cvt_f32_ubyte1 v5, v1
1039 // CHECK: [0x01,0x25,0x0a,0x7e]
1040
1041 v_cvt_f32_ubyte1 v255, v1
1042 // CHECK: [0x01,0x25,0xfe,0x7f]
1043
1044 v_cvt_f32_ubyte1 v5, v255
1045 // CHECK: [0xff,0x25,0x0a,0x7e]
1046
1047 v_cvt_f32_ubyte1 v5, s1
1048 // CHECK: [0x01,0x24,0x0a,0x7e]
1049
1050 v_cvt_f32_ubyte1 v5, s101
1051 // CHECK: [0x65,0x24,0x0a,0x7e]
1052
1053 v_cvt_f32_ubyte1 v5, flat_scratch_lo
1054 // CHECK: [0x66,0x24,0x0a,0x7e]
1055
1056 v_cvt_f32_ubyte1 v5, flat_scratch_hi
1057 // CHECK: [0x67,0x24,0x0a,0x7e]
1058
1059 v_cvt_f32_ubyte1 v5, vcc_lo
1060 // CHECK: [0x6a,0x24,0x0a,0x7e]
1061
1062 v_cvt_f32_ubyte1 v5, vcc_hi
1063 // CHECK: [0x6b,0x24,0x0a,0x7e]
1064
1065 v_cvt_f32_ubyte1 v5, ttmp15
1066 // CHECK: [0x7b,0x24,0x0a,0x7e]
1067
1068 v_cvt_f32_ubyte1 v5, m0
1069 // CHECK: [0x7c,0x24,0x0a,0x7e]
1070
1071 v_cvt_f32_ubyte1 v5, exec_lo
1072 // CHECK: [0x7e,0x24,0x0a,0x7e]
1073
1074 v_cvt_f32_ubyte1 v5, exec_hi
1075 // CHECK: [0x7f,0x24,0x0a,0x7e]
1076
1077 v_cvt_f32_ubyte1 v5, 0
1078 // CHECK: [0x80,0x24,0x0a,0x7e]
1079
1080 v_cvt_f32_ubyte1 v5, -1
1081 // CHECK: [0xc1,0x24,0x0a,0x7e]
1082
1083 v_cvt_f32_ubyte1 v5, 0.5
1084 // CHECK: [0xf0,0x24,0x0a,0x7e]
1085
1086 v_cvt_f32_ubyte1 v5, -4.0
1087 // CHECK: [0xf7,0x24,0x0a,0x7e]
1088
1089 v_cvt_f32_ubyte1 v5, src_vccz
1090 // CHECK: [0xfb,0x24,0x0a,0x7e]
1091
1092 v_cvt_f32_ubyte1 v5, src_execz
1093 // CHECK: [0xfc,0x24,0x0a,0x7e]
1094
1095 v_cvt_f32_ubyte1 v5, src_scc
1096 // CHECK: [0xfd,0x24,0x0a,0x7e]
1097
1098 v_cvt_f32_ubyte1 v5, src_lds_direct
1099 // CHECK: [0xfe,0x24,0x0a,0x7e]
1100
1101 v_cvt_f32_ubyte1 v5, 0xaf123456
1102 // CHECK: [0xff,0x24,0x0a,0x7e,0x56,0x34,0x12,0xaf]
1103
1104 v_cvt_f32_ubyte1 v5, 0x3f717273
1105 // CHECK: [0xff,0x24,0x0a,0x7e,0x73,0x72,0x71,0x3f]
1106
1107 v_cvt_f32_ubyte2 v5, v1
1108 // CHECK: [0x01,0x27,0x0a,0x7e]
1109
1110 v_cvt_f32_ubyte2 v255, v1
1111 // CHECK: [0x01,0x27,0xfe,0x7f]
1112
1113 v_cvt_f32_ubyte2 v5, v255
1114 // CHECK: [0xff,0x27,0x0a,0x7e]
1115
1116 v_cvt_f32_ubyte2 v5, s1
1117 // CHECK: [0x01,0x26,0x0a,0x7e]
1118
1119 v_cvt_f32_ubyte2 v5, s101
1120 // CHECK: [0x65,0x26,0x0a,0x7e]
1121
1122 v_cvt_f32_ubyte2 v5, flat_scratch_lo
1123 // CHECK: [0x66,0x26,0x0a,0x7e]
1124
1125 v_cvt_f32_ubyte2 v5, flat_scratch_hi
1126 // CHECK: [0x67,0x26,0x0a,0x7e]
1127
1128 v_cvt_f32_ubyte2 v5, vcc_lo
1129 // CHECK: [0x6a,0x26,0x0a,0x7e]
1130
1131 v_cvt_f32_ubyte2 v5, vcc_hi
1132 // CHECK: [0x6b,0x26,0x0a,0x7e]
1133
1134 v_cvt_f32_ubyte2 v5, ttmp15
1135 // CHECK: [0x7b,0x26,0x0a,0x7e]
1136
1137 v_cvt_f32_ubyte2 v5, m0
1138 // CHECK: [0x7c,0x26,0x0a,0x7e]
1139
1140 v_cvt_f32_ubyte2 v5, exec_lo
1141 // CHECK: [0x7e,0x26,0x0a,0x7e]
1142
1143 v_cvt_f32_ubyte2 v5, exec_hi
1144 // CHECK: [0x7f,0x26,0x0a,0x7e]
1145
1146 v_cvt_f32_ubyte2 v5, 0
1147 // CHECK: [0x80,0x26,0x0a,0x7e]
1148
1149 v_cvt_f32_ubyte2 v5, -1
1150 // CHECK: [0xc1,0x26,0x0a,0x7e]
1151
1152 v_cvt_f32_ubyte2 v5, 0.5
1153 // CHECK: [0xf0,0x26,0x0a,0x7e]
1154
1155 v_cvt_f32_ubyte2 v5, -4.0
1156 // CHECK: [0xf7,0x26,0x0a,0x7e]
1157
1158 v_cvt_f32_ubyte2 v5, src_vccz
1159 // CHECK: [0xfb,0x26,0x0a,0x7e]
1160
1161 v_cvt_f32_ubyte2 v5, src_execz
1162 // CHECK: [0xfc,0x26,0x0a,0x7e]
1163
1164 v_cvt_f32_ubyte2 v5, src_scc
1165 // CHECK: [0xfd,0x26,0x0a,0x7e]
1166
1167 v_cvt_f32_ubyte2 v5, src_lds_direct
1168 // CHECK: [0xfe,0x26,0x0a,0x7e]
1169
1170 v_cvt_f32_ubyte2 v5, 0xaf123456
1171 // CHECK: [0xff,0x26,0x0a,0x7e,0x56,0x34,0x12,0xaf]
1172
1173 v_cvt_f32_ubyte2 v5, 0x3f717273
1174 // CHECK: [0xff,0x26,0x0a,0x7e,0x73,0x72,0x71,0x3f]
1175
1176 v_cvt_f32_ubyte3 v5, v1
1177 // CHECK: [0x01,0x29,0x0a,0x7e]
1178
1179 v_cvt_f32_ubyte3 v255, v1
1180 // CHECK: [0x01,0x29,0xfe,0x7f]
1181
1182 v_cvt_f32_ubyte3 v5, v255
1183 // CHECK: [0xff,0x29,0x0a,0x7e]
1184
1185 v_cvt_f32_ubyte3 v5, s1
1186 // CHECK: [0x01,0x28,0x0a,0x7e]
1187
1188 v_cvt_f32_ubyte3 v5, s101
1189 // CHECK: [0x65,0x28,0x0a,0x7e]
1190
1191 v_cvt_f32_ubyte3 v5, flat_scratch_lo
1192 // CHECK: [0x66,0x28,0x0a,0x7e]
1193
1194 v_cvt_f32_ubyte3 v5, flat_scratch_hi
1195 // CHECK: [0x67,0x28,0x0a,0x7e]
1196
1197 v_cvt_f32_ubyte3 v5, vcc_lo
1198 // CHECK: [0x6a,0x28,0x0a,0x7e]
1199
1200 v_cvt_f32_ubyte3 v5, vcc_hi
1201 // CHECK: [0x6b,0x28,0x0a,0x7e]
1202
1203 v_cvt_f32_ubyte3 v5, ttmp15
1204 // CHECK: [0x7b,0x28,0x0a,0x7e]
1205
1206 v_cvt_f32_ubyte3 v5, m0
1207 // CHECK: [0x7c,0x28,0x0a,0x7e]
1208
1209 v_cvt_f32_ubyte3 v5, exec_lo
1210 // CHECK: [0x7e,0x28,0x0a,0x7e]
1211
1212 v_cvt_f32_ubyte3 v5, exec_hi
1213 // CHECK: [0x7f,0x28,0x0a,0x7e]
1214
1215 v_cvt_f32_ubyte3 v5, 0
1216 // CHECK: [0x80,0x28,0x0a,0x7e]
1217
1218 v_cvt_f32_ubyte3 v5, -1
1219 // CHECK: [0xc1,0x28,0x0a,0x7e]
1220
1221 v_cvt_f32_ubyte3 v5, 0.5
1222 // CHECK: [0xf0,0x28,0x0a,0x7e]
1223
1224 v_cvt_f32_ubyte3 v5, -4.0
1225 // CHECK: [0xf7,0x28,0x0a,0x7e]
1226
1227 v_cvt_f32_ubyte3 v5, src_vccz
1228 // CHECK: [0xfb,0x28,0x0a,0x7e]
1229
1230 v_cvt_f32_ubyte3 v5, src_execz
1231 // CHECK: [0xfc,0x28,0x0a,0x7e]
1232
1233 v_cvt_f32_ubyte3 v5, src_scc
1234 // CHECK: [0xfd,0x28,0x0a,0x7e]
1235
1236 v_cvt_f32_ubyte3 v5, src_lds_direct
1237 // CHECK: [0xfe,0x28,0x0a,0x7e]
1238
1239 v_cvt_f32_ubyte3 v5, 0xaf123456
1240 // CHECK: [0xff,0x28,0x0a,0x7e,0x56,0x34,0x12,0xaf]
1241
1242 v_cvt_f32_ubyte3 v5, 0x3f717273
1243 // CHECK: [0xff,0x28,0x0a,0x7e,0x73,0x72,0x71,0x3f]
1244
1245 v_cvt_u32_f64 v5, v[1:2]
1246 // CHECK: [0x01,0x2b,0x0a,0x7e]
1247
1248 v_cvt_u32_f64 v255, v[1:2]
1249 // CHECK: [0x01,0x2b,0xfe,0x7f]
1250
1251 v_cvt_u32_f64 v5, v[254:255]
1252 // CHECK: [0xfe,0x2b,0x0a,0x7e]
1253
1254 v_cvt_u32_f64 v5, s[2:3]
1255 // CHECK: [0x02,0x2a,0x0a,0x7e]
1256
1257 v_cvt_u32_f64 v5, s[4:5]
1258 // CHECK: [0x04,0x2a,0x0a,0x7e]
1259
1260 v_cvt_u32_f64 v5, s[100:101]
1261 // CHECK: [0x64,0x2a,0x0a,0x7e]
1262
1263 v_cvt_u32_f64 v5, flat_scratch
1264 // CHECK: [0x66,0x2a,0x0a,0x7e]
1265
1266 v_cvt_u32_f64 v5, vcc
1267 // CHECK: [0x6a,0x2a,0x0a,0x7e]
1268
1269 v_cvt_u32_f64 v5, ttmp[14:15]
1270 // CHECK: [0x7a,0x2a,0x0a,0x7e]
1271
1272 v_cvt_u32_f64 v5, exec
1273 // CHECK: [0x7e,0x2a,0x0a,0x7e]
1274
1275 v_cvt_u32_f64 v5, 0
1276 // CHECK: [0x80,0x2a,0x0a,0x7e]
1277
1278 v_cvt_u32_f64 v5, -1
1279 // CHECK: [0xc1,0x2a,0x0a,0x7e]
1280
1281 v_cvt_u32_f64 v5, 0.5
1282 // CHECK: [0xf0,0x2a,0x0a,0x7e]
1283
1284 v_cvt_u32_f64 v5, -4.0
1285 // CHECK: [0xf7,0x2a,0x0a,0x7e]
1286
1287 v_cvt_u32_f64 v5, src_vccz
1288 // CHECK: [0xfb,0x2a,0x0a,0x7e]
1289
1290 v_cvt_u32_f64 v5, src_execz
1291 // CHECK: [0xfc,0x2a,0x0a,0x7e]
1292
1293 v_cvt_u32_f64 v5, src_scc
1294 // CHECK: [0xfd,0x2a,0x0a,0x7e]
1295
1296 v_cvt_u32_f64 v5, 0xaf123456
1297 // CHECK: [0xff,0x2a,0x0a,0x7e,0x56,0x34,0x12,0xaf]
1298
1299 v_cvt_u32_f64 v5, 0x3f717273
1300 // CHECK: [0xff,0x2a,0x0a,0x7e,0x73,0x72,0x71,0x3f]
1301
1302 v_cvt_f64_u32 v[5:6], v1
1303 // CHECK: [0x01,0x2d,0x0a,0x7e]
1304
1305 v_cvt_f64_u32 v[254:255], v1
1306 // CHECK: [0x01,0x2d,0xfc,0x7f]
1307
1308 v_cvt_f64_u32 v[5:6], v255
1309 // CHECK: [0xff,0x2d,0x0a,0x7e]
1310
1311 v_cvt_f64_u32 v[5:6], s1
1312 // CHECK: [0x01,0x2c,0x0a,0x7e]
1313
1314 v_cvt_f64_u32 v[5:6], s101
1315 // CHECK: [0x65,0x2c,0x0a,0x7e]
1316
1317 v_cvt_f64_u32 v[5:6], flat_scratch_lo
1318 // CHECK: [0x66,0x2c,0x0a,0x7e]
1319
1320 v_cvt_f64_u32 v[5:6], flat_scratch_hi
1321 // CHECK: [0x67,0x2c,0x0a,0x7e]
1322
1323 v_cvt_f64_u32 v[5:6], vcc_lo
1324 // CHECK: [0x6a,0x2c,0x0a,0x7e]
1325
1326 v_cvt_f64_u32 v[5:6], vcc_hi
1327 // CHECK: [0x6b,0x2c,0x0a,0x7e]
1328
1329 v_cvt_f64_u32 v[5:6], ttmp15
1330 // CHECK: [0x7b,0x2c,0x0a,0x7e]
1331
1332 v_cvt_f64_u32 v[5:6], m0
1333 // CHECK: [0x7c,0x2c,0x0a,0x7e]
1334
1335 v_cvt_f64_u32 v[5:6], exec_lo
1336 // CHECK: [0x7e,0x2c,0x0a,0x7e]
1337
1338 v_cvt_f64_u32 v[5:6], exec_hi
1339 // CHECK: [0x7f,0x2c,0x0a,0x7e]
1340
1341 v_cvt_f64_u32 v[5:6], 0
1342 // CHECK: [0x80,0x2c,0x0a,0x7e]
1343
1344 v_cvt_f64_u32 v[5:6], -1
1345 // CHECK: [0xc1,0x2c,0x0a,0x7e]
1346
1347 v_cvt_f64_u32 v[5:6], 0.5
1348 // CHECK: [0xf0,0x2c,0x0a,0x7e]
1349
1350 v_cvt_f64_u32 v[5:6], -4.0
1351 // CHECK: [0xf7,0x2c,0x0a,0x7e]
1352
1353 v_cvt_f64_u32 v[5:6], src_vccz
1354 // CHECK: [0xfb,0x2c,0x0a,0x7e]
1355
1356 v_cvt_f64_u32 v[5:6], src_execz
1357 // CHECK: [0xfc,0x2c,0x0a,0x7e]
1358
1359 v_cvt_f64_u32 v[5:6], src_scc
1360 // CHECK: [0xfd,0x2c,0x0a,0x7e]
1361
1362 v_cvt_f64_u32 v[5:6], src_lds_direct
1363 // CHECK: [0xfe,0x2c,0x0a,0x7e]
1364
1365 v_cvt_f64_u32 v[5:6], 0xaf123456
1366 // CHECK: [0xff,0x2c,0x0a,0x7e,0x56,0x34,0x12,0xaf]
1367
1368 v_cvt_f64_u32 v[5:6], 0x3f717273
1369 // CHECK: [0xff,0x2c,0x0a,0x7e,0x73,0x72,0x71,0x3f]
1370
1371 v_trunc_f64 v[5:6], v[1:2]
1372 // CHECK: [0x01,0x2f,0x0a,0x7e]
1373
1374 v_trunc_f64 v[254:255], v[1:2]
1375 // CHECK: [0x01,0x2f,0xfc,0x7f]
1376
1377 v_trunc_f64 v[5:6], v[254:255]
1378 // CHECK: [0xfe,0x2f,0x0a,0x7e]
1379
1380 v_trunc_f64 v[5:6], s[2:3]
1381 // CHECK: [0x02,0x2e,0x0a,0x7e]
1382
1383 v_trunc_f64 v[5:6], s[4:5]
1384 // CHECK: [0x04,0x2e,0x0a,0x7e]
1385
1386 v_trunc_f64 v[5:6], s[100:101]
1387 // CHECK: [0x64,0x2e,0x0a,0x7e]
1388
1389 v_trunc_f64 v[5:6], flat_scratch
1390 // CHECK: [0x66,0x2e,0x0a,0x7e]
1391
1392 v_trunc_f64 v[5:6], vcc
1393 // CHECK: [0x6a,0x2e,0x0a,0x7e]
1394
1395 v_trunc_f64 v[5:6], ttmp[14:15]
1396 // CHECK: [0x7a,0x2e,0x0a,0x7e]
1397
1398 v_trunc_f64 v[5:6], exec
1399 // CHECK: [0x7e,0x2e,0x0a,0x7e]
1400
1401 v_trunc_f64 v[5:6], 0
1402 // CHECK: [0x80,0x2e,0x0a,0x7e]
1403
1404 v_trunc_f64 v[5:6], -1
1405 // CHECK: [0xc1,0x2e,0x0a,0x7e]
1406
1407 v_trunc_f64 v[5:6], 0.5
1408 // CHECK: [0xf0,0x2e,0x0a,0x7e]
1409
1410 v_trunc_f64 v[5:6], -4.0
1411 // CHECK: [0xf7,0x2e,0x0a,0x7e]
1412
1413 v_trunc_f64 v[5:6], src_vccz
1414 // CHECK: [0xfb,0x2e,0x0a,0x7e]
1415
1416 v_trunc_f64 v[5:6], src_execz
1417 // CHECK: [0xfc,0x2e,0x0a,0x7e]
1418
1419 v_trunc_f64 v[5:6], src_scc
1420 // CHECK: [0xfd,0x2e,0x0a,0x7e]
1421
1422 v_trunc_f64 v[5:6], 0xaf123456
1423 // CHECK: [0xff,0x2e,0x0a,0x7e,0x56,0x34,0x12,0xaf]
1424
1425 v_trunc_f64 v[5:6], 0x3f717273
1426 // CHECK: [0xff,0x2e,0x0a,0x7e,0x73,0x72,0x71,0x3f]
1427
1428 v_ceil_f64 v[5:6], v[1:2]
1429 // CHECK: [0x01,0x31,0x0a,0x7e]
1430
1431 v_ceil_f64 v[254:255], v[1:2]
1432 // CHECK: [0x01,0x31,0xfc,0x7f]
1433
1434 v_ceil_f64 v[5:6], v[254:255]
1435 // CHECK: [0xfe,0x31,0x0a,0x7e]
1436
1437 v_ceil_f64 v[5:6], s[2:3]
1438 // CHECK: [0x02,0x30,0x0a,0x7e]
1439
1440 v_ceil_f64 v[5:6], s[4:5]
1441 // CHECK: [0x04,0x30,0x0a,0x7e]
1442
1443 v_ceil_f64 v[5:6], s[100:101]
1444 // CHECK: [0x64,0x30,0x0a,0x7e]
1445
1446 v_ceil_f64 v[5:6], flat_scratch
1447 // CHECK: [0x66,0x30,0x0a,0x7e]
1448
1449 v_ceil_f64 v[5:6], vcc
1450 // CHECK: [0x6a,0x30,0x0a,0x7e]
1451
1452 v_ceil_f64 v[5:6], ttmp[14:15]
1453 // CHECK: [0x7a,0x30,0x0a,0x7e]
1454
1455 v_ceil_f64 v[5:6], exec
1456 // CHECK: [0x7e,0x30,0x0a,0x7e]
1457
1458 v_ceil_f64 v[5:6], 0
1459 // CHECK: [0x80,0x30,0x0a,0x7e]
1460
1461 v_ceil_f64 v[5:6], -1
1462 // CHECK: [0xc1,0x30,0x0a,0x7e]
1463
1464 v_ceil_f64 v[5:6], 0.5
1465 // CHECK: [0xf0,0x30,0x0a,0x7e]
1466
1467 v_ceil_f64 v[5:6], -4.0
1468 // CHECK: [0xf7,0x30,0x0a,0x7e]
1469
1470 v_ceil_f64 v[5:6], src_vccz
1471 // CHECK: [0xfb,0x30,0x0a,0x7e]
1472
1473 v_ceil_f64 v[5:6], src_execz
1474 // CHECK: [0xfc,0x30,0x0a,0x7e]
1475
1476 v_ceil_f64 v[5:6], src_scc
1477 // CHECK: [0xfd,0x30,0x0a,0x7e]
1478
1479 v_ceil_f64 v[5:6], 0xaf123456
1480 // CHECK: [0xff,0x30,0x0a,0x7e,0x56,0x34,0x12,0xaf]
1481
1482 v_ceil_f64 v[5:6], 0x3f717273
1483 // CHECK: [0xff,0x30,0x0a,0x7e,0x73,0x72,0x71,0x3f]
1484
1485 v_rndne_f64 v[5:6], v[1:2]
1486 // CHECK: [0x01,0x33,0x0a,0x7e]
1487
1488 v_rndne_f64 v[254:255], v[1:2]
1489 // CHECK: [0x01,0x33,0xfc,0x7f]
1490
1491 v_rndne_f64 v[5:6], v[254:255]
1492 // CHECK: [0xfe,0x33,0x0a,0x7e]
1493
1494 v_rndne_f64 v[5:6], s[2:3]
1495 // CHECK: [0x02,0x32,0x0a,0x7e]
1496
1497 v_rndne_f64 v[5:6], s[4:5]
1498 // CHECK: [0x04,0x32,0x0a,0x7e]
1499
1500 v_rndne_f64 v[5:6], s[100:101]
1501 // CHECK: [0x64,0x32,0x0a,0x7e]
1502
1503 v_rndne_f64 v[5:6], flat_scratch
1504 // CHECK: [0x66,0x32,0x0a,0x7e]
1505
1506 v_rndne_f64 v[5:6], vcc
1507 // CHECK: [0x6a,0x32,0x0a,0x7e]
1508
1509 v_rndne_f64 v[5:6], ttmp[14:15]
1510 // CHECK: [0x7a,0x32,0x0a,0x7e]
1511
1512 v_rndne_f64 v[5:6], exec
1513 // CHECK: [0x7e,0x32,0x0a,0x7e]
1514
1515 v_rndne_f64 v[5:6], 0
1516 // CHECK: [0x80,0x32,0x0a,0x7e]
1517
1518 v_rndne_f64 v[5:6], -1
1519 // CHECK: [0xc1,0x32,0x0a,0x7e]
1520
1521 v_rndne_f64 v[5:6], 0.5
1522 // CHECK: [0xf0,0x32,0x0a,0x7e]
1523
1524 v_rndne_f64 v[5:6], -4.0
1525 // CHECK: [0xf7,0x32,0x0a,0x7e]
1526
1527 v_rndne_f64 v[5:6], src_vccz
1528 // CHECK: [0xfb,0x32,0x0a,0x7e]
1529
1530 v_rndne_f64 v[5:6], src_execz
1531 // CHECK: [0xfc,0x32,0x0a,0x7e]
1532
1533 v_rndne_f64 v[5:6], src_scc
1534 // CHECK: [0xfd,0x32,0x0a,0x7e]
1535
1536 v_rndne_f64 v[5:6], 0xaf123456
1537 // CHECK: [0xff,0x32,0x0a,0x7e,0x56,0x34,0x12,0xaf]
1538
1539 v_rndne_f64 v[5:6], 0x3f717273
1540 // CHECK: [0xff,0x32,0x0a,0x7e,0x73,0x72,0x71,0x3f]
1541
1542 v_floor_f64 v[5:6], v[1:2]
1543 // CHECK: [0x01,0x35,0x0a,0x7e]
1544
1545 v_floor_f64 v[254:255], v[1:2]
1546 // CHECK: [0x01,0x35,0xfc,0x7f]
1547
1548 v_floor_f64 v[5:6], v[254:255]
1549 // CHECK: [0xfe,0x35,0x0a,0x7e]
1550
1551 v_floor_f64 v[5:6], s[2:3]
1552 // CHECK: [0x02,0x34,0x0a,0x7e]
1553
1554 v_floor_f64 v[5:6], s[4:5]
1555 // CHECK: [0x04,0x34,0x0a,0x7e]
1556
1557 v_floor_f64 v[5:6], s[100:101]
1558 // CHECK: [0x64,0x34,0x0a,0x7e]
1559
1560 v_floor_f64 v[5:6], flat_scratch
1561 // CHECK: [0x66,0x34,0x0a,0x7e]
1562
1563 v_floor_f64 v[5:6], vcc
1564 // CHECK: [0x6a,0x34,0x0a,0x7e]
1565
1566 v_floor_f64 v[5:6], ttmp[14:15]
1567 // CHECK: [0x7a,0x34,0x0a,0x7e]
1568
1569 v_floor_f64 v[5:6], exec
1570 // CHECK: [0x7e,0x34,0x0a,0x7e]
1571
1572 v_floor_f64 v[5:6], 0
1573 // CHECK: [0x80,0x34,0x0a,0x7e]
1574
1575 v_floor_f64 v[5:6], -1
1576 // CHECK: [0xc1,0x34,0x0a,0x7e]
1577
1578 v_floor_f64 v[5:6], 0.5
1579 // CHECK: [0xf0,0x34,0x0a,0x7e]
1580
1581 v_floor_f64 v[5:6], -4.0
1582 // CHECK: [0xf7,0x34,0x0a,0x7e]
1583
1584 v_floor_f64 v[5:6], src_vccz
1585 // CHECK: [0xfb,0x34,0x0a,0x7e]
1586
1587 v_floor_f64 v[5:6], src_execz
1588 // CHECK: [0xfc,0x34,0x0a,0x7e]
1589
1590 v_floor_f64 v[5:6], src_scc
1591 // CHECK: [0xfd,0x34,0x0a,0x7e]
1592
1593 v_floor_f64 v[5:6], 0xaf123456
1594 // CHECK: [0xff,0x34,0x0a,0x7e,0x56,0x34,0x12,0xaf]
1595
1596 v_floor_f64 v[5:6], 0x3f717273
1597 // CHECK: [0xff,0x34,0x0a,0x7e,0x73,0x72,0x71,0x3f]
1598
1599 v_fract_f32 v5, v1
1600 // CHECK: [0x01,0x37,0x0a,0x7e]
1601
1602 v_fract_f32 v255, v1
1603 // CHECK: [0x01,0x37,0xfe,0x7f]
1604
1605 v_fract_f32 v5, v255
1606 // CHECK: [0xff,0x37,0x0a,0x7e]
1607
1608 v_fract_f32 v5, s1
1609 // CHECK: [0x01,0x36,0x0a,0x7e]
1610
1611 v_fract_f32 v5, s101
1612 // CHECK: [0x65,0x36,0x0a,0x7e]
1613
1614 v_fract_f32 v5, flat_scratch_lo
1615 // CHECK: [0x66,0x36,0x0a,0x7e]
1616
1617 v_fract_f32 v5, flat_scratch_hi
1618 // CHECK: [0x67,0x36,0x0a,0x7e]
1619
1620 v_fract_f32 v5, vcc_lo
1621 // CHECK: [0x6a,0x36,0x0a,0x7e]
1622
1623 v_fract_f32 v5, vcc_hi
1624 // CHECK: [0x6b,0x36,0x0a,0x7e]
1625
1626 v_fract_f32 v5, ttmp15
1627 // CHECK: [0x7b,0x36,0x0a,0x7e]
1628
1629 v_fract_f32 v5, m0
1630 // CHECK: [0x7c,0x36,0x0a,0x7e]
1631
1632 v_fract_f32 v5, exec_lo
1633 // CHECK: [0x7e,0x36,0x0a,0x7e]
1634
1635 v_fract_f32 v5, exec_hi
1636 // CHECK: [0x7f,0x36,0x0a,0x7e]
1637
1638 v_fract_f32 v5, 0
1639 // CHECK: [0x80,0x36,0x0a,0x7e]
1640
1641 v_fract_f32 v5, -1
1642 // CHECK: [0xc1,0x36,0x0a,0x7e]
1643
1644 v_fract_f32 v5, 0.5
1645 // CHECK: [0xf0,0x36,0x0a,0x7e]
1646
1647 v_fract_f32 v5, -4.0
1648 // CHECK: [0xf7,0x36,0x0a,0x7e]
1649
1650 v_fract_f32 v5, src_vccz
1651 // CHECK: [0xfb,0x36,0x0a,0x7e]
1652
1653 v_fract_f32 v5, src_execz
1654 // CHECK: [0xfc,0x36,0x0a,0x7e]
1655
1656 v_fract_f32 v5, src_scc
1657 // CHECK: [0xfd,0x36,0x0a,0x7e]
1658
1659 v_fract_f32 v5, src_lds_direct
1660 // CHECK: [0xfe,0x36,0x0a,0x7e]
1661
1662 v_fract_f32 v5, 0xaf123456
1663 // CHECK: [0xff,0x36,0x0a,0x7e,0x56,0x34,0x12,0xaf]
1664
1665 v_fract_f32 v5, 0x3f717273
1666 // CHECK: [0xff,0x36,0x0a,0x7e,0x73,0x72,0x71,0x3f]
1667
1668 v_trunc_f32 v5, v1
1669 // CHECK: [0x01,0x39,0x0a,0x7e]
1670
1671 v_trunc_f32 v255, v1
1672 // CHECK: [0x01,0x39,0xfe,0x7f]
1673
1674 v_trunc_f32 v5, v255
1675 // CHECK: [0xff,0x39,0x0a,0x7e]
1676
1677 v_trunc_f32 v5, s1
1678 // CHECK: [0x01,0x38,0x0a,0x7e]
1679
1680 v_trunc_f32 v5, s101
1681 // CHECK: [0x65,0x38,0x0a,0x7e]
1682
1683 v_trunc_f32 v5, flat_scratch_lo
1684 // CHECK: [0x66,0x38,0x0a,0x7e]
1685
1686 v_trunc_f32 v5, flat_scratch_hi
1687 // CHECK: [0x67,0x38,0x0a,0x7e]
1688
1689 v_trunc_f32 v5, vcc_lo
1690 // CHECK: [0x6a,0x38,0x0a,0x7e]
1691
1692 v_trunc_f32 v5, vcc_hi
1693 // CHECK: [0x6b,0x38,0x0a,0x7e]
1694
1695 v_trunc_f32 v5, ttmp15
1696 // CHECK: [0x7b,0x38,0x0a,0x7e]
1697
1698 v_trunc_f32 v5, m0
1699 // CHECK: [0x7c,0x38,0x0a,0x7e]
1700
1701 v_trunc_f32 v5, exec_lo
1702 // CHECK: [0x7e,0x38,0x0a,0x7e]
1703
1704 v_trunc_f32 v5, exec_hi
1705 // CHECK: [0x7f,0x38,0x0a,0x7e]
1706
1707 v_trunc_f32 v5, 0
1708 // CHECK: [0x80,0x38,0x0a,0x7e]
1709
1710 v_trunc_f32 v5, -1
1711 // CHECK: [0xc1,0x38,0x0a,0x7e]
1712
1713 v_trunc_f32 v5, 0.5
1714 // CHECK: [0xf0,0x38,0x0a,0x7e]
1715
1716 v_trunc_f32 v5, -4.0
1717 // CHECK: [0xf7,0x38,0x0a,0x7e]
1718
1719 v_trunc_f32 v5, src_vccz
1720 // CHECK: [0xfb,0x38,0x0a,0x7e]
1721
1722 v_trunc_f32 v5, src_execz
1723 // CHECK: [0xfc,0x38,0x0a,0x7e]
1724
1725 v_trunc_f32 v5, src_scc
1726 // CHECK: [0xfd,0x38,0x0a,0x7e]
1727
1728 v_trunc_f32 v5, src_lds_direct
1729 // CHECK: [0xfe,0x38,0x0a,0x7e]
1730
1731 v_trunc_f32 v5, 0xaf123456
1732 // CHECK: [0xff,0x38,0x0a,0x7e,0x56,0x34,0x12,0xaf]
1733
1734 v_trunc_f32 v5, 0x3f717273
1735 // CHECK: [0xff,0x38,0x0a,0x7e,0x73,0x72,0x71,0x3f]
1736
1737 v_ceil_f32 v5, v1
1738 // CHECK: [0x01,0x3b,0x0a,0x7e]
1739
1740 v_ceil_f32 v255, v1
1741 // CHECK: [0x01,0x3b,0xfe,0x7f]
1742
1743 v_ceil_f32 v5, v255
1744 // CHECK: [0xff,0x3b,0x0a,0x7e]
1745
1746 v_ceil_f32 v5, s1
1747 // CHECK: [0x01,0x3a,0x0a,0x7e]
1748
1749 v_ceil_f32 v5, s101
1750 // CHECK: [0x65,0x3a,0x0a,0x7e]
1751
1752 v_ceil_f32 v5, flat_scratch_lo
1753 // CHECK: [0x66,0x3a,0x0a,0x7e]
1754
1755 v_ceil_f32 v5, flat_scratch_hi
1756 // CHECK: [0x67,0x3a,0x0a,0x7e]
1757
1758 v_ceil_f32 v5, vcc_lo
1759 // CHECK: [0x6a,0x3a,0x0a,0x7e]
1760
1761 v_ceil_f32 v5, vcc_hi
1762 // CHECK: [0x6b,0x3a,0x0a,0x7e]
1763
1764 v_ceil_f32 v5, ttmp15
1765 // CHECK: [0x7b,0x3a,0x0a,0x7e]
1766
1767 v_ceil_f32 v5, m0
1768 // CHECK: [0x7c,0x3a,0x0a,0x7e]
1769
1770 v_ceil_f32 v5, exec_lo
1771 // CHECK: [0x7e,0x3a,0x0a,0x7e]
1772
1773 v_ceil_f32 v5, exec_hi
1774 // CHECK: [0x7f,0x3a,0x0a,0x7e]
1775
1776 v_ceil_f32 v5, 0
1777 // CHECK: [0x80,0x3a,0x0a,0x7e]
1778
1779 v_ceil_f32 v5, -1
1780 // CHECK: [0xc1,0x3a,0x0a,0x7e]
1781
1782 v_ceil_f32 v5, 0.5
1783 // CHECK: [0xf0,0x3a,0x0a,0x7e]
1784
1785 v_ceil_f32 v5, -4.0
1786 // CHECK: [0xf7,0x3a,0x0a,0x7e]
1787
1788 v_ceil_f32 v5, src_vccz
1789 // CHECK: [0xfb,0x3a,0x0a,0x7e]
1790
1791 v_ceil_f32 v5, src_execz
1792 // CHECK: [0xfc,0x3a,0x0a,0x7e]
1793
1794 v_ceil_f32 v5, src_scc
1795 // CHECK: [0xfd,0x3a,0x0a,0x7e]
1796
1797 v_ceil_f32 v5, src_lds_direct
1798 // CHECK: [0xfe,0x3a,0x0a,0x7e]
1799
1800 v_ceil_f32 v5, 0xaf123456
1801 // CHECK: [0xff,0x3a,0x0a,0x7e,0x56,0x34,0x12,0xaf]
1802
1803 v_ceil_f32 v5, 0x3f717273
1804 // CHECK: [0xff,0x3a,0x0a,0x7e,0x73,0x72,0x71,0x3f]
1805
1806 v_rndne_f32 v5, v1
1807 // CHECK: [0x01,0x3d,0x0a,0x7e]
1808
1809 v_rndne_f32 v255, v1
1810 // CHECK: [0x01,0x3d,0xfe,0x7f]
1811
1812 v_rndne_f32 v5, v255
1813 // CHECK: [0xff,0x3d,0x0a,0x7e]
1814
1815 v_rndne_f32 v5, s1
1816 // CHECK: [0x01,0x3c,0x0a,0x7e]
1817
1818 v_rndne_f32 v5, s101
1819 // CHECK: [0x65,0x3c,0x0a,0x7e]
1820
1821 v_rndne_f32 v5, flat_scratch_lo
1822 // CHECK: [0x66,0x3c,0x0a,0x7e]
1823
1824 v_rndne_f32 v5, flat_scratch_hi
1825 // CHECK: [0x67,0x3c,0x0a,0x7e]
1826
1827 v_rndne_f32 v5, vcc_lo
1828 // CHECK: [0x6a,0x3c,0x0a,0x7e]
1829
1830 v_rndne_f32 v5, vcc_hi
1831 // CHECK: [0x6b,0x3c,0x0a,0x7e]
1832
1833 v_rndne_f32 v5, ttmp15
1834 // CHECK: [0x7b,0x3c,0x0a,0x7e]
1835
1836 v_rndne_f32 v5, m0
1837 // CHECK: [0x7c,0x3c,0x0a,0x7e]
1838
1839 v_rndne_f32 v5, exec_lo
1840 // CHECK: [0x7e,0x3c,0x0a,0x7e]
1841
1842 v_rndne_f32 v5, exec_hi
1843 // CHECK: [0x7f,0x3c,0x0a,0x7e]
1844
1845 v_rndne_f32 v5, 0
1846 // CHECK: [0x80,0x3c,0x0a,0x7e]
1847
1848 v_rndne_f32 v5, -1
1849 // CHECK: [0xc1,0x3c,0x0a,0x7e]
1850
1851 v_rndne_f32 v5, 0.5
1852 // CHECK: [0xf0,0x3c,0x0a,0x7e]
1853
1854 v_rndne_f32 v5, -4.0
1855 // CHECK: [0xf7,0x3c,0x0a,0x7e]
1856
1857 v_rndne_f32 v5, src_vccz
1858 // CHECK: [0xfb,0x3c,0x0a,0x7e]
1859
1860 v_rndne_f32 v5, src_execz
1861 // CHECK: [0xfc,0x3c,0x0a,0x7e]
1862
1863 v_rndne_f32 v5, src_scc
1864 // CHECK: [0xfd,0x3c,0x0a,0x7e]
1865
1866 v_rndne_f32 v5, src_lds_direct
1867 // CHECK: [0xfe,0x3c,0x0a,0x7e]
1868
1869 v_rndne_f32 v5, 0xaf123456
1870 // CHECK: [0xff,0x3c,0x0a,0x7e,0x56,0x34,0x12,0xaf]
1871
1872 v_rndne_f32 v5, 0x3f717273
1873 // CHECK: [0xff,0x3c,0x0a,0x7e,0x73,0x72,0x71,0x3f]
1874
1875 v_floor_f32 v5, v1
1876 // CHECK: [0x01,0x3f,0x0a,0x7e]
1877
1878 v_floor_f32 v255, v1
1879 // CHECK: [0x01,0x3f,0xfe,0x7f]
1880
1881 v_floor_f32 v5, v255
1882 // CHECK: [0xff,0x3f,0x0a,0x7e]
1883
1884 v_floor_f32 v5, s1
1885 // CHECK: [0x01,0x3e,0x0a,0x7e]
1886
1887 v_floor_f32 v5, s101
1888 // CHECK: [0x65,0x3e,0x0a,0x7e]
1889
1890 v_floor_f32 v5, flat_scratch_lo
1891 // CHECK: [0x66,0x3e,0x0a,0x7e]
1892
1893 v_floor_f32 v5, flat_scratch_hi
1894 // CHECK: [0x67,0x3e,0x0a,0x7e]
1895
1896 v_floor_f32 v5, vcc_lo
1897 // CHECK: [0x6a,0x3e,0x0a,0x7e]
1898
1899 v_floor_f32 v5, vcc_hi
1900 // CHECK: [0x6b,0x3e,0x0a,0x7e]
1901
1902 v_floor_f32 v5, ttmp15
1903 // CHECK: [0x7b,0x3e,0x0a,0x7e]
1904
1905 v_floor_f32 v5, m0
1906 // CHECK: [0x7c,0x3e,0x0a,0x7e]
1907
1908 v_floor_f32 v5, exec_lo
1909 // CHECK: [0x7e,0x3e,0x0a,0x7e]
1910
1911 v_floor_f32 v5, exec_hi
1912 // CHECK: [0x7f,0x3e,0x0a,0x7e]
1913
1914 v_floor_f32 v5, 0
1915 // CHECK: [0x80,0x3e,0x0a,0x7e]
1916
1917 v_floor_f32 v5, -1
1918 // CHECK: [0xc1,0x3e,0x0a,0x7e]
1919
1920 v_floor_f32 v5, 0.5
1921 // CHECK: [0xf0,0x3e,0x0a,0x7e]
1922
1923 v_floor_f32 v5, -4.0
1924 // CHECK: [0xf7,0x3e,0x0a,0x7e]
1925
1926 v_floor_f32 v5, src_vccz
1927 // CHECK: [0xfb,0x3e,0x0a,0x7e]
1928
1929 v_floor_f32 v5, src_execz
1930 // CHECK: [0xfc,0x3e,0x0a,0x7e]
1931
1932 v_floor_f32 v5, src_scc
1933 // CHECK: [0xfd,0x3e,0x0a,0x7e]
1934
1935 v_floor_f32 v5, src_lds_direct
1936 // CHECK: [0xfe,0x3e,0x0a,0x7e]
1937
1938 v_floor_f32 v5, 0xaf123456
1939 // CHECK: [0xff,0x3e,0x0a,0x7e,0x56,0x34,0x12,0xaf]
1940
1941 v_floor_f32 v5, 0x3f717273
1942 // CHECK: [0xff,0x3e,0x0a,0x7e,0x73,0x72,0x71,0x3f]
1943
1944 v_exp_f32 v5, v1
1945 // CHECK: [0x01,0x41,0x0a,0x7e]
1946
1947 v_exp_f32 v255, v1
1948 // CHECK: [0x01,0x41,0xfe,0x7f]
1949
1950 v_exp_f32 v5, v255
1951 // CHECK: [0xff,0x41,0x0a,0x7e]
1952
1953 v_exp_f32 v5, s1
1954 // CHECK: [0x01,0x40,0x0a,0x7e]
1955
1956 v_exp_f32 v5, s101
1957 // CHECK: [0x65,0x40,0x0a,0x7e]
1958
1959 v_exp_f32 v5, flat_scratch_lo
1960 // CHECK: [0x66,0x40,0x0a,0x7e]
1961
1962 v_exp_f32 v5, flat_scratch_hi
1963 // CHECK: [0x67,0x40,0x0a,0x7e]
1964
1965 v_exp_f32 v5, vcc_lo
1966 // CHECK: [0x6a,0x40,0x0a,0x7e]
1967
1968 v_exp_f32 v5, vcc_hi
1969 // CHECK: [0x6b,0x40,0x0a,0x7e]
1970
1971 v_exp_f32 v5, ttmp15
1972 // CHECK: [0x7b,0x40,0x0a,0x7e]
1973
1974 v_exp_f32 v5, m0
1975 // CHECK: [0x7c,0x40,0x0a,0x7e]
1976
1977 v_exp_f32 v5, exec_lo
1978 // CHECK: [0x7e,0x40,0x0a,0x7e]
1979
1980 v_exp_f32 v5, exec_hi
1981 // CHECK: [0x7f,0x40,0x0a,0x7e]
1982
1983 v_exp_f32 v5, 0
1984 // CHECK: [0x80,0x40,0x0a,0x7e]
1985
1986 v_exp_f32 v5, -1
1987 // CHECK: [0xc1,0x40,0x0a,0x7e]
1988
1989 v_exp_f32 v5, 0.5
1990 // CHECK: [0xf0,0x40,0x0a,0x7e]
1991
1992 v_exp_f32 v5, -4.0
1993 // CHECK: [0xf7,0x40,0x0a,0x7e]
1994
1995 v_exp_f32 v5, src_vccz
1996 // CHECK: [0xfb,0x40,0x0a,0x7e]
1997
1998 v_exp_f32 v5, src_execz
1999 // CHECK: [0xfc,0x40,0x0a,0x7e]
2000
2001 v_exp_f32 v5, src_scc
2002 // CHECK: [0xfd,0x40,0x0a,0x7e]
2003
2004 v_exp_f32 v5, src_lds_direct
2005 // CHECK: [0xfe,0x40,0x0a,0x7e]
2006
2007 v_exp_f32 v5, 0xaf123456
2008 // CHECK: [0xff,0x40,0x0a,0x7e,0x56,0x34,0x12,0xaf]
2009
2010 v_exp_f32 v5, 0x3f717273
2011 // CHECK: [0xff,0x40,0x0a,0x7e,0x73,0x72,0x71,0x3f]
2012
2013 v_log_f32 v5, v1
2014 // CHECK: [0x01,0x43,0x0a,0x7e]
2015
2016 v_log_f32 v255, v1
2017 // CHECK: [0x01,0x43,0xfe,0x7f]
2018
2019 v_log_f32 v5, v255
2020 // CHECK: [0xff,0x43,0x0a,0x7e]
2021
2022 v_log_f32 v5, s1
2023 // CHECK: [0x01,0x42,0x0a,0x7e]
2024
2025 v_log_f32 v5, s101
2026 // CHECK: [0x65,0x42,0x0a,0x7e]
2027
2028 v_log_f32 v5, flat_scratch_lo
2029 // CHECK: [0x66,0x42,0x0a,0x7e]
2030
2031 v_log_f32 v5, flat_scratch_hi
2032 // CHECK: [0x67,0x42,0x0a,0x7e]
2033
2034 v_log_f32 v5, vcc_lo
2035 // CHECK: [0x6a,0x42,0x0a,0x7e]
2036
2037 v_log_f32 v5, vcc_hi
2038 // CHECK: [0x6b,0x42,0x0a,0x7e]
2039
2040 v_log_f32 v5, ttmp15
2041 // CHECK: [0x7b,0x42,0x0a,0x7e]
2042
2043 v_log_f32 v5, m0
2044 // CHECK: [0x7c,0x42,0x0a,0x7e]
2045
2046 v_log_f32 v5, exec_lo
2047 // CHECK: [0x7e,0x42,0x0a,0x7e]
2048
2049 v_log_f32 v5, exec_hi
2050 // CHECK: [0x7f,0x42,0x0a,0x7e]
2051
2052 v_log_f32 v5, 0
2053 // CHECK: [0x80,0x42,0x0a,0x7e]
2054
2055 v_log_f32 v5, -1
2056 // CHECK: [0xc1,0x42,0x0a,0x7e]
2057
2058 v_log_f32 v5, 0.5
2059 // CHECK: [0xf0,0x42,0x0a,0x7e]
2060
2061 v_log_f32 v5, -4.0
2062 // CHECK: [0xf7,0x42,0x0a,0x7e]
2063
2064 v_log_f32 v5, src_vccz
2065 // CHECK: [0xfb,0x42,0x0a,0x7e]
2066
2067 v_log_f32 v5, src_execz
2068 // CHECK: [0xfc,0x42,0x0a,0x7e]
2069
2070 v_log_f32 v5, src_scc
2071 // CHECK: [0xfd,0x42,0x0a,0x7e]
2072
2073 v_log_f32 v5, src_lds_direct
2074 // CHECK: [0xfe,0x42,0x0a,0x7e]
2075
2076 v_log_f32 v5, 0xaf123456
2077 // CHECK: [0xff,0x42,0x0a,0x7e,0x56,0x34,0x12,0xaf]
2078
2079 v_log_f32 v5, 0x3f717273
2080 // CHECK: [0xff,0x42,0x0a,0x7e,0x73,0x72,0x71,0x3f]
2081
2082 v_rcp_f32 v5, v1
2083 // CHECK: [0x01,0x45,0x0a,0x7e]
2084
2085 v_rcp_f32 v255, v1
2086 // CHECK: [0x01,0x45,0xfe,0x7f]
2087
2088 v_rcp_f32 v5, v255
2089 // CHECK: [0xff,0x45,0x0a,0x7e]
2090
2091 v_rcp_f32 v5, s1
2092 // CHECK: [0x01,0x44,0x0a,0x7e]
2093
2094 v_rcp_f32 v5, s101
2095 // CHECK: [0x65,0x44,0x0a,0x7e]
2096
2097 v_rcp_f32 v5, flat_scratch_lo
2098 // CHECK: [0x66,0x44,0x0a,0x7e]
2099
2100 v_rcp_f32 v5, flat_scratch_hi
2101 // CHECK: [0x67,0x44,0x0a,0x7e]
2102
2103 v_rcp_f32 v5, vcc_lo
2104 // CHECK: [0x6a,0x44,0x0a,0x7e]
2105
2106 v_rcp_f32 v5, vcc_hi
2107 // CHECK: [0x6b,0x44,0x0a,0x7e]
2108
2109 v_rcp_f32 v5, ttmp15
2110 // CHECK: [0x7b,0x44,0x0a,0x7e]
2111
2112 v_rcp_f32 v5, m0
2113 // CHECK: [0x7c,0x44,0x0a,0x7e]
2114
2115 v_rcp_f32 v5, exec_lo
2116 // CHECK: [0x7e,0x44,0x0a,0x7e]
2117
2118 v_rcp_f32 v5, exec_hi
2119 // CHECK: [0x7f,0x44,0x0a,0x7e]
2120
2121 v_rcp_f32 v5, 0
2122 // CHECK: [0x80,0x44,0x0a,0x7e]
2123
2124 v_rcp_f32 v5, -1
2125 // CHECK: [0xc1,0x44,0x0a,0x7e]
2126
2127 v_rcp_f32 v5, 0.5
2128 // CHECK: [0xf0,0x44,0x0a,0x7e]
2129
2130 v_rcp_f32 v5, -4.0
2131 // CHECK: [0xf7,0x44,0x0a,0x7e]
2132
2133 v_rcp_f32 v5, src_vccz
2134 // CHECK: [0xfb,0x44,0x0a,0x7e]
2135
2136 v_rcp_f32 v5, src_execz
2137 // CHECK: [0xfc,0x44,0x0a,0x7e]
2138
2139 v_rcp_f32 v5, src_scc
2140 // CHECK: [0xfd,0x44,0x0a,0x7e]
2141
2142 v_rcp_f32 v5, src_lds_direct
2143 // CHECK: [0xfe,0x44,0x0a,0x7e]
2144
2145 v_rcp_f32 v5, 0xaf123456
2146 // CHECK: [0xff,0x44,0x0a,0x7e,0x56,0x34,0x12,0xaf]
2147
2148 v_rcp_f32 v5, 0x3f717273
2149 // CHECK: [0xff,0x44,0x0a,0x7e,0x73,0x72,0x71,0x3f]
2150
2151 v_rcp_iflag_f32 v5, v1
2152 // CHECK: [0x01,0x47,0x0a,0x7e]
2153
2154 v_rcp_iflag_f32 v255, v1
2155 // CHECK: [0x01,0x47,0xfe,0x7f]
2156
2157 v_rcp_iflag_f32 v5, v255
2158 // CHECK: [0xff,0x47,0x0a,0x7e]
2159
2160 v_rcp_iflag_f32 v5, s1
2161 // CHECK: [0x01,0x46,0x0a,0x7e]
2162
2163 v_rcp_iflag_f32 v5, s101
2164 // CHECK: [0x65,0x46,0x0a,0x7e]
2165
2166 v_rcp_iflag_f32 v5, flat_scratch_lo
2167 // CHECK: [0x66,0x46,0x0a,0x7e]
2168
2169 v_rcp_iflag_f32 v5, flat_scratch_hi
2170 // CHECK: [0x67,0x46,0x0a,0x7e]
2171
2172 v_rcp_iflag_f32 v5, vcc_lo
2173 // CHECK: [0x6a,0x46,0x0a,0x7e]
2174
2175 v_rcp_iflag_f32 v5, vcc_hi
2176 // CHECK: [0x6b,0x46,0x0a,0x7e]
2177
2178 v_rcp_iflag_f32 v5, ttmp15
2179 // CHECK: [0x7b,0x46,0x0a,0x7e]
2180
2181 v_rcp_iflag_f32 v5, m0
2182 // CHECK: [0x7c,0x46,0x0a,0x7e]
2183
2184 v_rcp_iflag_f32 v5, exec_lo
2185 // CHECK: [0x7e,0x46,0x0a,0x7e]
2186
2187 v_rcp_iflag_f32 v5, exec_hi
2188 // CHECK: [0x7f,0x46,0x0a,0x7e]
2189
2190 v_rcp_iflag_f32 v5, 0
2191 // CHECK: [0x80,0x46,0x0a,0x7e]
2192
2193 v_rcp_iflag_f32 v5, -1
2194 // CHECK: [0xc1,0x46,0x0a,0x7e]
2195
2196 v_rcp_iflag_f32 v5, 0.5
2197 // CHECK: [0xf0,0x46,0x0a,0x7e]
2198
2199 v_rcp_iflag_f32 v5, -4.0
2200 // CHECK: [0xf7,0x46,0x0a,0x7e]
2201
2202 v_rcp_iflag_f32 v5, src_vccz
2203 // CHECK: [0xfb,0x46,0x0a,0x7e]
2204
2205 v_rcp_iflag_f32 v5, src_execz
2206 // CHECK: [0xfc,0x46,0x0a,0x7e]
2207
2208 v_rcp_iflag_f32 v5, src_scc
2209 // CHECK: [0xfd,0x46,0x0a,0x7e]
2210
2211 v_rcp_iflag_f32 v5, src_lds_direct
2212 // CHECK: [0xfe,0x46,0x0a,0x7e]
2213
2214 v_rcp_iflag_f32 v5, 0xaf123456
2215 // CHECK: [0xff,0x46,0x0a,0x7e,0x56,0x34,0x12,0xaf]
2216
2217 v_rcp_iflag_f32 v5, 0x3f717273
2218 // CHECK: [0xff,0x46,0x0a,0x7e,0x73,0x72,0x71,0x3f]
2219
2220 v_rsq_f32 v5, v1
2221 // CHECK: [0x01,0x49,0x0a,0x7e]
2222
2223 v_rsq_f32 v255, v1
2224 // CHECK: [0x01,0x49,0xfe,0x7f]
2225
2226 v_rsq_f32 v5, v255
2227 // CHECK: [0xff,0x49,0x0a,0x7e]
2228
2229 v_rsq_f32 v5, s1
2230 // CHECK: [0x01,0x48,0x0a,0x7e]
2231
2232 v_rsq_f32 v5, s101
2233 // CHECK: [0x65,0x48,0x0a,0x7e]
2234
2235 v_rsq_f32 v5, flat_scratch_lo
2236 // CHECK: [0x66,0x48,0x0a,0x7e]
2237
2238 v_rsq_f32 v5, flat_scratch_hi
2239 // CHECK: [0x67,0x48,0x0a,0x7e]
2240
2241 v_rsq_f32 v5, vcc_lo
2242 // CHECK: [0x6a,0x48,0x0a,0x7e]
2243
2244 v_rsq_f32 v5, vcc_hi
2245 // CHECK: [0x6b,0x48,0x0a,0x7e]
2246
2247 v_rsq_f32 v5, ttmp15
2248 // CHECK: [0x7b,0x48,0x0a,0x7e]
2249
2250 v_rsq_f32 v5, m0
2251 // CHECK: [0x7c,0x48,0x0a,0x7e]
2252
2253 v_rsq_f32 v5, exec_lo
2254 // CHECK: [0x7e,0x48,0x0a,0x7e]
2255
2256 v_rsq_f32 v5, exec_hi
2257 // CHECK: [0x7f,0x48,0x0a,0x7e]
2258
2259 v_rsq_f32 v5, 0
2260 // CHECK: [0x80,0x48,0x0a,0x7e]
2261
2262 v_rsq_f32 v5, -1
2263 // CHECK: [0xc1,0x48,0x0a,0x7e]
2264
2265 v_rsq_f32 v5, 0.5
2266 // CHECK: [0xf0,0x48,0x0a,0x7e]
2267
2268 v_rsq_f32 v5, -4.0
2269 // CHECK: [0xf7,0x48,0x0a,0x7e]
2270
2271 v_rsq_f32 v5, src_vccz
2272 // CHECK: [0xfb,0x48,0x0a,0x7e]
2273
2274 v_rsq_f32 v5, src_execz
2275 // CHECK: [0xfc,0x48,0x0a,0x7e]
2276
2277 v_rsq_f32 v5, src_scc
2278 // CHECK: [0xfd,0x48,0x0a,0x7e]
2279
2280 v_rsq_f32 v5, src_lds_direct
2281 // CHECK: [0xfe,0x48,0x0a,0x7e]
2282
2283 v_rsq_f32 v5, 0xaf123456
2284 // CHECK: [0xff,0x48,0x0a,0x7e,0x56,0x34,0x12,0xaf]
2285
2286 v_rsq_f32 v5, 0x3f717273
2287 // CHECK: [0xff,0x48,0x0a,0x7e,0x73,0x72,0x71,0x3f]
2288
2289 v_rcp_f64 v[5:6], v[1:2]
2290 // CHECK: [0x01,0x4b,0x0a,0x7e]
2291
2292 v_rcp_f64 v[254:255], v[1:2]
2293 // CHECK: [0x01,0x4b,0xfc,0x7f]
2294
2295 v_rcp_f64 v[5:6], v[254:255]
2296 // CHECK: [0xfe,0x4b,0x0a,0x7e]
2297
2298 v_rcp_f64 v[5:6], s[2:3]
2299 // CHECK: [0x02,0x4a,0x0a,0x7e]
2300
2301 v_rcp_f64 v[5:6], s[4:5]
2302 // CHECK: [0x04,0x4a,0x0a,0x7e]
2303
2304 v_rcp_f64 v[5:6], s[100:101]
2305 // CHECK: [0x64,0x4a,0x0a,0x7e]
2306
2307 v_rcp_f64 v[5:6], flat_scratch
2308 // CHECK: [0x66,0x4a,0x0a,0x7e]
2309
2310 v_rcp_f64 v[5:6], vcc
2311 // CHECK: [0x6a,0x4a,0x0a,0x7e]
2312
2313 v_rcp_f64 v[5:6], ttmp[14:15]
2314 // CHECK: [0x7a,0x4a,0x0a,0x7e]
2315
2316 v_rcp_f64 v[5:6], exec
2317 // CHECK: [0x7e,0x4a,0x0a,0x7e]
2318
2319 v_rcp_f64 v[5:6], 0
2320 // CHECK: [0x80,0x4a,0x0a,0x7e]
2321
2322 v_rcp_f64 v[5:6], -1
2323 // CHECK: [0xc1,0x4a,0x0a,0x7e]
2324
2325 v_rcp_f64 v[5:6], 0.5
2326 // CHECK: [0xf0,0x4a,0x0a,0x7e]
2327
2328 v_rcp_f64 v[5:6], -4.0
2329 // CHECK: [0xf7,0x4a,0x0a,0x7e]
2330
2331 v_rcp_f64 v[5:6], src_vccz
2332 // CHECK: [0xfb,0x4a,0x0a,0x7e]
2333
2334 v_rcp_f64 v[5:6], src_execz
2335 // CHECK: [0xfc,0x4a,0x0a,0x7e]
2336
2337 v_rcp_f64 v[5:6], src_scc
2338 // CHECK: [0xfd,0x4a,0x0a,0x7e]
2339
2340 v_rcp_f64 v[5:6], 0xaf123456
2341 // CHECK: [0xff,0x4a,0x0a,0x7e,0x56,0x34,0x12,0xaf]
2342
2343 v_rcp_f64 v[5:6], 0x3f717273
2344 // CHECK: [0xff,0x4a,0x0a,0x7e,0x73,0x72,0x71,0x3f]
2345
2346 v_rsq_f64 v[5:6], v[1:2]
2347 // CHECK: [0x01,0x4d,0x0a,0x7e]
2348
2349 v_rsq_f64 v[254:255], v[1:2]
2350 // CHECK: [0x01,0x4d,0xfc,0x7f]
2351
2352 v_rsq_f64 v[5:6], v[254:255]
2353 // CHECK: [0xfe,0x4d,0x0a,0x7e]
2354
2355 v_rsq_f64 v[5:6], s[2:3]
2356 // CHECK: [0x02,0x4c,0x0a,0x7e]
2357
2358 v_rsq_f64 v[5:6], s[4:5]
2359 // CHECK: [0x04,0x4c,0x0a,0x7e]
2360
2361 v_rsq_f64 v[5:6], s[100:101]
2362 // CHECK: [0x64,0x4c,0x0a,0x7e]
2363
2364 v_rsq_f64 v[5:6], flat_scratch
2365 // CHECK: [0x66,0x4c,0x0a,0x7e]
2366
2367 v_rsq_f64 v[5:6], vcc
2368 // CHECK: [0x6a,0x4c,0x0a,0x7e]
2369
2370 v_rsq_f64 v[5:6], ttmp[14:15]
2371 // CHECK: [0x7a,0x4c,0x0a,0x7e]
2372
2373 v_rsq_f64 v[5:6], exec
2374 // CHECK: [0x7e,0x4c,0x0a,0x7e]
2375
2376 v_rsq_f64 v[5:6], 0
2377 // CHECK: [0x80,0x4c,0x0a,0x7e]
2378
2379 v_rsq_f64 v[5:6], -1
2380 // CHECK: [0xc1,0x4c,0x0a,0x7e]
2381
2382 v_rsq_f64 v[5:6], 0.5
2383 // CHECK: [0xf0,0x4c,0x0a,0x7e]
2384
2385 v_rsq_f64 v[5:6], -4.0
2386 // CHECK: [0xf7,0x4c,0x0a,0x7e]
2387
2388 v_rsq_f64 v[5:6], src_vccz
2389 // CHECK: [0xfb,0x4c,0x0a,0x7e]
2390
2391 v_rsq_f64 v[5:6], src_execz
2392 // CHECK: [0xfc,0x4c,0x0a,0x7e]
2393
2394 v_rsq_f64 v[5:6], src_scc
2395 // CHECK: [0xfd,0x4c,0x0a,0x7e]
2396
2397 v_rsq_f64 v[5:6], 0xaf123456
2398 // CHECK: [0xff,0x4c,0x0a,0x7e,0x56,0x34,0x12,0xaf]
2399
2400 v_rsq_f64 v[5:6], 0x3f717273
2401 // CHECK: [0xff,0x4c,0x0a,0x7e,0x73,0x72,0x71,0x3f]
2402
2403 v_sqrt_f32 v5, v1
2404 // CHECK: [0x01,0x4f,0x0a,0x7e]
2405
2406 v_sqrt_f32 v255, v1
2407 // CHECK: [0x01,0x4f,0xfe,0x7f]
2408
2409 v_sqrt_f32 v5, v255
2410 // CHECK: [0xff,0x4f,0x0a,0x7e]
2411
2412 v_sqrt_f32 v5, s1
2413 // CHECK: [0x01,0x4e,0x0a,0x7e]
2414
2415 v_sqrt_f32 v5, s101
2416 // CHECK: [0x65,0x4e,0x0a,0x7e]
2417
2418 v_sqrt_f32 v5, flat_scratch_lo
2419 // CHECK: [0x66,0x4e,0x0a,0x7e]
2420
2421 v_sqrt_f32 v5, flat_scratch_hi
2422 // CHECK: [0x67,0x4e,0x0a,0x7e]
2423
2424 v_sqrt_f32 v5, vcc_lo
2425 // CHECK: [0x6a,0x4e,0x0a,0x7e]
2426
2427 v_sqrt_f32 v5, vcc_hi
2428 // CHECK: [0x6b,0x4e,0x0a,0x7e]
2429
2430 v_sqrt_f32 v5, ttmp15
2431 // CHECK: [0x7b,0x4e,0x0a,0x7e]
2432
2433 v_sqrt_f32 v5, m0
2434 // CHECK: [0x7c,0x4e,0x0a,0x7e]
2435
2436 v_sqrt_f32 v5, exec_lo
2437 // CHECK: [0x7e,0x4e,0x0a,0x7e]
2438
2439 v_sqrt_f32 v5, exec_hi
2440 // CHECK: [0x7f,0x4e,0x0a,0x7e]
2441
2442 v_sqrt_f32 v5, 0
2443 // CHECK: [0x80,0x4e,0x0a,0x7e]
2444
2445 v_sqrt_f32 v5, -1
2446 // CHECK: [0xc1,0x4e,0x0a,0x7e]
2447
2448 v_sqrt_f32 v5, 0.5
2449 // CHECK: [0xf0,0x4e,0x0a,0x7e]
2450
2451 v_sqrt_f32 v5, -4.0
2452 // CHECK: [0xf7,0x4e,0x0a,0x7e]
2453
2454 v_sqrt_f32 v5, src_vccz
2455 // CHECK: [0xfb,0x4e,0x0a,0x7e]
2456
2457 v_sqrt_f32 v5, src_execz
2458 // CHECK: [0xfc,0x4e,0x0a,0x7e]
2459
2460 v_sqrt_f32 v5, src_scc
2461 // CHECK: [0xfd,0x4e,0x0a,0x7e]
2462
2463 v_sqrt_f32 v5, src_lds_direct
2464 // CHECK: [0xfe,0x4e,0x0a,0x7e]
2465
2466 v_sqrt_f32 v5, 0xaf123456
2467 // CHECK: [0xff,0x4e,0x0a,0x7e,0x56,0x34,0x12,0xaf]
2468
2469 v_sqrt_f32 v5, 0x3f717273
2470 // CHECK: [0xff,0x4e,0x0a,0x7e,0x73,0x72,0x71,0x3f]
2471
2472 v_sqrt_f64 v[5:6], v[1:2]
2473 // CHECK: [0x01,0x51,0x0a,0x7e]
2474
2475 v_sqrt_f64 v[254:255], v[1:2]
2476 // CHECK: [0x01,0x51,0xfc,0x7f]
2477
2478 v_sqrt_f64 v[5:6], v[254:255]
2479 // CHECK: [0xfe,0x51,0x0a,0x7e]
2480
2481 v_sqrt_f64 v[5:6], s[2:3]
2482 // CHECK: [0x02,0x50,0x0a,0x7e]
2483
2484 v_sqrt_f64 v[5:6], s[4:5]
2485 // CHECK: [0x04,0x50,0x0a,0x7e]
2486
2487 v_sqrt_f64 v[5:6], s[100:101]
2488 // CHECK: [0x64,0x50,0x0a,0x7e]
2489
2490 v_sqrt_f64 v[5:6], flat_scratch
2491 // CHECK: [0x66,0x50,0x0a,0x7e]
2492
2493 v_sqrt_f64 v[5:6], vcc
2494 // CHECK: [0x6a,0x50,0x0a,0x7e]
2495
2496 v_sqrt_f64 v[5:6], ttmp[14:15]
2497 // CHECK: [0x7a,0x50,0x0a,0x7e]
2498
2499 v_sqrt_f64 v[5:6], exec
2500 // CHECK: [0x7e,0x50,0x0a,0x7e]
2501
2502 v_sqrt_f64 v[5:6], 0
2503 // CHECK: [0x80,0x50,0x0a,0x7e]
2504
2505 v_sqrt_f64 v[5:6], -1
2506 // CHECK: [0xc1,0x50,0x0a,0x7e]
2507
2508 v_sqrt_f64 v[5:6], 0.5
2509 // CHECK: [0xf0,0x50,0x0a,0x7e]
2510
2511 v_sqrt_f64 v[5:6], -4.0
2512 // CHECK: [0xf7,0x50,0x0a,0x7e]
2513
2514 v_sqrt_f64 v[5:6], src_vccz
2515 // CHECK: [0xfb,0x50,0x0a,0x7e]
2516
2517 v_sqrt_f64 v[5:6], src_execz
2518 // CHECK: [0xfc,0x50,0x0a,0x7e]
2519
2520 v_sqrt_f64 v[5:6], src_scc
2521 // CHECK: [0xfd,0x50,0x0a,0x7e]
2522
2523 v_sqrt_f64 v[5:6], 0xaf123456
2524 // CHECK: [0xff,0x50,0x0a,0x7e,0x56,0x34,0x12,0xaf]
2525
2526 v_sqrt_f64 v[5:6], 0x3f717273
2527 // CHECK: [0xff,0x50,0x0a,0x7e,0x73,0x72,0x71,0x3f]
2528
2529 v_sin_f32 v5, v1
2530 // CHECK: [0x01,0x53,0x0a,0x7e]
2531
2532 v_sin_f32 v255, v1
2533 // CHECK: [0x01,0x53,0xfe,0x7f]
2534
2535 v_sin_f32 v5, v255
2536 // CHECK: [0xff,0x53,0x0a,0x7e]
2537
2538 v_sin_f32 v5, s1
2539 // CHECK: [0x01,0x52,0x0a,0x7e]
2540
2541 v_sin_f32 v5, s101
2542 // CHECK: [0x65,0x52,0x0a,0x7e]
2543
2544 v_sin_f32 v5, flat_scratch_lo
2545 // CHECK: [0x66,0x52,0x0a,0x7e]
2546
2547 v_sin_f32 v5, flat_scratch_hi
2548 // CHECK: [0x67,0x52,0x0a,0x7e]
2549
2550 v_sin_f32 v5, vcc_lo
2551 // CHECK: [0x6a,0x52,0x0a,0x7e]
2552
2553 v_sin_f32 v5, vcc_hi
2554 // CHECK: [0x6b,0x52,0x0a,0x7e]
2555
2556 v_sin_f32 v5, ttmp15
2557 // CHECK: [0x7b,0x52,0x0a,0x7e]
2558
2559 v_sin_f32 v5, m0
2560 // CHECK: [0x7c,0x52,0x0a,0x7e]
2561
2562 v_sin_f32 v5, exec_lo
2563 // CHECK: [0x7e,0x52,0x0a,0x7e]
2564
2565 v_sin_f32 v5, exec_hi
2566 // CHECK: [0x7f,0x52,0x0a,0x7e]
2567
2568 v_sin_f32 v5, 0
2569 // CHECK: [0x80,0x52,0x0a,0x7e]
2570
2571 v_sin_f32 v5, -1
2572 // CHECK: [0xc1,0x52,0x0a,0x7e]
2573
2574 v_sin_f32 v5, 0.5
2575 // CHECK: [0xf0,0x52,0x0a,0x7e]
2576
2577 v_sin_f32 v5, -4.0
2578 // CHECK: [0xf7,0x52,0x0a,0x7e]
2579
2580 v_sin_f32 v5, src_vccz
2581 // CHECK: [0xfb,0x52,0x0a,0x7e]
2582
2583 v_sin_f32 v5, src_execz
2584 // CHECK: [0xfc,0x52,0x0a,0x7e]
2585
2586 v_sin_f32 v5, src_scc
2587 // CHECK: [0xfd,0x52,0x0a,0x7e]
2588
2589 v_sin_f32 v5, src_lds_direct
2590 // CHECK: [0xfe,0x52,0x0a,0x7e]
2591
2592 v_sin_f32 v5, 0xaf123456
2593 // CHECK: [0xff,0x52,0x0a,0x7e,0x56,0x34,0x12,0xaf]
2594
2595 v_sin_f32 v5, 0x3f717273
2596 // CHECK: [0xff,0x52,0x0a,0x7e,0x73,0x72,0x71,0x3f]
2597
2598 v_cos_f32 v5, v1
2599 // CHECK: [0x01,0x55,0x0a,0x7e]
2600
2601 v_cos_f32 v255, v1
2602 // CHECK: [0x01,0x55,0xfe,0x7f]
2603
2604 v_cos_f32 v5, v255
2605 // CHECK: [0xff,0x55,0x0a,0x7e]
2606
2607 v_cos_f32 v5, s1
2608 // CHECK: [0x01,0x54,0x0a,0x7e]
2609
2610 v_cos_f32 v5, s101
2611 // CHECK: [0x65,0x54,0x0a,0x7e]
2612
2613 v_cos_f32 v5, flat_scratch_lo
2614 // CHECK: [0x66,0x54,0x0a,0x7e]
2615
2616 v_cos_f32 v5, flat_scratch_hi
2617 // CHECK: [0x67,0x54,0x0a,0x7e]
2618
2619 v_cos_f32 v5, vcc_lo
2620 // CHECK: [0x6a,0x54,0x0a,0x7e]
2621
2622 v_cos_f32 v5, vcc_hi
2623 // CHECK: [0x6b,0x54,0x0a,0x7e]
2624
2625 v_cos_f32 v5, ttmp15
2626 // CHECK: [0x7b,0x54,0x0a,0x7e]
2627
2628 v_cos_f32 v5, m0
2629 // CHECK: [0x7c,0x54,0x0a,0x7e]
2630
2631 v_cos_f32 v5, exec_lo
2632 // CHECK: [0x7e,0x54,0x0a,0x7e]
2633
2634 v_cos_f32 v5, exec_hi
2635 // CHECK: [0x7f,0x54,0x0a,0x7e]
2636
2637 v_cos_f32 v5, 0
2638 // CHECK: [0x80,0x54,0x0a,0x7e]
2639
2640 v_cos_f32 v5, -1
2641 // CHECK: [0xc1,0x54,0x0a,0x7e]
2642
2643 v_cos_f32 v5, 0.5
2644 // CHECK: [0xf0,0x54,0x0a,0x7e]
2645
2646 v_cos_f32 v5, -4.0
2647 // CHECK: [0xf7,0x54,0x0a,0x7e]
2648
2649 v_cos_f32 v5, src_vccz
2650 // CHECK: [0xfb,0x54,0x0a,0x7e]
2651
2652 v_cos_f32 v5, src_execz
2653 // CHECK: [0xfc,0x54,0x0a,0x7e]
2654
2655 v_cos_f32 v5, src_scc
2656 // CHECK: [0xfd,0x54,0x0a,0x7e]
2657
2658 v_cos_f32 v5, src_lds_direct
2659 // CHECK: [0xfe,0x54,0x0a,0x7e]
2660
2661 v_cos_f32 v5, 0xaf123456
2662 // CHECK: [0xff,0x54,0x0a,0x7e,0x56,0x34,0x12,0xaf]
2663
2664 v_cos_f32 v5, 0x3f717273
2665 // CHECK: [0xff,0x54,0x0a,0x7e,0x73,0x72,0x71,0x3f]
2666
2667 v_not_b32 v5, v1
2668 // CHECK: [0x01,0x57,0x0a,0x7e]
2669
2670 v_not_b32 v255, v1
2671 // CHECK: [0x01,0x57,0xfe,0x7f]
2672
2673 v_not_b32 v5, v255
2674 // CHECK: [0xff,0x57,0x0a,0x7e]
2675
2676 v_not_b32 v5, s1
2677 // CHECK: [0x01,0x56,0x0a,0x7e]
2678
2679 v_not_b32 v5, s101
2680 // CHECK: [0x65,0x56,0x0a,0x7e]
2681
2682 v_not_b32 v5, flat_scratch_lo
2683 // CHECK: [0x66,0x56,0x0a,0x7e]
2684
2685 v_not_b32 v5, flat_scratch_hi
2686 // CHECK: [0x67,0x56,0x0a,0x7e]
2687
2688 v_not_b32 v5, vcc_lo
2689 // CHECK: [0x6a,0x56,0x0a,0x7e]
2690
2691 v_not_b32 v5, vcc_hi
2692 // CHECK: [0x6b,0x56,0x0a,0x7e]
2693
2694 v_not_b32 v5, ttmp15
2695 // CHECK: [0x7b,0x56,0x0a,0x7e]
2696
2697 v_not_b32 v5, m0
2698 // CHECK: [0x7c,0x56,0x0a,0x7e]
2699
2700 v_not_b32 v5, exec_lo
2701 // CHECK: [0x7e,0x56,0x0a,0x7e]
2702
2703 v_not_b32 v5, exec_hi
2704 // CHECK: [0x7f,0x56,0x0a,0x7e]
2705
2706 v_not_b32 v5, 0
2707 // CHECK: [0x80,0x56,0x0a,0x7e]
2708
2709 v_not_b32 v5, -1
2710 // CHECK: [0xc1,0x56,0x0a,0x7e]
2711
2712 v_not_b32 v5, 0.5
2713 // CHECK: [0xf0,0x56,0x0a,0x7e]
2714
2715 v_not_b32 v5, -4.0
2716 // CHECK: [0xf7,0x56,0x0a,0x7e]
2717
2718 v_not_b32 v5, src_vccz
2719 // CHECK: [0xfb,0x56,0x0a,0x7e]
2720
2721 v_not_b32 v5, src_execz
2722 // CHECK: [0xfc,0x56,0x0a,0x7e]
2723
2724 v_not_b32 v5, src_scc
2725 // CHECK: [0xfd,0x56,0x0a,0x7e]
2726
2727 v_not_b32 v5, src_lds_direct
2728 // CHECK: [0xfe,0x56,0x0a,0x7e]
2729
2730 v_not_b32 v5, 0xaf123456
2731 // CHECK: [0xff,0x56,0x0a,0x7e,0x56,0x34,0x12,0xaf]
2732
2733 v_not_b32 v5, 0x3f717273
2734 // CHECK: [0xff,0x56,0x0a,0x7e,0x73,0x72,0x71,0x3f]
2735
2736 v_bfrev_b32 v5, v1
2737 // CHECK: [0x01,0x59,0x0a,0x7e]
2738
2739 v_bfrev_b32 v255, v1
2740 // CHECK: [0x01,0x59,0xfe,0x7f]
2741
2742 v_bfrev_b32 v5, v255
2743 // CHECK: [0xff,0x59,0x0a,0x7e]
2744
2745 v_bfrev_b32 v5, s1
2746 // CHECK: [0x01,0x58,0x0a,0x7e]
2747
2748 v_bfrev_b32 v5, s101
2749 // CHECK: [0x65,0x58,0x0a,0x7e]
2750
2751 v_bfrev_b32 v5, flat_scratch_lo
2752 // CHECK: [0x66,0x58,0x0a,0x7e]
2753
2754 v_bfrev_b32 v5, flat_scratch_hi
2755 // CHECK: [0x67,0x58,0x0a,0x7e]
2756
2757 v_bfrev_b32 v5, vcc_lo
2758 // CHECK: [0x6a,0x58,0x0a,0x7e]
2759
2760 v_bfrev_b32 v5, vcc_hi
2761 // CHECK: [0x6b,0x58,0x0a,0x7e]
2762
2763 v_bfrev_b32 v5, ttmp15
2764 // CHECK: [0x7b,0x58,0x0a,0x7e]
2765
2766 v_bfrev_b32 v5, m0
2767 // CHECK: [0x7c,0x58,0x0a,0x7e]
2768
2769 v_bfrev_b32 v5, exec_lo
2770 // CHECK: [0x7e,0x58,0x0a,0x7e]
2771
2772 v_bfrev_b32 v5, exec_hi
2773 // CHECK: [0x7f,0x58,0x0a,0x7e]
2774
2775 v_bfrev_b32 v5, 0
2776 // CHECK: [0x80,0x58,0x0a,0x7e]
2777
2778 v_bfrev_b32 v5, -1
2779 // CHECK: [0xc1,0x58,0x0a,0x7e]
2780
2781 v_bfrev_b32 v5, 0.5
2782 // CHECK: [0xf0,0x58,0x0a,0x7e]
2783
2784 v_bfrev_b32 v5, -4.0
2785 // CHECK: [0xf7,0x58,0x0a,0x7e]
2786
2787 v_bfrev_b32 v5, src_vccz
2788 // CHECK: [0xfb,0x58,0x0a,0x7e]
2789
2790 v_bfrev_b32 v5, src_execz
2791 // CHECK: [0xfc,0x58,0x0a,0x7e]
2792
2793 v_bfrev_b32 v5, src_scc
2794 // CHECK: [0xfd,0x58,0x0a,0x7e]
2795
2796 v_bfrev_b32 v5, src_lds_direct
2797 // CHECK: [0xfe,0x58,0x0a,0x7e]
2798
2799 v_bfrev_b32 v5, 0xaf123456
2800 // CHECK: [0xff,0x58,0x0a,0x7e,0x56,0x34,0x12,0xaf]
2801
2802 v_bfrev_b32 v5, 0x3f717273
2803 // CHECK: [0xff,0x58,0x0a,0x7e,0x73,0x72,0x71,0x3f]
2804
2805 v_ffbh_u32 v5, v1
2806 // CHECK: [0x01,0x5b,0x0a,0x7e]
2807
2808 v_ffbh_u32 v255, v1
2809 // CHECK: [0x01,0x5b,0xfe,0x7f]
2810
2811 v_ffbh_u32 v5, v255
2812 // CHECK: [0xff,0x5b,0x0a,0x7e]
2813
2814 v_ffbh_u32 v5, s1
2815 // CHECK: [0x01,0x5a,0x0a,0x7e]
2816
2817 v_ffbh_u32 v5, s101
2818 // CHECK: [0x65,0x5a,0x0a,0x7e]
2819
2820 v_ffbh_u32 v5, flat_scratch_lo
2821 // CHECK: [0x66,0x5a,0x0a,0x7e]
2822
2823 v_ffbh_u32 v5, flat_scratch_hi
2824 // CHECK: [0x67,0x5a,0x0a,0x7e]
2825
2826 v_ffbh_u32 v5, vcc_lo
2827 // CHECK: [0x6a,0x5a,0x0a,0x7e]
2828
2829 v_ffbh_u32 v5, vcc_hi
2830 // CHECK: [0x6b,0x5a,0x0a,0x7e]
2831
2832 v_ffbh_u32 v5, ttmp15
2833 // CHECK: [0x7b,0x5a,0x0a,0x7e]
2834
2835 v_ffbh_u32 v5, m0
2836 // CHECK: [0x7c,0x5a,0x0a,0x7e]
2837
2838 v_ffbh_u32 v5, exec_lo
2839 // CHECK: [0x7e,0x5a,0x0a,0x7e]
2840
2841 v_ffbh_u32 v5, exec_hi
2842 // CHECK: [0x7f,0x5a,0x0a,0x7e]
2843
2844 v_ffbh_u32 v5, 0
2845 // CHECK: [0x80,0x5a,0x0a,0x7e]
2846
2847 v_ffbh_u32 v5, -1
2848 // CHECK: [0xc1,0x5a,0x0a,0x7e]
2849
2850 v_ffbh_u32 v5, 0.5
2851 // CHECK: [0xf0,0x5a,0x0a,0x7e]
2852
2853 v_ffbh_u32 v5, -4.0
2854 // CHECK: [0xf7,0x5a,0x0a,0x7e]
2855
2856 v_ffbh_u32 v5, src_vccz
2857 // CHECK: [0xfb,0x5a,0x0a,0x7e]
2858
2859 v_ffbh_u32 v5, src_execz
2860 // CHECK: [0xfc,0x5a,0x0a,0x7e]
2861
2862 v_ffbh_u32 v5, src_scc
2863 // CHECK: [0xfd,0x5a,0x0a,0x7e]
2864
2865 v_ffbh_u32 v5, src_lds_direct
2866 // CHECK: [0xfe,0x5a,0x0a,0x7e]
2867
2868 v_ffbh_u32 v5, 0xaf123456
2869 // CHECK: [0xff,0x5a,0x0a,0x7e,0x56,0x34,0x12,0xaf]
2870
2871 v_ffbh_u32 v5, 0x3f717273
2872 // CHECK: [0xff,0x5a,0x0a,0x7e,0x73,0x72,0x71,0x3f]
2873
2874 v_ffbl_b32 v5, v1
2875 // CHECK: [0x01,0x5d,0x0a,0x7e]
2876
2877 v_ffbl_b32 v255, v1
2878 // CHECK: [0x01,0x5d,0xfe,0x7f]
2879
2880 v_ffbl_b32 v5, v255
2881 // CHECK: [0xff,0x5d,0x0a,0x7e]
2882
2883 v_ffbl_b32 v5, s1
2884 // CHECK: [0x01,0x5c,0x0a,0x7e]
2885
2886 v_ffbl_b32 v5, s101
2887 // CHECK: [0x65,0x5c,0x0a,0x7e]
2888
2889 v_ffbl_b32 v5, flat_scratch_lo
2890 // CHECK: [0x66,0x5c,0x0a,0x7e]
2891
2892 v_ffbl_b32 v5, flat_scratch_hi
2893 // CHECK: [0x67,0x5c,0x0a,0x7e]
2894
2895 v_ffbl_b32 v5, vcc_lo
2896 // CHECK: [0x6a,0x5c,0x0a,0x7e]
2897
2898 v_ffbl_b32 v5, vcc_hi
2899 // CHECK: [0x6b,0x5c,0x0a,0x7e]
2900
2901 v_ffbl_b32 v5, ttmp15
2902 // CHECK: [0x7b,0x5c,0x0a,0x7e]
2903
2904 v_ffbl_b32 v5, m0
2905 // CHECK: [0x7c,0x5c,0x0a,0x7e]
2906
2907 v_ffbl_b32 v5, exec_lo
2908 // CHECK: [0x7e,0x5c,0x0a,0x7e]
2909
2910 v_ffbl_b32 v5, exec_hi
2911 // CHECK: [0x7f,0x5c,0x0a,0x7e]
2912
2913 v_ffbl_b32 v5, 0
2914 // CHECK: [0x80,0x5c,0x0a,0x7e]
2915
2916 v_ffbl_b32 v5, -1
2917 // CHECK: [0xc1,0x5c,0x0a,0x7e]
2918
2919 v_ffbl_b32 v5, 0.5
2920 // CHECK: [0xf0,0x5c,0x0a,0x7e]
2921
2922 v_ffbl_b32 v5, -4.0
2923 // CHECK: [0xf7,0x5c,0x0a,0x7e]
2924
2925 v_ffbl_b32 v5, src_vccz
2926 // CHECK: [0xfb,0x5c,0x0a,0x7e]
2927
2928 v_ffbl_b32 v5, src_execz
2929 // CHECK: [0xfc,0x5c,0x0a,0x7e]
2930
2931 v_ffbl_b32 v5, src_scc
2932 // CHECK: [0xfd,0x5c,0x0a,0x7e]
2933
2934 v_ffbl_b32 v5, src_lds_direct
2935 // CHECK: [0xfe,0x5c,0x0a,0x7e]
2936
2937 v_ffbl_b32 v5, 0xaf123456
2938 // CHECK: [0xff,0x5c,0x0a,0x7e,0x56,0x34,0x12,0xaf]
2939
2940 v_ffbl_b32 v5, 0x3f717273
2941 // CHECK: [0xff,0x5c,0x0a,0x7e,0x73,0x72,0x71,0x3f]
2942
2943 v_ffbh_i32 v5, v1
2944 // CHECK: [0x01,0x5f,0x0a,0x7e]
2945
2946 v_ffbh_i32 v255, v1
2947 // CHECK: [0x01,0x5f,0xfe,0x7f]
2948
2949 v_ffbh_i32 v5, v255
2950 // CHECK: [0xff,0x5f,0x0a,0x7e]
2951
2952 v_ffbh_i32 v5, s1
2953 // CHECK: [0x01,0x5e,0x0a,0x7e]
2954
2955 v_ffbh_i32 v5, s101
2956 // CHECK: [0x65,0x5e,0x0a,0x7e]
2957
2958 v_ffbh_i32 v5, flat_scratch_lo
2959 // CHECK: [0x66,0x5e,0x0a,0x7e]
2960
2961 v_ffbh_i32 v5, flat_scratch_hi
2962 // CHECK: [0x67,0x5e,0x0a,0x7e]
2963
2964 v_ffbh_i32 v5, vcc_lo
2965 // CHECK: [0x6a,0x5e,0x0a,0x7e]
2966
2967 v_ffbh_i32 v5, vcc_hi
2968 // CHECK: [0x6b,0x5e,0x0a,0x7e]
2969
2970 v_ffbh_i32 v5, ttmp15
2971 // CHECK: [0x7b,0x5e,0x0a,0x7e]
2972
2973 v_ffbh_i32 v5, m0
2974 // CHECK: [0x7c,0x5e,0x0a,0x7e]
2975
2976 v_ffbh_i32 v5, exec_lo
2977 // CHECK: [0x7e,0x5e,0x0a,0x7e]
2978
2979 v_ffbh_i32 v5, exec_hi
2980 // CHECK: [0x7f,0x5e,0x0a,0x7e]
2981
2982 v_ffbh_i32 v5, 0
2983 // CHECK: [0x80,0x5e,0x0a,0x7e]
2984
2985 v_ffbh_i32 v5, -1
2986 // CHECK: [0xc1,0x5e,0x0a,0x7e]
2987
2988 v_ffbh_i32 v5, 0.5
2989 // CHECK: [0xf0,0x5e,0x0a,0x7e]
2990
2991 v_ffbh_i32 v5, -4.0
2992 // CHECK: [0xf7,0x5e,0x0a,0x7e]
2993
2994 v_ffbh_i32 v5, src_vccz
2995 // CHECK: [0xfb,0x5e,0x0a,0x7e]
2996
2997 v_ffbh_i32 v5, src_execz
2998 // CHECK: [0xfc,0x5e,0x0a,0x7e]
2999
3000 v_ffbh_i32 v5, src_scc
3001 // CHECK: [0xfd,0x5e,0x0a,0x7e]
3002
3003 v_ffbh_i32 v5, src_lds_direct
3004 // CHECK: [0xfe,0x5e,0x0a,0x7e]
3005
3006 v_ffbh_i32 v5, 0xaf123456
3007 // CHECK: [0xff,0x5e,0x0a,0x7e,0x56,0x34,0x12,0xaf]
3008
3009 v_ffbh_i32 v5, 0x3f717273
3010 // CHECK: [0xff,0x5e,0x0a,0x7e,0x73,0x72,0x71,0x3f]
3011
3012 v_frexp_exp_i32_f64 v5, v[1:2]
3013 // CHECK: [0x01,0x61,0x0a,0x7e]
3014
3015 v_frexp_exp_i32_f64 v255, v[1:2]
3016 // CHECK: [0x01,0x61,0xfe,0x7f]
3017
3018 v_frexp_exp_i32_f64 v5, v[254:255]
3019 // CHECK: [0xfe,0x61,0x0a,0x7e]
3020
3021 v_frexp_exp_i32_f64 v5, s[2:3]
3022 // CHECK: [0x02,0x60,0x0a,0x7e]
3023
3024 v_frexp_exp_i32_f64 v5, s[4:5]
3025 // CHECK: [0x04,0x60,0x0a,0x7e]
3026
3027 v_frexp_exp_i32_f64 v5, s[100:101]
3028 // CHECK: [0x64,0x60,0x0a,0x7e]
3029
3030 v_frexp_exp_i32_f64 v5, flat_scratch
3031 // CHECK: [0x66,0x60,0x0a,0x7e]
3032
3033 v_frexp_exp_i32_f64 v5, vcc
3034 // CHECK: [0x6a,0x60,0x0a,0x7e]
3035
3036 v_frexp_exp_i32_f64 v5, ttmp[14:15]
3037 // CHECK: [0x7a,0x60,0x0a,0x7e]
3038
3039 v_frexp_exp_i32_f64 v5, exec
3040 // CHECK: [0x7e,0x60,0x0a,0x7e]
3041
3042 v_frexp_exp_i32_f64 v5, 0
3043 // CHECK: [0x80,0x60,0x0a,0x7e]
3044
3045 v_frexp_exp_i32_f64 v5, -1
3046 // CHECK: [0xc1,0x60,0x0a,0x7e]
3047
3048 v_frexp_exp_i32_f64 v5, 0.5
3049 // CHECK: [0xf0,0x60,0x0a,0x7e]
3050
3051 v_frexp_exp_i32_f64 v5, -4.0
3052 // CHECK: [0xf7,0x60,0x0a,0x7e]
3053
3054 v_frexp_exp_i32_f64 v5, src_vccz
3055 // CHECK: [0xfb,0x60,0x0a,0x7e]
3056
3057 v_frexp_exp_i32_f64 v5, src_execz
3058 // CHECK: [0xfc,0x60,0x0a,0x7e]
3059
3060 v_frexp_exp_i32_f64 v5, src_scc
3061 // CHECK: [0xfd,0x60,0x0a,0x7e]
3062
3063 v_frexp_exp_i32_f64 v5, 0xaf123456
3064 // CHECK: [0xff,0x60,0x0a,0x7e,0x56,0x34,0x12,0xaf]
3065
3066 v_frexp_exp_i32_f64 v5, 0x3f717273
3067 // CHECK: [0xff,0x60,0x0a,0x7e,0x73,0x72,0x71,0x3f]
3068
3069 v_frexp_mant_f64 v[5:6], v[1:2]
3070 // CHECK: [0x01,0x63,0x0a,0x7e]
3071
3072 v_frexp_mant_f64 v[254:255], v[1:2]
3073 // CHECK: [0x01,0x63,0xfc,0x7f]
3074
3075 v_frexp_mant_f64 v[5:6], v[254:255]
3076 // CHECK: [0xfe,0x63,0x0a,0x7e]
3077
3078 v_frexp_mant_f64 v[5:6], s[2:3]
3079 // CHECK: [0x02,0x62,0x0a,0x7e]
3080
3081 v_frexp_mant_f64 v[5:6], s[4:5]
3082 // CHECK: [0x04,0x62,0x0a,0x7e]
3083
3084 v_frexp_mant_f64 v[5:6], s[100:101]
3085 // CHECK: [0x64,0x62,0x0a,0x7e]
3086
3087 v_frexp_mant_f64 v[5:6], flat_scratch
3088 // CHECK: [0x66,0x62,0x0a,0x7e]
3089
3090 v_frexp_mant_f64 v[5:6], vcc
3091 // CHECK: [0x6a,0x62,0x0a,0x7e]
3092
3093 v_frexp_mant_f64 v[5:6], ttmp[14:15]
3094 // CHECK: [0x7a,0x62,0x0a,0x7e]
3095
3096 v_frexp_mant_f64 v[5:6], exec
3097 // CHECK: [0x7e,0x62,0x0a,0x7e]
3098
3099 v_frexp_mant_f64 v[5:6], 0
3100 // CHECK: [0x80,0x62,0x0a,0x7e]
3101
3102 v_frexp_mant_f64 v[5:6], -1
3103 // CHECK: [0xc1,0x62,0x0a,0x7e]
3104
3105 v_frexp_mant_f64 v[5:6], 0.5
3106 // CHECK: [0xf0,0x62,0x0a,0x7e]
3107
3108 v_frexp_mant_f64 v[5:6], -4.0
3109 // CHECK: [0xf7,0x62,0x0a,0x7e]
3110
3111 v_frexp_mant_f64 v[5:6], src_vccz
3112 // CHECK: [0xfb,0x62,0x0a,0x7e]
3113
3114 v_frexp_mant_f64 v[5:6], src_execz
3115 // CHECK: [0xfc,0x62,0x0a,0x7e]
3116
3117 v_frexp_mant_f64 v[5:6], src_scc
3118 // CHECK: [0xfd,0x62,0x0a,0x7e]
3119
3120 v_frexp_mant_f64 v[5:6], 0xaf123456
3121 // CHECK: [0xff,0x62,0x0a,0x7e,0x56,0x34,0x12,0xaf]
3122
3123 v_frexp_mant_f64 v[5:6], 0x3f717273
3124 // CHECK: [0xff,0x62,0x0a,0x7e,0x73,0x72,0x71,0x3f]
3125
3126 v_fract_f64 v[5:6], v[1:2]
3127 // CHECK: [0x01,0x65,0x0a,0x7e]
3128
3129 v_fract_f64 v[254:255], v[1:2]
3130 // CHECK: [0x01,0x65,0xfc,0x7f]
3131
3132 v_fract_f64 v[5:6], v[254:255]
3133 // CHECK: [0xfe,0x65,0x0a,0x7e]
3134
3135 v_fract_f64 v[5:6], s[2:3]
3136 // CHECK: [0x02,0x64,0x0a,0x7e]
3137
3138 v_fract_f64 v[5:6], s[4:5]
3139 // CHECK: [0x04,0x64,0x0a,0x7e]
3140
3141 v_fract_f64 v[5:6], s[100:101]
3142 // CHECK: [0x64,0x64,0x0a,0x7e]
3143
3144 v_fract_f64 v[5:6], flat_scratch
3145 // CHECK: [0x66,0x64,0x0a,0x7e]
3146
3147 v_fract_f64 v[5:6], vcc
3148 // CHECK: [0x6a,0x64,0x0a,0x7e]
3149
3150 v_fract_f64 v[5:6], ttmp[14:15]
3151 // CHECK: [0x7a,0x64,0x0a,0x7e]
3152
3153 v_fract_f64 v[5:6], exec
3154 // CHECK: [0x7e,0x64,0x0a,0x7e]
3155
3156 v_fract_f64 v[5:6], 0
3157 // CHECK: [0x80,0x64,0x0a,0x7e]
3158
3159 v_fract_f64 v[5:6], -1
3160 // CHECK: [0xc1,0x64,0x0a,0x7e]
3161
3162 v_fract_f64 v[5:6], 0.5
3163 // CHECK: [0xf0,0x64,0x0a,0x7e]
3164
3165 v_fract_f64 v[5:6], -4.0
3166 // CHECK: [0xf7,0x64,0x0a,0x7e]
3167
3168 v_fract_f64 v[5:6], src_vccz
3169 // CHECK: [0xfb,0x64,0x0a,0x7e]
3170
3171 v_fract_f64 v[5:6], src_execz
3172 // CHECK: [0xfc,0x64,0x0a,0x7e]
3173
3174 v_fract_f64 v[5:6], src_scc
3175 // CHECK: [0xfd,0x64,0x0a,0x7e]
3176
3177 v_fract_f64 v[5:6], 0xaf123456
3178 // CHECK: [0xff,0x64,0x0a,0x7e,0x56,0x34,0x12,0xaf]
3179
3180 v_fract_f64 v[5:6], 0x3f717273
3181 // CHECK: [0xff,0x64,0x0a,0x7e,0x73,0x72,0x71,0x3f]
3182
3183 v_frexp_exp_i32_f32 v5, v1
3184 // CHECK: [0x01,0x67,0x0a,0x7e]
3185
3186 v_frexp_exp_i32_f32 v255, v1
3187 // CHECK: [0x01,0x67,0xfe,0x7f]
3188
3189 v_frexp_exp_i32_f32 v5, v255
3190 // CHECK: [0xff,0x67,0x0a,0x7e]
3191
3192 v_frexp_exp_i32_f32 v5, s1
3193 // CHECK: [0x01,0x66,0x0a,0x7e]
3194
3195 v_frexp_exp_i32_f32 v5, s101
3196 // CHECK: [0x65,0x66,0x0a,0x7e]
3197
3198 v_frexp_exp_i32_f32 v5, flat_scratch_lo
3199 // CHECK: [0x66,0x66,0x0a,0x7e]
3200
3201 v_frexp_exp_i32_f32 v5, flat_scratch_hi
3202 // CHECK: [0x67,0x66,0x0a,0x7e]
3203
3204 v_frexp_exp_i32_f32 v5, vcc_lo
3205 // CHECK: [0x6a,0x66,0x0a,0x7e]
3206
3207 v_frexp_exp_i32_f32 v5, vcc_hi
3208 // CHECK: [0x6b,0x66,0x0a,0x7e]
3209
3210 v_frexp_exp_i32_f32 v5, ttmp15
3211 // CHECK: [0x7b,0x66,0x0a,0x7e]
3212
3213 v_frexp_exp_i32_f32 v5, m0
3214 // CHECK: [0x7c,0x66,0x0a,0x7e]
3215
3216 v_frexp_exp_i32_f32 v5, exec_lo
3217 // CHECK: [0x7e,0x66,0x0a,0x7e]
3218
3219 v_frexp_exp_i32_f32 v5, exec_hi
3220 // CHECK: [0x7f,0x66,0x0a,0x7e]
3221
3222 v_frexp_exp_i32_f32 v5, 0
3223 // CHECK: [0x80,0x66,0x0a,0x7e]
3224
3225 v_frexp_exp_i32_f32 v5, -1
3226 // CHECK: [0xc1,0x66,0x0a,0x7e]
3227
3228 v_frexp_exp_i32_f32 v5, 0.5
3229 // CHECK: [0xf0,0x66,0x0a,0x7e]
3230
3231 v_frexp_exp_i32_f32 v5, -4.0
3232 // CHECK: [0xf7,0x66,0x0a,0x7e]
3233
3234 v_frexp_exp_i32_f32 v5, src_vccz
3235 // CHECK: [0xfb,0x66,0x0a,0x7e]
3236
3237 v_frexp_exp_i32_f32 v5, src_execz
3238 // CHECK: [0xfc,0x66,0x0a,0x7e]
3239
3240 v_frexp_exp_i32_f32 v5, src_scc
3241 // CHECK: [0xfd,0x66,0x0a,0x7e]
3242
3243 v_frexp_exp_i32_f32 v5, src_lds_direct
3244 // CHECK: [0xfe,0x66,0x0a,0x7e]
3245
3246 v_frexp_exp_i32_f32 v5, 0xaf123456
3247 // CHECK: [0xff,0x66,0x0a,0x7e,0x56,0x34,0x12,0xaf]
3248
3249 v_frexp_exp_i32_f32 v5, 0x3f717273
3250 // CHECK: [0xff,0x66,0x0a,0x7e,0x73,0x72,0x71,0x3f]
3251
3252 v_frexp_mant_f32 v5, v1
3253 // CHECK: [0x01,0x69,0x0a,0x7e]
3254
3255 v_frexp_mant_f32 v255, v1
3256 // CHECK: [0x01,0x69,0xfe,0x7f]
3257
3258 v_frexp_mant_f32 v5, v255
3259 // CHECK: [0xff,0x69,0x0a,0x7e]
3260
3261 v_frexp_mant_f32 v5, s1
3262 // CHECK: [0x01,0x68,0x0a,0x7e]
3263
3264 v_frexp_mant_f32 v5, s101
3265 // CHECK: [0x65,0x68,0x0a,0x7e]
3266
3267 v_frexp_mant_f32 v5, flat_scratch_lo
3268 // CHECK: [0x66,0x68,0x0a,0x7e]
3269
3270 v_frexp_mant_f32 v5, flat_scratch_hi
3271 // CHECK: [0x67,0x68,0x0a,0x7e]
3272
3273 v_frexp_mant_f32 v5, vcc_lo
3274 // CHECK: [0x6a,0x68,0x0a,0x7e]
3275
3276 v_frexp_mant_f32 v5, vcc_hi
3277 // CHECK: [0x6b,0x68,0x0a,0x7e]
3278
3279 v_frexp_mant_f32 v5, ttmp15
3280 // CHECK: [0x7b,0x68,0x0a,0x7e]
3281
3282 v_frexp_mant_f32 v5, m0
3283 // CHECK: [0x7c,0x68,0x0a,0x7e]
3284
3285 v_frexp_mant_f32 v5, exec_lo
3286 // CHECK: [0x7e,0x68,0x0a,0x7e]
3287
3288 v_frexp_mant_f32 v5, exec_hi
3289 // CHECK: [0x7f,0x68,0x0a,0x7e]
3290
3291 v_frexp_mant_f32 v5, 0
3292 // CHECK: [0x80,0x68,0x0a,0x7e]
3293
3294 v_frexp_mant_f32 v5, -1
3295 // CHECK: [0xc1,0x68,0x0a,0x7e]
3296
3297 v_frexp_mant_f32 v5, 0.5
3298 // CHECK: [0xf0,0x68,0x0a,0x7e]
3299
3300 v_frexp_mant_f32 v5, -4.0
3301 // CHECK: [0xf7,0x68,0x0a,0x7e]
3302
3303 v_frexp_mant_f32 v5, src_vccz
3304 // CHECK: [0xfb,0x68,0x0a,0x7e]
3305
3306 v_frexp_mant_f32 v5, src_execz
3307 // CHECK: [0xfc,0x68,0x0a,0x7e]
3308
3309 v_frexp_mant_f32 v5, src_scc
3310 // CHECK: [0xfd,0x68,0x0a,0x7e]
3311
3312 v_frexp_mant_f32 v5, src_lds_direct
3313 // CHECK: [0xfe,0x68,0x0a,0x7e]
3314
3315 v_frexp_mant_f32 v5, 0xaf123456
3316 // CHECK: [0xff,0x68,0x0a,0x7e,0x56,0x34,0x12,0xaf]
3317
3318 v_frexp_mant_f32 v5, 0x3f717273
3319 // CHECK: [0xff,0x68,0x0a,0x7e,0x73,0x72,0x71,0x3f]
3320
3321 v_clrexcp
3322 // CHECK: [0x00,0x6a,0x00,0x7e]
3323
3324 v_screen_partition_4se_b32 v5, v1
3325 // CHECK: [0x01,0x6f,0x0a,0x7e]
3326
3327 v_screen_partition_4se_b32 v255, v1
3328 // CHECK: [0x01,0x6f,0xfe,0x7f]
3329
3330 v_screen_partition_4se_b32 v5, v255
3331 // CHECK: [0xff,0x6f,0x0a,0x7e]
3332
3333 v_screen_partition_4se_b32 v5, s1
3334 // CHECK: [0x01,0x6e,0x0a,0x7e]
3335
3336 v_screen_partition_4se_b32 v5, s101
3337 // CHECK: [0x65,0x6e,0x0a,0x7e]
3338
3339 v_screen_partition_4se_b32 v5, flat_scratch_lo
3340 // CHECK: [0x66,0x6e,0x0a,0x7e]
3341
3342 v_screen_partition_4se_b32 v5, flat_scratch_hi
3343 // CHECK: [0x67,0x6e,0x0a,0x7e]
3344
3345 v_screen_partition_4se_b32 v5, vcc_lo
3346 // CHECK: [0x6a,0x6e,0x0a,0x7e]
3347
3348 v_screen_partition_4se_b32 v5, vcc_hi
3349 // CHECK: [0x6b,0x6e,0x0a,0x7e]
3350
3351 v_screen_partition_4se_b32 v5, ttmp15
3352 // CHECK: [0x7b,0x6e,0x0a,0x7e]
3353
3354 v_screen_partition_4se_b32 v5, m0
3355 // CHECK: [0x7c,0x6e,0x0a,0x7e]
3356
3357 v_screen_partition_4se_b32 v5, exec_lo
3358 // CHECK: [0x7e,0x6e,0x0a,0x7e]
3359
3360 v_screen_partition_4se_b32 v5, exec_hi
3361 // CHECK: [0x7f,0x6e,0x0a,0x7e]
3362
3363 v_screen_partition_4se_b32 v5, 0
3364 // CHECK: [0x80,0x6e,0x0a,0x7e]
3365
3366 v_screen_partition_4se_b32 v5, -1
3367 // CHECK: [0xc1,0x6e,0x0a,0x7e]
3368
3369 v_screen_partition_4se_b32 v5, 0.5
3370 // CHECK: [0xf0,0x6e,0x0a,0x7e]
3371
3372 v_screen_partition_4se_b32 v5, -4.0
3373 // CHECK: [0xf7,0x6e,0x0a,0x7e]
3374
3375 v_screen_partition_4se_b32 v5, src_vccz
3376 // CHECK: [0xfb,0x6e,0x0a,0x7e]
3377
3378 v_screen_partition_4se_b32 v5, src_execz
3379 // CHECK: [0xfc,0x6e,0x0a,0x7e]
3380
3381 v_screen_partition_4se_b32 v5, src_scc
3382 // CHECK: [0xfd,0x6e,0x0a,0x7e]
3383
3384 v_screen_partition_4se_b32 v5, src_lds_direct
3385 // CHECK: [0xfe,0x6e,0x0a,0x7e]
3386
3387 v_screen_partition_4se_b32 v5, 0xaf123456
3388 // CHECK: [0xff,0x6e,0x0a,0x7e,0x56,0x34,0x12,0xaf]
3389
3390 v_screen_partition_4se_b32 v5, 0x3f717273
3391 // CHECK: [0xff,0x6e,0x0a,0x7e,0x73,0x72,0x71,0x3f]
3392
3393 v_cvt_f16_u16 v5, v1
3394 // CHECK: [0x01,0x73,0x0a,0x7e]
3395
3396 v_cvt_f16_u16 v255, v1
3397 // CHECK: [0x01,0x73,0xfe,0x7f]
3398
3399 v_cvt_f16_u16 v5, v255
3400 // CHECK: [0xff,0x73,0x0a,0x7e]
3401
3402 v_cvt_f16_u16 v5, s1
3403 // CHECK: [0x01,0x72,0x0a,0x7e]
3404
3405 v_cvt_f16_u16 v5, s101
3406 // CHECK: [0x65,0x72,0x0a,0x7e]
3407
3408 v_cvt_f16_u16 v5, flat_scratch_lo
3409 // CHECK: [0x66,0x72,0x0a,0x7e]
3410
3411 v_cvt_f16_u16 v5, flat_scratch_hi
3412 // CHECK: [0x67,0x72,0x0a,0x7e]
3413
3414 v_cvt_f16_u16 v5, vcc_lo
3415 // CHECK: [0x6a,0x72,0x0a,0x7e]
3416
3417 v_cvt_f16_u16 v5, vcc_hi
3418 // CHECK: [0x6b,0x72,0x0a,0x7e]
3419
3420 v_cvt_f16_u16 v5, ttmp15
3421 // CHECK: [0x7b,0x72,0x0a,0x7e]
3422
3423 v_cvt_f16_u16 v5, m0
3424 // CHECK: [0x7c,0x72,0x0a,0x7e]
3425
3426 v_cvt_f16_u16 v5, exec_lo
3427 // CHECK: [0x7e,0x72,0x0a,0x7e]
3428
3429 v_cvt_f16_u16 v5, exec_hi
3430 // CHECK: [0x7f,0x72,0x0a,0x7e]
3431
3432 v_cvt_f16_u16 v5, 0
3433 // CHECK: [0x80,0x72,0x0a,0x7e]
3434
3435 v_cvt_f16_u16 v5, -1
3436 // CHECK: [0xc1,0x72,0x0a,0x7e]
3437
3438 v_cvt_f16_u16 v5, 0.5
3439 // CHECK: [0xff,0x72,0x0a,0x7e,0x00,0x38,0x00,0x00]
3440
3441 v_cvt_f16_u16 v5, -4.0
3442 // CHECK: [0xff,0x72,0x0a,0x7e,0x00,0xc4,0x00,0x00]
3443
3444 v_cvt_f16_u16 v5, src_vccz
3445 // CHECK: [0xfb,0x72,0x0a,0x7e]
3446
3447 v_cvt_f16_u16 v5, src_execz
3448 // CHECK: [0xfc,0x72,0x0a,0x7e]
3449
3450 v_cvt_f16_u16 v5, src_scc
3451 // CHECK: [0xfd,0x72,0x0a,0x7e]
3452
3453 v_cvt_f16_u16 v5, src_lds_direct
3454 // CHECK: [0xfe,0x72,0x0a,0x7e]
3455
3456 v_cvt_f16_u16 v5, 0xfe0b
3457 // CHECK: [0xff,0x72,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
3458
3459 v_cvt_f16_u16 v5, 0x3456
3460 // CHECK: [0xff,0x72,0x0a,0x7e,0x56,0x34,0x00,0x00]
3461
3462 v_cvt_f16_i16 v5, v1
3463 // CHECK: [0x01,0x75,0x0a,0x7e]
3464
3465 v_cvt_f16_i16 v255, v1
3466 // CHECK: [0x01,0x75,0xfe,0x7f]
3467
3468 v_cvt_f16_i16 v5, v255
3469 // CHECK: [0xff,0x75,0x0a,0x7e]
3470
3471 v_cvt_f16_i16 v5, s1
3472 // CHECK: [0x01,0x74,0x0a,0x7e]
3473
3474 v_cvt_f16_i16 v5, s101
3475 // CHECK: [0x65,0x74,0x0a,0x7e]
3476
3477 v_cvt_f16_i16 v5, flat_scratch_lo
3478 // CHECK: [0x66,0x74,0x0a,0x7e]
3479
3480 v_cvt_f16_i16 v5, flat_scratch_hi
3481 // CHECK: [0x67,0x74,0x0a,0x7e]
3482
3483 v_cvt_f16_i16 v5, vcc_lo
3484 // CHECK: [0x6a,0x74,0x0a,0x7e]
3485
3486 v_cvt_f16_i16 v5, vcc_hi
3487 // CHECK: [0x6b,0x74,0x0a,0x7e]
3488
3489 v_cvt_f16_i16 v5, ttmp15
3490 // CHECK: [0x7b,0x74,0x0a,0x7e]
3491
3492 v_cvt_f16_i16 v5, m0
3493 // CHECK: [0x7c,0x74,0x0a,0x7e]
3494
3495 v_cvt_f16_i16 v5, exec_lo
3496 // CHECK: [0x7e,0x74,0x0a,0x7e]
3497
3498 v_cvt_f16_i16 v5, exec_hi
3499 // CHECK: [0x7f,0x74,0x0a,0x7e]
3500
3501 v_cvt_f16_i16 v5, 0
3502 // CHECK: [0x80,0x74,0x0a,0x7e]
3503
3504 v_cvt_f16_i16 v5, -1
3505 // CHECK: [0xc1,0x74,0x0a,0x7e]
3506
3507 v_cvt_f16_i16 v5, 0.5
3508 // CHECK: [0xff,0x74,0x0a,0x7e,0x00,0x38,0x00,0x00]
3509
3510 v_cvt_f16_i16 v5, -4.0
3511 // CHECK: [0xff,0x74,0x0a,0x7e,0x00,0xc4,0x00,0x00]
3512
3513 v_cvt_f16_i16 v5, src_vccz
3514 // CHECK: [0xfb,0x74,0x0a,0x7e]
3515
3516 v_cvt_f16_i16 v5, src_execz
3517 // CHECK: [0xfc,0x74,0x0a,0x7e]
3518
3519 v_cvt_f16_i16 v5, src_scc
3520 // CHECK: [0xfd,0x74,0x0a,0x7e]
3521
3522 v_cvt_f16_i16 v5, src_lds_direct
3523 // CHECK: [0xfe,0x74,0x0a,0x7e]
3524
3525 v_cvt_f16_i16 v5, 0xfe0b
3526 // CHECK: [0xff,0x74,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
3527
3528 v_cvt_f16_i16 v5, 0x3456
3529 // CHECK: [0xff,0x74,0x0a,0x7e,0x56,0x34,0x00,0x00]
3530
3531 v_cvt_u16_f16 v5, v1
3532 // CHECK: [0x01,0x77,0x0a,0x7e]
3533
3534 v_cvt_u16_f16 v255, v1
3535 // CHECK: [0x01,0x77,0xfe,0x7f]
3536
3537 v_cvt_u16_f16 v5, v255
3538 // CHECK: [0xff,0x77,0x0a,0x7e]
3539
3540 v_cvt_u16_f16 v5, s1
3541 // CHECK: [0x01,0x76,0x0a,0x7e]
3542
3543 v_cvt_u16_f16 v5, s101
3544 // CHECK: [0x65,0x76,0x0a,0x7e]
3545
3546 v_cvt_u16_f16 v5, flat_scratch_lo
3547 // CHECK: [0x66,0x76,0x0a,0x7e]
3548
3549 v_cvt_u16_f16 v5, flat_scratch_hi
3550 // CHECK: [0x67,0x76,0x0a,0x7e]
3551
3552 v_cvt_u16_f16 v5, vcc_lo
3553 // CHECK: [0x6a,0x76,0x0a,0x7e]
3554
3555 v_cvt_u16_f16 v5, vcc_hi
3556 // CHECK: [0x6b,0x76,0x0a,0x7e]
3557
3558 v_cvt_u16_f16 v5, ttmp15
3559 // CHECK: [0x7b,0x76,0x0a,0x7e]
3560
3561 v_cvt_u16_f16 v5, m0
3562 // CHECK: [0x7c,0x76,0x0a,0x7e]
3563
3564 v_cvt_u16_f16 v5, exec_lo
3565 // CHECK: [0x7e,0x76,0x0a,0x7e]
3566
3567 v_cvt_u16_f16 v5, exec_hi
3568 // CHECK: [0x7f,0x76,0x0a,0x7e]
3569
3570 v_cvt_u16_f16 v5, 0
3571 // CHECK: [0x80,0x76,0x0a,0x7e]
3572
3573 v_cvt_u16_f16 v5, -1
3574 // CHECK: [0xc1,0x76,0x0a,0x7e]
3575
3576 v_cvt_u16_f16 v5, 0.5
3577 // CHECK: [0xf0,0x76,0x0a,0x7e]
3578
3579 v_cvt_u16_f16 v5, -4.0
3580 // CHECK: [0xf7,0x76,0x0a,0x7e]
3581
3582 v_cvt_u16_f16 v5, src_vccz
3583 // CHECK: [0xfb,0x76,0x0a,0x7e]
3584
3585 v_cvt_u16_f16 v5, src_execz
3586 // CHECK: [0xfc,0x76,0x0a,0x7e]
3587
3588 v_cvt_u16_f16 v5, src_scc
3589 // CHECK: [0xfd,0x76,0x0a,0x7e]
3590
3591 v_cvt_u16_f16 v5, src_lds_direct
3592 // CHECK: [0xfe,0x76,0x0a,0x7e]
3593
3594 v_cvt_u16_f16 v5, 0xfe0b
3595 // CHECK: [0xff,0x76,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
3596
3597 v_cvt_u16_f16 v5, 0x3456
3598 // CHECK: [0xff,0x76,0x0a,0x7e,0x56,0x34,0x00,0x00]
3599
3600 v_cvt_i16_f16 v5, v1
3601 // CHECK: [0x01,0x79,0x0a,0x7e]
3602
3603 v_cvt_i16_f16 v255, v1
3604 // CHECK: [0x01,0x79,0xfe,0x7f]
3605
3606 v_cvt_i16_f16 v5, v255
3607 // CHECK: [0xff,0x79,0x0a,0x7e]
3608
3609 v_cvt_i16_f16 v5, s1
3610 // CHECK: [0x01,0x78,0x0a,0x7e]
3611
3612 v_cvt_i16_f16 v5, s101
3613 // CHECK: [0x65,0x78,0x0a,0x7e]
3614
3615 v_cvt_i16_f16 v5, flat_scratch_lo
3616 // CHECK: [0x66,0x78,0x0a,0x7e]
3617
3618 v_cvt_i16_f16 v5, flat_scratch_hi
3619 // CHECK: [0x67,0x78,0x0a,0x7e]
3620
3621 v_cvt_i16_f16 v5, vcc_lo
3622 // CHECK: [0x6a,0x78,0x0a,0x7e]
3623
3624 v_cvt_i16_f16 v5, vcc_hi
3625 // CHECK: [0x6b,0x78,0x0a,0x7e]
3626
3627 v_cvt_i16_f16 v5, ttmp15
3628 // CHECK: [0x7b,0x78,0x0a,0x7e]
3629
3630 v_cvt_i16_f16 v5, m0
3631 // CHECK: [0x7c,0x78,0x0a,0x7e]
3632
3633 v_cvt_i16_f16 v5, exec_lo
3634 // CHECK: [0x7e,0x78,0x0a,0x7e]
3635
3636 v_cvt_i16_f16 v5, exec_hi
3637 // CHECK: [0x7f,0x78,0x0a,0x7e]
3638
3639 v_cvt_i16_f16 v5, 0
3640 // CHECK: [0x80,0x78,0x0a,0x7e]
3641
3642 v_cvt_i16_f16 v5, -1
3643 // CHECK: [0xc1,0x78,0x0a,0x7e]
3644
3645 v_cvt_i16_f16 v5, 0.5
3646 // CHECK: [0xf0,0x78,0x0a,0x7e]
3647
3648 v_cvt_i16_f16 v5, -4.0
3649 // CHECK: [0xf7,0x78,0x0a,0x7e]
3650
3651 v_cvt_i16_f16 v5, src_vccz
3652 // CHECK: [0xfb,0x78,0x0a,0x7e]
3653
3654 v_cvt_i16_f16 v5, src_execz
3655 // CHECK: [0xfc,0x78,0x0a,0x7e]
3656
3657 v_cvt_i16_f16 v5, src_scc
3658 // CHECK: [0xfd,0x78,0x0a,0x7e]
3659
3660 v_cvt_i16_f16 v5, src_lds_direct
3661 // CHECK: [0xfe,0x78,0x0a,0x7e]
3662
3663 v_cvt_i16_f16 v5, 0xfe0b
3664 // CHECK: [0xff,0x78,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
3665
3666 v_cvt_i16_f16 v5, 0x3456
3667 // CHECK: [0xff,0x78,0x0a,0x7e,0x56,0x34,0x00,0x00]
3668
3669 v_rcp_f16 v5, v1
3670 // CHECK: [0x01,0x7b,0x0a,0x7e]
3671
3672 v_rcp_f16 v255, v1
3673 // CHECK: [0x01,0x7b,0xfe,0x7f]
3674
3675 v_rcp_f16 v5, v255
3676 // CHECK: [0xff,0x7b,0x0a,0x7e]
3677
3678 v_rcp_f16 v5, s1
3679 // CHECK: [0x01,0x7a,0x0a,0x7e]
3680
3681 v_rcp_f16 v5, s101
3682 // CHECK: [0x65,0x7a,0x0a,0x7e]
3683
3684 v_rcp_f16 v5, flat_scratch_lo
3685 // CHECK: [0x66,0x7a,0x0a,0x7e]
3686
3687 v_rcp_f16 v5, flat_scratch_hi
3688 // CHECK: [0x67,0x7a,0x0a,0x7e]
3689
3690 v_rcp_f16 v5, vcc_lo
3691 // CHECK: [0x6a,0x7a,0x0a,0x7e]
3692
3693 v_rcp_f16 v5, vcc_hi
3694 // CHECK: [0x6b,0x7a,0x0a,0x7e]
3695
3696 v_rcp_f16 v5, ttmp15
3697 // CHECK: [0x7b,0x7a,0x0a,0x7e]
3698
3699 v_rcp_f16 v5, m0
3700 // CHECK: [0x7c,0x7a,0x0a,0x7e]
3701
3702 v_rcp_f16 v5, exec_lo
3703 // CHECK: [0x7e,0x7a,0x0a,0x7e]
3704
3705 v_rcp_f16 v5, exec_hi
3706 // CHECK: [0x7f,0x7a,0x0a,0x7e]
3707
3708 v_rcp_f16 v5, 0
3709 // CHECK: [0x80,0x7a,0x0a,0x7e]
3710
3711 v_rcp_f16 v5, -1
3712 // CHECK: [0xc1,0x7a,0x0a,0x7e]
3713
3714 v_rcp_f16 v5, 0.5
3715 // CHECK: [0xf0,0x7a,0x0a,0x7e]
3716
3717 v_rcp_f16 v5, -4.0
3718 // CHECK: [0xf7,0x7a,0x0a,0x7e]
3719
3720 v_rcp_f16 v5, src_vccz
3721 // CHECK: [0xfb,0x7a,0x0a,0x7e]
3722
3723 v_rcp_f16 v5, src_execz
3724 // CHECK: [0xfc,0x7a,0x0a,0x7e]
3725
3726 v_rcp_f16 v5, src_scc
3727 // CHECK: [0xfd,0x7a,0x0a,0x7e]
3728
3729 v_rcp_f16 v5, src_lds_direct
3730 // CHECK: [0xfe,0x7a,0x0a,0x7e]
3731
3732 v_rcp_f16 v5, 0xfe0b
3733 // CHECK: [0xff,0x7a,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
3734
3735 v_rcp_f16 v5, 0x3456
3736 // CHECK: [0xff,0x7a,0x0a,0x7e,0x56,0x34,0x00,0x00]
3737
3738 v_sqrt_f16 v5, v1
3739 // CHECK: [0x01,0x7d,0x0a,0x7e]
3740
3741 v_sqrt_f16 v255, v1
3742 // CHECK: [0x01,0x7d,0xfe,0x7f]
3743
3744 v_sqrt_f16 v5, v255
3745 // CHECK: [0xff,0x7d,0x0a,0x7e]
3746
3747 v_sqrt_f16 v5, s1
3748 // CHECK: [0x01,0x7c,0x0a,0x7e]
3749
3750 v_sqrt_f16 v5, s101
3751 // CHECK: [0x65,0x7c,0x0a,0x7e]
3752
3753 v_sqrt_f16 v5, flat_scratch_lo
3754 // CHECK: [0x66,0x7c,0x0a,0x7e]
3755
3756 v_sqrt_f16 v5, flat_scratch_hi
3757 // CHECK: [0x67,0x7c,0x0a,0x7e]
3758
3759 v_sqrt_f16 v5, vcc_lo
3760 // CHECK: [0x6a,0x7c,0x0a,0x7e]
3761
3762 v_sqrt_f16 v5, vcc_hi
3763 // CHECK: [0x6b,0x7c,0x0a,0x7e]
3764
3765 v_sqrt_f16 v5, ttmp15
3766 // CHECK: [0x7b,0x7c,0x0a,0x7e]
3767
3768 v_sqrt_f16 v5, m0
3769 // CHECK: [0x7c,0x7c,0x0a,0x7e]
3770
3771 v_sqrt_f16 v5, exec_lo
3772 // CHECK: [0x7e,0x7c,0x0a,0x7e]
3773
3774 v_sqrt_f16 v5, exec_hi
3775 // CHECK: [0x7f,0x7c,0x0a,0x7e]
3776
3777 v_sqrt_f16 v5, 0
3778 // CHECK: [0x80,0x7c,0x0a,0x7e]
3779
3780 v_sqrt_f16 v5, -1
3781 // CHECK: [0xc1,0x7c,0x0a,0x7e]
3782
3783 v_sqrt_f16 v5, 0.5
3784 // CHECK: [0xf0,0x7c,0x0a,0x7e]
3785
3786 v_sqrt_f16 v5, -4.0
3787 // CHECK: [0xf7,0x7c,0x0a,0x7e]
3788
3789 v_sqrt_f16 v5, src_vccz
3790 // CHECK: [0xfb,0x7c,0x0a,0x7e]
3791
3792 v_sqrt_f16 v5, src_execz
3793 // CHECK: [0xfc,0x7c,0x0a,0x7e]
3794
3795 v_sqrt_f16 v5, src_scc
3796 // CHECK: [0xfd,0x7c,0x0a,0x7e]
3797
3798 v_sqrt_f16 v5, src_lds_direct
3799 // CHECK: [0xfe,0x7c,0x0a,0x7e]
3800
3801 v_sqrt_f16 v5, 0xfe0b
3802 // CHECK: [0xff,0x7c,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
3803
3804 v_sqrt_f16 v5, 0x3456
3805 // CHECK: [0xff,0x7c,0x0a,0x7e,0x56,0x34,0x00,0x00]
3806
3807 v_rsq_f16 v5, v1
3808 // CHECK: [0x01,0x7f,0x0a,0x7e]
3809
3810 v_rsq_f16 v255, v1
3811 // CHECK: [0x01,0x7f,0xfe,0x7f]
3812
3813 v_rsq_f16 v5, v255
3814 // CHECK: [0xff,0x7f,0x0a,0x7e]
3815
3816 v_rsq_f16 v5, s1
3817 // CHECK: [0x01,0x7e,0x0a,0x7e]
3818
3819 v_rsq_f16 v5, s101
3820 // CHECK: [0x65,0x7e,0x0a,0x7e]
3821
3822 v_rsq_f16 v5, flat_scratch_lo
3823 // CHECK: [0x66,0x7e,0x0a,0x7e]
3824
3825 v_rsq_f16 v5, flat_scratch_hi
3826 // CHECK: [0x67,0x7e,0x0a,0x7e]
3827
3828 v_rsq_f16 v5, vcc_lo
3829 // CHECK: [0x6a,0x7e,0x0a,0x7e]
3830
3831 v_rsq_f16 v5, vcc_hi
3832 // CHECK: [0x6b,0x7e,0x0a,0x7e]
3833
3834 v_rsq_f16 v5, ttmp15
3835 // CHECK: [0x7b,0x7e,0x0a,0x7e]
3836
3837 v_rsq_f16 v5, m0
3838 // CHECK: [0x7c,0x7e,0x0a,0x7e]
3839
3840 v_rsq_f16 v5, exec_lo
3841 // CHECK: [0x7e,0x7e,0x0a,0x7e]
3842
3843 v_rsq_f16 v5, exec_hi
3844 // CHECK: [0x7f,0x7e,0x0a,0x7e]
3845
3846 v_rsq_f16 v5, 0
3847 // CHECK: [0x80,0x7e,0x0a,0x7e]
3848
3849 v_rsq_f16 v5, -1
3850 // CHECK: [0xc1,0x7e,0x0a,0x7e]
3851
3852 v_rsq_f16 v5, 0.5
3853 // CHECK: [0xf0,0x7e,0x0a,0x7e]
3854
3855 v_rsq_f16 v5, -4.0
3856 // CHECK: [0xf7,0x7e,0x0a,0x7e]
3857
3858 v_rsq_f16 v5, src_vccz
3859 // CHECK: [0xfb,0x7e,0x0a,0x7e]
3860
3861 v_rsq_f16 v5, src_execz
3862 // CHECK: [0xfc,0x7e,0x0a,0x7e]
3863
3864 v_rsq_f16 v5, src_scc
3865 // CHECK: [0xfd,0x7e,0x0a,0x7e]
3866
3867 v_rsq_f16 v5, src_lds_direct
3868 // CHECK: [0xfe,0x7e,0x0a,0x7e]
3869
3870 v_rsq_f16 v5, 0xfe0b
3871 // CHECK: [0xff,0x7e,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
3872
3873 v_rsq_f16 v5, 0x3456
3874 // CHECK: [0xff,0x7e,0x0a,0x7e,0x56,0x34,0x00,0x00]
3875
3876 v_log_f16 v5, v1
3877 // CHECK: [0x01,0x81,0x0a,0x7e]
3878
3879 v_log_f16 v255, v1
3880 // CHECK: [0x01,0x81,0xfe,0x7f]
3881
3882 v_log_f16 v5, v255
3883 // CHECK: [0xff,0x81,0x0a,0x7e]
3884
3885 v_log_f16 v5, s1
3886 // CHECK: [0x01,0x80,0x0a,0x7e]
3887
3888 v_log_f16 v5, s101
3889 // CHECK: [0x65,0x80,0x0a,0x7e]
3890
3891 v_log_f16 v5, flat_scratch_lo
3892 // CHECK: [0x66,0x80,0x0a,0x7e]
3893
3894 v_log_f16 v5, flat_scratch_hi
3895 // CHECK: [0x67,0x80,0x0a,0x7e]
3896
3897 v_log_f16 v5, vcc_lo
3898 // CHECK: [0x6a,0x80,0x0a,0x7e]
3899
3900 v_log_f16 v5, vcc_hi
3901 // CHECK: [0x6b,0x80,0x0a,0x7e]
3902
3903 v_log_f16 v5, ttmp15
3904 // CHECK: [0x7b,0x80,0x0a,0x7e]
3905
3906 v_log_f16 v5, m0
3907 // CHECK: [0x7c,0x80,0x0a,0x7e]
3908
3909 v_log_f16 v5, exec_lo
3910 // CHECK: [0x7e,0x80,0x0a,0x7e]
3911
3912 v_log_f16 v5, exec_hi
3913 // CHECK: [0x7f,0x80,0x0a,0x7e]
3914
3915 v_log_f16 v5, 0
3916 // CHECK: [0x80,0x80,0x0a,0x7e]
3917
3918 v_log_f16 v5, -1
3919 // CHECK: [0xc1,0x80,0x0a,0x7e]
3920
3921 v_log_f16 v5, 0.5
3922 // CHECK: [0xf0,0x80,0x0a,0x7e]
3923
3924 v_log_f16 v5, -4.0
3925 // CHECK: [0xf7,0x80,0x0a,0x7e]
3926
3927 v_log_f16 v5, src_vccz
3928 // CHECK: [0xfb,0x80,0x0a,0x7e]
3929
3930 v_log_f16 v5, src_execz
3931 // CHECK: [0xfc,0x80,0x0a,0x7e]
3932
3933 v_log_f16 v5, src_scc
3934 // CHECK: [0xfd,0x80,0x0a,0x7e]
3935
3936 v_log_f16 v5, src_lds_direct
3937 // CHECK: [0xfe,0x80,0x0a,0x7e]
3938
3939 v_log_f16 v5, 0xfe0b
3940 // CHECK: [0xff,0x80,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
3941
3942 v_log_f16 v5, 0x3456
3943 // CHECK: [0xff,0x80,0x0a,0x7e,0x56,0x34,0x00,0x00]
3944
3945 v_exp_f16 v5, v1
3946 // CHECK: [0x01,0x83,0x0a,0x7e]
3947
3948 v_exp_f16 v255, v1
3949 // CHECK: [0x01,0x83,0xfe,0x7f]
3950
3951 v_exp_f16 v5, v255
3952 // CHECK: [0xff,0x83,0x0a,0x7e]
3953
3954 v_exp_f16 v5, s1
3955 // CHECK: [0x01,0x82,0x0a,0x7e]
3956
3957 v_exp_f16 v5, s101
3958 // CHECK: [0x65,0x82,0x0a,0x7e]
3959
3960 v_exp_f16 v5, flat_scratch_lo
3961 // CHECK: [0x66,0x82,0x0a,0x7e]
3962
3963 v_exp_f16 v5, flat_scratch_hi
3964 // CHECK: [0x67,0x82,0x0a,0x7e]
3965
3966 v_exp_f16 v5, vcc_lo
3967 // CHECK: [0x6a,0x82,0x0a,0x7e]
3968
3969 v_exp_f16 v5, vcc_hi
3970 // CHECK: [0x6b,0x82,0x0a,0x7e]
3971
3972 v_exp_f16 v5, ttmp15
3973 // CHECK: [0x7b,0x82,0x0a,0x7e]
3974
3975 v_exp_f16 v5, m0
3976 // CHECK: [0x7c,0x82,0x0a,0x7e]
3977
3978 v_exp_f16 v5, exec_lo
3979 // CHECK: [0x7e,0x82,0x0a,0x7e]
3980
3981 v_exp_f16 v5, exec_hi
3982 // CHECK: [0x7f,0x82,0x0a,0x7e]
3983
3984 v_exp_f16 v5, 0
3985 // CHECK: [0x80,0x82,0x0a,0x7e]
3986
3987 v_exp_f16 v5, -1
3988 // CHECK: [0xc1,0x82,0x0a,0x7e]
3989
3990 v_exp_f16 v5, 0.5
3991 // CHECK: [0xf0,0x82,0x0a,0x7e]
3992
3993 v_exp_f16 v5, -4.0
3994 // CHECK: [0xf7,0x82,0x0a,0x7e]
3995
3996 v_exp_f16 v5, src_vccz
3997 // CHECK: [0xfb,0x82,0x0a,0x7e]
3998
3999 v_exp_f16 v5, src_execz
4000 // CHECK: [0xfc,0x82,0x0a,0x7e]
4001
4002 v_exp_f16 v5, src_scc
4003 // CHECK: [0xfd,0x82,0x0a,0x7e]
4004
4005 v_exp_f16 v5, src_lds_direct
4006 // CHECK: [0xfe,0x82,0x0a,0x7e]
4007
4008 v_exp_f16 v5, 0xfe0b
4009 // CHECK: [0xff,0x82,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
4010
4011 v_exp_f16 v5, 0x3456
4012 // CHECK: [0xff,0x82,0x0a,0x7e,0x56,0x34,0x00,0x00]
4013
4014 v_frexp_mant_f16 v5, v1
4015 // CHECK: [0x01,0x85,0x0a,0x7e]
4016
4017 v_frexp_mant_f16 v255, v1
4018 // CHECK: [0x01,0x85,0xfe,0x7f]
4019
4020 v_frexp_mant_f16 v5, v255
4021 // CHECK: [0xff,0x85,0x0a,0x7e]
4022
4023 v_frexp_mant_f16 v5, s1
4024 // CHECK: [0x01,0x84,0x0a,0x7e]
4025
4026 v_frexp_mant_f16 v5, s101
4027 // CHECK: [0x65,0x84,0x0a,0x7e]
4028
4029 v_frexp_mant_f16 v5, flat_scratch_lo
4030 // CHECK: [0x66,0x84,0x0a,0x7e]
4031
4032 v_frexp_mant_f16 v5, flat_scratch_hi
4033 // CHECK: [0x67,0x84,0x0a,0x7e]
4034
4035 v_frexp_mant_f16 v5, vcc_lo
4036 // CHECK: [0x6a,0x84,0x0a,0x7e]
4037
4038 v_frexp_mant_f16 v5, vcc_hi
4039 // CHECK: [0x6b,0x84,0x0a,0x7e]
4040
4041 v_frexp_mant_f16 v5, ttmp15
4042 // CHECK: [0x7b,0x84,0x0a,0x7e]
4043
4044 v_frexp_mant_f16 v5, m0
4045 // CHECK: [0x7c,0x84,0x0a,0x7e]
4046
4047 v_frexp_mant_f16 v5, exec_lo
4048 // CHECK: [0x7e,0x84,0x0a,0x7e]
4049
4050 v_frexp_mant_f16 v5, exec_hi
4051 // CHECK: [0x7f,0x84,0x0a,0x7e]
4052
4053 v_frexp_mant_f16 v5, 0
4054 // CHECK: [0x80,0x84,0x0a,0x7e]
4055
4056 v_frexp_mant_f16 v5, -1
4057 // CHECK: [0xc1,0x84,0x0a,0x7e]
4058
4059 v_frexp_mant_f16 v5, 0.5
4060 // CHECK: [0xf0,0x84,0x0a,0x7e]
4061
4062 v_frexp_mant_f16 v5, -4.0
4063 // CHECK: [0xf7,0x84,0x0a,0x7e]
4064
4065 v_frexp_mant_f16 v5, src_vccz
4066 // CHECK: [0xfb,0x84,0x0a,0x7e]
4067
4068 v_frexp_mant_f16 v5, src_execz
4069 // CHECK: [0xfc,0x84,0x0a,0x7e]
4070
4071 v_frexp_mant_f16 v5, src_scc
4072 // CHECK: [0xfd,0x84,0x0a,0x7e]
4073
4074 v_frexp_mant_f16 v5, src_lds_direct
4075 // CHECK: [0xfe,0x84,0x0a,0x7e]
4076
4077 v_frexp_mant_f16 v5, 0xfe0b
4078 // CHECK: [0xff,0x84,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
4079
4080 v_frexp_mant_f16 v5, 0x3456
4081 // CHECK: [0xff,0x84,0x0a,0x7e,0x56,0x34,0x00,0x00]
4082
4083 v_frexp_exp_i16_f16 v5, v1
4084 // CHECK: [0x01,0x87,0x0a,0x7e]
4085
4086 v_frexp_exp_i16_f16 v255, v1
4087 // CHECK: [0x01,0x87,0xfe,0x7f]
4088
4089 v_frexp_exp_i16_f16 v5, v255
4090 // CHECK: [0xff,0x87,0x0a,0x7e]
4091
4092 v_frexp_exp_i16_f16 v5, s1
4093 // CHECK: [0x01,0x86,0x0a,0x7e]
4094
4095 v_frexp_exp_i16_f16 v5, s101
4096 // CHECK: [0x65,0x86,0x0a,0x7e]
4097
4098 v_frexp_exp_i16_f16 v5, flat_scratch_lo
4099 // CHECK: [0x66,0x86,0x0a,0x7e]
4100
4101 v_frexp_exp_i16_f16 v5, flat_scratch_hi
4102 // CHECK: [0x67,0x86,0x0a,0x7e]
4103
4104 v_frexp_exp_i16_f16 v5, vcc_lo
4105 // CHECK: [0x6a,0x86,0x0a,0x7e]
4106
4107 v_frexp_exp_i16_f16 v5, vcc_hi
4108 // CHECK: [0x6b,0x86,0x0a,0x7e]
4109
4110 v_frexp_exp_i16_f16 v5, ttmp15
4111 // CHECK: [0x7b,0x86,0x0a,0x7e]
4112
4113 v_frexp_exp_i16_f16 v5, m0
4114 // CHECK: [0x7c,0x86,0x0a,0x7e]
4115
4116 v_frexp_exp_i16_f16 v5, exec_lo
4117 // CHECK: [0x7e,0x86,0x0a,0x7e]
4118
4119 v_frexp_exp_i16_f16 v5, exec_hi
4120 // CHECK: [0x7f,0x86,0x0a,0x7e]
4121
4122 v_frexp_exp_i16_f16 v5, 0
4123 // CHECK: [0x80,0x86,0x0a,0x7e]
4124
4125 v_frexp_exp_i16_f16 v5, -1
4126 // CHECK: [0xc1,0x86,0x0a,0x7e]
4127
4128 v_frexp_exp_i16_f16 v5, 0.5
4129 // CHECK: [0xf0,0x86,0x0a,0x7e]
4130
4131 v_frexp_exp_i16_f16 v5, -4.0
4132 // CHECK: [0xf7,0x86,0x0a,0x7e]
4133
4134 v_frexp_exp_i16_f16 v5, src_vccz
4135 // CHECK: [0xfb,0x86,0x0a,0x7e]
4136
4137 v_frexp_exp_i16_f16 v5, src_execz
4138 // CHECK: [0xfc,0x86,0x0a,0x7e]
4139
4140 v_frexp_exp_i16_f16 v5, src_scc
4141 // CHECK: [0xfd,0x86,0x0a,0x7e]
4142
4143 v_frexp_exp_i16_f16 v5, src_lds_direct
4144 // CHECK: [0xfe,0x86,0x0a,0x7e]
4145
4146 v_frexp_exp_i16_f16 v5, 0xfe0b
4147 // CHECK: [0xff,0x86,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
4148
4149 v_frexp_exp_i16_f16 v5, 0x3456
4150 // CHECK: [0xff,0x86,0x0a,0x7e,0x56,0x34,0x00,0x00]
4151
4152 v_floor_f16 v5, v1
4153 // CHECK: [0x01,0x89,0x0a,0x7e]
4154
4155 v_floor_f16 v255, v1
4156 // CHECK: [0x01,0x89,0xfe,0x7f]
4157
4158 v_floor_f16 v5, v255
4159 // CHECK: [0xff,0x89,0x0a,0x7e]
4160
4161 v_floor_f16 v5, s1
4162 // CHECK: [0x01,0x88,0x0a,0x7e]
4163
4164 v_floor_f16 v5, s101
4165 // CHECK: [0x65,0x88,0x0a,0x7e]
4166
4167 v_floor_f16 v5, flat_scratch_lo
4168 // CHECK: [0x66,0x88,0x0a,0x7e]
4169
4170 v_floor_f16 v5, flat_scratch_hi
4171 // CHECK: [0x67,0x88,0x0a,0x7e]
4172
4173 v_floor_f16 v5, vcc_lo
4174 // CHECK: [0x6a,0x88,0x0a,0x7e]
4175
4176 v_floor_f16 v5, vcc_hi
4177 // CHECK: [0x6b,0x88,0x0a,0x7e]
4178
4179 v_floor_f16 v5, ttmp15
4180 // CHECK: [0x7b,0x88,0x0a,0x7e]
4181
4182 v_floor_f16 v5, m0
4183 // CHECK: [0x7c,0x88,0x0a,0x7e]
4184
4185 v_floor_f16 v5, exec_lo
4186 // CHECK: [0x7e,0x88,0x0a,0x7e]
4187
4188 v_floor_f16 v5, exec_hi
4189 // CHECK: [0x7f,0x88,0x0a,0x7e]
4190
4191 v_floor_f16 v5, 0
4192 // CHECK: [0x80,0x88,0x0a,0x7e]
4193
4194 v_floor_f16 v5, -1
4195 // CHECK: [0xc1,0x88,0x0a,0x7e]
4196
4197 v_floor_f16 v5, 0.5
4198 // CHECK: [0xf0,0x88,0x0a,0x7e]
4199
4200 v_floor_f16 v5, -4.0
4201 // CHECK: [0xf7,0x88,0x0a,0x7e]
4202
4203 v_floor_f16 v5, src_vccz
4204 // CHECK: [0xfb,0x88,0x0a,0x7e]
4205
4206 v_floor_f16 v5, src_execz
4207 // CHECK: [0xfc,0x88,0x0a,0x7e]
4208
4209 v_floor_f16 v5, src_scc
4210 // CHECK: [0xfd,0x88,0x0a,0x7e]
4211
4212 v_floor_f16 v5, src_lds_direct
4213 // CHECK: [0xfe,0x88,0x0a,0x7e]
4214
4215 v_floor_f16 v5, 0xfe0b
4216 // CHECK: [0xff,0x88,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
4217
4218 v_floor_f16 v5, 0x3456
4219 // CHECK: [0xff,0x88,0x0a,0x7e,0x56,0x34,0x00,0x00]
4220
4221 v_ceil_f16 v5, v1
4222 // CHECK: [0x01,0x8b,0x0a,0x7e]
4223
4224 v_ceil_f16 v255, v1
4225 // CHECK: [0x01,0x8b,0xfe,0x7f]
4226
4227 v_ceil_f16 v5, v255
4228 // CHECK: [0xff,0x8b,0x0a,0x7e]
4229
4230 v_ceil_f16 v5, s1
4231 // CHECK: [0x01,0x8a,0x0a,0x7e]
4232
4233 v_ceil_f16 v5, s101
4234 // CHECK: [0x65,0x8a,0x0a,0x7e]
4235
4236 v_ceil_f16 v5, flat_scratch_lo
4237 // CHECK: [0x66,0x8a,0x0a,0x7e]
4238
4239 v_ceil_f16 v5, flat_scratch_hi
4240 // CHECK: [0x67,0x8a,0x0a,0x7e]
4241
4242 v_ceil_f16 v5, vcc_lo
4243 // CHECK: [0x6a,0x8a,0x0a,0x7e]
4244
4245 v_ceil_f16 v5, vcc_hi
4246 // CHECK: [0x6b,0x8a,0x0a,0x7e]
4247
4248 v_ceil_f16 v5, ttmp15
4249 // CHECK: [0x7b,0x8a,0x0a,0x7e]
4250
4251 v_ceil_f16 v5, m0
4252 // CHECK: [0x7c,0x8a,0x0a,0x7e]
4253
4254 v_ceil_f16 v5, exec_lo
4255 // CHECK: [0x7e,0x8a,0x0a,0x7e]
4256
4257 v_ceil_f16 v5, exec_hi
4258 // CHECK: [0x7f,0x8a,0x0a,0x7e]
4259
4260 v_ceil_f16 v5, 0
4261 // CHECK: [0x80,0x8a,0x0a,0x7e]
4262
4263 v_ceil_f16 v5, -1
4264 // CHECK: [0xc1,0x8a,0x0a,0x7e]
4265
4266 v_ceil_f16 v5, 0.5
4267 // CHECK: [0xf0,0x8a,0x0a,0x7e]
4268
4269 v_ceil_f16 v5, -4.0
4270 // CHECK: [0xf7,0x8a,0x0a,0x7e]
4271
4272 v_ceil_f16 v5, src_vccz
4273 // CHECK: [0xfb,0x8a,0x0a,0x7e]
4274
4275 v_ceil_f16 v5, src_execz
4276 // CHECK: [0xfc,0x8a,0x0a,0x7e]
4277
4278 v_ceil_f16 v5, src_scc
4279 // CHECK: [0xfd,0x8a,0x0a,0x7e]
4280
4281 v_ceil_f16 v5, src_lds_direct
4282 // CHECK: [0xfe,0x8a,0x0a,0x7e]
4283
4284 v_ceil_f16 v5, 0xfe0b
4285 // CHECK: [0xff,0x8a,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
4286
4287 v_ceil_f16 v5, 0x3456
4288 // CHECK: [0xff,0x8a,0x0a,0x7e,0x56,0x34,0x00,0x00]
4289
4290 v_trunc_f16 v5, v1
4291 // CHECK: [0x01,0x8d,0x0a,0x7e]
4292
4293 v_trunc_f16 v255, v1
4294 // CHECK: [0x01,0x8d,0xfe,0x7f]
4295
4296 v_trunc_f16 v5, v255
4297 // CHECK: [0xff,0x8d,0x0a,0x7e]
4298
4299 v_trunc_f16 v5, s1
4300 // CHECK: [0x01,0x8c,0x0a,0x7e]
4301
4302 v_trunc_f16 v5, s101
4303 // CHECK: [0x65,0x8c,0x0a,0x7e]
4304
4305 v_trunc_f16 v5, flat_scratch_lo
4306 // CHECK: [0x66,0x8c,0x0a,0x7e]
4307
4308 v_trunc_f16 v5, flat_scratch_hi
4309 // CHECK: [0x67,0x8c,0x0a,0x7e]
4310
4311 v_trunc_f16 v5, vcc_lo
4312 // CHECK: [0x6a,0x8c,0x0a,0x7e]
4313
4314 v_trunc_f16 v5, vcc_hi
4315 // CHECK: [0x6b,0x8c,0x0a,0x7e]
4316
4317 v_trunc_f16 v5, ttmp15
4318 // CHECK: [0x7b,0x8c,0x0a,0x7e]
4319
4320 v_trunc_f16 v5, m0
4321 // CHECK: [0x7c,0x8c,0x0a,0x7e]
4322
4323 v_trunc_f16 v5, exec_lo
4324 // CHECK: [0x7e,0x8c,0x0a,0x7e]
4325
4326 v_trunc_f16 v5, exec_hi
4327 // CHECK: [0x7f,0x8c,0x0a,0x7e]
4328
4329 v_trunc_f16 v5, 0
4330 // CHECK: [0x80,0x8c,0x0a,0x7e]
4331
4332 v_trunc_f16 v5, -1
4333 // CHECK: [0xc1,0x8c,0x0a,0x7e]
4334
4335 v_trunc_f16 v5, 0.5
4336 // CHECK: [0xf0,0x8c,0x0a,0x7e]
4337
4338 v_trunc_f16 v5, -4.0
4339 // CHECK: [0xf7,0x8c,0x0a,0x7e]
4340
4341 v_trunc_f16 v5, src_vccz
4342 // CHECK: [0xfb,0x8c,0x0a,0x7e]
4343
4344 v_trunc_f16 v5, src_execz
4345 // CHECK: [0xfc,0x8c,0x0a,0x7e]
4346
4347 v_trunc_f16 v5, src_scc
4348 // CHECK: [0xfd,0x8c,0x0a,0x7e]
4349
4350 v_trunc_f16 v5, src_lds_direct
4351 // CHECK: [0xfe,0x8c,0x0a,0x7e]
4352
4353 v_trunc_f16 v5, 0xfe0b
4354 // CHECK: [0xff,0x8c,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
4355
4356 v_trunc_f16 v5, 0x3456
4357 // CHECK: [0xff,0x8c,0x0a,0x7e,0x56,0x34,0x00,0x00]
4358
4359 v_rndne_f16 v5, v1
4360 // CHECK: [0x01,0x8f,0x0a,0x7e]
4361
4362 v_rndne_f16 v255, v1
4363 // CHECK: [0x01,0x8f,0xfe,0x7f]
4364
4365 v_rndne_f16 v5, v255
4366 // CHECK: [0xff,0x8f,0x0a,0x7e]
4367
4368 v_rndne_f16 v5, s1
4369 // CHECK: [0x01,0x8e,0x0a,0x7e]
4370
4371 v_rndne_f16 v5, s101
4372 // CHECK: [0x65,0x8e,0x0a,0x7e]
4373
4374 v_rndne_f16 v5, flat_scratch_lo
4375 // CHECK: [0x66,0x8e,0x0a,0x7e]
4376
4377 v_rndne_f16 v5, flat_scratch_hi
4378 // CHECK: [0x67,0x8e,0x0a,0x7e]
4379
4380 v_rndne_f16 v5, vcc_lo
4381 // CHECK: [0x6a,0x8e,0x0a,0x7e]
4382
4383 v_rndne_f16 v5, vcc_hi
4384 // CHECK: [0x6b,0x8e,0x0a,0x7e]
4385
4386 v_rndne_f16 v5, ttmp15
4387 // CHECK: [0x7b,0x8e,0x0a,0x7e]
4388
4389 v_rndne_f16 v5, m0
4390 // CHECK: [0x7c,0x8e,0x0a,0x7e]
4391
4392 v_rndne_f16 v5, exec_lo
4393 // CHECK: [0x7e,0x8e,0x0a,0x7e]
4394
4395 v_rndne_f16 v5, exec_hi
4396 // CHECK: [0x7f,0x8e,0x0a,0x7e]
4397
4398 v_rndne_f16 v5, 0
4399 // CHECK: [0x80,0x8e,0x0a,0x7e]
4400
4401 v_rndne_f16 v5, -1
4402 // CHECK: [0xc1,0x8e,0x0a,0x7e]
4403
4404 v_rndne_f16 v5, 0.5
4405 // CHECK: [0xf0,0x8e,0x0a,0x7e]
4406
4407 v_rndne_f16 v5, -4.0
4408 // CHECK: [0xf7,0x8e,0x0a,0x7e]
4409
4410 v_rndne_f16 v5, src_vccz
4411 // CHECK: [0xfb,0x8e,0x0a,0x7e]
4412
4413 v_rndne_f16 v5, src_execz
4414 // CHECK: [0xfc,0x8e,0x0a,0x7e]
4415
4416 v_rndne_f16 v5, src_scc
4417 // CHECK: [0xfd,0x8e,0x0a,0x7e]
4418
4419 v_rndne_f16 v5, src_lds_direct
4420 // CHECK: [0xfe,0x8e,0x0a,0x7e]
4421
4422 v_rndne_f16 v5, 0xfe0b
4423 // CHECK: [0xff,0x8e,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
4424
4425 v_rndne_f16 v5, 0x3456
4426 // CHECK: [0xff,0x8e,0x0a,0x7e,0x56,0x34,0x00,0x00]
4427
4428 v_fract_f16 v5, v1
4429 // CHECK: [0x01,0x91,0x0a,0x7e]
4430
4431 v_fract_f16 v255, v1
4432 // CHECK: [0x01,0x91,0xfe,0x7f]
4433
4434 v_fract_f16 v5, v255
4435 // CHECK: [0xff,0x91,0x0a,0x7e]
4436
4437 v_fract_f16 v5, s1
4438 // CHECK: [0x01,0x90,0x0a,0x7e]
4439
4440 v_fract_f16 v5, s101
4441 // CHECK: [0x65,0x90,0x0a,0x7e]
4442
4443 v_fract_f16 v5, flat_scratch_lo
4444 // CHECK: [0x66,0x90,0x0a,0x7e]
4445
4446 v_fract_f16 v5, flat_scratch_hi
4447 // CHECK: [0x67,0x90,0x0a,0x7e]
4448
4449 v_fract_f16 v5, vcc_lo
4450 // CHECK: [0x6a,0x90,0x0a,0x7e]
4451
4452 v_fract_f16 v5, vcc_hi
4453 // CHECK: [0x6b,0x90,0x0a,0x7e]
4454
4455 v_fract_f16 v5, ttmp15
4456 // CHECK: [0x7b,0x90,0x0a,0x7e]
4457
4458 v_fract_f16 v5, m0
4459 // CHECK: [0x7c,0x90,0x0a,0x7e]
4460
4461 v_fract_f16 v5, exec_lo
4462 // CHECK: [0x7e,0x90,0x0a,0x7e]
4463
4464 v_fract_f16 v5, exec_hi
4465 // CHECK: [0x7f,0x90,0x0a,0x7e]
4466
4467 v_fract_f16 v5, 0
4468 // CHECK: [0x80,0x90,0x0a,0x7e]
4469
4470 v_fract_f16 v5, -1
4471 // CHECK: [0xc1,0x90,0x0a,0x7e]
4472
4473 v_fract_f16 v5, 0.5
4474 // CHECK: [0xf0,0x90,0x0a,0x7e]
4475
4476 v_fract_f16 v5, -4.0
4477 // CHECK: [0xf7,0x90,0x0a,0x7e]
4478
4479 v_fract_f16 v5, src_vccz
4480 // CHECK: [0xfb,0x90,0x0a,0x7e]
4481
4482 v_fract_f16 v5, src_execz
4483 // CHECK: [0xfc,0x90,0x0a,0x7e]
4484
4485 v_fract_f16 v5, src_scc
4486 // CHECK: [0xfd,0x90,0x0a,0x7e]
4487
4488 v_fract_f16 v5, src_lds_direct
4489 // CHECK: [0xfe,0x90,0x0a,0x7e]
4490
4491 v_fract_f16 v5, 0xfe0b
4492 // CHECK: [0xff,0x90,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
4493
4494 v_fract_f16 v5, 0x3456
4495 // CHECK: [0xff,0x90,0x0a,0x7e,0x56,0x34,0x00,0x00]
4496
4497 v_sin_f16 v5, v1
4498 // CHECK: [0x01,0x93,0x0a,0x7e]
4499
4500 v_sin_f16 v255, v1
4501 // CHECK: [0x01,0x93,0xfe,0x7f]
4502
4503 v_sin_f16 v5, v255
4504 // CHECK: [0xff,0x93,0x0a,0x7e]
4505
4506 v_sin_f16 v5, s1
4507 // CHECK: [0x01,0x92,0x0a,0x7e]
4508
4509 v_sin_f16 v5, s101
4510 // CHECK: [0x65,0x92,0x0a,0x7e]
4511
4512 v_sin_f16 v5, flat_scratch_lo
4513 // CHECK: [0x66,0x92,0x0a,0x7e]
4514
4515 v_sin_f16 v5, flat_scratch_hi
4516 // CHECK: [0x67,0x92,0x0a,0x7e]
4517
4518 v_sin_f16 v5, vcc_lo
4519 // CHECK: [0x6a,0x92,0x0a,0x7e]
4520
4521 v_sin_f16 v5, vcc_hi
4522 // CHECK: [0x6b,0x92,0x0a,0x7e]
4523
4524 v_sin_f16 v5, ttmp15
4525 // CHECK: [0x7b,0x92,0x0a,0x7e]
4526
4527 v_sin_f16 v5, m0
4528 // CHECK: [0x7c,0x92,0x0a,0x7e]
4529
4530 v_sin_f16 v5, exec_lo
4531 // CHECK: [0x7e,0x92,0x0a,0x7e]
4532
4533 v_sin_f16 v5, exec_hi
4534 // CHECK: [0x7f,0x92,0x0a,0x7e]
4535
4536 v_sin_f16 v5, 0
4537 // CHECK: [0x80,0x92,0x0a,0x7e]
4538
4539 v_sin_f16 v5, -1
4540 // CHECK: [0xc1,0x92,0x0a,0x7e]
4541
4542 v_sin_f16 v5, 0.5
4543 // CHECK: [0xf0,0x92,0x0a,0x7e]
4544
4545 v_sin_f16 v5, -4.0
4546 // CHECK: [0xf7,0x92,0x0a,0x7e]
4547
4548 v_sin_f16 v5, src_vccz
4549 // CHECK: [0xfb,0x92,0x0a,0x7e]
4550
4551 v_sin_f16 v5, src_execz
4552 // CHECK: [0xfc,0x92,0x0a,0x7e]
4553
4554 v_sin_f16 v5, src_scc
4555 // CHECK: [0xfd,0x92,0x0a,0x7e]
4556
4557 v_sin_f16 v5, src_lds_direct
4558 // CHECK: [0xfe,0x92,0x0a,0x7e]
4559
4560 v_sin_f16 v5, 0xfe0b
4561 // CHECK: [0xff,0x92,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
4562
4563 v_sin_f16 v5, 0x3456
4564 // CHECK: [0xff,0x92,0x0a,0x7e,0x56,0x34,0x00,0x00]
4565
4566 v_cos_f16 v5, v1
4567 // CHECK: [0x01,0x95,0x0a,0x7e]
4568
4569 v_cos_f16 v255, v1
4570 // CHECK: [0x01,0x95,0xfe,0x7f]
4571
4572 v_cos_f16 v5, v255
4573 // CHECK: [0xff,0x95,0x0a,0x7e]
4574
4575 v_cos_f16 v5, s1
4576 // CHECK: [0x01,0x94,0x0a,0x7e]
4577
4578 v_cos_f16 v5, s101
4579 // CHECK: [0x65,0x94,0x0a,0x7e]
4580
4581 v_cos_f16 v5, flat_scratch_lo
4582 // CHECK: [0x66,0x94,0x0a,0x7e]
4583
4584 v_cos_f16 v5, flat_scratch_hi
4585 // CHECK: [0x67,0x94,0x0a,0x7e]
4586
4587 v_cos_f16 v5, vcc_lo
4588 // CHECK: [0x6a,0x94,0x0a,0x7e]
4589
4590 v_cos_f16 v5, vcc_hi
4591 // CHECK: [0x6b,0x94,0x0a,0x7e]
4592
4593 v_cos_f16 v5, ttmp15
4594 // CHECK: [0x7b,0x94,0x0a,0x7e]
4595
4596 v_cos_f16 v5, m0
4597 // CHECK: [0x7c,0x94,0x0a,0x7e]
4598
4599 v_cos_f16 v5, exec_lo
4600 // CHECK: [0x7e,0x94,0x0a,0x7e]
4601
4602 v_cos_f16 v5, exec_hi
4603 // CHECK: [0x7f,0x94,0x0a,0x7e]
4604
4605 v_cos_f16 v5, 0
4606 // CHECK: [0x80,0x94,0x0a,0x7e]
4607
4608 v_cos_f16 v5, -1
4609 // CHECK: [0xc1,0x94,0x0a,0x7e]
4610
4611 v_cos_f16 v5, 0.5
4612 // CHECK: [0xf0,0x94,0x0a,0x7e]
4613
4614 v_cos_f16 v5, -4.0
4615 // CHECK: [0xf7,0x94,0x0a,0x7e]
4616
4617 v_cos_f16 v5, src_vccz
4618 // CHECK: [0xfb,0x94,0x0a,0x7e]
4619
4620 v_cos_f16 v5, src_execz
4621 // CHECK: [0xfc,0x94,0x0a,0x7e]
4622
4623 v_cos_f16 v5, src_scc
4624 // CHECK: [0xfd,0x94,0x0a,0x7e]
4625
4626 v_cos_f16 v5, src_lds_direct
4627 // CHECK: [0xfe,0x94,0x0a,0x7e]
4628
4629 v_cos_f16 v5, 0xfe0b
4630 // CHECK: [0xff,0x94,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
4631
4632 v_cos_f16 v5, 0x3456
4633 // CHECK: [0xff,0x94,0x0a,0x7e,0x56,0x34,0x00,0x00]
4634
4635 v_exp_legacy_f32 v5, v1
4636 // CHECK: [0x01,0x97,0x0a,0x7e]
4637
4638 v_exp_legacy_f32 v255, v1
4639 // CHECK: [0x01,0x97,0xfe,0x7f]
4640
4641 v_exp_legacy_f32 v5, v255
4642 // CHECK: [0xff,0x97,0x0a,0x7e]
4643
4644 v_exp_legacy_f32 v5, s1
4645 // CHECK: [0x01,0x96,0x0a,0x7e]
4646
4647 v_exp_legacy_f32 v5, s101
4648 // CHECK: [0x65,0x96,0x0a,0x7e]
4649
4650 v_exp_legacy_f32 v5, flat_scratch_lo
4651 // CHECK: [0x66,0x96,0x0a,0x7e]
4652
4653 v_exp_legacy_f32 v5, flat_scratch_hi
4654 // CHECK: [0x67,0x96,0x0a,0x7e]
4655
4656 v_exp_legacy_f32 v5, vcc_lo
4657 // CHECK: [0x6a,0x96,0x0a,0x7e]
4658
4659 v_exp_legacy_f32 v5, vcc_hi
4660 // CHECK: [0x6b,0x96,0x0a,0x7e]
4661
4662 v_exp_legacy_f32 v5, ttmp15
4663 // CHECK: [0x7b,0x96,0x0a,0x7e]
4664
4665 v_exp_legacy_f32 v5, m0
4666 // CHECK: [0x7c,0x96,0x0a,0x7e]
4667
4668 v_exp_legacy_f32 v5, exec_lo
4669 // CHECK: [0x7e,0x96,0x0a,0x7e]
4670
4671 v_exp_legacy_f32 v5, exec_hi
4672 // CHECK: [0x7f,0x96,0x0a,0x7e]
4673
4674 v_exp_legacy_f32 v5, 0
4675 // CHECK: [0x80,0x96,0x0a,0x7e]
4676
4677 v_exp_legacy_f32 v5, -1
4678 // CHECK: [0xc1,0x96,0x0a,0x7e]
4679
4680 v_exp_legacy_f32 v5, 0.5
4681 // CHECK: [0xf0,0x96,0x0a,0x7e]
4682
4683 v_exp_legacy_f32 v5, -4.0
4684 // CHECK: [0xf7,0x96,0x0a,0x7e]
4685
4686 v_exp_legacy_f32 v5, src_vccz
4687 // CHECK: [0xfb,0x96,0x0a,0x7e]
4688
4689 v_exp_legacy_f32 v5, src_execz
4690 // CHECK: [0xfc,0x96,0x0a,0x7e]
4691
4692 v_exp_legacy_f32 v5, src_scc
4693 // CHECK: [0xfd,0x96,0x0a,0x7e]
4694
4695 v_exp_legacy_f32 v5, src_lds_direct
4696 // CHECK: [0xfe,0x96,0x0a,0x7e]
4697
4698 v_exp_legacy_f32 v5, 0xaf123456
4699 // CHECK: [0xff,0x96,0x0a,0x7e,0x56,0x34,0x12,0xaf]
4700
4701 v_exp_legacy_f32 v5, 0x3f717273
4702 // CHECK: [0xff,0x96,0x0a,0x7e,0x73,0x72,0x71,0x3f]
4703
4704 v_log_legacy_f32 v5, v1
4705 // CHECK: [0x01,0x99,0x0a,0x7e]
4706
4707 v_log_legacy_f32 v255, v1
4708 // CHECK: [0x01,0x99,0xfe,0x7f]
4709
4710 v_log_legacy_f32 v5, v255
4711 // CHECK: [0xff,0x99,0x0a,0x7e]
4712
4713 v_log_legacy_f32 v5, s1
4714 // CHECK: [0x01,0x98,0x0a,0x7e]
4715
4716 v_log_legacy_f32 v5, s101
4717 // CHECK: [0x65,0x98,0x0a,0x7e]
4718
4719 v_log_legacy_f32 v5, flat_scratch_lo
4720 // CHECK: [0x66,0x98,0x0a,0x7e]
4721
4722 v_log_legacy_f32 v5, flat_scratch_hi
4723 // CHECK: [0x67,0x98,0x0a,0x7e]
4724
4725 v_log_legacy_f32 v5, vcc_lo
4726 // CHECK: [0x6a,0x98,0x0a,0x7e]
4727
4728 v_log_legacy_f32 v5, vcc_hi
4729 // CHECK: [0x6b,0x98,0x0a,0x7e]
4730
4731 v_log_legacy_f32 v5, ttmp15
4732 // CHECK: [0x7b,0x98,0x0a,0x7e]
4733
4734 v_log_legacy_f32 v5, m0
4735 // CHECK: [0x7c,0x98,0x0a,0x7e]
4736
4737 v_log_legacy_f32 v5, exec_lo
4738 // CHECK: [0x7e,0x98,0x0a,0x7e]
4739
4740 v_log_legacy_f32 v5, exec_hi
4741 // CHECK: [0x7f,0x98,0x0a,0x7e]
4742
4743 v_log_legacy_f32 v5, 0
4744 // CHECK: [0x80,0x98,0x0a,0x7e]
4745
4746 v_log_legacy_f32 v5, -1
4747 // CHECK: [0xc1,0x98,0x0a,0x7e]
4748
4749 v_log_legacy_f32 v5, 0.5
4750 // CHECK: [0xf0,0x98,0x0a,0x7e]
4751
4752 v_log_legacy_f32 v5, -4.0
4753 // CHECK: [0xf7,0x98,0x0a,0x7e]
4754
4755 v_log_legacy_f32 v5, src_vccz
4756 // CHECK: [0xfb,0x98,0x0a,0x7e]
4757
4758 v_log_legacy_f32 v5, src_execz
4759 // CHECK: [0xfc,0x98,0x0a,0x7e]
4760
4761 v_log_legacy_f32 v5, src_scc
4762 // CHECK: [0xfd,0x98,0x0a,0x7e]
4763
4764 v_log_legacy_f32 v5, src_lds_direct
4765 // CHECK: [0xfe,0x98,0x0a,0x7e]
4766
4767 v_log_legacy_f32 v5, 0xaf123456
4768 // CHECK: [0xff,0x98,0x0a,0x7e,0x56,0x34,0x12,0xaf]
4769
4770 v_log_legacy_f32 v5, 0x3f717273
4771 // CHECK: [0xff,0x98,0x0a,0x7e,0x73,0x72,0x71,0x3f]
4772
4773 v_cvt_norm_i16_f16 v5, v1
4774 // CHECK: [0x01,0x9b,0x0a,0x7e]
4775
4776 v_cvt_norm_i16_f16 v255, v1
4777 // CHECK: [0x01,0x9b,0xfe,0x7f]
4778
4779 v_cvt_norm_i16_f16 v5, v255
4780 // CHECK: [0xff,0x9b,0x0a,0x7e]
4781
4782 v_cvt_norm_i16_f16 v5, s1
4783 // CHECK: [0x01,0x9a,0x0a,0x7e]
4784
4785 v_cvt_norm_i16_f16 v5, s101
4786 // CHECK: [0x65,0x9a,0x0a,0x7e]
4787
4788 v_cvt_norm_i16_f16 v5, flat_scratch_lo
4789 // CHECK: [0x66,0x9a,0x0a,0x7e]
4790
4791 v_cvt_norm_i16_f16 v5, flat_scratch_hi
4792 // CHECK: [0x67,0x9a,0x0a,0x7e]
4793
4794 v_cvt_norm_i16_f16 v5, vcc_lo
4795 // CHECK: [0x6a,0x9a,0x0a,0x7e]
4796
4797 v_cvt_norm_i16_f16 v5, vcc_hi
4798 // CHECK: [0x6b,0x9a,0x0a,0x7e]
4799
4800 v_cvt_norm_i16_f16 v5, ttmp15
4801 // CHECK: [0x7b,0x9a,0x0a,0x7e]
4802
4803 v_cvt_norm_i16_f16 v5, m0
4804 // CHECK: [0x7c,0x9a,0x0a,0x7e]
4805
4806 v_cvt_norm_i16_f16 v5, exec_lo
4807 // CHECK: [0x7e,0x9a,0x0a,0x7e]
4808
4809 v_cvt_norm_i16_f16 v5, exec_hi
4810 // CHECK: [0x7f,0x9a,0x0a,0x7e]
4811
4812 v_cvt_norm_i16_f16 v5, 0
4813 // CHECK: [0x80,0x9a,0x0a,0x7e]
4814
4815 v_cvt_norm_i16_f16 v5, -1
4816 // CHECK: [0xc1,0x9a,0x0a,0x7e]
4817
4818 v_cvt_norm_i16_f16 v5, 0.5
4819 // CHECK: [0xf0,0x9a,0x0a,0x7e]
4820
4821 v_cvt_norm_i16_f16 v5, -4.0
4822 // CHECK: [0xf7,0x9a,0x0a,0x7e]
4823
4824 v_cvt_norm_i16_f16 v5, src_vccz
4825 // CHECK: [0xfb,0x9a,0x0a,0x7e]
4826
4827 v_cvt_norm_i16_f16 v5, src_execz
4828 // CHECK: [0xfc,0x9a,0x0a,0x7e]
4829
4830 v_cvt_norm_i16_f16 v5, src_scc
4831 // CHECK: [0xfd,0x9a,0x0a,0x7e]
4832
4833 v_cvt_norm_i16_f16 v5, src_lds_direct
4834 // CHECK: [0xfe,0x9a,0x0a,0x7e]
4835
4836 v_cvt_norm_i16_f16 v5, 0xfe0b
4837 // CHECK: [0xff,0x9a,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
4838
4839 v_cvt_norm_i16_f16 v5, 0x3456
4840 // CHECK: [0xff,0x9a,0x0a,0x7e,0x56,0x34,0x00,0x00]
4841
4842 v_cvt_norm_u16_f16 v5, v1
4843 // CHECK: [0x01,0x9d,0x0a,0x7e]
4844
4845 v_cvt_norm_u16_f16 v255, v1
4846 // CHECK: [0x01,0x9d,0xfe,0x7f]
4847
4848 v_cvt_norm_u16_f16 v5, v255
4849 // CHECK: [0xff,0x9d,0x0a,0x7e]
4850
4851 v_cvt_norm_u16_f16 v5, s1
4852 // CHECK: [0x01,0x9c,0x0a,0x7e]
4853
4854 v_cvt_norm_u16_f16 v5, s101
4855 // CHECK: [0x65,0x9c,0x0a,0x7e]
4856
4857 v_cvt_norm_u16_f16 v5, flat_scratch_lo
4858 // CHECK: [0x66,0x9c,0x0a,0x7e]
4859
4860 v_cvt_norm_u16_f16 v5, flat_scratch_hi
4861 // CHECK: [0x67,0x9c,0x0a,0x7e]
4862
4863 v_cvt_norm_u16_f16 v5, vcc_lo
4864 // CHECK: [0x6a,0x9c,0x0a,0x7e]
4865
4866 v_cvt_norm_u16_f16 v5, vcc_hi
4867 // CHECK: [0x6b,0x9c,0x0a,0x7e]
4868
4869 v_cvt_norm_u16_f16 v5, ttmp15
4870 // CHECK: [0x7b,0x9c,0x0a,0x7e]
4871
4872 v_cvt_norm_u16_f16 v5, m0
4873 // CHECK: [0x7c,0x9c,0x0a,0x7e]
4874
4875 v_cvt_norm_u16_f16 v5, exec_lo
4876 // CHECK: [0x7e,0x9c,0x0a,0x7e]
4877
4878 v_cvt_norm_u16_f16 v5, exec_hi
4879 // CHECK: [0x7f,0x9c,0x0a,0x7e]
4880
4881 v_cvt_norm_u16_f16 v5, 0
4882 // CHECK: [0x80,0x9c,0x0a,0x7e]
4883
4884 v_cvt_norm_u16_f16 v5, -1
4885 // CHECK: [0xc1,0x9c,0x0a,0x7e]
4886
4887 v_cvt_norm_u16_f16 v5, 0.5
4888 // CHECK: [0xf0,0x9c,0x0a,0x7e]
4889
4890 v_cvt_norm_u16_f16 v5, -4.0
4891 // CHECK: [0xf7,0x9c,0x0a,0x7e]
4892
4893 v_cvt_norm_u16_f16 v5, src_vccz
4894 // CHECK: [0xfb,0x9c,0x0a,0x7e]
4895
4896 v_cvt_norm_u16_f16 v5, src_execz
4897 // CHECK: [0xfc,0x9c,0x0a,0x7e]
4898
4899 v_cvt_norm_u16_f16 v5, src_scc
4900 // CHECK: [0xfd,0x9c,0x0a,0x7e]
4901
4902 v_cvt_norm_u16_f16 v5, src_lds_direct
4903 // CHECK: [0xfe,0x9c,0x0a,0x7e]
4904
4905 v_cvt_norm_u16_f16 v5, 0xfe0b
4906 // CHECK: [0xff,0x9c,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
4907
4908 v_cvt_norm_u16_f16 v5, 0x3456
4909 // CHECK: [0xff,0x9c,0x0a,0x7e,0x56,0x34,0x00,0x00]
4910
4911 v_sat_pk_u8_i16 v5, v1
4912 // CHECK: [0x01,0x9f,0x0a,0x7e]
4913
4914 v_sat_pk_u8_i16 v255, v1
4915 // CHECK: [0x01,0x9f,0xfe,0x7f]
4916
4917 v_sat_pk_u8_i16 v5, v255
4918 // CHECK: [0xff,0x9f,0x0a,0x7e]
4919
4920 v_sat_pk_u8_i16 v5, s1
4921 // CHECK: [0x01,0x9e,0x0a,0x7e]
4922
4923 v_sat_pk_u8_i16 v5, s101
4924 // CHECK: [0x65,0x9e,0x0a,0x7e]
4925
4926 v_sat_pk_u8_i16 v5, flat_scratch_lo
4927 // CHECK: [0x66,0x9e,0x0a,0x7e]
4928
4929 v_sat_pk_u8_i16 v5, flat_scratch_hi
4930 // CHECK: [0x67,0x9e,0x0a,0x7e]
4931
4932 v_sat_pk_u8_i16 v5, vcc_lo
4933 // CHECK: [0x6a,0x9e,0x0a,0x7e]
4934
4935 v_sat_pk_u8_i16 v5, vcc_hi
4936 // CHECK: [0x6b,0x9e,0x0a,0x7e]
4937
4938 v_sat_pk_u8_i16 v5, ttmp15
4939 // CHECK: [0x7b,0x9e,0x0a,0x7e]
4940
4941 v_sat_pk_u8_i16 v5, m0
4942 // CHECK: [0x7c,0x9e,0x0a,0x7e]
4943
4944 v_sat_pk_u8_i16 v5, exec_lo
4945 // CHECK: [0x7e,0x9e,0x0a,0x7e]
4946
4947 v_sat_pk_u8_i16 v5, exec_hi
4948 // CHECK: [0x7f,0x9e,0x0a,0x7e]
4949
4950 v_sat_pk_u8_i16 v5, 0
4951 // CHECK: [0x80,0x9e,0x0a,0x7e]
4952
4953 v_sat_pk_u8_i16 v5, -1
4954 // CHECK: [0xc1,0x9e,0x0a,0x7e]
4955
4956 v_sat_pk_u8_i16 v5, 0.5
4957 // CHECK: [0xf0,0x9e,0x0a,0x7e]
4958
4959 v_sat_pk_u8_i16 v5, -4.0
4960 // CHECK: [0xf7,0x9e,0x0a,0x7e]
4961
4962 v_sat_pk_u8_i16 v5, src_vccz
4963 // CHECK: [0xfb,0x9e,0x0a,0x7e]
4964
4965 v_sat_pk_u8_i16 v5, src_execz
4966 // CHECK: [0xfc,0x9e,0x0a,0x7e]
4967
4968 v_sat_pk_u8_i16 v5, src_scc
4969 // CHECK: [0xfd,0x9e,0x0a,0x7e]
4970
4971 v_sat_pk_u8_i16 v5, src_lds_direct
4972 // CHECK: [0xfe,0x9e,0x0a,0x7e]
4973
4974 v_sat_pk_u8_i16 v5, 0xfe0b
4975 // CHECK: [0xff,0x9e,0x0a,0x7e,0x0b,0xfe,0x00,0x00]
4976
4977 v_sat_pk_u8_i16 v5, 0x3456
4978 // CHECK: [0xff,0x9e,0x0a,0x7e,0x56,0x34,0x00,0x00]
4979
4980 v_swap_b32 v5, v1
4981 // CHECK: [0x01,0xa3,0x0a,0x7e]
4982
4983 v_swap_b32 v255, v1
4984 // CHECK: [0x01,0xa3,0xfe,0x7f]
4985
4986 v_swap_b32 v5, v255
4987 // CHECK: [0xff,0xa3,0x0a,0x7e]
4988
4989 v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
4990 // CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x06,0x00]
4991
4992 v_mov_b32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
4993 // CHECK: [0xf9,0x02,0xfe,0x7f,0x01,0x06,0x06,0x00]
4994
4995 v_mov_b32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
4996 // CHECK: [0xf9,0x02,0x0a,0x7e,0xff,0x06,0x06,0x00]
4997
4998 v_mov_b32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
4999 // CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x86,0x00]
5000
5001 v_mov_b32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5002 // CHECK: [0xf9,0x02,0x0a,0x7e,0x65,0x06,0x86,0x00]
5003
5004 v_mov_b32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5005 // CHECK: [0xf9,0x02,0x0a,0x7e,0x66,0x06,0x86,0x00]
5006
5007 v_mov_b32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5008 // CHECK: [0xf9,0x02,0x0a,0x7e,0x67,0x06,0x86,0x00]
5009
5010 v_mov_b32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5011 // CHECK: [0xf9,0x02,0x0a,0x7e,0x6a,0x06,0x86,0x00]
5012
5013 v_mov_b32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5014 // CHECK: [0xf9,0x02,0x0a,0x7e,0x6b,0x06,0x86,0x00]
5015
5016 v_mov_b32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5017 // CHECK: [0xf9,0x02,0x0a,0x7e,0x7b,0x06,0x86,0x00]
5018
5019 v_mov_b32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5020 // CHECK: [0xf9,0x02,0x0a,0x7e,0x7c,0x06,0x86,0x00]
5021
5022 v_mov_b32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5023 // CHECK: [0xf9,0x02,0x0a,0x7e,0x7e,0x06,0x86,0x00]
5024
5025 v_mov_b32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5026 // CHECK: [0xf9,0x02,0x0a,0x7e,0x7f,0x06,0x86,0x00]
5027
5028 v_mov_b32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5029 // CHECK: [0xf9,0x02,0x0a,0x7e,0x80,0x06,0x86,0x00]
5030
5031 v_mov_b32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5032 // CHECK: [0xf9,0x02,0x0a,0x7e,0xc1,0x06,0x86,0x00]
5033
5034 v_mov_b32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5035 // CHECK: [0xf9,0x02,0x0a,0x7e,0xf0,0x06,0x86,0x00]
5036
5037 v_mov_b32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5038 // CHECK: [0xf9,0x02,0x0a,0x7e,0xf7,0x06,0x86,0x00]
5039
5040 v_mov_b32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5041 // CHECK: [0xf9,0x02,0x0a,0x7e,0xfb,0x06,0x86,0x00]
5042
5043 v_mov_b32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5044 // CHECK: [0xf9,0x02,0x0a,0x7e,0xfc,0x06,0x86,0x00]
5045
5046 v_mov_b32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5047 // CHECK: [0xf9,0x02,0x0a,0x7e,0xfd,0x06,0x86,0x00]
5048
5049 v_mov_b32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
5050 // CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x06,0x00]
5051
5052 v_mov_b32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
5053 // CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x00,0x06,0x00]
5054
5055 v_mov_b32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
5056 // CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x01,0x06,0x00]
5057
5058 v_mov_b32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
5059 // CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x02,0x06,0x00]
5060
5061 v_mov_b32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
5062 // CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x03,0x06,0x00]
5063
5064 v_mov_b32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
5065 // CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x04,0x06,0x00]
5066
5067 v_mov_b32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
5068 // CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x05,0x06,0x00]
5069
5070 v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
5071 // CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x0e,0x06,0x00]
5072
5073 v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
5074 // CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x16,0x06,0x00]
5075
5076 v_mov_b32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
5077 // CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x16,0x06,0x00]
5078
5079 v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
5080 // CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x06,0x00]
5081
5082 v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
5083 // CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x00,0x00]
5084
5085 v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
5086 // CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x01,0x00]
5087
5088 v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
5089 // CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x02,0x00]
5090
5091 v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
5092 // CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x03,0x00]
5093
5094 v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
5095 // CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x04,0x00]
5096
5097 v_mov_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
5098 // CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x05,0x00]
5099
5100 v_mov_b32_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5101 // CHECK: [0xf9,0x02,0x0a,0x7e,0x01,0x06,0x0e,0x00]
5102
5103 v_mov_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5104 // CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0x00]
5105
5106 v_mov_b32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5107 // CHECK: [0xfa,0x02,0xfe,0x7f,0x01,0xe4,0x00,0x00]
5108
5109 v_mov_b32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5110 // CHECK: [0xfa,0x02,0x0a,0x7e,0xff,0xe4,0x00,0x00]
5111
5112 v_mov_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
5113 // CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x1b,0x00,0x00]
5114
5115 v_mov_b32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
5116 // CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x40,0x01,0x00]
5117
5118 v_mov_b32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
5119 // CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x41,0x01,0x00]
5120
5121 v_mov_b32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
5122 // CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x42,0x01,0x00]
5123
5124 v_mov_b32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
5125 // CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x43,0x01,0x00]
5126
5127 v_mov_b32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
5128 // CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x30,0x01,0x00]
5129
5130 v_mov_b32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
5131 // CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x34,0x01,0x00]
5132
5133 v_mov_b32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
5134 // CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x38,0x01,0x00]
5135
5136 v_mov_b32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
5137 // CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x3c,0x01,0x00]
5138
5139 v_mov_b32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
5140 // CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x01,0x01,0x00]
5141
5142 v_mov_b32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
5143 // CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x0f,0x01,0x00]
5144
5145 v_mov_b32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
5146 // CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x11,0x01,0x00]
5147
5148 v_mov_b32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
5149 // CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x1f,0x01,0x00]
5150
5151 v_mov_b32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
5152 // CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x21,0x01,0x00]
5153
5154 v_mov_b32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
5155 // CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0x2f,0x01,0x00]
5156
5157 v_mov_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
5158 // CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0x10]
5159
5160 v_mov_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
5161 // CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0x30]
5162
5163 v_mov_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
5164 // CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
5165
5166 v_mov_b32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
5167 // CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
5168
5169 v_mov_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
5170 // CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0x01]
5171
5172 v_mov_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
5173 // CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0x03]
5174
5175 v_mov_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
5176 // CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
5177
5178 v_mov_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
5179 // CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
5180
5181 v_mov_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
5182 // CHECK: [0xfa,0x02,0x0a,0x7e,0x01,0xe4,0x08,0x00]
5183
5184 v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5185 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x06,0x00]
5186
5187 v_cvt_f32_i32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5188 // CHECK: [0xf9,0x0a,0xfe,0x7f,0x01,0x06,0x06,0x00]
5189
5190 v_cvt_f32_i32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5191 // CHECK: [0xf9,0x0a,0x0a,0x7e,0xff,0x06,0x06,0x00]
5192
5193 v_cvt_f32_i32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5194 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x86,0x00]
5195
5196 v_cvt_f32_i32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5197 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x65,0x06,0x86,0x00]
5198
5199 v_cvt_f32_i32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5200 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x66,0x06,0x86,0x00]
5201
5202 v_cvt_f32_i32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5203 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x67,0x06,0x86,0x00]
5204
5205 v_cvt_f32_i32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5206 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x6a,0x06,0x86,0x00]
5207
5208 v_cvt_f32_i32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5209 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x6b,0x06,0x86,0x00]
5210
5211 v_cvt_f32_i32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5212 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x7b,0x06,0x86,0x00]
5213
5214 v_cvt_f32_i32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5215 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x7c,0x06,0x86,0x00]
5216
5217 v_cvt_f32_i32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5218 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x7e,0x06,0x86,0x00]
5219
5220 v_cvt_f32_i32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5221 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x7f,0x06,0x86,0x00]
5222
5223 v_cvt_f32_i32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5224 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x80,0x06,0x86,0x00]
5225
5226 v_cvt_f32_i32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5227 // CHECK: [0xf9,0x0a,0x0a,0x7e,0xc1,0x06,0x86,0x00]
5228
5229 v_cvt_f32_i32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5230 // CHECK: [0xf9,0x0a,0x0a,0x7e,0xf0,0x06,0x86,0x00]
5231
5232 v_cvt_f32_i32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5233 // CHECK: [0xf9,0x0a,0x0a,0x7e,0xf7,0x06,0x86,0x00]
5234
5235 v_cvt_f32_i32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5236 // CHECK: [0xf9,0x0a,0x0a,0x7e,0xfb,0x06,0x86,0x00]
5237
5238 v_cvt_f32_i32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5239 // CHECK: [0xf9,0x0a,0x0a,0x7e,0xfc,0x06,0x86,0x00]
5240
5241 v_cvt_f32_i32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5242 // CHECK: [0xf9,0x0a,0x0a,0x7e,0xfd,0x06,0x86,0x00]
5243
5244 v_cvt_f32_i32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5245 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x26,0x06,0x00]
5246
5247 v_cvt_f32_i32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5248 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x46,0x06,0x00]
5249
5250 v_cvt_f32_i32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5251 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x86,0x06,0x00]
5252
5253 v_cvt_f32_i32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5254 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0xc6,0x06,0x00]
5255
5256 v_cvt_f32_i32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
5257 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x06,0x00]
5258
5259 v_cvt_f32_i32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
5260 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x00,0x06,0x00]
5261
5262 v_cvt_f32_i32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
5263 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x01,0x06,0x00]
5264
5265 v_cvt_f32_i32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
5266 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x02,0x06,0x00]
5267
5268 v_cvt_f32_i32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
5269 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x03,0x06,0x00]
5270
5271 v_cvt_f32_i32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
5272 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x04,0x06,0x00]
5273
5274 v_cvt_f32_i32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
5275 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x05,0x06,0x00]
5276
5277 v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
5278 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x0e,0x06,0x00]
5279
5280 v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
5281 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x16,0x06,0x00]
5282
5283 v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
5284 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x16,0x06,0x00]
5285
5286 v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
5287 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x06,0x00]
5288
5289 v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
5290 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x00,0x00]
5291
5292 v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
5293 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x01,0x00]
5294
5295 v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
5296 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x02,0x00]
5297
5298 v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
5299 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x03,0x00]
5300
5301 v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
5302 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x04,0x00]
5303
5304 v_cvt_f32_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
5305 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x05,0x00]
5306
5307 v_cvt_f32_i32_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5308 // CHECK: [0xf9,0x0a,0x0a,0x7e,0x01,0x06,0x0e,0x00]
5309
5310 v_cvt_f32_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5311 // CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0xe4,0x00,0x00]
5312
5313 v_cvt_f32_i32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5314 // CHECK: [0xfa,0x0a,0xfe,0x7f,0x01,0xe4,0x00,0x00]
5315
5316 v_cvt_f32_i32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5317 // CHECK: [0xfa,0x0a,0x0a,0x7e,0xff,0xe4,0x00,0x00]
5318
5319 v_cvt_f32_i32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
5320 // CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x1b,0x00,0x00]
5321
5322 v_cvt_f32_i32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
5323 // CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x40,0x01,0x00]
5324
5325 v_cvt_f32_i32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
5326 // CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x41,0x01,0x00]
5327
5328 v_cvt_f32_i32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
5329 // CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x42,0x01,0x00]
5330
5331 v_cvt_f32_i32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
5332 // CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x43,0x01,0x00]
5333
5334 v_cvt_f32_i32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
5335 // CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x30,0x01,0x00]
5336
5337 v_cvt_f32_i32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
5338 // CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x34,0x01,0x00]
5339
5340 v_cvt_f32_i32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
5341 // CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x38,0x01,0x00]
5342
5343 v_cvt_f32_i32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
5344 // CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x3c,0x01,0x00]
5345
5346 v_cvt_f32_i32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
5347 // CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x01,0x01,0x00]
5348
5349 v_cvt_f32_i32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
5350 // CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x0f,0x01,0x00]
5351
5352 v_cvt_f32_i32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
5353 // CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x11,0x01,0x00]
5354
5355 v_cvt_f32_i32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
5356 // CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x1f,0x01,0x00]
5357
5358 v_cvt_f32_i32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
5359 // CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x21,0x01,0x00]
5360
5361 v_cvt_f32_i32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
5362 // CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0x2f,0x01,0x00]
5363
5364 v_cvt_f32_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
5365 // CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0xe4,0x00,0x10]
5366
5367 v_cvt_f32_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
5368 // CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0xe4,0x00,0x30]
5369
5370 v_cvt_f32_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
5371 // CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
5372
5373 v_cvt_f32_i32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
5374 // CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
5375
5376 v_cvt_f32_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
5377 // CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0xe4,0x00,0x01]
5378
5379 v_cvt_f32_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
5380 // CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0xe4,0x00,0x03]
5381
5382 v_cvt_f32_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
5383 // CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
5384
5385 v_cvt_f32_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
5386 // CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
5387
5388 v_cvt_f32_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
5389 // CHECK: [0xfa,0x0a,0x0a,0x7e,0x01,0xe4,0x08,0x00]
5390
5391 v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5392 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x06,0x00]
5393
5394 v_cvt_f32_u32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5395 // CHECK: [0xf9,0x0c,0xfe,0x7f,0x01,0x06,0x06,0x00]
5396
5397 v_cvt_f32_u32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5398 // CHECK: [0xf9,0x0c,0x0a,0x7e,0xff,0x06,0x06,0x00]
5399
5400 v_cvt_f32_u32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5401 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x86,0x00]
5402
5403 v_cvt_f32_u32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5404 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x65,0x06,0x86,0x00]
5405
5406 v_cvt_f32_u32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5407 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x66,0x06,0x86,0x00]
5408
5409 v_cvt_f32_u32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5410 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x67,0x06,0x86,0x00]
5411
5412 v_cvt_f32_u32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5413 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x6a,0x06,0x86,0x00]
5414
5415 v_cvt_f32_u32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5416 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x6b,0x06,0x86,0x00]
5417
5418 v_cvt_f32_u32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5419 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x7b,0x06,0x86,0x00]
5420
5421 v_cvt_f32_u32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5422 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x7c,0x06,0x86,0x00]
5423
5424 v_cvt_f32_u32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5425 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x7e,0x06,0x86,0x00]
5426
5427 v_cvt_f32_u32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5428 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x7f,0x06,0x86,0x00]
5429
5430 v_cvt_f32_u32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5431 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x80,0x06,0x86,0x00]
5432
5433 v_cvt_f32_u32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5434 // CHECK: [0xf9,0x0c,0x0a,0x7e,0xc1,0x06,0x86,0x00]
5435
5436 v_cvt_f32_u32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5437 // CHECK: [0xf9,0x0c,0x0a,0x7e,0xf0,0x06,0x86,0x00]
5438
5439 v_cvt_f32_u32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5440 // CHECK: [0xf9,0x0c,0x0a,0x7e,0xf7,0x06,0x86,0x00]
5441
5442 v_cvt_f32_u32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5443 // CHECK: [0xf9,0x0c,0x0a,0x7e,0xfb,0x06,0x86,0x00]
5444
5445 v_cvt_f32_u32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5446 // CHECK: [0xf9,0x0c,0x0a,0x7e,0xfc,0x06,0x86,0x00]
5447
5448 v_cvt_f32_u32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5449 // CHECK: [0xf9,0x0c,0x0a,0x7e,0xfd,0x06,0x86,0x00]
5450
5451 v_cvt_f32_u32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5452 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x26,0x06,0x00]
5453
5454 v_cvt_f32_u32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5455 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x46,0x06,0x00]
5456
5457 v_cvt_f32_u32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5458 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x86,0x06,0x00]
5459
5460 v_cvt_f32_u32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5461 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0xc6,0x06,0x00]
5462
5463 v_cvt_f32_u32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
5464 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x06,0x00]
5465
5466 v_cvt_f32_u32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
5467 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x00,0x06,0x00]
5468
5469 v_cvt_f32_u32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
5470 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x01,0x06,0x00]
5471
5472 v_cvt_f32_u32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
5473 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x02,0x06,0x00]
5474
5475 v_cvt_f32_u32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
5476 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x03,0x06,0x00]
5477
5478 v_cvt_f32_u32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
5479 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x04,0x06,0x00]
5480
5481 v_cvt_f32_u32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
5482 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x05,0x06,0x00]
5483
5484 v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
5485 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x0e,0x06,0x00]
5486
5487 v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
5488 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x16,0x06,0x00]
5489
5490 v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
5491 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x16,0x06,0x00]
5492
5493 v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
5494 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x06,0x00]
5495
5496 v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
5497 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x00,0x00]
5498
5499 v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
5500 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x01,0x00]
5501
5502 v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
5503 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x02,0x00]
5504
5505 v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
5506 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x03,0x00]
5507
5508 v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
5509 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x04,0x00]
5510
5511 v_cvt_f32_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
5512 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x05,0x00]
5513
5514 v_cvt_f32_u32_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5515 // CHECK: [0xf9,0x0c,0x0a,0x7e,0x01,0x06,0x0e,0x00]
5516
5517 v_cvt_f32_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5518 // CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0xe4,0x00,0x00]
5519
5520 v_cvt_f32_u32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5521 // CHECK: [0xfa,0x0c,0xfe,0x7f,0x01,0xe4,0x00,0x00]
5522
5523 v_cvt_f32_u32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5524 // CHECK: [0xfa,0x0c,0x0a,0x7e,0xff,0xe4,0x00,0x00]
5525
5526 v_cvt_f32_u32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
5527 // CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x1b,0x00,0x00]
5528
5529 v_cvt_f32_u32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
5530 // CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x40,0x01,0x00]
5531
5532 v_cvt_f32_u32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
5533 // CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x41,0x01,0x00]
5534
5535 v_cvt_f32_u32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
5536 // CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x42,0x01,0x00]
5537
5538 v_cvt_f32_u32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
5539 // CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x43,0x01,0x00]
5540
5541 v_cvt_f32_u32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
5542 // CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x30,0x01,0x00]
5543
5544 v_cvt_f32_u32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
5545 // CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x34,0x01,0x00]
5546
5547 v_cvt_f32_u32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
5548 // CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x38,0x01,0x00]
5549
5550 v_cvt_f32_u32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
5551 // CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x3c,0x01,0x00]
5552
5553 v_cvt_f32_u32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
5554 // CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x01,0x01,0x00]
5555
5556 v_cvt_f32_u32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
5557 // CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x0f,0x01,0x00]
5558
5559 v_cvt_f32_u32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
5560 // CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x11,0x01,0x00]
5561
5562 v_cvt_f32_u32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
5563 // CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x1f,0x01,0x00]
5564
5565 v_cvt_f32_u32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
5566 // CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x21,0x01,0x00]
5567
5568 v_cvt_f32_u32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
5569 // CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0x2f,0x01,0x00]
5570
5571 v_cvt_f32_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
5572 // CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0xe4,0x00,0x10]
5573
5574 v_cvt_f32_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
5575 // CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0xe4,0x00,0x30]
5576
5577 v_cvt_f32_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
5578 // CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
5579
5580 v_cvt_f32_u32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
5581 // CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
5582
5583 v_cvt_f32_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
5584 // CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0xe4,0x00,0x01]
5585
5586 v_cvt_f32_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
5587 // CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0xe4,0x00,0x03]
5588
5589 v_cvt_f32_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
5590 // CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
5591
5592 v_cvt_f32_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
5593 // CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
5594
5595 v_cvt_f32_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
5596 // CHECK: [0xfa,0x0c,0x0a,0x7e,0x01,0xe4,0x08,0x00]
5597
5598 v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5599 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x06,0x00]
5600
5601 v_cvt_u32_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5602 // CHECK: [0xf9,0x0e,0xfe,0x7f,0x01,0x06,0x06,0x00]
5603
5604 v_cvt_u32_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5605 // CHECK: [0xf9,0x0e,0x0a,0x7e,0xff,0x06,0x06,0x00]
5606
5607 v_cvt_u32_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5608 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x86,0x00]
5609
5610 v_cvt_u32_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5611 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x65,0x06,0x86,0x00]
5612
5613 v_cvt_u32_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5614 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x66,0x06,0x86,0x00]
5615
5616 v_cvt_u32_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5617 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x67,0x06,0x86,0x00]
5618
5619 v_cvt_u32_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5620 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x6a,0x06,0x86,0x00]
5621
5622 v_cvt_u32_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5623 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x6b,0x06,0x86,0x00]
5624
5625 v_cvt_u32_f32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5626 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x7b,0x06,0x86,0x00]
5627
5628 v_cvt_u32_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5629 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x7c,0x06,0x86,0x00]
5630
5631 v_cvt_u32_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5632 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x7e,0x06,0x86,0x00]
5633
5634 v_cvt_u32_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5635 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x7f,0x06,0x86,0x00]
5636
5637 v_cvt_u32_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5638 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x80,0x06,0x86,0x00]
5639
5640 v_cvt_u32_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5641 // CHECK: [0xf9,0x0e,0x0a,0x7e,0xc1,0x06,0x86,0x00]
5642
5643 v_cvt_u32_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5644 // CHECK: [0xf9,0x0e,0x0a,0x7e,0xf0,0x06,0x86,0x00]
5645
5646 v_cvt_u32_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5647 // CHECK: [0xf9,0x0e,0x0a,0x7e,0xf7,0x06,0x86,0x00]
5648
5649 v_cvt_u32_f32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5650 // CHECK: [0xf9,0x0e,0x0a,0x7e,0xfb,0x06,0x86,0x00]
5651
5652 v_cvt_u32_f32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5653 // CHECK: [0xf9,0x0e,0x0a,0x7e,0xfc,0x06,0x86,0x00]
5654
5655 v_cvt_u32_f32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5656 // CHECK: [0xf9,0x0e,0x0a,0x7e,0xfd,0x06,0x86,0x00]
5657
5658 v_cvt_u32_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5659 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x26,0x06,0x00]
5660
5661 v_cvt_u32_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
5662 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x06,0x00]
5663
5664 v_cvt_u32_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
5665 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x00,0x06,0x00]
5666
5667 v_cvt_u32_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
5668 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x01,0x06,0x00]
5669
5670 v_cvt_u32_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
5671 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x02,0x06,0x00]
5672
5673 v_cvt_u32_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
5674 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x03,0x06,0x00]
5675
5676 v_cvt_u32_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
5677 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x04,0x06,0x00]
5678
5679 v_cvt_u32_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
5680 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x05,0x06,0x00]
5681
5682 v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
5683 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x0e,0x06,0x00]
5684
5685 v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
5686 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x16,0x06,0x00]
5687
5688 v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
5689 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x16,0x06,0x00]
5690
5691 v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
5692 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x06,0x00]
5693
5694 v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
5695 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x00,0x00]
5696
5697 v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
5698 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x01,0x00]
5699
5700 v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
5701 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x02,0x00]
5702
5703 v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
5704 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x03,0x00]
5705
5706 v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
5707 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x04,0x00]
5708
5709 v_cvt_u32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
5710 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x05,0x00]
5711
5712 v_cvt_u32_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5713 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x16,0x00]
5714
5715 v_cvt_u32_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5716 // CHECK: [0xf9,0x0e,0x0a,0x7e,0x01,0x06,0x26,0x00]
5717
5718 v_cvt_u32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5719 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0xe4,0x00,0x00]
5720
5721 v_cvt_u32_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5722 // CHECK: [0xfa,0x0e,0xfe,0x7f,0x01,0xe4,0x00,0x00]
5723
5724 v_cvt_u32_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5725 // CHECK: [0xfa,0x0e,0x0a,0x7e,0xff,0xe4,0x00,0x00]
5726
5727 v_cvt_u32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
5728 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x1b,0x00,0x00]
5729
5730 v_cvt_u32_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
5731 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x40,0x01,0x00]
5732
5733 v_cvt_u32_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
5734 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x41,0x01,0x00]
5735
5736 v_cvt_u32_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
5737 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x42,0x01,0x00]
5738
5739 v_cvt_u32_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
5740 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x43,0x01,0x00]
5741
5742 v_cvt_u32_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
5743 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x30,0x01,0x00]
5744
5745 v_cvt_u32_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
5746 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x34,0x01,0x00]
5747
5748 v_cvt_u32_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
5749 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x38,0x01,0x00]
5750
5751 v_cvt_u32_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
5752 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x3c,0x01,0x00]
5753
5754 v_cvt_u32_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
5755 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x01,0x01,0x00]
5756
5757 v_cvt_u32_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
5758 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x0f,0x01,0x00]
5759
5760 v_cvt_u32_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
5761 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x11,0x01,0x00]
5762
5763 v_cvt_u32_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
5764 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x1f,0x01,0x00]
5765
5766 v_cvt_u32_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
5767 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x21,0x01,0x00]
5768
5769 v_cvt_u32_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
5770 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0x2f,0x01,0x00]
5771
5772 v_cvt_u32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
5773 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0xe4,0x00,0x10]
5774
5775 v_cvt_u32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
5776 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0xe4,0x00,0x30]
5777
5778 v_cvt_u32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
5779 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
5780
5781 v_cvt_u32_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
5782 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
5783
5784 v_cvt_u32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
5785 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0xe4,0x00,0x01]
5786
5787 v_cvt_u32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
5788 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0xe4,0x00,0x03]
5789
5790 v_cvt_u32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
5791 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
5792
5793 v_cvt_u32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
5794 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
5795
5796 v_cvt_u32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
5797 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0xe4,0x08,0x00]
5798
5799 v_cvt_u32_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5800 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0xe4,0x10,0x00]
5801
5802 v_cvt_u32_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5803 // CHECK: [0xfa,0x0e,0x0a,0x7e,0x01,0xe4,0x20,0x00]
5804
5805 v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5806 // CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x06,0x00]
5807
5808 v_cvt_i32_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5809 // CHECK: [0xf9,0x10,0xfe,0x7f,0x01,0x06,0x06,0x00]
5810
5811 v_cvt_i32_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5812 // CHECK: [0xf9,0x10,0x0a,0x7e,0xff,0x06,0x06,0x00]
5813
5814 v_cvt_i32_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5815 // CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x86,0x00]
5816
5817 v_cvt_i32_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5818 // CHECK: [0xf9,0x10,0x0a,0x7e,0x65,0x06,0x86,0x00]
5819
5820 v_cvt_i32_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5821 // CHECK: [0xf9,0x10,0x0a,0x7e,0x66,0x06,0x86,0x00]
5822
5823 v_cvt_i32_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5824 // CHECK: [0xf9,0x10,0x0a,0x7e,0x67,0x06,0x86,0x00]
5825
5826 v_cvt_i32_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5827 // CHECK: [0xf9,0x10,0x0a,0x7e,0x6a,0x06,0x86,0x00]
5828
5829 v_cvt_i32_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5830 // CHECK: [0xf9,0x10,0x0a,0x7e,0x6b,0x06,0x86,0x00]
5831
5832 v_cvt_i32_f32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5833 // CHECK: [0xf9,0x10,0x0a,0x7e,0x7b,0x06,0x86,0x00]
5834
5835 v_cvt_i32_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5836 // CHECK: [0xf9,0x10,0x0a,0x7e,0x7c,0x06,0x86,0x00]
5837
5838 v_cvt_i32_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5839 // CHECK: [0xf9,0x10,0x0a,0x7e,0x7e,0x06,0x86,0x00]
5840
5841 v_cvt_i32_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5842 // CHECK: [0xf9,0x10,0x0a,0x7e,0x7f,0x06,0x86,0x00]
5843
5844 v_cvt_i32_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5845 // CHECK: [0xf9,0x10,0x0a,0x7e,0x80,0x06,0x86,0x00]
5846
5847 v_cvt_i32_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5848 // CHECK: [0xf9,0x10,0x0a,0x7e,0xc1,0x06,0x86,0x00]
5849
5850 v_cvt_i32_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5851 // CHECK: [0xf9,0x10,0x0a,0x7e,0xf0,0x06,0x86,0x00]
5852
5853 v_cvt_i32_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5854 // CHECK: [0xf9,0x10,0x0a,0x7e,0xf7,0x06,0x86,0x00]
5855
5856 v_cvt_i32_f32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5857 // CHECK: [0xf9,0x10,0x0a,0x7e,0xfb,0x06,0x86,0x00]
5858
5859 v_cvt_i32_f32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5860 // CHECK: [0xf9,0x10,0x0a,0x7e,0xfc,0x06,0x86,0x00]
5861
5862 v_cvt_i32_f32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5863 // CHECK: [0xf9,0x10,0x0a,0x7e,0xfd,0x06,0x86,0x00]
5864
5865 v_cvt_i32_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5866 // CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x26,0x06,0x00]
5867
5868 v_cvt_i32_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
5869 // CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x06,0x00]
5870
5871 v_cvt_i32_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
5872 // CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x00,0x06,0x00]
5873
5874 v_cvt_i32_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
5875 // CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x01,0x06,0x00]
5876
5877 v_cvt_i32_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
5878 // CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x02,0x06,0x00]
5879
5880 v_cvt_i32_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
5881 // CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x03,0x06,0x00]
5882
5883 v_cvt_i32_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
5884 // CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x04,0x06,0x00]
5885
5886 v_cvt_i32_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
5887 // CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x05,0x06,0x00]
5888
5889 v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
5890 // CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x0e,0x06,0x00]
5891
5892 v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
5893 // CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x16,0x06,0x00]
5894
5895 v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
5896 // CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x16,0x06,0x00]
5897
5898 v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
5899 // CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x06,0x00]
5900
5901 v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
5902 // CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x00,0x00]
5903
5904 v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
5905 // CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x01,0x00]
5906
5907 v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
5908 // CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x02,0x00]
5909
5910 v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
5911 // CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x03,0x00]
5912
5913 v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
5914 // CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x04,0x00]
5915
5916 v_cvt_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
5917 // CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x05,0x00]
5918
5919 v_cvt_i32_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5920 // CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x16,0x00]
5921
5922 v_cvt_i32_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
5923 // CHECK: [0xf9,0x10,0x0a,0x7e,0x01,0x06,0x26,0x00]
5924
5925 v_cvt_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5926 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0xe4,0x00,0x00]
5927
5928 v_cvt_i32_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5929 // CHECK: [0xfa,0x10,0xfe,0x7f,0x01,0xe4,0x00,0x00]
5930
5931 v_cvt_i32_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
5932 // CHECK: [0xfa,0x10,0x0a,0x7e,0xff,0xe4,0x00,0x00]
5933
5934 v_cvt_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
5935 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x1b,0x00,0x00]
5936
5937 v_cvt_i32_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
5938 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x40,0x01,0x00]
5939
5940 v_cvt_i32_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
5941 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x41,0x01,0x00]
5942
5943 v_cvt_i32_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
5944 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x42,0x01,0x00]
5945
5946 v_cvt_i32_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
5947 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x43,0x01,0x00]
5948
5949 v_cvt_i32_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
5950 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x30,0x01,0x00]
5951
5952 v_cvt_i32_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
5953 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x34,0x01,0x00]
5954
5955 v_cvt_i32_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
5956 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x38,0x01,0x00]
5957
5958 v_cvt_i32_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
5959 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x3c,0x01,0x00]
5960
5961 v_cvt_i32_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
5962 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x01,0x01,0x00]
5963
5964 v_cvt_i32_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
5965 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x0f,0x01,0x00]
5966
5967 v_cvt_i32_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
5968 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x11,0x01,0x00]
5969
5970 v_cvt_i32_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
5971 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x1f,0x01,0x00]
5972
5973 v_cvt_i32_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
5974 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x21,0x01,0x00]
5975
5976 v_cvt_i32_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
5977 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0x2f,0x01,0x00]
5978
5979 v_cvt_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
5980 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0xe4,0x00,0x10]
5981
5982 v_cvt_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
5983 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0xe4,0x00,0x30]
5984
5985 v_cvt_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
5986 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
5987
5988 v_cvt_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
5989 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
5990
5991 v_cvt_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
5992 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0xe4,0x00,0x01]
5993
5994 v_cvt_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
5995 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0xe4,0x00,0x03]
5996
5997 v_cvt_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
5998 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
5999
6000 v_cvt_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
6001 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
6002
6003 v_cvt_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
6004 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0xe4,0x08,0x00]
6005
6006 v_cvt_i32_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6007 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0xe4,0x10,0x00]
6008
6009 v_cvt_i32_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6010 // CHECK: [0xfa,0x10,0x0a,0x7e,0x01,0xe4,0x20,0x00]
6011
6012 v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6013 // CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x06,0x00]
6014
6015 v_cvt_f16_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6016 // CHECK: [0xf9,0x14,0xfe,0x7f,0x01,0x06,0x06,0x00]
6017
6018 v_cvt_f16_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6019 // CHECK: [0xf9,0x14,0x0a,0x7e,0xff,0x06,0x06,0x00]
6020
6021 v_cvt_f16_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6022 // CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x86,0x00]
6023
6024 v_cvt_f16_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6025 // CHECK: [0xf9,0x14,0x0a,0x7e,0x65,0x06,0x86,0x00]
6026
6027 v_cvt_f16_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6028 // CHECK: [0xf9,0x14,0x0a,0x7e,0x66,0x06,0x86,0x00]
6029
6030 v_cvt_f16_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6031 // CHECK: [0xf9,0x14,0x0a,0x7e,0x67,0x06,0x86,0x00]
6032
6033 v_cvt_f16_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6034 // CHECK: [0xf9,0x14,0x0a,0x7e,0x6a,0x06,0x86,0x00]
6035
6036 v_cvt_f16_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6037 // CHECK: [0xf9,0x14,0x0a,0x7e,0x6b,0x06,0x86,0x00]
6038
6039 v_cvt_f16_f32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6040 // CHECK: [0xf9,0x14,0x0a,0x7e,0x7b,0x06,0x86,0x00]
6041
6042 v_cvt_f16_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6043 // CHECK: [0xf9,0x14,0x0a,0x7e,0x7c,0x06,0x86,0x00]
6044
6045 v_cvt_f16_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6046 // CHECK: [0xf9,0x14,0x0a,0x7e,0x7e,0x06,0x86,0x00]
6047
6048 v_cvt_f16_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6049 // CHECK: [0xf9,0x14,0x0a,0x7e,0x7f,0x06,0x86,0x00]
6050
6051 v_cvt_f16_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6052 // CHECK: [0xf9,0x14,0x0a,0x7e,0x80,0x06,0x86,0x00]
6053
6054 v_cvt_f16_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6055 // CHECK: [0xf9,0x14,0x0a,0x7e,0xc1,0x06,0x86,0x00]
6056
6057 v_cvt_f16_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6058 // CHECK: [0xf9,0x14,0x0a,0x7e,0xf0,0x06,0x86,0x00]
6059
6060 v_cvt_f16_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6061 // CHECK: [0xf9,0x14,0x0a,0x7e,0xf7,0x06,0x86,0x00]
6062
6063 v_cvt_f16_f32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6064 // CHECK: [0xf9,0x14,0x0a,0x7e,0xfb,0x06,0x86,0x00]
6065
6066 v_cvt_f16_f32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6067 // CHECK: [0xf9,0x14,0x0a,0x7e,0xfc,0x06,0x86,0x00]
6068
6069 v_cvt_f16_f32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6070 // CHECK: [0xf9,0x14,0x0a,0x7e,0xfd,0x06,0x86,0x00]
6071
6072 v_cvt_f16_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6073 // CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x26,0x06,0x00]
6074
6075 v_cvt_f16_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6076 // CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x46,0x06,0x00]
6077
6078 v_cvt_f16_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6079 // CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x86,0x06,0x00]
6080
6081 v_cvt_f16_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6082 // CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0xc6,0x06,0x00]
6083
6084 v_cvt_f16_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
6085 // CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x06,0x00]
6086
6087 v_cvt_f16_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
6088 // CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x00,0x06,0x00]
6089
6090 v_cvt_f16_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
6091 // CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x01,0x06,0x00]
6092
6093 v_cvt_f16_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
6094 // CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x02,0x06,0x00]
6095
6096 v_cvt_f16_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
6097 // CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x03,0x06,0x00]
6098
6099 v_cvt_f16_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
6100 // CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x04,0x06,0x00]
6101
6102 v_cvt_f16_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
6103 // CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x05,0x06,0x00]
6104
6105 v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
6106 // CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x0e,0x06,0x00]
6107
6108 v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
6109 // CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x16,0x06,0x00]
6110
6111 v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
6112 // CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x16,0x06,0x00]
6113
6114 v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
6115 // CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x06,0x00]
6116
6117 v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
6118 // CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x00,0x00]
6119
6120 v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
6121 // CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x01,0x00]
6122
6123 v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
6124 // CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x02,0x00]
6125
6126 v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
6127 // CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x03,0x00]
6128
6129 v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
6130 // CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x04,0x00]
6131
6132 v_cvt_f16_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
6133 // CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x05,0x00]
6134
6135 v_cvt_f16_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6136 // CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x16,0x00]
6137
6138 v_cvt_f16_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6139 // CHECK: [0xf9,0x14,0x0a,0x7e,0x01,0x06,0x26,0x00]
6140
6141 v_cvt_f16_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6142 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0xe4,0x00,0x00]
6143
6144 v_cvt_f16_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6145 // CHECK: [0xfa,0x14,0xfe,0x7f,0x01,0xe4,0x00,0x00]
6146
6147 v_cvt_f16_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6148 // CHECK: [0xfa,0x14,0x0a,0x7e,0xff,0xe4,0x00,0x00]
6149
6150 v_cvt_f16_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
6151 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x1b,0x00,0x00]
6152
6153 v_cvt_f16_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
6154 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x40,0x01,0x00]
6155
6156 v_cvt_f16_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
6157 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x41,0x01,0x00]
6158
6159 v_cvt_f16_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
6160 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x42,0x01,0x00]
6161
6162 v_cvt_f16_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
6163 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x43,0x01,0x00]
6164
6165 v_cvt_f16_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
6166 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x30,0x01,0x00]
6167
6168 v_cvt_f16_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
6169 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x34,0x01,0x00]
6170
6171 v_cvt_f16_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
6172 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x38,0x01,0x00]
6173
6174 v_cvt_f16_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
6175 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x3c,0x01,0x00]
6176
6177 v_cvt_f16_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
6178 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x01,0x01,0x00]
6179
6180 v_cvt_f16_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
6181 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x0f,0x01,0x00]
6182
6183 v_cvt_f16_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
6184 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x11,0x01,0x00]
6185
6186 v_cvt_f16_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
6187 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x1f,0x01,0x00]
6188
6189 v_cvt_f16_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
6190 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x21,0x01,0x00]
6191
6192 v_cvt_f16_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
6193 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0x2f,0x01,0x00]
6194
6195 v_cvt_f16_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
6196 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0xe4,0x00,0x10]
6197
6198 v_cvt_f16_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
6199 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0xe4,0x00,0x30]
6200
6201 v_cvt_f16_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
6202 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
6203
6204 v_cvt_f16_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
6205 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
6206
6207 v_cvt_f16_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
6208 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0xe4,0x00,0x01]
6209
6210 v_cvt_f16_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
6211 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0xe4,0x00,0x03]
6212
6213 v_cvt_f16_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
6214 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
6215
6216 v_cvt_f16_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
6217 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
6218
6219 v_cvt_f16_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
6220 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0xe4,0x08,0x00]
6221
6222 v_cvt_f16_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6223 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0xe4,0x10,0x00]
6224
6225 v_cvt_f16_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6226 // CHECK: [0xfa,0x14,0x0a,0x7e,0x01,0xe4,0x20,0x00]
6227
6228 v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6229 // CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x06,0x00]
6230
6231 v_cvt_f32_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6232 // CHECK: [0xf9,0x16,0xfe,0x7f,0x01,0x06,0x06,0x00]
6233
6234 v_cvt_f32_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6235 // CHECK: [0xf9,0x16,0x0a,0x7e,0xff,0x06,0x06,0x00]
6236
6237 v_cvt_f32_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6238 // CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x86,0x00]
6239
6240 v_cvt_f32_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6241 // CHECK: [0xf9,0x16,0x0a,0x7e,0x65,0x06,0x86,0x00]
6242
6243 v_cvt_f32_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6244 // CHECK: [0xf9,0x16,0x0a,0x7e,0x66,0x06,0x86,0x00]
6245
6246 v_cvt_f32_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6247 // CHECK: [0xf9,0x16,0x0a,0x7e,0x67,0x06,0x86,0x00]
6248
6249 v_cvt_f32_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6250 // CHECK: [0xf9,0x16,0x0a,0x7e,0x6a,0x06,0x86,0x00]
6251
6252 v_cvt_f32_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6253 // CHECK: [0xf9,0x16,0x0a,0x7e,0x6b,0x06,0x86,0x00]
6254
6255 v_cvt_f32_f16_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6256 // CHECK: [0xf9,0x16,0x0a,0x7e,0x7b,0x06,0x86,0x00]
6257
6258 v_cvt_f32_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6259 // CHECK: [0xf9,0x16,0x0a,0x7e,0x7c,0x06,0x86,0x00]
6260
6261 v_cvt_f32_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6262 // CHECK: [0xf9,0x16,0x0a,0x7e,0x7e,0x06,0x86,0x00]
6263
6264 v_cvt_f32_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6265 // CHECK: [0xf9,0x16,0x0a,0x7e,0x7f,0x06,0x86,0x00]
6266
6267 v_cvt_f32_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6268 // CHECK: [0xf9,0x16,0x0a,0x7e,0x80,0x06,0x86,0x00]
6269
6270 v_cvt_f32_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6271 // CHECK: [0xf9,0x16,0x0a,0x7e,0xc1,0x06,0x86,0x00]
6272
6273 v_cvt_f32_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6274 // CHECK: [0xf9,0x16,0x0a,0x7e,0xf0,0x06,0x86,0x00]
6275
6276 v_cvt_f32_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6277 // CHECK: [0xf9,0x16,0x0a,0x7e,0xf7,0x06,0x86,0x00]
6278
6279 v_cvt_f32_f16_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6280 // CHECK: [0xf9,0x16,0x0a,0x7e,0xfb,0x06,0x86,0x00]
6281
6282 v_cvt_f32_f16_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6283 // CHECK: [0xf9,0x16,0x0a,0x7e,0xfc,0x06,0x86,0x00]
6284
6285 v_cvt_f32_f16_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6286 // CHECK: [0xf9,0x16,0x0a,0x7e,0xfd,0x06,0x86,0x00]
6287
6288 v_cvt_f32_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6289 // CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x26,0x06,0x00]
6290
6291 v_cvt_f32_f16_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6292 // CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x46,0x06,0x00]
6293
6294 v_cvt_f32_f16_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6295 // CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x86,0x06,0x00]
6296
6297 v_cvt_f32_f16_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6298 // CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0xc6,0x06,0x00]
6299
6300 v_cvt_f32_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
6301 // CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x06,0x00]
6302
6303 v_cvt_f32_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
6304 // CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x00,0x06,0x00]
6305
6306 v_cvt_f32_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
6307 // CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x01,0x06,0x00]
6308
6309 v_cvt_f32_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
6310 // CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x02,0x06,0x00]
6311
6312 v_cvt_f32_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
6313 // CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x03,0x06,0x00]
6314
6315 v_cvt_f32_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
6316 // CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x04,0x06,0x00]
6317
6318 v_cvt_f32_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
6319 // CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x05,0x06,0x00]
6320
6321 v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
6322 // CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x0e,0x06,0x00]
6323
6324 v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
6325 // CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x16,0x06,0x00]
6326
6327 v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
6328 // CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x16,0x06,0x00]
6329
6330 v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
6331 // CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x06,0x00]
6332
6333 v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
6334 // CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x00,0x00]
6335
6336 v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
6337 // CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x01,0x00]
6338
6339 v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
6340 // CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x02,0x00]
6341
6342 v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
6343 // CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x03,0x00]
6344
6345 v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
6346 // CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x04,0x00]
6347
6348 v_cvt_f32_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
6349 // CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x05,0x00]
6350
6351 v_cvt_f32_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6352 // CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x16,0x00]
6353
6354 v_cvt_f32_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6355 // CHECK: [0xf9,0x16,0x0a,0x7e,0x01,0x06,0x26,0x00]
6356
6357 v_cvt_f32_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6358 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0xe4,0x00,0x00]
6359
6360 v_cvt_f32_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6361 // CHECK: [0xfa,0x16,0xfe,0x7f,0x01,0xe4,0x00,0x00]
6362
6363 v_cvt_f32_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6364 // CHECK: [0xfa,0x16,0x0a,0x7e,0xff,0xe4,0x00,0x00]
6365
6366 v_cvt_f32_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
6367 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x1b,0x00,0x00]
6368
6369 v_cvt_f32_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
6370 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x40,0x01,0x00]
6371
6372 v_cvt_f32_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
6373 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x41,0x01,0x00]
6374
6375 v_cvt_f32_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
6376 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x42,0x01,0x00]
6377
6378 v_cvt_f32_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
6379 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x43,0x01,0x00]
6380
6381 v_cvt_f32_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
6382 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x30,0x01,0x00]
6383
6384 v_cvt_f32_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
6385 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x34,0x01,0x00]
6386
6387 v_cvt_f32_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
6388 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x38,0x01,0x00]
6389
6390 v_cvt_f32_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
6391 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x3c,0x01,0x00]
6392
6393 v_cvt_f32_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
6394 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x01,0x01,0x00]
6395
6396 v_cvt_f32_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
6397 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x0f,0x01,0x00]
6398
6399 v_cvt_f32_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
6400 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x11,0x01,0x00]
6401
6402 v_cvt_f32_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
6403 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x1f,0x01,0x00]
6404
6405 v_cvt_f32_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
6406 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x21,0x01,0x00]
6407
6408 v_cvt_f32_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
6409 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0x2f,0x01,0x00]
6410
6411 v_cvt_f32_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
6412 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0xe4,0x00,0x10]
6413
6414 v_cvt_f32_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
6415 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0xe4,0x00,0x30]
6416
6417 v_cvt_f32_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
6418 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
6419
6420 v_cvt_f32_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
6421 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
6422
6423 v_cvt_f32_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
6424 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0xe4,0x00,0x01]
6425
6426 v_cvt_f32_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
6427 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0xe4,0x00,0x03]
6428
6429 v_cvt_f32_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
6430 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
6431
6432 v_cvt_f32_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
6433 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
6434
6435 v_cvt_f32_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
6436 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0xe4,0x08,0x00]
6437
6438 v_cvt_f32_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6439 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0xe4,0x10,0x00]
6440
6441 v_cvt_f32_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6442 // CHECK: [0xfa,0x16,0x0a,0x7e,0x01,0xe4,0x20,0x00]
6443
6444 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6445 // CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x06,0x00]
6446
6447 v_cvt_rpi_i32_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6448 // CHECK: [0xf9,0x18,0xfe,0x7f,0x01,0x06,0x06,0x00]
6449
6450 v_cvt_rpi_i32_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6451 // CHECK: [0xf9,0x18,0x0a,0x7e,0xff,0x06,0x06,0x00]
6452
6453 v_cvt_rpi_i32_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6454 // CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x86,0x00]
6455
6456 v_cvt_rpi_i32_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6457 // CHECK: [0xf9,0x18,0x0a,0x7e,0x65,0x06,0x86,0x00]
6458
6459 v_cvt_rpi_i32_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6460 // CHECK: [0xf9,0x18,0x0a,0x7e,0x66,0x06,0x86,0x00]
6461
6462 v_cvt_rpi_i32_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6463 // CHECK: [0xf9,0x18,0x0a,0x7e,0x67,0x06,0x86,0x00]
6464
6465 v_cvt_rpi_i32_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6466 // CHECK: [0xf9,0x18,0x0a,0x7e,0x6a,0x06,0x86,0x00]
6467
6468 v_cvt_rpi_i32_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6469 // CHECK: [0xf9,0x18,0x0a,0x7e,0x6b,0x06,0x86,0x00]
6470
6471 v_cvt_rpi_i32_f32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6472 // CHECK: [0xf9,0x18,0x0a,0x7e,0x7b,0x06,0x86,0x00]
6473
6474 v_cvt_rpi_i32_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6475 // CHECK: [0xf9,0x18,0x0a,0x7e,0x7c,0x06,0x86,0x00]
6476
6477 v_cvt_rpi_i32_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6478 // CHECK: [0xf9,0x18,0x0a,0x7e,0x7e,0x06,0x86,0x00]
6479
6480 v_cvt_rpi_i32_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6481 // CHECK: [0xf9,0x18,0x0a,0x7e,0x7f,0x06,0x86,0x00]
6482
6483 v_cvt_rpi_i32_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6484 // CHECK: [0xf9,0x18,0x0a,0x7e,0x80,0x06,0x86,0x00]
6485
6486 v_cvt_rpi_i32_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6487 // CHECK: [0xf9,0x18,0x0a,0x7e,0xc1,0x06,0x86,0x00]
6488
6489 v_cvt_rpi_i32_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6490 // CHECK: [0xf9,0x18,0x0a,0x7e,0xf0,0x06,0x86,0x00]
6491
6492 v_cvt_rpi_i32_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6493 // CHECK: [0xf9,0x18,0x0a,0x7e,0xf7,0x06,0x86,0x00]
6494
6495 v_cvt_rpi_i32_f32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6496 // CHECK: [0xf9,0x18,0x0a,0x7e,0xfb,0x06,0x86,0x00]
6497
6498 v_cvt_rpi_i32_f32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6499 // CHECK: [0xf9,0x18,0x0a,0x7e,0xfc,0x06,0x86,0x00]
6500
6501 v_cvt_rpi_i32_f32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6502 // CHECK: [0xf9,0x18,0x0a,0x7e,0xfd,0x06,0x86,0x00]
6503
6504 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
6505 // CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x06,0x00]
6506
6507 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
6508 // CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x00,0x06,0x00]
6509
6510 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
6511 // CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x01,0x06,0x00]
6512
6513 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
6514 // CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x02,0x06,0x00]
6515
6516 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
6517 // CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x03,0x06,0x00]
6518
6519 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
6520 // CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x04,0x06,0x00]
6521
6522 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
6523 // CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x05,0x06,0x00]
6524
6525 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
6526 // CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x0e,0x06,0x00]
6527
6528 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
6529 // CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x16,0x06,0x00]
6530
6531 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
6532 // CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x16,0x06,0x00]
6533
6534 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
6535 // CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x06,0x00]
6536
6537 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
6538 // CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x00,0x00]
6539
6540 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
6541 // CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x01,0x00]
6542
6543 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
6544 // CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x02,0x00]
6545
6546 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
6547 // CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x03,0x00]
6548
6549 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
6550 // CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x04,0x00]
6551
6552 v_cvt_rpi_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
6553 // CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x05,0x00]
6554
6555 v_cvt_rpi_i32_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6556 // CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x16,0x00]
6557
6558 v_cvt_rpi_i32_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6559 // CHECK: [0xf9,0x18,0x0a,0x7e,0x01,0x06,0x26,0x00]
6560
6561 v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6562 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0xe4,0x00,0x00]
6563
6564 v_cvt_rpi_i32_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6565 // CHECK: [0xfa,0x18,0xfe,0x7f,0x01,0xe4,0x00,0x00]
6566
6567 v_cvt_rpi_i32_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6568 // CHECK: [0xfa,0x18,0x0a,0x7e,0xff,0xe4,0x00,0x00]
6569
6570 v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
6571 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x1b,0x00,0x00]
6572
6573 v_cvt_rpi_i32_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
6574 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x40,0x01,0x00]
6575
6576 v_cvt_rpi_i32_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
6577 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x41,0x01,0x00]
6578
6579 v_cvt_rpi_i32_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
6580 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x42,0x01,0x00]
6581
6582 v_cvt_rpi_i32_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
6583 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x43,0x01,0x00]
6584
6585 v_cvt_rpi_i32_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
6586 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x30,0x01,0x00]
6587
6588 v_cvt_rpi_i32_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
6589 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x34,0x01,0x00]
6590
6591 v_cvt_rpi_i32_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
6592 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x38,0x01,0x00]
6593
6594 v_cvt_rpi_i32_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
6595 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x3c,0x01,0x00]
6596
6597 v_cvt_rpi_i32_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
6598 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x01,0x01,0x00]
6599
6600 v_cvt_rpi_i32_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
6601 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x0f,0x01,0x00]
6602
6603 v_cvt_rpi_i32_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
6604 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x11,0x01,0x00]
6605
6606 v_cvt_rpi_i32_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
6607 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x1f,0x01,0x00]
6608
6609 v_cvt_rpi_i32_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
6610 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x21,0x01,0x00]
6611
6612 v_cvt_rpi_i32_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
6613 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0x2f,0x01,0x00]
6614
6615 v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
6616 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0xe4,0x00,0x10]
6617
6618 v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
6619 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0xe4,0x00,0x30]
6620
6621 v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
6622 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
6623
6624 v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
6625 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
6626
6627 v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
6628 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0xe4,0x00,0x01]
6629
6630 v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
6631 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0xe4,0x00,0x03]
6632
6633 v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
6634 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
6635
6636 v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
6637 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
6638
6639 v_cvt_rpi_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
6640 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0xe4,0x08,0x00]
6641
6642 v_cvt_rpi_i32_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6643 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0xe4,0x10,0x00]
6644
6645 v_cvt_rpi_i32_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6646 // CHECK: [0xfa,0x18,0x0a,0x7e,0x01,0xe4,0x20,0x00]
6647
6648 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6649 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x06,0x00]
6650
6651 v_cvt_flr_i32_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6652 // CHECK: [0xf9,0x1a,0xfe,0x7f,0x01,0x06,0x06,0x00]
6653
6654 v_cvt_flr_i32_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6655 // CHECK: [0xf9,0x1a,0x0a,0x7e,0xff,0x06,0x06,0x00]
6656
6657 v_cvt_flr_i32_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6658 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x86,0x00]
6659
6660 v_cvt_flr_i32_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6661 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x65,0x06,0x86,0x00]
6662
6663 v_cvt_flr_i32_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6664 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x66,0x06,0x86,0x00]
6665
6666 v_cvt_flr_i32_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6667 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x67,0x06,0x86,0x00]
6668
6669 v_cvt_flr_i32_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6670 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x6a,0x06,0x86,0x00]
6671
6672 v_cvt_flr_i32_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6673 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x6b,0x06,0x86,0x00]
6674
6675 v_cvt_flr_i32_f32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6676 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x7b,0x06,0x86,0x00]
6677
6678 v_cvt_flr_i32_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6679 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x7c,0x06,0x86,0x00]
6680
6681 v_cvt_flr_i32_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6682 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x7e,0x06,0x86,0x00]
6683
6684 v_cvt_flr_i32_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6685 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x7f,0x06,0x86,0x00]
6686
6687 v_cvt_flr_i32_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6688 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x80,0x06,0x86,0x00]
6689
6690 v_cvt_flr_i32_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6691 // CHECK: [0xf9,0x1a,0x0a,0x7e,0xc1,0x06,0x86,0x00]
6692
6693 v_cvt_flr_i32_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6694 // CHECK: [0xf9,0x1a,0x0a,0x7e,0xf0,0x06,0x86,0x00]
6695
6696 v_cvt_flr_i32_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6697 // CHECK: [0xf9,0x1a,0x0a,0x7e,0xf7,0x06,0x86,0x00]
6698
6699 v_cvt_flr_i32_f32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6700 // CHECK: [0xf9,0x1a,0x0a,0x7e,0xfb,0x06,0x86,0x00]
6701
6702 v_cvt_flr_i32_f32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6703 // CHECK: [0xf9,0x1a,0x0a,0x7e,0xfc,0x06,0x86,0x00]
6704
6705 v_cvt_flr_i32_f32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6706 // CHECK: [0xf9,0x1a,0x0a,0x7e,0xfd,0x06,0x86,0x00]
6707
6708 v_cvt_flr_i32_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
6709 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x06,0x00]
6710
6711 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
6712 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x00,0x06,0x00]
6713
6714 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
6715 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x01,0x06,0x00]
6716
6717 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
6718 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x02,0x06,0x00]
6719
6720 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
6721 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x03,0x06,0x00]
6722
6723 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
6724 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x04,0x06,0x00]
6725
6726 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
6727 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x05,0x06,0x00]
6728
6729 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
6730 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x0e,0x06,0x00]
6731
6732 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
6733 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x16,0x06,0x00]
6734
6735 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
6736 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x16,0x06,0x00]
6737
6738 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
6739 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x06,0x00]
6740
6741 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
6742 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x00,0x00]
6743
6744 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
6745 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x01,0x00]
6746
6747 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
6748 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x02,0x00]
6749
6750 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
6751 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x03,0x00]
6752
6753 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
6754 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x04,0x00]
6755
6756 v_cvt_flr_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
6757 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x05,0x00]
6758
6759 v_cvt_flr_i32_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6760 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x16,0x00]
6761
6762 v_cvt_flr_i32_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6763 // CHECK: [0xf9,0x1a,0x0a,0x7e,0x01,0x06,0x26,0x00]
6764
6765 v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6766 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0xe4,0x00,0x00]
6767
6768 v_cvt_flr_i32_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6769 // CHECK: [0xfa,0x1a,0xfe,0x7f,0x01,0xe4,0x00,0x00]
6770
6771 v_cvt_flr_i32_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6772 // CHECK: [0xfa,0x1a,0x0a,0x7e,0xff,0xe4,0x00,0x00]
6773
6774 v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
6775 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x1b,0x00,0x00]
6776
6777 v_cvt_flr_i32_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
6778 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x40,0x01,0x00]
6779
6780 v_cvt_flr_i32_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
6781 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x41,0x01,0x00]
6782
6783 v_cvt_flr_i32_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
6784 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x42,0x01,0x00]
6785
6786 v_cvt_flr_i32_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
6787 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x43,0x01,0x00]
6788
6789 v_cvt_flr_i32_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
6790 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x30,0x01,0x00]
6791
6792 v_cvt_flr_i32_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
6793 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x34,0x01,0x00]
6794
6795 v_cvt_flr_i32_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
6796 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x38,0x01,0x00]
6797
6798 v_cvt_flr_i32_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
6799 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x3c,0x01,0x00]
6800
6801 v_cvt_flr_i32_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
6802 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x01,0x01,0x00]
6803
6804 v_cvt_flr_i32_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
6805 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x0f,0x01,0x00]
6806
6807 v_cvt_flr_i32_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
6808 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x11,0x01,0x00]
6809
6810 v_cvt_flr_i32_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
6811 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x1f,0x01,0x00]
6812
6813 v_cvt_flr_i32_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
6814 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x21,0x01,0x00]
6815
6816 v_cvt_flr_i32_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
6817 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0x2f,0x01,0x00]
6818
6819 v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
6820 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0xe4,0x00,0x10]
6821
6822 v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
6823 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0xe4,0x00,0x30]
6824
6825 v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
6826 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
6827
6828 v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
6829 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
6830
6831 v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
6832 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0xe4,0x00,0x01]
6833
6834 v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
6835 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0xe4,0x00,0x03]
6836
6837 v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
6838 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
6839
6840 v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
6841 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
6842
6843 v_cvt_flr_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
6844 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0xe4,0x08,0x00]
6845
6846 v_cvt_flr_i32_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6847 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0xe4,0x10,0x00]
6848
6849 v_cvt_flr_i32_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6850 // CHECK: [0xfa,0x1a,0x0a,0x7e,0x01,0xe4,0x20,0x00]
6851
6852 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6853 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x06,0x00]
6854
6855 v_cvt_off_f32_i4_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6856 // CHECK: [0xf9,0x1c,0xfe,0x7f,0x01,0x06,0x06,0x00]
6857
6858 v_cvt_off_f32_i4_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6859 // CHECK: [0xf9,0x1c,0x0a,0x7e,0xff,0x06,0x06,0x00]
6860
6861 v_cvt_off_f32_i4_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6862 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x86,0x00]
6863
6864 v_cvt_off_f32_i4_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6865 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x65,0x06,0x86,0x00]
6866
6867 v_cvt_off_f32_i4_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6868 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x66,0x06,0x86,0x00]
6869
6870 v_cvt_off_f32_i4_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6871 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x67,0x06,0x86,0x00]
6872
6873 v_cvt_off_f32_i4_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6874 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x6a,0x06,0x86,0x00]
6875
6876 v_cvt_off_f32_i4_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6877 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x6b,0x06,0x86,0x00]
6878
6879 v_cvt_off_f32_i4_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6880 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x7b,0x06,0x86,0x00]
6881
6882 v_cvt_off_f32_i4_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6883 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x7c,0x06,0x86,0x00]
6884
6885 v_cvt_off_f32_i4_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6886 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x7e,0x06,0x86,0x00]
6887
6888 v_cvt_off_f32_i4_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6889 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x7f,0x06,0x86,0x00]
6890
6891 v_cvt_off_f32_i4_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6892 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x80,0x06,0x86,0x00]
6893
6894 v_cvt_off_f32_i4_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6895 // CHECK: [0xf9,0x1c,0x0a,0x7e,0xc1,0x06,0x86,0x00]
6896
6897 v_cvt_off_f32_i4_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6898 // CHECK: [0xf9,0x1c,0x0a,0x7e,0xf0,0x06,0x86,0x00]
6899
6900 v_cvt_off_f32_i4_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6901 // CHECK: [0xf9,0x1c,0x0a,0x7e,0xf7,0x06,0x86,0x00]
6902
6903 v_cvt_off_f32_i4_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6904 // CHECK: [0xf9,0x1c,0x0a,0x7e,0xfb,0x06,0x86,0x00]
6905
6906 v_cvt_off_f32_i4_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6907 // CHECK: [0xf9,0x1c,0x0a,0x7e,0xfc,0x06,0x86,0x00]
6908
6909 v_cvt_off_f32_i4_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6910 // CHECK: [0xf9,0x1c,0x0a,0x7e,0xfd,0x06,0x86,0x00]
6911
6912 v_cvt_off_f32_i4_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6913 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x26,0x06,0x00]
6914
6915 v_cvt_off_f32_i4_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6916 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x46,0x06,0x00]
6917
6918 v_cvt_off_f32_i4_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6919 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x86,0x06,0x00]
6920
6921 v_cvt_off_f32_i4_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6922 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0xc6,0x06,0x00]
6923
6924 v_cvt_off_f32_i4_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
6925 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x06,0x00]
6926
6927 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
6928 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x00,0x06,0x00]
6929
6930 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
6931 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x01,0x06,0x00]
6932
6933 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
6934 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x02,0x06,0x00]
6935
6936 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
6937 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x03,0x06,0x00]
6938
6939 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
6940 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x04,0x06,0x00]
6941
6942 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
6943 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x05,0x06,0x00]
6944
6945 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
6946 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x0e,0x06,0x00]
6947
6948 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
6949 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x16,0x06,0x00]
6950
6951 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
6952 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x16,0x06,0x00]
6953
6954 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
6955 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x06,0x00]
6956
6957 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
6958 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x00,0x00]
6959
6960 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
6961 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x01,0x00]
6962
6963 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
6964 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x02,0x00]
6965
6966 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
6967 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x03,0x00]
6968
6969 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
6970 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x04,0x00]
6971
6972 v_cvt_off_f32_i4_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
6973 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x05,0x00]
6974
6975 v_cvt_off_f32_i4_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
6976 // CHECK: [0xf9,0x1c,0x0a,0x7e,0x01,0x06,0x0e,0x00]
6977
6978 v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6979 // CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0xe4,0x00,0x00]
6980
6981 v_cvt_off_f32_i4_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6982 // CHECK: [0xfa,0x1c,0xfe,0x7f,0x01,0xe4,0x00,0x00]
6983
6984 v_cvt_off_f32_i4_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
6985 // CHECK: [0xfa,0x1c,0x0a,0x7e,0xff,0xe4,0x00,0x00]
6986
6987 v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
6988 // CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x1b,0x00,0x00]
6989
6990 v_cvt_off_f32_i4_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
6991 // CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x40,0x01,0x00]
6992
6993 v_cvt_off_f32_i4_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
6994 // CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x41,0x01,0x00]
6995
6996 v_cvt_off_f32_i4_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
6997 // CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x42,0x01,0x00]
6998
6999 v_cvt_off_f32_i4_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
7000 // CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x43,0x01,0x00]
7001
7002 v_cvt_off_f32_i4_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
7003 // CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x30,0x01,0x00]
7004
7005 v_cvt_off_f32_i4_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
7006 // CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x34,0x01,0x00]
7007
7008 v_cvt_off_f32_i4_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
7009 // CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x38,0x01,0x00]
7010
7011 v_cvt_off_f32_i4_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
7012 // CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x3c,0x01,0x00]
7013
7014 v_cvt_off_f32_i4_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
7015 // CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x01,0x01,0x00]
7016
7017 v_cvt_off_f32_i4_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
7018 // CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x0f,0x01,0x00]
7019
7020 v_cvt_off_f32_i4_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
7021 // CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x11,0x01,0x00]
7022
7023 v_cvt_off_f32_i4_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
7024 // CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x1f,0x01,0x00]
7025
7026 v_cvt_off_f32_i4_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
7027 // CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x21,0x01,0x00]
7028
7029 v_cvt_off_f32_i4_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
7030 // CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0x2f,0x01,0x00]
7031
7032 v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
7033 // CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0xe4,0x00,0x10]
7034
7035 v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
7036 // CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0xe4,0x00,0x30]
7037
7038 v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
7039 // CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
7040
7041 v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
7042 // CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
7043
7044 v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
7045 // CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0xe4,0x00,0x01]
7046
7047 v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
7048 // CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0xe4,0x00,0x03]
7049
7050 v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
7051 // CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
7052
7053 v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
7054 // CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
7055
7056 v_cvt_off_f32_i4_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
7057 // CHECK: [0xfa,0x1c,0x0a,0x7e,0x01,0xe4,0x08,0x00]
7058
7059 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7060 // CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x06,0x00]
7061
7062 v_cvt_f32_ubyte0_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7063 // CHECK: [0xf9,0x22,0xfe,0x7f,0x01,0x06,0x06,0x00]
7064
7065 v_cvt_f32_ubyte0_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7066 // CHECK: [0xf9,0x22,0x0a,0x7e,0xff,0x06,0x06,0x00]
7067
7068 v_cvt_f32_ubyte0_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7069 // CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x86,0x00]
7070
7071 v_cvt_f32_ubyte0_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7072 // CHECK: [0xf9,0x22,0x0a,0x7e,0x65,0x06,0x86,0x00]
7073
7074 v_cvt_f32_ubyte0_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7075 // CHECK: [0xf9,0x22,0x0a,0x7e,0x66,0x06,0x86,0x00]
7076
7077 v_cvt_f32_ubyte0_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7078 // CHECK: [0xf9,0x22,0x0a,0x7e,0x67,0x06,0x86,0x00]
7079
7080 v_cvt_f32_ubyte0_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7081 // CHECK: [0xf9,0x22,0x0a,0x7e,0x6a,0x06,0x86,0x00]
7082
7083 v_cvt_f32_ubyte0_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7084 // CHECK: [0xf9,0x22,0x0a,0x7e,0x6b,0x06,0x86,0x00]
7085
7086 v_cvt_f32_ubyte0_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7087 // CHECK: [0xf9,0x22,0x0a,0x7e,0x7b,0x06,0x86,0x00]
7088
7089 v_cvt_f32_ubyte0_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7090 // CHECK: [0xf9,0x22,0x0a,0x7e,0x7c,0x06,0x86,0x00]
7091
7092 v_cvt_f32_ubyte0_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7093 // CHECK: [0xf9,0x22,0x0a,0x7e,0x7e,0x06,0x86,0x00]
7094
7095 v_cvt_f32_ubyte0_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7096 // CHECK: [0xf9,0x22,0x0a,0x7e,0x7f,0x06,0x86,0x00]
7097
7098 v_cvt_f32_ubyte0_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7099 // CHECK: [0xf9,0x22,0x0a,0x7e,0x80,0x06,0x86,0x00]
7100
7101 v_cvt_f32_ubyte0_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7102 // CHECK: [0xf9,0x22,0x0a,0x7e,0xc1,0x06,0x86,0x00]
7103
7104 v_cvt_f32_ubyte0_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7105 // CHECK: [0xf9,0x22,0x0a,0x7e,0xf0,0x06,0x86,0x00]
7106
7107 v_cvt_f32_ubyte0_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7108 // CHECK: [0xf9,0x22,0x0a,0x7e,0xf7,0x06,0x86,0x00]
7109
7110 v_cvt_f32_ubyte0_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7111 // CHECK: [0xf9,0x22,0x0a,0x7e,0xfb,0x06,0x86,0x00]
7112
7113 v_cvt_f32_ubyte0_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7114 // CHECK: [0xf9,0x22,0x0a,0x7e,0xfc,0x06,0x86,0x00]
7115
7116 v_cvt_f32_ubyte0_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7117 // CHECK: [0xf9,0x22,0x0a,0x7e,0xfd,0x06,0x86,0x00]
7118
7119 v_cvt_f32_ubyte0_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7120 // CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x26,0x06,0x00]
7121
7122 v_cvt_f32_ubyte0_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7123 // CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x46,0x06,0x00]
7124
7125 v_cvt_f32_ubyte0_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7126 // CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x86,0x06,0x00]
7127
7128 v_cvt_f32_ubyte0_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7129 // CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0xc6,0x06,0x00]
7130
7131 v_cvt_f32_ubyte0_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
7132 // CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x06,0x00]
7133
7134 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
7135 // CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x00,0x06,0x00]
7136
7137 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
7138 // CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x01,0x06,0x00]
7139
7140 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
7141 // CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x02,0x06,0x00]
7142
7143 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
7144 // CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x03,0x06,0x00]
7145
7146 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
7147 // CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x04,0x06,0x00]
7148
7149 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
7150 // CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x05,0x06,0x00]
7151
7152 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
7153 // CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x0e,0x06,0x00]
7154
7155 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
7156 // CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x16,0x06,0x00]
7157
7158 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
7159 // CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x16,0x06,0x00]
7160
7161 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
7162 // CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x06,0x00]
7163
7164 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
7165 // CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x00,0x00]
7166
7167 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
7168 // CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x01,0x00]
7169
7170 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
7171 // CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x02,0x00]
7172
7173 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
7174 // CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x03,0x00]
7175
7176 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
7177 // CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x04,0x00]
7178
7179 v_cvt_f32_ubyte0_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7180 // CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x05,0x00]
7181
7182 v_cvt_f32_ubyte0_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7183 // CHECK: [0xf9,0x22,0x0a,0x7e,0x01,0x06,0x0e,0x00]
7184
7185 v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7186 // CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0xe4,0x00,0x00]
7187
7188 v_cvt_f32_ubyte0_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7189 // CHECK: [0xfa,0x22,0xfe,0x7f,0x01,0xe4,0x00,0x00]
7190
7191 v_cvt_f32_ubyte0_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7192 // CHECK: [0xfa,0x22,0x0a,0x7e,0xff,0xe4,0x00,0x00]
7193
7194 v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
7195 // CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x1b,0x00,0x00]
7196
7197 v_cvt_f32_ubyte0_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
7198 // CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x40,0x01,0x00]
7199
7200 v_cvt_f32_ubyte0_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
7201 // CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x41,0x01,0x00]
7202
7203 v_cvt_f32_ubyte0_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
7204 // CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x42,0x01,0x00]
7205
7206 v_cvt_f32_ubyte0_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
7207 // CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x43,0x01,0x00]
7208
7209 v_cvt_f32_ubyte0_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
7210 // CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x30,0x01,0x00]
7211
7212 v_cvt_f32_ubyte0_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
7213 // CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x34,0x01,0x00]
7214
7215 v_cvt_f32_ubyte0_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
7216 // CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x38,0x01,0x00]
7217
7218 v_cvt_f32_ubyte0_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
7219 // CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x3c,0x01,0x00]
7220
7221 v_cvt_f32_ubyte0_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
7222 // CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x01,0x01,0x00]
7223
7224 v_cvt_f32_ubyte0_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
7225 // CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x0f,0x01,0x00]
7226
7227 v_cvt_f32_ubyte0_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
7228 // CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x11,0x01,0x00]
7229
7230 v_cvt_f32_ubyte0_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
7231 // CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x1f,0x01,0x00]
7232
7233 v_cvt_f32_ubyte0_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
7234 // CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x21,0x01,0x00]
7235
7236 v_cvt_f32_ubyte0_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
7237 // CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0x2f,0x01,0x00]
7238
7239 v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
7240 // CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0xe4,0x00,0x10]
7241
7242 v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
7243 // CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0xe4,0x00,0x30]
7244
7245 v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
7246 // CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
7247
7248 v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
7249 // CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
7250
7251 v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
7252 // CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0xe4,0x00,0x01]
7253
7254 v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
7255 // CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0xe4,0x00,0x03]
7256
7257 v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
7258 // CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
7259
7260 v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
7261 // CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
7262
7263 v_cvt_f32_ubyte0_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
7264 // CHECK: [0xfa,0x22,0x0a,0x7e,0x01,0xe4,0x08,0x00]
7265
7266 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7267 // CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x06,0x00]
7268
7269 v_cvt_f32_ubyte1_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7270 // CHECK: [0xf9,0x24,0xfe,0x7f,0x01,0x06,0x06,0x00]
7271
7272 v_cvt_f32_ubyte1_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7273 // CHECK: [0xf9,0x24,0x0a,0x7e,0xff,0x06,0x06,0x00]
7274
7275 v_cvt_f32_ubyte1_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7276 // CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x86,0x00]
7277
7278 v_cvt_f32_ubyte1_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7279 // CHECK: [0xf9,0x24,0x0a,0x7e,0x65,0x06,0x86,0x00]
7280
7281 v_cvt_f32_ubyte1_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7282 // CHECK: [0xf9,0x24,0x0a,0x7e,0x66,0x06,0x86,0x00]
7283
7284 v_cvt_f32_ubyte1_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7285 // CHECK: [0xf9,0x24,0x0a,0x7e,0x67,0x06,0x86,0x00]
7286
7287 v_cvt_f32_ubyte1_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7288 // CHECK: [0xf9,0x24,0x0a,0x7e,0x6a,0x06,0x86,0x00]
7289
7290 v_cvt_f32_ubyte1_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7291 // CHECK: [0xf9,0x24,0x0a,0x7e,0x6b,0x06,0x86,0x00]
7292
7293 v_cvt_f32_ubyte1_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7294 // CHECK: [0xf9,0x24,0x0a,0x7e,0x7b,0x06,0x86,0x00]
7295
7296 v_cvt_f32_ubyte1_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7297 // CHECK: [0xf9,0x24,0x0a,0x7e,0x7c,0x06,0x86,0x00]
7298
7299 v_cvt_f32_ubyte1_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7300 // CHECK: [0xf9,0x24,0x0a,0x7e,0x7e,0x06,0x86,0x00]
7301
7302 v_cvt_f32_ubyte1_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7303 // CHECK: [0xf9,0x24,0x0a,0x7e,0x7f,0x06,0x86,0x00]
7304
7305 v_cvt_f32_ubyte1_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7306 // CHECK: [0xf9,0x24,0x0a,0x7e,0x80,0x06,0x86,0x00]
7307
7308 v_cvt_f32_ubyte1_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7309 // CHECK: [0xf9,0x24,0x0a,0x7e,0xc1,0x06,0x86,0x00]
7310
7311 v_cvt_f32_ubyte1_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7312 // CHECK: [0xf9,0x24,0x0a,0x7e,0xf0,0x06,0x86,0x00]
7313
7314 v_cvt_f32_ubyte1_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7315 // CHECK: [0xf9,0x24,0x0a,0x7e,0xf7,0x06,0x86,0x00]
7316
7317 v_cvt_f32_ubyte1_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7318 // CHECK: [0xf9,0x24,0x0a,0x7e,0xfb,0x06,0x86,0x00]
7319
7320 v_cvt_f32_ubyte1_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7321 // CHECK: [0xf9,0x24,0x0a,0x7e,0xfc,0x06,0x86,0x00]
7322
7323 v_cvt_f32_ubyte1_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7324 // CHECK: [0xf9,0x24,0x0a,0x7e,0xfd,0x06,0x86,0x00]
7325
7326 v_cvt_f32_ubyte1_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7327 // CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x26,0x06,0x00]
7328
7329 v_cvt_f32_ubyte1_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7330 // CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x46,0x06,0x00]
7331
7332 v_cvt_f32_ubyte1_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7333 // CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x86,0x06,0x00]
7334
7335 v_cvt_f32_ubyte1_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7336 // CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0xc6,0x06,0x00]
7337
7338 v_cvt_f32_ubyte1_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
7339 // CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x06,0x00]
7340
7341 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
7342 // CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x00,0x06,0x00]
7343
7344 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
7345 // CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x01,0x06,0x00]
7346
7347 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
7348 // CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x02,0x06,0x00]
7349
7350 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
7351 // CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x03,0x06,0x00]
7352
7353 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
7354 // CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x04,0x06,0x00]
7355
7356 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
7357 // CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x05,0x06,0x00]
7358
7359 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
7360 // CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x0e,0x06,0x00]
7361
7362 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
7363 // CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x16,0x06,0x00]
7364
7365 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
7366 // CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x16,0x06,0x00]
7367
7368 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
7369 // CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x06,0x00]
7370
7371 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
7372 // CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x00,0x00]
7373
7374 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
7375 // CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x01,0x00]
7376
7377 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
7378 // CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x02,0x00]
7379
7380 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
7381 // CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x03,0x00]
7382
7383 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
7384 // CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x04,0x00]
7385
7386 v_cvt_f32_ubyte1_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7387 // CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x05,0x00]
7388
7389 v_cvt_f32_ubyte1_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7390 // CHECK: [0xf9,0x24,0x0a,0x7e,0x01,0x06,0x0e,0x00]
7391
7392 v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7393 // CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0xe4,0x00,0x00]
7394
7395 v_cvt_f32_ubyte1_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7396 // CHECK: [0xfa,0x24,0xfe,0x7f,0x01,0xe4,0x00,0x00]
7397
7398 v_cvt_f32_ubyte1_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7399 // CHECK: [0xfa,0x24,0x0a,0x7e,0xff,0xe4,0x00,0x00]
7400
7401 v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
7402 // CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x1b,0x00,0x00]
7403
7404 v_cvt_f32_ubyte1_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
7405 // CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x40,0x01,0x00]
7406
7407 v_cvt_f32_ubyte1_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
7408 // CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x41,0x01,0x00]
7409
7410 v_cvt_f32_ubyte1_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
7411 // CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x42,0x01,0x00]
7412
7413 v_cvt_f32_ubyte1_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
7414 // CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x43,0x01,0x00]
7415
7416 v_cvt_f32_ubyte1_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
7417 // CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x30,0x01,0x00]
7418
7419 v_cvt_f32_ubyte1_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
7420 // CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x34,0x01,0x00]
7421
7422 v_cvt_f32_ubyte1_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
7423 // CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x38,0x01,0x00]
7424
7425 v_cvt_f32_ubyte1_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
7426 // CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x3c,0x01,0x00]
7427
7428 v_cvt_f32_ubyte1_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
7429 // CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x01,0x01,0x00]
7430
7431 v_cvt_f32_ubyte1_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
7432 // CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x0f,0x01,0x00]
7433
7434 v_cvt_f32_ubyte1_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
7435 // CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x11,0x01,0x00]
7436
7437 v_cvt_f32_ubyte1_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
7438 // CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x1f,0x01,0x00]
7439
7440 v_cvt_f32_ubyte1_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
7441 // CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x21,0x01,0x00]
7442
7443 v_cvt_f32_ubyte1_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
7444 // CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0x2f,0x01,0x00]
7445
7446 v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
7447 // CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0xe4,0x00,0x10]
7448
7449 v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
7450 // CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0xe4,0x00,0x30]
7451
7452 v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
7453 // CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
7454
7455 v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
7456 // CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
7457
7458 v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
7459 // CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0xe4,0x00,0x01]
7460
7461 v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
7462 // CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0xe4,0x00,0x03]
7463
7464 v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
7465 // CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
7466
7467 v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
7468 // CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
7469
7470 v_cvt_f32_ubyte1_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
7471 // CHECK: [0xfa,0x24,0x0a,0x7e,0x01,0xe4,0x08,0x00]
7472
7473 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7474 // CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x06,0x00]
7475
7476 v_cvt_f32_ubyte2_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7477 // CHECK: [0xf9,0x26,0xfe,0x7f,0x01,0x06,0x06,0x00]
7478
7479 v_cvt_f32_ubyte2_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7480 // CHECK: [0xf9,0x26,0x0a,0x7e,0xff,0x06,0x06,0x00]
7481
7482 v_cvt_f32_ubyte2_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7483 // CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x86,0x00]
7484
7485 v_cvt_f32_ubyte2_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7486 // CHECK: [0xf9,0x26,0x0a,0x7e,0x65,0x06,0x86,0x00]
7487
7488 v_cvt_f32_ubyte2_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7489 // CHECK: [0xf9,0x26,0x0a,0x7e,0x66,0x06,0x86,0x00]
7490
7491 v_cvt_f32_ubyte2_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7492 // CHECK: [0xf9,0x26,0x0a,0x7e,0x67,0x06,0x86,0x00]
7493
7494 v_cvt_f32_ubyte2_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7495 // CHECK: [0xf9,0x26,0x0a,0x7e,0x6a,0x06,0x86,0x00]
7496
7497 v_cvt_f32_ubyte2_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7498 // CHECK: [0xf9,0x26,0x0a,0x7e,0x6b,0x06,0x86,0x00]
7499
7500 v_cvt_f32_ubyte2_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7501 // CHECK: [0xf9,0x26,0x0a,0x7e,0x7b,0x06,0x86,0x00]
7502
7503 v_cvt_f32_ubyte2_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7504 // CHECK: [0xf9,0x26,0x0a,0x7e,0x7c,0x06,0x86,0x00]
7505
7506 v_cvt_f32_ubyte2_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7507 // CHECK: [0xf9,0x26,0x0a,0x7e,0x7e,0x06,0x86,0x00]
7508
7509 v_cvt_f32_ubyte2_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7510 // CHECK: [0xf9,0x26,0x0a,0x7e,0x7f,0x06,0x86,0x00]
7511
7512 v_cvt_f32_ubyte2_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7513 // CHECK: [0xf9,0x26,0x0a,0x7e,0x80,0x06,0x86,0x00]
7514
7515 v_cvt_f32_ubyte2_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7516 // CHECK: [0xf9,0x26,0x0a,0x7e,0xc1,0x06,0x86,0x00]
7517
7518 v_cvt_f32_ubyte2_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7519 // CHECK: [0xf9,0x26,0x0a,0x7e,0xf0,0x06,0x86,0x00]
7520
7521 v_cvt_f32_ubyte2_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7522 // CHECK: [0xf9,0x26,0x0a,0x7e,0xf7,0x06,0x86,0x00]
7523
7524 v_cvt_f32_ubyte2_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7525 // CHECK: [0xf9,0x26,0x0a,0x7e,0xfb,0x06,0x86,0x00]
7526
7527 v_cvt_f32_ubyte2_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7528 // CHECK: [0xf9,0x26,0x0a,0x7e,0xfc,0x06,0x86,0x00]
7529
7530 v_cvt_f32_ubyte2_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7531 // CHECK: [0xf9,0x26,0x0a,0x7e,0xfd,0x06,0x86,0x00]
7532
7533 v_cvt_f32_ubyte2_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7534 // CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x26,0x06,0x00]
7535
7536 v_cvt_f32_ubyte2_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7537 // CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x46,0x06,0x00]
7538
7539 v_cvt_f32_ubyte2_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7540 // CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x86,0x06,0x00]
7541
7542 v_cvt_f32_ubyte2_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7543 // CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0xc6,0x06,0x00]
7544
7545 v_cvt_f32_ubyte2_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
7546 // CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x06,0x00]
7547
7548 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
7549 // CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x00,0x06,0x00]
7550
7551 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
7552 // CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x01,0x06,0x00]
7553
7554 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
7555 // CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x02,0x06,0x00]
7556
7557 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
7558 // CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x03,0x06,0x00]
7559
7560 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
7561 // CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x04,0x06,0x00]
7562
7563 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
7564 // CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x05,0x06,0x00]
7565
7566 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
7567 // CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x0e,0x06,0x00]
7568
7569 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
7570 // CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x16,0x06,0x00]
7571
7572 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
7573 // CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x16,0x06,0x00]
7574
7575 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
7576 // CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x06,0x00]
7577
7578 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
7579 // CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x00,0x00]
7580
7581 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
7582 // CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x01,0x00]
7583
7584 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
7585 // CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x02,0x00]
7586
7587 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
7588 // CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x03,0x00]
7589
7590 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
7591 // CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x04,0x00]
7592
7593 v_cvt_f32_ubyte2_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7594 // CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x05,0x00]
7595
7596 v_cvt_f32_ubyte2_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7597 // CHECK: [0xf9,0x26,0x0a,0x7e,0x01,0x06,0x0e,0x00]
7598
7599 v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7600 // CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0xe4,0x00,0x00]
7601
7602 v_cvt_f32_ubyte2_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7603 // CHECK: [0xfa,0x26,0xfe,0x7f,0x01,0xe4,0x00,0x00]
7604
7605 v_cvt_f32_ubyte2_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7606 // CHECK: [0xfa,0x26,0x0a,0x7e,0xff,0xe4,0x00,0x00]
7607
7608 v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
7609 // CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x1b,0x00,0x00]
7610
7611 v_cvt_f32_ubyte2_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
7612 // CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x40,0x01,0x00]
7613
7614 v_cvt_f32_ubyte2_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
7615 // CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x41,0x01,0x00]
7616
7617 v_cvt_f32_ubyte2_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
7618 // CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x42,0x01,0x00]
7619
7620 v_cvt_f32_ubyte2_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
7621 // CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x43,0x01,0x00]
7622
7623 v_cvt_f32_ubyte2_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
7624 // CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x30,0x01,0x00]
7625
7626 v_cvt_f32_ubyte2_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
7627 // CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x34,0x01,0x00]
7628
7629 v_cvt_f32_ubyte2_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
7630 // CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x38,0x01,0x00]
7631
7632 v_cvt_f32_ubyte2_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
7633 // CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x3c,0x01,0x00]
7634
7635 v_cvt_f32_ubyte2_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
7636 // CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x01,0x01,0x00]
7637
7638 v_cvt_f32_ubyte2_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
7639 // CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x0f,0x01,0x00]
7640
7641 v_cvt_f32_ubyte2_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
7642 // CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x11,0x01,0x00]
7643
7644 v_cvt_f32_ubyte2_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
7645 // CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x1f,0x01,0x00]
7646
7647 v_cvt_f32_ubyte2_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
7648 // CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x21,0x01,0x00]
7649
7650 v_cvt_f32_ubyte2_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
7651 // CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0x2f,0x01,0x00]
7652
7653 v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
7654 // CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0xe4,0x00,0x10]
7655
7656 v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
7657 // CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0xe4,0x00,0x30]
7658
7659 v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
7660 // CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
7661
7662 v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
7663 // CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
7664
7665 v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
7666 // CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0xe4,0x00,0x01]
7667
7668 v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
7669 // CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0xe4,0x00,0x03]
7670
7671 v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
7672 // CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
7673
7674 v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
7675 // CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
7676
7677 v_cvt_f32_ubyte2_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
7678 // CHECK: [0xfa,0x26,0x0a,0x7e,0x01,0xe4,0x08,0x00]
7679
7680 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7681 // CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x06,0x00]
7682
7683 v_cvt_f32_ubyte3_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7684 // CHECK: [0xf9,0x28,0xfe,0x7f,0x01,0x06,0x06,0x00]
7685
7686 v_cvt_f32_ubyte3_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7687 // CHECK: [0xf9,0x28,0x0a,0x7e,0xff,0x06,0x06,0x00]
7688
7689 v_cvt_f32_ubyte3_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7690 // CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x86,0x00]
7691
7692 v_cvt_f32_ubyte3_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7693 // CHECK: [0xf9,0x28,0x0a,0x7e,0x65,0x06,0x86,0x00]
7694
7695 v_cvt_f32_ubyte3_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7696 // CHECK: [0xf9,0x28,0x0a,0x7e,0x66,0x06,0x86,0x00]
7697
7698 v_cvt_f32_ubyte3_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7699 // CHECK: [0xf9,0x28,0x0a,0x7e,0x67,0x06,0x86,0x00]
7700
7701 v_cvt_f32_ubyte3_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7702 // CHECK: [0xf9,0x28,0x0a,0x7e,0x6a,0x06,0x86,0x00]
7703
7704 v_cvt_f32_ubyte3_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7705 // CHECK: [0xf9,0x28,0x0a,0x7e,0x6b,0x06,0x86,0x00]
7706
7707 v_cvt_f32_ubyte3_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7708 // CHECK: [0xf9,0x28,0x0a,0x7e,0x7b,0x06,0x86,0x00]
7709
7710 v_cvt_f32_ubyte3_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7711 // CHECK: [0xf9,0x28,0x0a,0x7e,0x7c,0x06,0x86,0x00]
7712
7713 v_cvt_f32_ubyte3_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7714 // CHECK: [0xf9,0x28,0x0a,0x7e,0x7e,0x06,0x86,0x00]
7715
7716 v_cvt_f32_ubyte3_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7717 // CHECK: [0xf9,0x28,0x0a,0x7e,0x7f,0x06,0x86,0x00]
7718
7719 v_cvt_f32_ubyte3_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7720 // CHECK: [0xf9,0x28,0x0a,0x7e,0x80,0x06,0x86,0x00]
7721
7722 v_cvt_f32_ubyte3_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7723 // CHECK: [0xf9,0x28,0x0a,0x7e,0xc1,0x06,0x86,0x00]
7724
7725 v_cvt_f32_ubyte3_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7726 // CHECK: [0xf9,0x28,0x0a,0x7e,0xf0,0x06,0x86,0x00]
7727
7728 v_cvt_f32_ubyte3_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7729 // CHECK: [0xf9,0x28,0x0a,0x7e,0xf7,0x06,0x86,0x00]
7730
7731 v_cvt_f32_ubyte3_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7732 // CHECK: [0xf9,0x28,0x0a,0x7e,0xfb,0x06,0x86,0x00]
7733
7734 v_cvt_f32_ubyte3_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7735 // CHECK: [0xf9,0x28,0x0a,0x7e,0xfc,0x06,0x86,0x00]
7736
7737 v_cvt_f32_ubyte3_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7738 // CHECK: [0xf9,0x28,0x0a,0x7e,0xfd,0x06,0x86,0x00]
7739
7740 v_cvt_f32_ubyte3_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7741 // CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x26,0x06,0x00]
7742
7743 v_cvt_f32_ubyte3_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7744 // CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x46,0x06,0x00]
7745
7746 v_cvt_f32_ubyte3_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7747 // CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x86,0x06,0x00]
7748
7749 v_cvt_f32_ubyte3_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7750 // CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0xc6,0x06,0x00]
7751
7752 v_cvt_f32_ubyte3_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
7753 // CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x06,0x00]
7754
7755 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
7756 // CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x00,0x06,0x00]
7757
7758 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
7759 // CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x01,0x06,0x00]
7760
7761 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
7762 // CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x02,0x06,0x00]
7763
7764 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
7765 // CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x03,0x06,0x00]
7766
7767 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
7768 // CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x04,0x06,0x00]
7769
7770 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
7771 // CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x05,0x06,0x00]
7772
7773 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
7774 // CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x0e,0x06,0x00]
7775
7776 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
7777 // CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x16,0x06,0x00]
7778
7779 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
7780 // CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x16,0x06,0x00]
7781
7782 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
7783 // CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x06,0x00]
7784
7785 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
7786 // CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x00,0x00]
7787
7788 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
7789 // CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x01,0x00]
7790
7791 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
7792 // CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x02,0x00]
7793
7794 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
7795 // CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x03,0x00]
7796
7797 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
7798 // CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x04,0x00]
7799
7800 v_cvt_f32_ubyte3_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
7801 // CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x05,0x00]
7802
7803 v_cvt_f32_ubyte3_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7804 // CHECK: [0xf9,0x28,0x0a,0x7e,0x01,0x06,0x0e,0x00]
7805
7806 v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7807 // CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0xe4,0x00,0x00]
7808
7809 v_cvt_f32_ubyte3_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7810 // CHECK: [0xfa,0x28,0xfe,0x7f,0x01,0xe4,0x00,0x00]
7811
7812 v_cvt_f32_ubyte3_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
7813 // CHECK: [0xfa,0x28,0x0a,0x7e,0xff,0xe4,0x00,0x00]
7814
7815 v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
7816 // CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x1b,0x00,0x00]
7817
7818 v_cvt_f32_ubyte3_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
7819 // CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x40,0x01,0x00]
7820
7821 v_cvt_f32_ubyte3_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
7822 // CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x41,0x01,0x00]
7823
7824 v_cvt_f32_ubyte3_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
7825 // CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x42,0x01,0x00]
7826
7827 v_cvt_f32_ubyte3_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
7828 // CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x43,0x01,0x00]
7829
7830 v_cvt_f32_ubyte3_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
7831 // CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x30,0x01,0x00]
7832
7833 v_cvt_f32_ubyte3_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
7834 // CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x34,0x01,0x00]
7835
7836 v_cvt_f32_ubyte3_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
7837 // CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x38,0x01,0x00]
7838
7839 v_cvt_f32_ubyte3_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
7840 // CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x3c,0x01,0x00]
7841
7842 v_cvt_f32_ubyte3_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
7843 // CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x01,0x01,0x00]
7844
7845 v_cvt_f32_ubyte3_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
7846 // CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x0f,0x01,0x00]
7847
7848 v_cvt_f32_ubyte3_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
7849 // CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x11,0x01,0x00]
7850
7851 v_cvt_f32_ubyte3_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
7852 // CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x1f,0x01,0x00]
7853
7854 v_cvt_f32_ubyte3_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
7855 // CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x21,0x01,0x00]
7856
7857 v_cvt_f32_ubyte3_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
7858 // CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0x2f,0x01,0x00]
7859
7860 v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
7861 // CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0xe4,0x00,0x10]
7862
7863 v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
7864 // CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0xe4,0x00,0x30]
7865
7866 v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
7867 // CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
7868
7869 v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
7870 // CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
7871
7872 v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
7873 // CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0xe4,0x00,0x01]
7874
7875 v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
7876 // CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0xe4,0x00,0x03]
7877
7878 v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
7879 // CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
7880
7881 v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
7882 // CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
7883
7884 v_cvt_f32_ubyte3_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
7885 // CHECK: [0xfa,0x28,0x0a,0x7e,0x01,0xe4,0x08,0x00]
7886
7887 v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7888 // CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x06,0x00]
7889
7890 v_fract_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7891 // CHECK: [0xf9,0x36,0xfe,0x7f,0x01,0x06,0x06,0x00]
7892
7893 v_fract_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7894 // CHECK: [0xf9,0x36,0x0a,0x7e,0xff,0x06,0x06,0x00]
7895
7896 v_fract_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7897 // CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x86,0x00]
7898
7899 v_fract_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7900 // CHECK: [0xf9,0x36,0x0a,0x7e,0x65,0x06,0x86,0x00]
7901
7902 v_fract_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7903 // CHECK: [0xf9,0x36,0x0a,0x7e,0x66,0x06,0x86,0x00]
7904
7905 v_fract_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7906 // CHECK: [0xf9,0x36,0x0a,0x7e,0x67,0x06,0x86,0x00]
7907
7908 v_fract_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7909 // CHECK: [0xf9,0x36,0x0a,0x7e,0x6a,0x06,0x86,0x00]
7910
7911 v_fract_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7912 // CHECK: [0xf9,0x36,0x0a,0x7e,0x6b,0x06,0x86,0x00]
7913
7914 v_fract_f32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7915 // CHECK: [0xf9,0x36,0x0a,0x7e,0x7b,0x06,0x86,0x00]
7916
7917 v_fract_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7918 // CHECK: [0xf9,0x36,0x0a,0x7e,0x7c,0x06,0x86,0x00]
7919
7920 v_fract_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7921 // CHECK: [0xf9,0x36,0x0a,0x7e,0x7e,0x06,0x86,0x00]
7922
7923 v_fract_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7924 // CHECK: [0xf9,0x36,0x0a,0x7e,0x7f,0x06,0x86,0x00]
7925
7926 v_fract_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7927 // CHECK: [0xf9,0x36,0x0a,0x7e,0x80,0x06,0x86,0x00]
7928
7929 v_fract_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7930 // CHECK: [0xf9,0x36,0x0a,0x7e,0xc1,0x06,0x86,0x00]
7931
7932 v_fract_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7933 // CHECK: [0xf9,0x36,0x0a,0x7e,0xf0,0x06,0x86,0x00]
7934
7935 v_fract_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7936 // CHECK: [0xf9,0x36,0x0a,0x7e,0xf7,0x06,0x86,0x00]
7937
7938 v_fract_f32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7939 // CHECK: [0xf9,0x36,0x0a,0x7e,0xfb,0x06,0x86,0x00]
7940
7941 v_fract_f32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7942 // CHECK: [0xf9,0x36,0x0a,0x7e,0xfc,0x06,0x86,0x00]
7943
7944 v_fract_f32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7945 // CHECK: [0xf9,0x36,0x0a,0x7e,0xfd,0x06,0x86,0x00]
7946
7947 v_fract_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7948 // CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x26,0x06,0x00]
7949
7950 v_fract_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7951 // CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x46,0x06,0x00]
7952
7953 v_fract_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7954 // CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x86,0x06,0x00]
7955
7956 v_fract_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
7957 // CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0xc6,0x06,0x00]
7958
7959 v_fract_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
7960 // CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x06,0x00]
7961
7962 v_fract_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
7963 // CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x00,0x06,0x00]
7964
7965 v_fract_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
7966 // CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x01,0x06,0x00]
7967
7968 v_fract_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
7969 // CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x02,0x06,0x00]
7970
7971 v_fract_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
7972 // CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x03,0x06,0x00]
7973
7974 v_fract_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
7975 // CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x04,0x06,0x00]
7976
7977 v_fract_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
7978 // CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x05,0x06,0x00]
7979
7980 v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
7981 // CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x0e,0x06,0x00]
7982
7983 v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
7984 // CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x16,0x06,0x00]
7985
7986 v_fract_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
7987 // CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x16,0x06,0x00]
7988
7989 v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
7990 // CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x06,0x00]
7991
7992 v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
7993 // CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x00,0x00]
7994
7995 v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
7996 // CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x01,0x00]
7997
7998 v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
7999 // CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x02,0x00]
8000
8001 v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
8002 // CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x03,0x00]
8003
8004 v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
8005 // CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x04,0x00]
8006
8007 v_fract_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
8008 // CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x05,0x00]
8009
8010 v_fract_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8011 // CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x16,0x00]
8012
8013 v_fract_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8014 // CHECK: [0xf9,0x36,0x0a,0x7e,0x01,0x06,0x26,0x00]
8015
8016 v_fract_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8017 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0xe4,0x00,0x00]
8018
8019 v_fract_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8020 // CHECK: [0xfa,0x36,0xfe,0x7f,0x01,0xe4,0x00,0x00]
8021
8022 v_fract_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8023 // CHECK: [0xfa,0x36,0x0a,0x7e,0xff,0xe4,0x00,0x00]
8024
8025 v_fract_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
8026 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x1b,0x00,0x00]
8027
8028 v_fract_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
8029 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x40,0x01,0x00]
8030
8031 v_fract_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
8032 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x41,0x01,0x00]
8033
8034 v_fract_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
8035 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x42,0x01,0x00]
8036
8037 v_fract_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
8038 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x43,0x01,0x00]
8039
8040 v_fract_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
8041 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x30,0x01,0x00]
8042
8043 v_fract_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
8044 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x34,0x01,0x00]
8045
8046 v_fract_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
8047 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x38,0x01,0x00]
8048
8049 v_fract_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
8050 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x3c,0x01,0x00]
8051
8052 v_fract_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
8053 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x01,0x01,0x00]
8054
8055 v_fract_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
8056 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x0f,0x01,0x00]
8057
8058 v_fract_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
8059 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x11,0x01,0x00]
8060
8061 v_fract_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
8062 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x1f,0x01,0x00]
8063
8064 v_fract_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
8065 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x21,0x01,0x00]
8066
8067 v_fract_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
8068 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0x2f,0x01,0x00]
8069
8070 v_fract_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
8071 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0xe4,0x00,0x10]
8072
8073 v_fract_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
8074 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0xe4,0x00,0x30]
8075
8076 v_fract_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
8077 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
8078
8079 v_fract_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
8080 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
8081
8082 v_fract_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
8083 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0xe4,0x00,0x01]
8084
8085 v_fract_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
8086 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0xe4,0x00,0x03]
8087
8088 v_fract_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
8089 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
8090
8091 v_fract_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
8092 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
8093
8094 v_fract_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
8095 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0xe4,0x08,0x00]
8096
8097 v_fract_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8098 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0xe4,0x10,0x00]
8099
8100 v_fract_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8101 // CHECK: [0xfa,0x36,0x0a,0x7e,0x01,0xe4,0x20,0x00]
8102
8103 v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8104 // CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x06,0x00]
8105
8106 v_trunc_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8107 // CHECK: [0xf9,0x38,0xfe,0x7f,0x01,0x06,0x06,0x00]
8108
8109 v_trunc_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8110 // CHECK: [0xf9,0x38,0x0a,0x7e,0xff,0x06,0x06,0x00]
8111
8112 v_trunc_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8113 // CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x86,0x00]
8114
8115 v_trunc_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8116 // CHECK: [0xf9,0x38,0x0a,0x7e,0x65,0x06,0x86,0x00]
8117
8118 v_trunc_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8119 // CHECK: [0xf9,0x38,0x0a,0x7e,0x66,0x06,0x86,0x00]
8120
8121 v_trunc_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8122 // CHECK: [0xf9,0x38,0x0a,0x7e,0x67,0x06,0x86,0x00]
8123
8124 v_trunc_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8125 // CHECK: [0xf9,0x38,0x0a,0x7e,0x6a,0x06,0x86,0x00]
8126
8127 v_trunc_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8128 // CHECK: [0xf9,0x38,0x0a,0x7e,0x6b,0x06,0x86,0x00]
8129
8130 v_trunc_f32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8131 // CHECK: [0xf9,0x38,0x0a,0x7e,0x7b,0x06,0x86,0x00]
8132
8133 v_trunc_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8134 // CHECK: [0xf9,0x38,0x0a,0x7e,0x7c,0x06,0x86,0x00]
8135
8136 v_trunc_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8137 // CHECK: [0xf9,0x38,0x0a,0x7e,0x7e,0x06,0x86,0x00]
8138
8139 v_trunc_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8140 // CHECK: [0xf9,0x38,0x0a,0x7e,0x7f,0x06,0x86,0x00]
8141
8142 v_trunc_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8143 // CHECK: [0xf9,0x38,0x0a,0x7e,0x80,0x06,0x86,0x00]
8144
8145 v_trunc_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8146 // CHECK: [0xf9,0x38,0x0a,0x7e,0xc1,0x06,0x86,0x00]
8147
8148 v_trunc_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8149 // CHECK: [0xf9,0x38,0x0a,0x7e,0xf0,0x06,0x86,0x00]
8150
8151 v_trunc_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8152 // CHECK: [0xf9,0x38,0x0a,0x7e,0xf7,0x06,0x86,0x00]
8153
8154 v_trunc_f32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8155 // CHECK: [0xf9,0x38,0x0a,0x7e,0xfb,0x06,0x86,0x00]
8156
8157 v_trunc_f32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8158 // CHECK: [0xf9,0x38,0x0a,0x7e,0xfc,0x06,0x86,0x00]
8159
8160 v_trunc_f32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8161 // CHECK: [0xf9,0x38,0x0a,0x7e,0xfd,0x06,0x86,0x00]
8162
8163 v_trunc_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8164 // CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x26,0x06,0x00]
8165
8166 v_trunc_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8167 // CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x46,0x06,0x00]
8168
8169 v_trunc_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8170 // CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x86,0x06,0x00]
8171
8172 v_trunc_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8173 // CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0xc6,0x06,0x00]
8174
8175 v_trunc_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
8176 // CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x06,0x00]
8177
8178 v_trunc_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
8179 // CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x00,0x06,0x00]
8180
8181 v_trunc_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
8182 // CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x01,0x06,0x00]
8183
8184 v_trunc_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
8185 // CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x02,0x06,0x00]
8186
8187 v_trunc_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
8188 // CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x03,0x06,0x00]
8189
8190 v_trunc_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
8191 // CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x04,0x06,0x00]
8192
8193 v_trunc_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
8194 // CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x05,0x06,0x00]
8195
8196 v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
8197 // CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x0e,0x06,0x00]
8198
8199 v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
8200 // CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x16,0x06,0x00]
8201
8202 v_trunc_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
8203 // CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x16,0x06,0x00]
8204
8205 v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
8206 // CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x06,0x00]
8207
8208 v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
8209 // CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x00,0x00]
8210
8211 v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
8212 // CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x01,0x00]
8213
8214 v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
8215 // CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x02,0x00]
8216
8217 v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
8218 // CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x03,0x00]
8219
8220 v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
8221 // CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x04,0x00]
8222
8223 v_trunc_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
8224 // CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x05,0x00]
8225
8226 v_trunc_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8227 // CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x16,0x00]
8228
8229 v_trunc_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8230 // CHECK: [0xf9,0x38,0x0a,0x7e,0x01,0x06,0x26,0x00]
8231
8232 v_trunc_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8233 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0xe4,0x00,0x00]
8234
8235 v_trunc_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8236 // CHECK: [0xfa,0x38,0xfe,0x7f,0x01,0xe4,0x00,0x00]
8237
8238 v_trunc_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8239 // CHECK: [0xfa,0x38,0x0a,0x7e,0xff,0xe4,0x00,0x00]
8240
8241 v_trunc_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
8242 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x1b,0x00,0x00]
8243
8244 v_trunc_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
8245 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x40,0x01,0x00]
8246
8247 v_trunc_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
8248 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x41,0x01,0x00]
8249
8250 v_trunc_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
8251 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x42,0x01,0x00]
8252
8253 v_trunc_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
8254 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x43,0x01,0x00]
8255
8256 v_trunc_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
8257 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x30,0x01,0x00]
8258
8259 v_trunc_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
8260 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x34,0x01,0x00]
8261
8262 v_trunc_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
8263 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x38,0x01,0x00]
8264
8265 v_trunc_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
8266 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x3c,0x01,0x00]
8267
8268 v_trunc_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
8269 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x01,0x01,0x00]
8270
8271 v_trunc_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
8272 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x0f,0x01,0x00]
8273
8274 v_trunc_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
8275 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x11,0x01,0x00]
8276
8277 v_trunc_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
8278 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x1f,0x01,0x00]
8279
8280 v_trunc_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
8281 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x21,0x01,0x00]
8282
8283 v_trunc_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
8284 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0x2f,0x01,0x00]
8285
8286 v_trunc_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
8287 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0xe4,0x00,0x10]
8288
8289 v_trunc_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
8290 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0xe4,0x00,0x30]
8291
8292 v_trunc_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
8293 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
8294
8295 v_trunc_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
8296 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
8297
8298 v_trunc_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
8299 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0xe4,0x00,0x01]
8300
8301 v_trunc_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
8302 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0xe4,0x00,0x03]
8303
8304 v_trunc_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
8305 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
8306
8307 v_trunc_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
8308 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
8309
8310 v_trunc_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
8311 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0xe4,0x08,0x00]
8312
8313 v_trunc_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8314 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0xe4,0x10,0x00]
8315
8316 v_trunc_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8317 // CHECK: [0xfa,0x38,0x0a,0x7e,0x01,0xe4,0x20,0x00]
8318
8319 v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8320 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x06,0x00]
8321
8322 v_ceil_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8323 // CHECK: [0xf9,0x3a,0xfe,0x7f,0x01,0x06,0x06,0x00]
8324
8325 v_ceil_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8326 // CHECK: [0xf9,0x3a,0x0a,0x7e,0xff,0x06,0x06,0x00]
8327
8328 v_ceil_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8329 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x86,0x00]
8330
8331 v_ceil_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8332 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x65,0x06,0x86,0x00]
8333
8334 v_ceil_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8335 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x66,0x06,0x86,0x00]
8336
8337 v_ceil_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8338 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x67,0x06,0x86,0x00]
8339
8340 v_ceil_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8341 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x6a,0x06,0x86,0x00]
8342
8343 v_ceil_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8344 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x6b,0x06,0x86,0x00]
8345
8346 v_ceil_f32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8347 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x7b,0x06,0x86,0x00]
8348
8349 v_ceil_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8350 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x7c,0x06,0x86,0x00]
8351
8352 v_ceil_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8353 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x7e,0x06,0x86,0x00]
8354
8355 v_ceil_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8356 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x7f,0x06,0x86,0x00]
8357
8358 v_ceil_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8359 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x80,0x06,0x86,0x00]
8360
8361 v_ceil_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8362 // CHECK: [0xf9,0x3a,0x0a,0x7e,0xc1,0x06,0x86,0x00]
8363
8364 v_ceil_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8365 // CHECK: [0xf9,0x3a,0x0a,0x7e,0xf0,0x06,0x86,0x00]
8366
8367 v_ceil_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8368 // CHECK: [0xf9,0x3a,0x0a,0x7e,0xf7,0x06,0x86,0x00]
8369
8370 v_ceil_f32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8371 // CHECK: [0xf9,0x3a,0x0a,0x7e,0xfb,0x06,0x86,0x00]
8372
8373 v_ceil_f32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8374 // CHECK: [0xf9,0x3a,0x0a,0x7e,0xfc,0x06,0x86,0x00]
8375
8376 v_ceil_f32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8377 // CHECK: [0xf9,0x3a,0x0a,0x7e,0xfd,0x06,0x86,0x00]
8378
8379 v_ceil_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8380 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x26,0x06,0x00]
8381
8382 v_ceil_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8383 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x46,0x06,0x00]
8384
8385 v_ceil_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8386 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x86,0x06,0x00]
8387
8388 v_ceil_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8389 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0xc6,0x06,0x00]
8390
8391 v_ceil_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
8392 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x06,0x00]
8393
8394 v_ceil_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
8395 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x00,0x06,0x00]
8396
8397 v_ceil_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
8398 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x01,0x06,0x00]
8399
8400 v_ceil_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
8401 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x02,0x06,0x00]
8402
8403 v_ceil_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
8404 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x03,0x06,0x00]
8405
8406 v_ceil_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
8407 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x04,0x06,0x00]
8408
8409 v_ceil_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
8410 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x05,0x06,0x00]
8411
8412 v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
8413 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x0e,0x06,0x00]
8414
8415 v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
8416 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x16,0x06,0x00]
8417
8418 v_ceil_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
8419 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x16,0x06,0x00]
8420
8421 v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
8422 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x06,0x00]
8423
8424 v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
8425 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x00,0x00]
8426
8427 v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
8428 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x01,0x00]
8429
8430 v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
8431 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x02,0x00]
8432
8433 v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
8434 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x03,0x00]
8435
8436 v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
8437 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x04,0x00]
8438
8439 v_ceil_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
8440 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x05,0x00]
8441
8442 v_ceil_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8443 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x16,0x00]
8444
8445 v_ceil_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8446 // CHECK: [0xf9,0x3a,0x0a,0x7e,0x01,0x06,0x26,0x00]
8447
8448 v_ceil_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8449 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0xe4,0x00,0x00]
8450
8451 v_ceil_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8452 // CHECK: [0xfa,0x3a,0xfe,0x7f,0x01,0xe4,0x00,0x00]
8453
8454 v_ceil_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8455 // CHECK: [0xfa,0x3a,0x0a,0x7e,0xff,0xe4,0x00,0x00]
8456
8457 v_ceil_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
8458 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x1b,0x00,0x00]
8459
8460 v_ceil_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
8461 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x40,0x01,0x00]
8462
8463 v_ceil_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
8464 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x41,0x01,0x00]
8465
8466 v_ceil_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
8467 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x42,0x01,0x00]
8468
8469 v_ceil_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
8470 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x43,0x01,0x00]
8471
8472 v_ceil_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
8473 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x30,0x01,0x00]
8474
8475 v_ceil_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
8476 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x34,0x01,0x00]
8477
8478 v_ceil_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
8479 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x38,0x01,0x00]
8480
8481 v_ceil_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
8482 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x3c,0x01,0x00]
8483
8484 v_ceil_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
8485 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x01,0x01,0x00]
8486
8487 v_ceil_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
8488 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x0f,0x01,0x00]
8489
8490 v_ceil_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
8491 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x11,0x01,0x00]
8492
8493 v_ceil_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
8494 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x1f,0x01,0x00]
8495
8496 v_ceil_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
8497 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x21,0x01,0x00]
8498
8499 v_ceil_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
8500 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0x2f,0x01,0x00]
8501
8502 v_ceil_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
8503 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0xe4,0x00,0x10]
8504
8505 v_ceil_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
8506 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0xe4,0x00,0x30]
8507
8508 v_ceil_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
8509 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
8510
8511 v_ceil_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
8512 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
8513
8514 v_ceil_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
8515 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0xe4,0x00,0x01]
8516
8517 v_ceil_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
8518 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0xe4,0x00,0x03]
8519
8520 v_ceil_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
8521 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
8522
8523 v_ceil_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
8524 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
8525
8526 v_ceil_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
8527 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0xe4,0x08,0x00]
8528
8529 v_ceil_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8530 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0xe4,0x10,0x00]
8531
8532 v_ceil_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8533 // CHECK: [0xfa,0x3a,0x0a,0x7e,0x01,0xe4,0x20,0x00]
8534
8535 v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8536 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x06,0x00]
8537
8538 v_rndne_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8539 // CHECK: [0xf9,0x3c,0xfe,0x7f,0x01,0x06,0x06,0x00]
8540
8541 v_rndne_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8542 // CHECK: [0xf9,0x3c,0x0a,0x7e,0xff,0x06,0x06,0x00]
8543
8544 v_rndne_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8545 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x86,0x00]
8546
8547 v_rndne_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8548 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x65,0x06,0x86,0x00]
8549
8550 v_rndne_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8551 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x66,0x06,0x86,0x00]
8552
8553 v_rndne_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8554 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x67,0x06,0x86,0x00]
8555
8556 v_rndne_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8557 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x6a,0x06,0x86,0x00]
8558
8559 v_rndne_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8560 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x6b,0x06,0x86,0x00]
8561
8562 v_rndne_f32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8563 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x7b,0x06,0x86,0x00]
8564
8565 v_rndne_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8566 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x7c,0x06,0x86,0x00]
8567
8568 v_rndne_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8569 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x7e,0x06,0x86,0x00]
8570
8571 v_rndne_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8572 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x7f,0x06,0x86,0x00]
8573
8574 v_rndne_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8575 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x80,0x06,0x86,0x00]
8576
8577 v_rndne_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8578 // CHECK: [0xf9,0x3c,0x0a,0x7e,0xc1,0x06,0x86,0x00]
8579
8580 v_rndne_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8581 // CHECK: [0xf9,0x3c,0x0a,0x7e,0xf0,0x06,0x86,0x00]
8582
8583 v_rndne_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8584 // CHECK: [0xf9,0x3c,0x0a,0x7e,0xf7,0x06,0x86,0x00]
8585
8586 v_rndne_f32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8587 // CHECK: [0xf9,0x3c,0x0a,0x7e,0xfb,0x06,0x86,0x00]
8588
8589 v_rndne_f32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8590 // CHECK: [0xf9,0x3c,0x0a,0x7e,0xfc,0x06,0x86,0x00]
8591
8592 v_rndne_f32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8593 // CHECK: [0xf9,0x3c,0x0a,0x7e,0xfd,0x06,0x86,0x00]
8594
8595 v_rndne_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8596 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x26,0x06,0x00]
8597
8598 v_rndne_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8599 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x46,0x06,0x00]
8600
8601 v_rndne_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8602 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x86,0x06,0x00]
8603
8604 v_rndne_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8605 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0xc6,0x06,0x00]
8606
8607 v_rndne_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
8608 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x06,0x00]
8609
8610 v_rndne_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
8611 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x00,0x06,0x00]
8612
8613 v_rndne_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
8614 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x01,0x06,0x00]
8615
8616 v_rndne_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
8617 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x02,0x06,0x00]
8618
8619 v_rndne_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
8620 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x03,0x06,0x00]
8621
8622 v_rndne_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
8623 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x04,0x06,0x00]
8624
8625 v_rndne_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
8626 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x05,0x06,0x00]
8627
8628 v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
8629 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x0e,0x06,0x00]
8630
8631 v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
8632 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x16,0x06,0x00]
8633
8634 v_rndne_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
8635 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x16,0x06,0x00]
8636
8637 v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
8638 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x06,0x00]
8639
8640 v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
8641 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x00,0x00]
8642
8643 v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
8644 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x01,0x00]
8645
8646 v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
8647 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x02,0x00]
8648
8649 v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
8650 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x03,0x00]
8651
8652 v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
8653 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x04,0x00]
8654
8655 v_rndne_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
8656 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x05,0x00]
8657
8658 v_rndne_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8659 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x16,0x00]
8660
8661 v_rndne_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8662 // CHECK: [0xf9,0x3c,0x0a,0x7e,0x01,0x06,0x26,0x00]
8663
8664 v_rndne_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8665 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0xe4,0x00,0x00]
8666
8667 v_rndne_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8668 // CHECK: [0xfa,0x3c,0xfe,0x7f,0x01,0xe4,0x00,0x00]
8669
8670 v_rndne_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8671 // CHECK: [0xfa,0x3c,0x0a,0x7e,0xff,0xe4,0x00,0x00]
8672
8673 v_rndne_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
8674 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x1b,0x00,0x00]
8675
8676 v_rndne_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
8677 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x40,0x01,0x00]
8678
8679 v_rndne_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
8680 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x41,0x01,0x00]
8681
8682 v_rndne_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
8683 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x42,0x01,0x00]
8684
8685 v_rndne_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
8686 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x43,0x01,0x00]
8687
8688 v_rndne_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
8689 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x30,0x01,0x00]
8690
8691 v_rndne_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
8692 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x34,0x01,0x00]
8693
8694 v_rndne_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
8695 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x38,0x01,0x00]
8696
8697 v_rndne_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
8698 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x3c,0x01,0x00]
8699
8700 v_rndne_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
8701 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x01,0x01,0x00]
8702
8703 v_rndne_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
8704 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x0f,0x01,0x00]
8705
8706 v_rndne_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
8707 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x11,0x01,0x00]
8708
8709 v_rndne_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
8710 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x1f,0x01,0x00]
8711
8712 v_rndne_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
8713 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x21,0x01,0x00]
8714
8715 v_rndne_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
8716 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0x2f,0x01,0x00]
8717
8718 v_rndne_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
8719 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0xe4,0x00,0x10]
8720
8721 v_rndne_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
8722 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0xe4,0x00,0x30]
8723
8724 v_rndne_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
8725 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
8726
8727 v_rndne_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
8728 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
8729
8730 v_rndne_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
8731 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0xe4,0x00,0x01]
8732
8733 v_rndne_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
8734 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0xe4,0x00,0x03]
8735
8736 v_rndne_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
8737 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
8738
8739 v_rndne_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
8740 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
8741
8742 v_rndne_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
8743 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0xe4,0x08,0x00]
8744
8745 v_rndne_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8746 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0xe4,0x10,0x00]
8747
8748 v_rndne_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8749 // CHECK: [0xfa,0x3c,0x0a,0x7e,0x01,0xe4,0x20,0x00]
8750
8751 v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8752 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x06,0x00]
8753
8754 v_floor_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8755 // CHECK: [0xf9,0x3e,0xfe,0x7f,0x01,0x06,0x06,0x00]
8756
8757 v_floor_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8758 // CHECK: [0xf9,0x3e,0x0a,0x7e,0xff,0x06,0x06,0x00]
8759
8760 v_floor_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8761 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x86,0x00]
8762
8763 v_floor_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8764 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x65,0x06,0x86,0x00]
8765
8766 v_floor_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8767 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x66,0x06,0x86,0x00]
8768
8769 v_floor_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8770 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x67,0x06,0x86,0x00]
8771
8772 v_floor_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8773 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x6a,0x06,0x86,0x00]
8774
8775 v_floor_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8776 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x6b,0x06,0x86,0x00]
8777
8778 v_floor_f32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8779 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x7b,0x06,0x86,0x00]
8780
8781 v_floor_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8782 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x7c,0x06,0x86,0x00]
8783
8784 v_floor_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8785 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x7e,0x06,0x86,0x00]
8786
8787 v_floor_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8788 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x7f,0x06,0x86,0x00]
8789
8790 v_floor_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8791 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x80,0x06,0x86,0x00]
8792
8793 v_floor_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8794 // CHECK: [0xf9,0x3e,0x0a,0x7e,0xc1,0x06,0x86,0x00]
8795
8796 v_floor_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8797 // CHECK: [0xf9,0x3e,0x0a,0x7e,0xf0,0x06,0x86,0x00]
8798
8799 v_floor_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8800 // CHECK: [0xf9,0x3e,0x0a,0x7e,0xf7,0x06,0x86,0x00]
8801
8802 v_floor_f32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8803 // CHECK: [0xf9,0x3e,0x0a,0x7e,0xfb,0x06,0x86,0x00]
8804
8805 v_floor_f32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8806 // CHECK: [0xf9,0x3e,0x0a,0x7e,0xfc,0x06,0x86,0x00]
8807
8808 v_floor_f32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8809 // CHECK: [0xf9,0x3e,0x0a,0x7e,0xfd,0x06,0x86,0x00]
8810
8811 v_floor_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8812 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x26,0x06,0x00]
8813
8814 v_floor_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8815 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x46,0x06,0x00]
8816
8817 v_floor_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8818 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x86,0x06,0x00]
8819
8820 v_floor_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8821 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0xc6,0x06,0x00]
8822
8823 v_floor_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
8824 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x06,0x00]
8825
8826 v_floor_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
8827 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x00,0x06,0x00]
8828
8829 v_floor_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
8830 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x01,0x06,0x00]
8831
8832 v_floor_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
8833 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x02,0x06,0x00]
8834
8835 v_floor_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
8836 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x03,0x06,0x00]
8837
8838 v_floor_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
8839 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x04,0x06,0x00]
8840
8841 v_floor_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
8842 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x05,0x06,0x00]
8843
8844 v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
8845 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x0e,0x06,0x00]
8846
8847 v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
8848 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x16,0x06,0x00]
8849
8850 v_floor_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
8851 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x16,0x06,0x00]
8852
8853 v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
8854 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x06,0x00]
8855
8856 v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
8857 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x00,0x00]
8858
8859 v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
8860 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x01,0x00]
8861
8862 v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
8863 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x02,0x00]
8864
8865 v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
8866 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x03,0x00]
8867
8868 v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
8869 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x04,0x00]
8870
8871 v_floor_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
8872 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x05,0x00]
8873
8874 v_floor_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8875 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x16,0x00]
8876
8877 v_floor_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8878 // CHECK: [0xf9,0x3e,0x0a,0x7e,0x01,0x06,0x26,0x00]
8879
8880 v_floor_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8881 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0xe4,0x00,0x00]
8882
8883 v_floor_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8884 // CHECK: [0xfa,0x3e,0xfe,0x7f,0x01,0xe4,0x00,0x00]
8885
8886 v_floor_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8887 // CHECK: [0xfa,0x3e,0x0a,0x7e,0xff,0xe4,0x00,0x00]
8888
8889 v_floor_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
8890 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x1b,0x00,0x00]
8891
8892 v_floor_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
8893 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x40,0x01,0x00]
8894
8895 v_floor_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
8896 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x41,0x01,0x00]
8897
8898 v_floor_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
8899 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x42,0x01,0x00]
8900
8901 v_floor_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
8902 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x43,0x01,0x00]
8903
8904 v_floor_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
8905 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x30,0x01,0x00]
8906
8907 v_floor_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
8908 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x34,0x01,0x00]
8909
8910 v_floor_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
8911 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x38,0x01,0x00]
8912
8913 v_floor_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
8914 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x3c,0x01,0x00]
8915
8916 v_floor_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
8917 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x01,0x01,0x00]
8918
8919 v_floor_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
8920 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x0f,0x01,0x00]
8921
8922 v_floor_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
8923 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x11,0x01,0x00]
8924
8925 v_floor_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
8926 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x1f,0x01,0x00]
8927
8928 v_floor_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
8929 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x21,0x01,0x00]
8930
8931 v_floor_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
8932 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0x2f,0x01,0x00]
8933
8934 v_floor_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
8935 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0xe4,0x00,0x10]
8936
8937 v_floor_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
8938 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0xe4,0x00,0x30]
8939
8940 v_floor_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
8941 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
8942
8943 v_floor_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
8944 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
8945
8946 v_floor_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
8947 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0xe4,0x00,0x01]
8948
8949 v_floor_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
8950 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0xe4,0x00,0x03]
8951
8952 v_floor_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
8953 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
8954
8955 v_floor_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
8956 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
8957
8958 v_floor_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
8959 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0xe4,0x08,0x00]
8960
8961 v_floor_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8962 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0xe4,0x10,0x00]
8963
8964 v_floor_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
8965 // CHECK: [0xfa,0x3e,0x0a,0x7e,0x01,0xe4,0x20,0x00]
8966
8967 v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8968 // CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x06,0x00]
8969
8970 v_exp_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8971 // CHECK: [0xf9,0x40,0xfe,0x7f,0x01,0x06,0x06,0x00]
8972
8973 v_exp_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8974 // CHECK: [0xf9,0x40,0x0a,0x7e,0xff,0x06,0x06,0x00]
8975
8976 v_exp_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8977 // CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x86,0x00]
8978
8979 v_exp_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8980 // CHECK: [0xf9,0x40,0x0a,0x7e,0x65,0x06,0x86,0x00]
8981
8982 v_exp_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8983 // CHECK: [0xf9,0x40,0x0a,0x7e,0x66,0x06,0x86,0x00]
8984
8985 v_exp_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8986 // CHECK: [0xf9,0x40,0x0a,0x7e,0x67,0x06,0x86,0x00]
8987
8988 v_exp_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8989 // CHECK: [0xf9,0x40,0x0a,0x7e,0x6a,0x06,0x86,0x00]
8990
8991 v_exp_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8992 // CHECK: [0xf9,0x40,0x0a,0x7e,0x6b,0x06,0x86,0x00]
8993
8994 v_exp_f32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8995 // CHECK: [0xf9,0x40,0x0a,0x7e,0x7b,0x06,0x86,0x00]
8996
8997 v_exp_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
8998 // CHECK: [0xf9,0x40,0x0a,0x7e,0x7c,0x06,0x86,0x00]
8999
9000 v_exp_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9001 // CHECK: [0xf9,0x40,0x0a,0x7e,0x7e,0x06,0x86,0x00]
9002
9003 v_exp_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9004 // CHECK: [0xf9,0x40,0x0a,0x7e,0x7f,0x06,0x86,0x00]
9005
9006 v_exp_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9007 // CHECK: [0xf9,0x40,0x0a,0x7e,0x80,0x06,0x86,0x00]
9008
9009 v_exp_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9010 // CHECK: [0xf9,0x40,0x0a,0x7e,0xc1,0x06,0x86,0x00]
9011
9012 v_exp_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9013 // CHECK: [0xf9,0x40,0x0a,0x7e,0xf0,0x06,0x86,0x00]
9014
9015 v_exp_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9016 // CHECK: [0xf9,0x40,0x0a,0x7e,0xf7,0x06,0x86,0x00]
9017
9018 v_exp_f32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9019 // CHECK: [0xf9,0x40,0x0a,0x7e,0xfb,0x06,0x86,0x00]
9020
9021 v_exp_f32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9022 // CHECK: [0xf9,0x40,0x0a,0x7e,0xfc,0x06,0x86,0x00]
9023
9024 v_exp_f32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9025 // CHECK: [0xf9,0x40,0x0a,0x7e,0xfd,0x06,0x86,0x00]
9026
9027 v_exp_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9028 // CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x26,0x06,0x00]
9029
9030 v_exp_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9031 // CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x46,0x06,0x00]
9032
9033 v_exp_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9034 // CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x86,0x06,0x00]
9035
9036 v_exp_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9037 // CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0xc6,0x06,0x00]
9038
9039 v_exp_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
9040 // CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x06,0x00]
9041
9042 v_exp_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
9043 // CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x00,0x06,0x00]
9044
9045 v_exp_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
9046 // CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x01,0x06,0x00]
9047
9048 v_exp_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
9049 // CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x02,0x06,0x00]
9050
9051 v_exp_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
9052 // CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x03,0x06,0x00]
9053
9054 v_exp_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
9055 // CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x04,0x06,0x00]
9056
9057 v_exp_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
9058 // CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x05,0x06,0x00]
9059
9060 v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
9061 // CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x0e,0x06,0x00]
9062
9063 v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
9064 // CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x16,0x06,0x00]
9065
9066 v_exp_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
9067 // CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x16,0x06,0x00]
9068
9069 v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
9070 // CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x06,0x00]
9071
9072 v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
9073 // CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x00,0x00]
9074
9075 v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
9076 // CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x01,0x00]
9077
9078 v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
9079 // CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x02,0x00]
9080
9081 v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
9082 // CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x03,0x00]
9083
9084 v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
9085 // CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x04,0x00]
9086
9087 v_exp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
9088 // CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x05,0x00]
9089
9090 v_exp_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9091 // CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x16,0x00]
9092
9093 v_exp_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9094 // CHECK: [0xf9,0x40,0x0a,0x7e,0x01,0x06,0x26,0x00]
9095
9096 v_exp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9097 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0xe4,0x00,0x00]
9098
9099 v_exp_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9100 // CHECK: [0xfa,0x40,0xfe,0x7f,0x01,0xe4,0x00,0x00]
9101
9102 v_exp_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9103 // CHECK: [0xfa,0x40,0x0a,0x7e,0xff,0xe4,0x00,0x00]
9104
9105 v_exp_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
9106 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x1b,0x00,0x00]
9107
9108 v_exp_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
9109 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x40,0x01,0x00]
9110
9111 v_exp_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
9112 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x41,0x01,0x00]
9113
9114 v_exp_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
9115 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x42,0x01,0x00]
9116
9117 v_exp_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
9118 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x43,0x01,0x00]
9119
9120 v_exp_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
9121 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x30,0x01,0x00]
9122
9123 v_exp_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
9124 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x34,0x01,0x00]
9125
9126 v_exp_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
9127 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x38,0x01,0x00]
9128
9129 v_exp_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
9130 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x3c,0x01,0x00]
9131
9132 v_exp_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
9133 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x01,0x01,0x00]
9134
9135 v_exp_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
9136 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x0f,0x01,0x00]
9137
9138 v_exp_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
9139 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x11,0x01,0x00]
9140
9141 v_exp_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
9142 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x1f,0x01,0x00]
9143
9144 v_exp_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
9145 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x21,0x01,0x00]
9146
9147 v_exp_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
9148 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0x2f,0x01,0x00]
9149
9150 v_exp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
9151 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0xe4,0x00,0x10]
9152
9153 v_exp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
9154 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0xe4,0x00,0x30]
9155
9156 v_exp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
9157 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
9158
9159 v_exp_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
9160 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
9161
9162 v_exp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
9163 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0xe4,0x00,0x01]
9164
9165 v_exp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
9166 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0xe4,0x00,0x03]
9167
9168 v_exp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
9169 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
9170
9171 v_exp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
9172 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
9173
9174 v_exp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
9175 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0xe4,0x08,0x00]
9176
9177 v_exp_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9178 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0xe4,0x10,0x00]
9179
9180 v_exp_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9181 // CHECK: [0xfa,0x40,0x0a,0x7e,0x01,0xe4,0x20,0x00]
9182
9183 v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9184 // CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x06,0x00]
9185
9186 v_log_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9187 // CHECK: [0xf9,0x42,0xfe,0x7f,0x01,0x06,0x06,0x00]
9188
9189 v_log_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9190 // CHECK: [0xf9,0x42,0x0a,0x7e,0xff,0x06,0x06,0x00]
9191
9192 v_log_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9193 // CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x86,0x00]
9194
9195 v_log_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9196 // CHECK: [0xf9,0x42,0x0a,0x7e,0x65,0x06,0x86,0x00]
9197
9198 v_log_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9199 // CHECK: [0xf9,0x42,0x0a,0x7e,0x66,0x06,0x86,0x00]
9200
9201 v_log_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9202 // CHECK: [0xf9,0x42,0x0a,0x7e,0x67,0x06,0x86,0x00]
9203
9204 v_log_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9205 // CHECK: [0xf9,0x42,0x0a,0x7e,0x6a,0x06,0x86,0x00]
9206
9207 v_log_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9208 // CHECK: [0xf9,0x42,0x0a,0x7e,0x6b,0x06,0x86,0x00]
9209
9210 v_log_f32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9211 // CHECK: [0xf9,0x42,0x0a,0x7e,0x7b,0x06,0x86,0x00]
9212
9213 v_log_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9214 // CHECK: [0xf9,0x42,0x0a,0x7e,0x7c,0x06,0x86,0x00]
9215
9216 v_log_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9217 // CHECK: [0xf9,0x42,0x0a,0x7e,0x7e,0x06,0x86,0x00]
9218
9219 v_log_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9220 // CHECK: [0xf9,0x42,0x0a,0x7e,0x7f,0x06,0x86,0x00]
9221
9222 v_log_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9223 // CHECK: [0xf9,0x42,0x0a,0x7e,0x80,0x06,0x86,0x00]
9224
9225 v_log_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9226 // CHECK: [0xf9,0x42,0x0a,0x7e,0xc1,0x06,0x86,0x00]
9227
9228 v_log_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9229 // CHECK: [0xf9,0x42,0x0a,0x7e,0xf0,0x06,0x86,0x00]
9230
9231 v_log_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9232 // CHECK: [0xf9,0x42,0x0a,0x7e,0xf7,0x06,0x86,0x00]
9233
9234 v_log_f32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9235 // CHECK: [0xf9,0x42,0x0a,0x7e,0xfb,0x06,0x86,0x00]
9236
9237 v_log_f32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9238 // CHECK: [0xf9,0x42,0x0a,0x7e,0xfc,0x06,0x86,0x00]
9239
9240 v_log_f32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9241 // CHECK: [0xf9,0x42,0x0a,0x7e,0xfd,0x06,0x86,0x00]
9242
9243 v_log_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9244 // CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x26,0x06,0x00]
9245
9246 v_log_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9247 // CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x46,0x06,0x00]
9248
9249 v_log_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9250 // CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x86,0x06,0x00]
9251
9252 v_log_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9253 // CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0xc6,0x06,0x00]
9254
9255 v_log_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
9256 // CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x06,0x00]
9257
9258 v_log_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
9259 // CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x00,0x06,0x00]
9260
9261 v_log_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
9262 // CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x01,0x06,0x00]
9263
9264 v_log_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
9265 // CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x02,0x06,0x00]
9266
9267 v_log_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
9268 // CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x03,0x06,0x00]
9269
9270 v_log_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
9271 // CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x04,0x06,0x00]
9272
9273 v_log_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
9274 // CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x05,0x06,0x00]
9275
9276 v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
9277 // CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x0e,0x06,0x00]
9278
9279 v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
9280 // CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x16,0x06,0x00]
9281
9282 v_log_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
9283 // CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x16,0x06,0x00]
9284
9285 v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
9286 // CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x06,0x00]
9287
9288 v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
9289 // CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x00,0x00]
9290
9291 v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
9292 // CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x01,0x00]
9293
9294 v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
9295 // CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x02,0x00]
9296
9297 v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
9298 // CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x03,0x00]
9299
9300 v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
9301 // CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x04,0x00]
9302
9303 v_log_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
9304 // CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x05,0x00]
9305
9306 v_log_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9307 // CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x16,0x00]
9308
9309 v_log_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9310 // CHECK: [0xf9,0x42,0x0a,0x7e,0x01,0x06,0x26,0x00]
9311
9312 v_log_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9313 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0xe4,0x00,0x00]
9314
9315 v_log_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9316 // CHECK: [0xfa,0x42,0xfe,0x7f,0x01,0xe4,0x00,0x00]
9317
9318 v_log_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9319 // CHECK: [0xfa,0x42,0x0a,0x7e,0xff,0xe4,0x00,0x00]
9320
9321 v_log_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
9322 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x1b,0x00,0x00]
9323
9324 v_log_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
9325 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x40,0x01,0x00]
9326
9327 v_log_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
9328 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x41,0x01,0x00]
9329
9330 v_log_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
9331 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x42,0x01,0x00]
9332
9333 v_log_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
9334 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x43,0x01,0x00]
9335
9336 v_log_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
9337 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x30,0x01,0x00]
9338
9339 v_log_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
9340 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x34,0x01,0x00]
9341
9342 v_log_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
9343 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x38,0x01,0x00]
9344
9345 v_log_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
9346 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x3c,0x01,0x00]
9347
9348 v_log_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
9349 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x01,0x01,0x00]
9350
9351 v_log_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
9352 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x0f,0x01,0x00]
9353
9354 v_log_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
9355 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x11,0x01,0x00]
9356
9357 v_log_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
9358 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x1f,0x01,0x00]
9359
9360 v_log_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
9361 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x21,0x01,0x00]
9362
9363 v_log_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
9364 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0x2f,0x01,0x00]
9365
9366 v_log_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
9367 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0xe4,0x00,0x10]
9368
9369 v_log_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
9370 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0xe4,0x00,0x30]
9371
9372 v_log_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
9373 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
9374
9375 v_log_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
9376 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
9377
9378 v_log_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
9379 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0xe4,0x00,0x01]
9380
9381 v_log_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
9382 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0xe4,0x00,0x03]
9383
9384 v_log_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
9385 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
9386
9387 v_log_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
9388 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
9389
9390 v_log_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
9391 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0xe4,0x08,0x00]
9392
9393 v_log_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9394 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0xe4,0x10,0x00]
9395
9396 v_log_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9397 // CHECK: [0xfa,0x42,0x0a,0x7e,0x01,0xe4,0x20,0x00]
9398
9399 v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9400 // CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x06,0x00]
9401
9402 v_rcp_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9403 // CHECK: [0xf9,0x44,0xfe,0x7f,0x01,0x06,0x06,0x00]
9404
9405 v_rcp_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9406 // CHECK: [0xf9,0x44,0x0a,0x7e,0xff,0x06,0x06,0x00]
9407
9408 v_rcp_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9409 // CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x86,0x00]
9410
9411 v_rcp_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9412 // CHECK: [0xf9,0x44,0x0a,0x7e,0x65,0x06,0x86,0x00]
9413
9414 v_rcp_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9415 // CHECK: [0xf9,0x44,0x0a,0x7e,0x66,0x06,0x86,0x00]
9416
9417 v_rcp_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9418 // CHECK: [0xf9,0x44,0x0a,0x7e,0x67,0x06,0x86,0x00]
9419
9420 v_rcp_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9421 // CHECK: [0xf9,0x44,0x0a,0x7e,0x6a,0x06,0x86,0x00]
9422
9423 v_rcp_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9424 // CHECK: [0xf9,0x44,0x0a,0x7e,0x6b,0x06,0x86,0x00]
9425
9426 v_rcp_f32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9427 // CHECK: [0xf9,0x44,0x0a,0x7e,0x7b,0x06,0x86,0x00]
9428
9429 v_rcp_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9430 // CHECK: [0xf9,0x44,0x0a,0x7e,0x7c,0x06,0x86,0x00]
9431
9432 v_rcp_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9433 // CHECK: [0xf9,0x44,0x0a,0x7e,0x7e,0x06,0x86,0x00]
9434
9435 v_rcp_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9436 // CHECK: [0xf9,0x44,0x0a,0x7e,0x7f,0x06,0x86,0x00]
9437
9438 v_rcp_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9439 // CHECK: [0xf9,0x44,0x0a,0x7e,0x80,0x06,0x86,0x00]
9440
9441 v_rcp_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9442 // CHECK: [0xf9,0x44,0x0a,0x7e,0xc1,0x06,0x86,0x00]
9443
9444 v_rcp_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9445 // CHECK: [0xf9,0x44,0x0a,0x7e,0xf0,0x06,0x86,0x00]
9446
9447 v_rcp_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9448 // CHECK: [0xf9,0x44,0x0a,0x7e,0xf7,0x06,0x86,0x00]
9449
9450 v_rcp_f32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9451 // CHECK: [0xf9,0x44,0x0a,0x7e,0xfb,0x06,0x86,0x00]
9452
9453 v_rcp_f32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9454 // CHECK: [0xf9,0x44,0x0a,0x7e,0xfc,0x06,0x86,0x00]
9455
9456 v_rcp_f32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9457 // CHECK: [0xf9,0x44,0x0a,0x7e,0xfd,0x06,0x86,0x00]
9458
9459 v_rcp_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9460 // CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x26,0x06,0x00]
9461
9462 v_rcp_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9463 // CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x46,0x06,0x00]
9464
9465 v_rcp_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9466 // CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x86,0x06,0x00]
9467
9468 v_rcp_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9469 // CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0xc6,0x06,0x00]
9470
9471 v_rcp_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
9472 // CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x06,0x00]
9473
9474 v_rcp_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
9475 // CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x00,0x06,0x00]
9476
9477 v_rcp_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
9478 // CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x01,0x06,0x00]
9479
9480 v_rcp_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
9481 // CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x02,0x06,0x00]
9482
9483 v_rcp_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
9484 // CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x03,0x06,0x00]
9485
9486 v_rcp_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
9487 // CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x04,0x06,0x00]
9488
9489 v_rcp_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
9490 // CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x05,0x06,0x00]
9491
9492 v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
9493 // CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x0e,0x06,0x00]
9494
9495 v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
9496 // CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x16,0x06,0x00]
9497
9498 v_rcp_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
9499 // CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x16,0x06,0x00]
9500
9501 v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
9502 // CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x06,0x00]
9503
9504 v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
9505 // CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x00,0x00]
9506
9507 v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
9508 // CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x01,0x00]
9509
9510 v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
9511 // CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x02,0x00]
9512
9513 v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
9514 // CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x03,0x00]
9515
9516 v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
9517 // CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x04,0x00]
9518
9519 v_rcp_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
9520 // CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x05,0x00]
9521
9522 v_rcp_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9523 // CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x16,0x00]
9524
9525 v_rcp_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9526 // CHECK: [0xf9,0x44,0x0a,0x7e,0x01,0x06,0x26,0x00]
9527
9528 v_rcp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9529 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0xe4,0x00,0x00]
9530
9531 v_rcp_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9532 // CHECK: [0xfa,0x44,0xfe,0x7f,0x01,0xe4,0x00,0x00]
9533
9534 v_rcp_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9535 // CHECK: [0xfa,0x44,0x0a,0x7e,0xff,0xe4,0x00,0x00]
9536
9537 v_rcp_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
9538 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x1b,0x00,0x00]
9539
9540 v_rcp_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
9541 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x40,0x01,0x00]
9542
9543 v_rcp_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
9544 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x41,0x01,0x00]
9545
9546 v_rcp_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
9547 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x42,0x01,0x00]
9548
9549 v_rcp_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
9550 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x43,0x01,0x00]
9551
9552 v_rcp_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
9553 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x30,0x01,0x00]
9554
9555 v_rcp_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
9556 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x34,0x01,0x00]
9557
9558 v_rcp_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
9559 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x38,0x01,0x00]
9560
9561 v_rcp_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
9562 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x3c,0x01,0x00]
9563
9564 v_rcp_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
9565 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x01,0x01,0x00]
9566
9567 v_rcp_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
9568 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x0f,0x01,0x00]
9569
9570 v_rcp_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
9571 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x11,0x01,0x00]
9572
9573 v_rcp_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
9574 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x1f,0x01,0x00]
9575
9576 v_rcp_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
9577 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x21,0x01,0x00]
9578
9579 v_rcp_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
9580 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0x2f,0x01,0x00]
9581
9582 v_rcp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
9583 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0xe4,0x00,0x10]
9584
9585 v_rcp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
9586 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0xe4,0x00,0x30]
9587
9588 v_rcp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
9589 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
9590
9591 v_rcp_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
9592 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
9593
9594 v_rcp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
9595 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0xe4,0x00,0x01]
9596
9597 v_rcp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
9598 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0xe4,0x00,0x03]
9599
9600 v_rcp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
9601 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
9602
9603 v_rcp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
9604 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
9605
9606 v_rcp_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
9607 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0xe4,0x08,0x00]
9608
9609 v_rcp_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9610 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0xe4,0x10,0x00]
9611
9612 v_rcp_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9613 // CHECK: [0xfa,0x44,0x0a,0x7e,0x01,0xe4,0x20,0x00]
9614
9615 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9616 // CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x06,0x00]
9617
9618 v_rcp_iflag_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9619 // CHECK: [0xf9,0x46,0xfe,0x7f,0x01,0x06,0x06,0x00]
9620
9621 v_rcp_iflag_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9622 // CHECK: [0xf9,0x46,0x0a,0x7e,0xff,0x06,0x06,0x00]
9623
9624 v_rcp_iflag_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9625 // CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x86,0x00]
9626
9627 v_rcp_iflag_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9628 // CHECK: [0xf9,0x46,0x0a,0x7e,0x65,0x06,0x86,0x00]
9629
9630 v_rcp_iflag_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9631 // CHECK: [0xf9,0x46,0x0a,0x7e,0x66,0x06,0x86,0x00]
9632
9633 v_rcp_iflag_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9634 // CHECK: [0xf9,0x46,0x0a,0x7e,0x67,0x06,0x86,0x00]
9635
9636 v_rcp_iflag_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9637 // CHECK: [0xf9,0x46,0x0a,0x7e,0x6a,0x06,0x86,0x00]
9638
9639 v_rcp_iflag_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9640 // CHECK: [0xf9,0x46,0x0a,0x7e,0x6b,0x06,0x86,0x00]
9641
9642 v_rcp_iflag_f32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9643 // CHECK: [0xf9,0x46,0x0a,0x7e,0x7b,0x06,0x86,0x00]
9644
9645 v_rcp_iflag_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9646 // CHECK: [0xf9,0x46,0x0a,0x7e,0x7c,0x06,0x86,0x00]
9647
9648 v_rcp_iflag_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9649 // CHECK: [0xf9,0x46,0x0a,0x7e,0x7e,0x06,0x86,0x00]
9650
9651 v_rcp_iflag_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9652 // CHECK: [0xf9,0x46,0x0a,0x7e,0x7f,0x06,0x86,0x00]
9653
9654 v_rcp_iflag_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9655 // CHECK: [0xf9,0x46,0x0a,0x7e,0x80,0x06,0x86,0x00]
9656
9657 v_rcp_iflag_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9658 // CHECK: [0xf9,0x46,0x0a,0x7e,0xc1,0x06,0x86,0x00]
9659
9660 v_rcp_iflag_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9661 // CHECK: [0xf9,0x46,0x0a,0x7e,0xf0,0x06,0x86,0x00]
9662
9663 v_rcp_iflag_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9664 // CHECK: [0xf9,0x46,0x0a,0x7e,0xf7,0x06,0x86,0x00]
9665
9666 v_rcp_iflag_f32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9667 // CHECK: [0xf9,0x46,0x0a,0x7e,0xfb,0x06,0x86,0x00]
9668
9669 v_rcp_iflag_f32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9670 // CHECK: [0xf9,0x46,0x0a,0x7e,0xfc,0x06,0x86,0x00]
9671
9672 v_rcp_iflag_f32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9673 // CHECK: [0xf9,0x46,0x0a,0x7e,0xfd,0x06,0x86,0x00]
9674
9675 v_rcp_iflag_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9676 // CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x26,0x06,0x00]
9677
9678 v_rcp_iflag_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9679 // CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x46,0x06,0x00]
9680
9681 v_rcp_iflag_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9682 // CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x86,0x06,0x00]
9683
9684 v_rcp_iflag_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9685 // CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0xc6,0x06,0x00]
9686
9687 v_rcp_iflag_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
9688 // CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x06,0x00]
9689
9690 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
9691 // CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x00,0x06,0x00]
9692
9693 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
9694 // CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x01,0x06,0x00]
9695
9696 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
9697 // CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x02,0x06,0x00]
9698
9699 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
9700 // CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x03,0x06,0x00]
9701
9702 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
9703 // CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x04,0x06,0x00]
9704
9705 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
9706 // CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x05,0x06,0x00]
9707
9708 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
9709 // CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x0e,0x06,0x00]
9710
9711 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
9712 // CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x16,0x06,0x00]
9713
9714 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
9715 // CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x16,0x06,0x00]
9716
9717 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
9718 // CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x06,0x00]
9719
9720 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
9721 // CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x00,0x00]
9722
9723 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
9724 // CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x01,0x00]
9725
9726 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
9727 // CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x02,0x00]
9728
9729 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
9730 // CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x03,0x00]
9731
9732 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
9733 // CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x04,0x00]
9734
9735 v_rcp_iflag_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
9736 // CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x05,0x00]
9737
9738 v_rcp_iflag_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9739 // CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x16,0x00]
9740
9741 v_rcp_iflag_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9742 // CHECK: [0xf9,0x46,0x0a,0x7e,0x01,0x06,0x26,0x00]
9743
9744 v_rcp_iflag_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9745 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0xe4,0x00,0x00]
9746
9747 v_rcp_iflag_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9748 // CHECK: [0xfa,0x46,0xfe,0x7f,0x01,0xe4,0x00,0x00]
9749
9750 v_rcp_iflag_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9751 // CHECK: [0xfa,0x46,0x0a,0x7e,0xff,0xe4,0x00,0x00]
9752
9753 v_rcp_iflag_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
9754 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x1b,0x00,0x00]
9755
9756 v_rcp_iflag_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
9757 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x40,0x01,0x00]
9758
9759 v_rcp_iflag_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
9760 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x41,0x01,0x00]
9761
9762 v_rcp_iflag_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
9763 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x42,0x01,0x00]
9764
9765 v_rcp_iflag_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
9766 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x43,0x01,0x00]
9767
9768 v_rcp_iflag_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
9769 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x30,0x01,0x00]
9770
9771 v_rcp_iflag_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
9772 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x34,0x01,0x00]
9773
9774 v_rcp_iflag_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
9775 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x38,0x01,0x00]
9776
9777 v_rcp_iflag_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
9778 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x3c,0x01,0x00]
9779
9780 v_rcp_iflag_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
9781 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x01,0x01,0x00]
9782
9783 v_rcp_iflag_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
9784 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x0f,0x01,0x00]
9785
9786 v_rcp_iflag_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
9787 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x11,0x01,0x00]
9788
9789 v_rcp_iflag_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
9790 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x1f,0x01,0x00]
9791
9792 v_rcp_iflag_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
9793 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x21,0x01,0x00]
9794
9795 v_rcp_iflag_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
9796 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0x2f,0x01,0x00]
9797
9798 v_rcp_iflag_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
9799 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0xe4,0x00,0x10]
9800
9801 v_rcp_iflag_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
9802 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0xe4,0x00,0x30]
9803
9804 v_rcp_iflag_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
9805 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
9806
9807 v_rcp_iflag_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
9808 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
9809
9810 v_rcp_iflag_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
9811 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0xe4,0x00,0x01]
9812
9813 v_rcp_iflag_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
9814 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0xe4,0x00,0x03]
9815
9816 v_rcp_iflag_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
9817 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
9818
9819 v_rcp_iflag_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
9820 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
9821
9822 v_rcp_iflag_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
9823 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0xe4,0x08,0x00]
9824
9825 v_rcp_iflag_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9826 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0xe4,0x10,0x00]
9827
9828 v_rcp_iflag_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9829 // CHECK: [0xfa,0x46,0x0a,0x7e,0x01,0xe4,0x20,0x00]
9830
9831 v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9832 // CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x06,0x00]
9833
9834 v_rsq_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9835 // CHECK: [0xf9,0x48,0xfe,0x7f,0x01,0x06,0x06,0x00]
9836
9837 v_rsq_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9838 // CHECK: [0xf9,0x48,0x0a,0x7e,0xff,0x06,0x06,0x00]
9839
9840 v_rsq_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9841 // CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x86,0x00]
9842
9843 v_rsq_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9844 // CHECK: [0xf9,0x48,0x0a,0x7e,0x65,0x06,0x86,0x00]
9845
9846 v_rsq_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9847 // CHECK: [0xf9,0x48,0x0a,0x7e,0x66,0x06,0x86,0x00]
9848
9849 v_rsq_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9850 // CHECK: [0xf9,0x48,0x0a,0x7e,0x67,0x06,0x86,0x00]
9851
9852 v_rsq_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9853 // CHECK: [0xf9,0x48,0x0a,0x7e,0x6a,0x06,0x86,0x00]
9854
9855 v_rsq_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9856 // CHECK: [0xf9,0x48,0x0a,0x7e,0x6b,0x06,0x86,0x00]
9857
9858 v_rsq_f32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9859 // CHECK: [0xf9,0x48,0x0a,0x7e,0x7b,0x06,0x86,0x00]
9860
9861 v_rsq_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9862 // CHECK: [0xf9,0x48,0x0a,0x7e,0x7c,0x06,0x86,0x00]
9863
9864 v_rsq_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9865 // CHECK: [0xf9,0x48,0x0a,0x7e,0x7e,0x06,0x86,0x00]
9866
9867 v_rsq_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9868 // CHECK: [0xf9,0x48,0x0a,0x7e,0x7f,0x06,0x86,0x00]
9869
9870 v_rsq_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9871 // CHECK: [0xf9,0x48,0x0a,0x7e,0x80,0x06,0x86,0x00]
9872
9873 v_rsq_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9874 // CHECK: [0xf9,0x48,0x0a,0x7e,0xc1,0x06,0x86,0x00]
9875
9876 v_rsq_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9877 // CHECK: [0xf9,0x48,0x0a,0x7e,0xf0,0x06,0x86,0x00]
9878
9879 v_rsq_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9880 // CHECK: [0xf9,0x48,0x0a,0x7e,0xf7,0x06,0x86,0x00]
9881
9882 v_rsq_f32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9883 // CHECK: [0xf9,0x48,0x0a,0x7e,0xfb,0x06,0x86,0x00]
9884
9885 v_rsq_f32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9886 // CHECK: [0xf9,0x48,0x0a,0x7e,0xfc,0x06,0x86,0x00]
9887
9888 v_rsq_f32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9889 // CHECK: [0xf9,0x48,0x0a,0x7e,0xfd,0x06,0x86,0x00]
9890
9891 v_rsq_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9892 // CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x26,0x06,0x00]
9893
9894 v_rsq_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9895 // CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x46,0x06,0x00]
9896
9897 v_rsq_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9898 // CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x86,0x06,0x00]
9899
9900 v_rsq_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9901 // CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0xc6,0x06,0x00]
9902
9903 v_rsq_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
9904 // CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x06,0x00]
9905
9906 v_rsq_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
9907 // CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x00,0x06,0x00]
9908
9909 v_rsq_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
9910 // CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x01,0x06,0x00]
9911
9912 v_rsq_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
9913 // CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x02,0x06,0x00]
9914
9915 v_rsq_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
9916 // CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x03,0x06,0x00]
9917
9918 v_rsq_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
9919 // CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x04,0x06,0x00]
9920
9921 v_rsq_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
9922 // CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x05,0x06,0x00]
9923
9924 v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
9925 // CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x0e,0x06,0x00]
9926
9927 v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
9928 // CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x16,0x06,0x00]
9929
9930 v_rsq_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
9931 // CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x16,0x06,0x00]
9932
9933 v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
9934 // CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x06,0x00]
9935
9936 v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
9937 // CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x00,0x00]
9938
9939 v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
9940 // CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x01,0x00]
9941
9942 v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
9943 // CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x02,0x00]
9944
9945 v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
9946 // CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x03,0x00]
9947
9948 v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
9949 // CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x04,0x00]
9950
9951 v_rsq_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
9952 // CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x05,0x00]
9953
9954 v_rsq_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9955 // CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x16,0x00]
9956
9957 v_rsq_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
9958 // CHECK: [0xf9,0x48,0x0a,0x7e,0x01,0x06,0x26,0x00]
9959
9960 v_rsq_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9961 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0xe4,0x00,0x00]
9962
9963 v_rsq_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9964 // CHECK: [0xfa,0x48,0xfe,0x7f,0x01,0xe4,0x00,0x00]
9965
9966 v_rsq_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
9967 // CHECK: [0xfa,0x48,0x0a,0x7e,0xff,0xe4,0x00,0x00]
9968
9969 v_rsq_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
9970 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x1b,0x00,0x00]
9971
9972 v_rsq_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
9973 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x40,0x01,0x00]
9974
9975 v_rsq_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
9976 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x41,0x01,0x00]
9977
9978 v_rsq_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
9979 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x42,0x01,0x00]
9980
9981 v_rsq_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
9982 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x43,0x01,0x00]
9983
9984 v_rsq_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
9985 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x30,0x01,0x00]
9986
9987 v_rsq_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
9988 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x34,0x01,0x00]
9989
9990 v_rsq_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
9991 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x38,0x01,0x00]
9992
9993 v_rsq_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
9994 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x3c,0x01,0x00]
9995
9996 v_rsq_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
9997 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x01,0x01,0x00]
9998
9999 v_rsq_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
10000 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x0f,0x01,0x00]
10001
10002 v_rsq_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
10003 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x11,0x01,0x00]
10004
10005 v_rsq_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
10006 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x1f,0x01,0x00]
10007
10008 v_rsq_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
10009 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x21,0x01,0x00]
10010
10011 v_rsq_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
10012 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0x2f,0x01,0x00]
10013
10014 v_rsq_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
10015 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0xe4,0x00,0x10]
10016
10017 v_rsq_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
10018 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0xe4,0x00,0x30]
10019
10020 v_rsq_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
10021 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
10022
10023 v_rsq_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
10024 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
10025
10026 v_rsq_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
10027 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0xe4,0x00,0x01]
10028
10029 v_rsq_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
10030 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0xe4,0x00,0x03]
10031
10032 v_rsq_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
10033 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
10034
10035 v_rsq_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
10036 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
10037
10038 v_rsq_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
10039 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0xe4,0x08,0x00]
10040
10041 v_rsq_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10042 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0xe4,0x10,0x00]
10043
10044 v_rsq_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10045 // CHECK: [0xfa,0x48,0x0a,0x7e,0x01,0xe4,0x20,0x00]
10046
10047 v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10048 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x06,0x00]
10049
10050 v_sqrt_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10051 // CHECK: [0xf9,0x4e,0xfe,0x7f,0x01,0x06,0x06,0x00]
10052
10053 v_sqrt_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10054 // CHECK: [0xf9,0x4e,0x0a,0x7e,0xff,0x06,0x06,0x00]
10055
10056 v_sqrt_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10057 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x86,0x00]
10058
10059 v_sqrt_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10060 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x65,0x06,0x86,0x00]
10061
10062 v_sqrt_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10063 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x66,0x06,0x86,0x00]
10064
10065 v_sqrt_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10066 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x67,0x06,0x86,0x00]
10067
10068 v_sqrt_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10069 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x6a,0x06,0x86,0x00]
10070
10071 v_sqrt_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10072 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x6b,0x06,0x86,0x00]
10073
10074 v_sqrt_f32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10075 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x7b,0x06,0x86,0x00]
10076
10077 v_sqrt_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10078 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x7c,0x06,0x86,0x00]
10079
10080 v_sqrt_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10081 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x7e,0x06,0x86,0x00]
10082
10083 v_sqrt_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10084 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x7f,0x06,0x86,0x00]
10085
10086 v_sqrt_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10087 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x80,0x06,0x86,0x00]
10088
10089 v_sqrt_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10090 // CHECK: [0xf9,0x4e,0x0a,0x7e,0xc1,0x06,0x86,0x00]
10091
10092 v_sqrt_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10093 // CHECK: [0xf9,0x4e,0x0a,0x7e,0xf0,0x06,0x86,0x00]
10094
10095 v_sqrt_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10096 // CHECK: [0xf9,0x4e,0x0a,0x7e,0xf7,0x06,0x86,0x00]
10097
10098 v_sqrt_f32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10099 // CHECK: [0xf9,0x4e,0x0a,0x7e,0xfb,0x06,0x86,0x00]
10100
10101 v_sqrt_f32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10102 // CHECK: [0xf9,0x4e,0x0a,0x7e,0xfc,0x06,0x86,0x00]
10103
10104 v_sqrt_f32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10105 // CHECK: [0xf9,0x4e,0x0a,0x7e,0xfd,0x06,0x86,0x00]
10106
10107 v_sqrt_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10108 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x26,0x06,0x00]
10109
10110 v_sqrt_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10111 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x46,0x06,0x00]
10112
10113 v_sqrt_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10114 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x86,0x06,0x00]
10115
10116 v_sqrt_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10117 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0xc6,0x06,0x00]
10118
10119 v_sqrt_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
10120 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x06,0x00]
10121
10122 v_sqrt_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
10123 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x00,0x06,0x00]
10124
10125 v_sqrt_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
10126 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x01,0x06,0x00]
10127
10128 v_sqrt_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
10129 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x02,0x06,0x00]
10130
10131 v_sqrt_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
10132 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x03,0x06,0x00]
10133
10134 v_sqrt_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
10135 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x04,0x06,0x00]
10136
10137 v_sqrt_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
10138 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x05,0x06,0x00]
10139
10140 v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
10141 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x0e,0x06,0x00]
10142
10143 v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
10144 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x16,0x06,0x00]
10145
10146 v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
10147 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x16,0x06,0x00]
10148
10149 v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
10150 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x06,0x00]
10151
10152 v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
10153 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x00,0x00]
10154
10155 v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
10156 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x01,0x00]
10157
10158 v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
10159 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x02,0x00]
10160
10161 v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
10162 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x03,0x00]
10163
10164 v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
10165 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x04,0x00]
10166
10167 v_sqrt_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
10168 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x05,0x00]
10169
10170 v_sqrt_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10171 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x16,0x00]
10172
10173 v_sqrt_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10174 // CHECK: [0xf9,0x4e,0x0a,0x7e,0x01,0x06,0x26,0x00]
10175
10176 v_sqrt_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10177 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0xe4,0x00,0x00]
10178
10179 v_sqrt_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10180 // CHECK: [0xfa,0x4e,0xfe,0x7f,0x01,0xe4,0x00,0x00]
10181
10182 v_sqrt_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10183 // CHECK: [0xfa,0x4e,0x0a,0x7e,0xff,0xe4,0x00,0x00]
10184
10185 v_sqrt_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
10186 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x1b,0x00,0x00]
10187
10188 v_sqrt_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
10189 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x40,0x01,0x00]
10190
10191 v_sqrt_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
10192 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x41,0x01,0x00]
10193
10194 v_sqrt_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
10195 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x42,0x01,0x00]
10196
10197 v_sqrt_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
10198 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x43,0x01,0x00]
10199
10200 v_sqrt_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
10201 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x30,0x01,0x00]
10202
10203 v_sqrt_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
10204 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x34,0x01,0x00]
10205
10206 v_sqrt_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
10207 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x38,0x01,0x00]
10208
10209 v_sqrt_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
10210 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x3c,0x01,0x00]
10211
10212 v_sqrt_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
10213 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x01,0x01,0x00]
10214
10215 v_sqrt_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
10216 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x0f,0x01,0x00]
10217
10218 v_sqrt_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
10219 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x11,0x01,0x00]
10220
10221 v_sqrt_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
10222 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x1f,0x01,0x00]
10223
10224 v_sqrt_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
10225 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x21,0x01,0x00]
10226
10227 v_sqrt_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
10228 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0x2f,0x01,0x00]
10229
10230 v_sqrt_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
10231 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0xe4,0x00,0x10]
10232
10233 v_sqrt_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
10234 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0xe4,0x00,0x30]
10235
10236 v_sqrt_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
10237 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
10238
10239 v_sqrt_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
10240 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
10241
10242 v_sqrt_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
10243 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0xe4,0x00,0x01]
10244
10245 v_sqrt_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
10246 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0xe4,0x00,0x03]
10247
10248 v_sqrt_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
10249 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
10250
10251 v_sqrt_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
10252 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
10253
10254 v_sqrt_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
10255 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0xe4,0x08,0x00]
10256
10257 v_sqrt_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10258 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0xe4,0x10,0x00]
10259
10260 v_sqrt_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10261 // CHECK: [0xfa,0x4e,0x0a,0x7e,0x01,0xe4,0x20,0x00]
10262
10263 v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10264 // CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x06,0x00]
10265
10266 v_sin_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10267 // CHECK: [0xf9,0x52,0xfe,0x7f,0x01,0x06,0x06,0x00]
10268
10269 v_sin_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10270 // CHECK: [0xf9,0x52,0x0a,0x7e,0xff,0x06,0x06,0x00]
10271
10272 v_sin_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10273 // CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x86,0x00]
10274
10275 v_sin_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10276 // CHECK: [0xf9,0x52,0x0a,0x7e,0x65,0x06,0x86,0x00]
10277
10278 v_sin_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10279 // CHECK: [0xf9,0x52,0x0a,0x7e,0x66,0x06,0x86,0x00]
10280
10281 v_sin_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10282 // CHECK: [0xf9,0x52,0x0a,0x7e,0x67,0x06,0x86,0x00]
10283
10284 v_sin_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10285 // CHECK: [0xf9,0x52,0x0a,0x7e,0x6a,0x06,0x86,0x00]
10286
10287 v_sin_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10288 // CHECK: [0xf9,0x52,0x0a,0x7e,0x6b,0x06,0x86,0x00]
10289
10290 v_sin_f32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10291 // CHECK: [0xf9,0x52,0x0a,0x7e,0x7b,0x06,0x86,0x00]
10292
10293 v_sin_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10294 // CHECK: [0xf9,0x52,0x0a,0x7e,0x7c,0x06,0x86,0x00]
10295
10296 v_sin_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10297 // CHECK: [0xf9,0x52,0x0a,0x7e,0x7e,0x06,0x86,0x00]
10298
10299 v_sin_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10300 // CHECK: [0xf9,0x52,0x0a,0x7e,0x7f,0x06,0x86,0x00]
10301
10302 v_sin_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10303 // CHECK: [0xf9,0x52,0x0a,0x7e,0x80,0x06,0x86,0x00]
10304
10305 v_sin_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10306 // CHECK: [0xf9,0x52,0x0a,0x7e,0xc1,0x06,0x86,0x00]
10307
10308 v_sin_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10309 // CHECK: [0xf9,0x52,0x0a,0x7e,0xf0,0x06,0x86,0x00]
10310
10311 v_sin_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10312 // CHECK: [0xf9,0x52,0x0a,0x7e,0xf7,0x06,0x86,0x00]
10313
10314 v_sin_f32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10315 // CHECK: [0xf9,0x52,0x0a,0x7e,0xfb,0x06,0x86,0x00]
10316
10317 v_sin_f32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10318 // CHECK: [0xf9,0x52,0x0a,0x7e,0xfc,0x06,0x86,0x00]
10319
10320 v_sin_f32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10321 // CHECK: [0xf9,0x52,0x0a,0x7e,0xfd,0x06,0x86,0x00]
10322
10323 v_sin_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10324 // CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x26,0x06,0x00]
10325
10326 v_sin_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10327 // CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x46,0x06,0x00]
10328
10329 v_sin_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10330 // CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x86,0x06,0x00]
10331
10332 v_sin_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10333 // CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0xc6,0x06,0x00]
10334
10335 v_sin_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
10336 // CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x06,0x00]
10337
10338 v_sin_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
10339 // CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x00,0x06,0x00]
10340
10341 v_sin_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
10342 // CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x01,0x06,0x00]
10343
10344 v_sin_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
10345 // CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x02,0x06,0x00]
10346
10347 v_sin_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
10348 // CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x03,0x06,0x00]
10349
10350 v_sin_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
10351 // CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x04,0x06,0x00]
10352
10353 v_sin_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
10354 // CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x05,0x06,0x00]
10355
10356 v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
10357 // CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x0e,0x06,0x00]
10358
10359 v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
10360 // CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x16,0x06,0x00]
10361
10362 v_sin_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
10363 // CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x16,0x06,0x00]
10364
10365 v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
10366 // CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x06,0x00]
10367
10368 v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
10369 // CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x00,0x00]
10370
10371 v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
10372 // CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x01,0x00]
10373
10374 v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
10375 // CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x02,0x00]
10376
10377 v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
10378 // CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x03,0x00]
10379
10380 v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
10381 // CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x04,0x00]
10382
10383 v_sin_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
10384 // CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x05,0x00]
10385
10386 v_sin_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10387 // CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x16,0x00]
10388
10389 v_sin_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10390 // CHECK: [0xf9,0x52,0x0a,0x7e,0x01,0x06,0x26,0x00]
10391
10392 v_sin_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10393 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0xe4,0x00,0x00]
10394
10395 v_sin_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10396 // CHECK: [0xfa,0x52,0xfe,0x7f,0x01,0xe4,0x00,0x00]
10397
10398 v_sin_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10399 // CHECK: [0xfa,0x52,0x0a,0x7e,0xff,0xe4,0x00,0x00]
10400
10401 v_sin_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
10402 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x1b,0x00,0x00]
10403
10404 v_sin_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
10405 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x40,0x01,0x00]
10406
10407 v_sin_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
10408 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x41,0x01,0x00]
10409
10410 v_sin_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
10411 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x42,0x01,0x00]
10412
10413 v_sin_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
10414 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x43,0x01,0x00]
10415
10416 v_sin_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
10417 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x30,0x01,0x00]
10418
10419 v_sin_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
10420 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x34,0x01,0x00]
10421
10422 v_sin_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
10423 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x38,0x01,0x00]
10424
10425 v_sin_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
10426 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x3c,0x01,0x00]
10427
10428 v_sin_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
10429 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x01,0x01,0x00]
10430
10431 v_sin_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
10432 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x0f,0x01,0x00]
10433
10434 v_sin_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
10435 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x11,0x01,0x00]
10436
10437 v_sin_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
10438 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x1f,0x01,0x00]
10439
10440 v_sin_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
10441 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x21,0x01,0x00]
10442
10443 v_sin_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
10444 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0x2f,0x01,0x00]
10445
10446 v_sin_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
10447 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0xe4,0x00,0x10]
10448
10449 v_sin_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
10450 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0xe4,0x00,0x30]
10451
10452 v_sin_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
10453 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
10454
10455 v_sin_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
10456 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
10457
10458 v_sin_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
10459 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0xe4,0x00,0x01]
10460
10461 v_sin_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
10462 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0xe4,0x00,0x03]
10463
10464 v_sin_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
10465 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
10466
10467 v_sin_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
10468 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
10469
10470 v_sin_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
10471 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0xe4,0x08,0x00]
10472
10473 v_sin_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10474 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0xe4,0x10,0x00]
10475
10476 v_sin_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10477 // CHECK: [0xfa,0x52,0x0a,0x7e,0x01,0xe4,0x20,0x00]
10478
10479 v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10480 // CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x06,0x00]
10481
10482 v_cos_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10483 // CHECK: [0xf9,0x54,0xfe,0x7f,0x01,0x06,0x06,0x00]
10484
10485 v_cos_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10486 // CHECK: [0xf9,0x54,0x0a,0x7e,0xff,0x06,0x06,0x00]
10487
10488 v_cos_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10489 // CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x86,0x00]
10490
10491 v_cos_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10492 // CHECK: [0xf9,0x54,0x0a,0x7e,0x65,0x06,0x86,0x00]
10493
10494 v_cos_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10495 // CHECK: [0xf9,0x54,0x0a,0x7e,0x66,0x06,0x86,0x00]
10496
10497 v_cos_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10498 // CHECK: [0xf9,0x54,0x0a,0x7e,0x67,0x06,0x86,0x00]
10499
10500 v_cos_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10501 // CHECK: [0xf9,0x54,0x0a,0x7e,0x6a,0x06,0x86,0x00]
10502
10503 v_cos_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10504 // CHECK: [0xf9,0x54,0x0a,0x7e,0x6b,0x06,0x86,0x00]
10505
10506 v_cos_f32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10507 // CHECK: [0xf9,0x54,0x0a,0x7e,0x7b,0x06,0x86,0x00]
10508
10509 v_cos_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10510 // CHECK: [0xf9,0x54,0x0a,0x7e,0x7c,0x06,0x86,0x00]
10511
10512 v_cos_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10513 // CHECK: [0xf9,0x54,0x0a,0x7e,0x7e,0x06,0x86,0x00]
10514
10515 v_cos_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10516 // CHECK: [0xf9,0x54,0x0a,0x7e,0x7f,0x06,0x86,0x00]
10517
10518 v_cos_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10519 // CHECK: [0xf9,0x54,0x0a,0x7e,0x80,0x06,0x86,0x00]
10520
10521 v_cos_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10522 // CHECK: [0xf9,0x54,0x0a,0x7e,0xc1,0x06,0x86,0x00]
10523
10524 v_cos_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10525 // CHECK: [0xf9,0x54,0x0a,0x7e,0xf0,0x06,0x86,0x00]
10526
10527 v_cos_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10528 // CHECK: [0xf9,0x54,0x0a,0x7e,0xf7,0x06,0x86,0x00]
10529
10530 v_cos_f32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10531 // CHECK: [0xf9,0x54,0x0a,0x7e,0xfb,0x06,0x86,0x00]
10532
10533 v_cos_f32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10534 // CHECK: [0xf9,0x54,0x0a,0x7e,0xfc,0x06,0x86,0x00]
10535
10536 v_cos_f32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10537 // CHECK: [0xf9,0x54,0x0a,0x7e,0xfd,0x06,0x86,0x00]
10538
10539 v_cos_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10540 // CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x26,0x06,0x00]
10541
10542 v_cos_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10543 // CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x46,0x06,0x00]
10544
10545 v_cos_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10546 // CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x86,0x06,0x00]
10547
10548 v_cos_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10549 // CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0xc6,0x06,0x00]
10550
10551 v_cos_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
10552 // CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x06,0x00]
10553
10554 v_cos_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
10555 // CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x00,0x06,0x00]
10556
10557 v_cos_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
10558 // CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x01,0x06,0x00]
10559
10560 v_cos_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
10561 // CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x02,0x06,0x00]
10562
10563 v_cos_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
10564 // CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x03,0x06,0x00]
10565
10566 v_cos_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
10567 // CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x04,0x06,0x00]
10568
10569 v_cos_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
10570 // CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x05,0x06,0x00]
10571
10572 v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
10573 // CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x0e,0x06,0x00]
10574
10575 v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
10576 // CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x16,0x06,0x00]
10577
10578 v_cos_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
10579 // CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x16,0x06,0x00]
10580
10581 v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
10582 // CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x06,0x00]
10583
10584 v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
10585 // CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x00,0x00]
10586
10587 v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
10588 // CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x01,0x00]
10589
10590 v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
10591 // CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x02,0x00]
10592
10593 v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
10594 // CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x03,0x00]
10595
10596 v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
10597 // CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x04,0x00]
10598
10599 v_cos_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
10600 // CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x05,0x00]
10601
10602 v_cos_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10603 // CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x16,0x00]
10604
10605 v_cos_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10606 // CHECK: [0xf9,0x54,0x0a,0x7e,0x01,0x06,0x26,0x00]
10607
10608 v_cos_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10609 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0xe4,0x00,0x00]
10610
10611 v_cos_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10612 // CHECK: [0xfa,0x54,0xfe,0x7f,0x01,0xe4,0x00,0x00]
10613
10614 v_cos_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10615 // CHECK: [0xfa,0x54,0x0a,0x7e,0xff,0xe4,0x00,0x00]
10616
10617 v_cos_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
10618 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x1b,0x00,0x00]
10619
10620 v_cos_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
10621 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x40,0x01,0x00]
10622
10623 v_cos_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
10624 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x41,0x01,0x00]
10625
10626 v_cos_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
10627 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x42,0x01,0x00]
10628
10629 v_cos_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
10630 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x43,0x01,0x00]
10631
10632 v_cos_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
10633 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x30,0x01,0x00]
10634
10635 v_cos_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
10636 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x34,0x01,0x00]
10637
10638 v_cos_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
10639 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x38,0x01,0x00]
10640
10641 v_cos_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
10642 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x3c,0x01,0x00]
10643
10644 v_cos_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
10645 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x01,0x01,0x00]
10646
10647 v_cos_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
10648 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x0f,0x01,0x00]
10649
10650 v_cos_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
10651 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x11,0x01,0x00]
10652
10653 v_cos_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
10654 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x1f,0x01,0x00]
10655
10656 v_cos_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
10657 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x21,0x01,0x00]
10658
10659 v_cos_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
10660 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0x2f,0x01,0x00]
10661
10662 v_cos_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
10663 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0xe4,0x00,0x10]
10664
10665 v_cos_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
10666 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0xe4,0x00,0x30]
10667
10668 v_cos_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
10669 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
10670
10671 v_cos_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
10672 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
10673
10674 v_cos_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
10675 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0xe4,0x00,0x01]
10676
10677 v_cos_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
10678 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0xe4,0x00,0x03]
10679
10680 v_cos_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
10681 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
10682
10683 v_cos_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
10684 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
10685
10686 v_cos_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
10687 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0xe4,0x08,0x00]
10688
10689 v_cos_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10690 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0xe4,0x10,0x00]
10691
10692 v_cos_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10693 // CHECK: [0xfa,0x54,0x0a,0x7e,0x01,0xe4,0x20,0x00]
10694
10695 v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10696 // CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x06,0x00]
10697
10698 v_not_b32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10699 // CHECK: [0xf9,0x56,0xfe,0x7f,0x01,0x06,0x06,0x00]
10700
10701 v_not_b32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10702 // CHECK: [0xf9,0x56,0x0a,0x7e,0xff,0x06,0x06,0x00]
10703
10704 v_not_b32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10705 // CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x86,0x00]
10706
10707 v_not_b32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10708 // CHECK: [0xf9,0x56,0x0a,0x7e,0x65,0x06,0x86,0x00]
10709
10710 v_not_b32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10711 // CHECK: [0xf9,0x56,0x0a,0x7e,0x66,0x06,0x86,0x00]
10712
10713 v_not_b32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10714 // CHECK: [0xf9,0x56,0x0a,0x7e,0x67,0x06,0x86,0x00]
10715
10716 v_not_b32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10717 // CHECK: [0xf9,0x56,0x0a,0x7e,0x6a,0x06,0x86,0x00]
10718
10719 v_not_b32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10720 // CHECK: [0xf9,0x56,0x0a,0x7e,0x6b,0x06,0x86,0x00]
10721
10722 v_not_b32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10723 // CHECK: [0xf9,0x56,0x0a,0x7e,0x7b,0x06,0x86,0x00]
10724
10725 v_not_b32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10726 // CHECK: [0xf9,0x56,0x0a,0x7e,0x7c,0x06,0x86,0x00]
10727
10728 v_not_b32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10729 // CHECK: [0xf9,0x56,0x0a,0x7e,0x7e,0x06,0x86,0x00]
10730
10731 v_not_b32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10732 // CHECK: [0xf9,0x56,0x0a,0x7e,0x7f,0x06,0x86,0x00]
10733
10734 v_not_b32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10735 // CHECK: [0xf9,0x56,0x0a,0x7e,0x80,0x06,0x86,0x00]
10736
10737 v_not_b32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10738 // CHECK: [0xf9,0x56,0x0a,0x7e,0xc1,0x06,0x86,0x00]
10739
10740 v_not_b32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10741 // CHECK: [0xf9,0x56,0x0a,0x7e,0xf0,0x06,0x86,0x00]
10742
10743 v_not_b32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10744 // CHECK: [0xf9,0x56,0x0a,0x7e,0xf7,0x06,0x86,0x00]
10745
10746 v_not_b32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10747 // CHECK: [0xf9,0x56,0x0a,0x7e,0xfb,0x06,0x86,0x00]
10748
10749 v_not_b32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10750 // CHECK: [0xf9,0x56,0x0a,0x7e,0xfc,0x06,0x86,0x00]
10751
10752 v_not_b32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10753 // CHECK: [0xf9,0x56,0x0a,0x7e,0xfd,0x06,0x86,0x00]
10754
10755 v_not_b32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
10756 // CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x06,0x00]
10757
10758 v_not_b32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
10759 // CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x00,0x06,0x00]
10760
10761 v_not_b32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
10762 // CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x01,0x06,0x00]
10763
10764 v_not_b32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
10765 // CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x02,0x06,0x00]
10766
10767 v_not_b32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
10768 // CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x03,0x06,0x00]
10769
10770 v_not_b32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
10771 // CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x04,0x06,0x00]
10772
10773 v_not_b32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
10774 // CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x05,0x06,0x00]
10775
10776 v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
10777 // CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x0e,0x06,0x00]
10778
10779 v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
10780 // CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x16,0x06,0x00]
10781
10782 v_not_b32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
10783 // CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x16,0x06,0x00]
10784
10785 v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
10786 // CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x06,0x00]
10787
10788 v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
10789 // CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x00,0x00]
10790
10791 v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
10792 // CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x01,0x00]
10793
10794 v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
10795 // CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x02,0x00]
10796
10797 v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
10798 // CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x03,0x00]
10799
10800 v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
10801 // CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x04,0x00]
10802
10803 v_not_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
10804 // CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x05,0x00]
10805
10806 v_not_b32_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10807 // CHECK: [0xf9,0x56,0x0a,0x7e,0x01,0x06,0x0e,0x00]
10808
10809 v_not_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10810 // CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0xe4,0x00,0x00]
10811
10812 v_not_b32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10813 // CHECK: [0xfa,0x56,0xfe,0x7f,0x01,0xe4,0x00,0x00]
10814
10815 v_not_b32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
10816 // CHECK: [0xfa,0x56,0x0a,0x7e,0xff,0xe4,0x00,0x00]
10817
10818 v_not_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
10819 // CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x1b,0x00,0x00]
10820
10821 v_not_b32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
10822 // CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x40,0x01,0x00]
10823
10824 v_not_b32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
10825 // CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x41,0x01,0x00]
10826
10827 v_not_b32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
10828 // CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x42,0x01,0x00]
10829
10830 v_not_b32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
10831 // CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x43,0x01,0x00]
10832
10833 v_not_b32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
10834 // CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x30,0x01,0x00]
10835
10836 v_not_b32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
10837 // CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x34,0x01,0x00]
10838
10839 v_not_b32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
10840 // CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x38,0x01,0x00]
10841
10842 v_not_b32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
10843 // CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x3c,0x01,0x00]
10844
10845 v_not_b32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
10846 // CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x01,0x01,0x00]
10847
10848 v_not_b32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
10849 // CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x0f,0x01,0x00]
10850
10851 v_not_b32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
10852 // CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x11,0x01,0x00]
10853
10854 v_not_b32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
10855 // CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x1f,0x01,0x00]
10856
10857 v_not_b32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
10858 // CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x21,0x01,0x00]
10859
10860 v_not_b32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
10861 // CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0x2f,0x01,0x00]
10862
10863 v_not_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
10864 // CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0xe4,0x00,0x10]
10865
10866 v_not_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
10867 // CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0xe4,0x00,0x30]
10868
10869 v_not_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
10870 // CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
10871
10872 v_not_b32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
10873 // CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
10874
10875 v_not_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
10876 // CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0xe4,0x00,0x01]
10877
10878 v_not_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
10879 // CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0xe4,0x00,0x03]
10880
10881 v_not_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
10882 // CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
10883
10884 v_not_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
10885 // CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
10886
10887 v_not_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
10888 // CHECK: [0xfa,0x56,0x0a,0x7e,0x01,0xe4,0x08,0x00]
10889
10890 v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10891 // CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x06,0x00]
10892
10893 v_bfrev_b32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10894 // CHECK: [0xf9,0x58,0xfe,0x7f,0x01,0x06,0x06,0x00]
10895
10896 v_bfrev_b32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10897 // CHECK: [0xf9,0x58,0x0a,0x7e,0xff,0x06,0x06,0x00]
10898
10899 v_bfrev_b32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10900 // CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x86,0x00]
10901
10902 v_bfrev_b32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10903 // CHECK: [0xf9,0x58,0x0a,0x7e,0x65,0x06,0x86,0x00]
10904
10905 v_bfrev_b32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10906 // CHECK: [0xf9,0x58,0x0a,0x7e,0x66,0x06,0x86,0x00]
10907
10908 v_bfrev_b32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10909 // CHECK: [0xf9,0x58,0x0a,0x7e,0x67,0x06,0x86,0x00]
10910
10911 v_bfrev_b32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10912 // CHECK: [0xf9,0x58,0x0a,0x7e,0x6a,0x06,0x86,0x00]
10913
10914 v_bfrev_b32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10915 // CHECK: [0xf9,0x58,0x0a,0x7e,0x6b,0x06,0x86,0x00]
10916
10917 v_bfrev_b32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10918 // CHECK: [0xf9,0x58,0x0a,0x7e,0x7b,0x06,0x86,0x00]
10919
10920 v_bfrev_b32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10921 // CHECK: [0xf9,0x58,0x0a,0x7e,0x7c,0x06,0x86,0x00]
10922
10923 v_bfrev_b32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10924 // CHECK: [0xf9,0x58,0x0a,0x7e,0x7e,0x06,0x86,0x00]
10925
10926 v_bfrev_b32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10927 // CHECK: [0xf9,0x58,0x0a,0x7e,0x7f,0x06,0x86,0x00]
10928
10929 v_bfrev_b32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10930 // CHECK: [0xf9,0x58,0x0a,0x7e,0x80,0x06,0x86,0x00]
10931
10932 v_bfrev_b32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10933 // CHECK: [0xf9,0x58,0x0a,0x7e,0xc1,0x06,0x86,0x00]
10934
10935 v_bfrev_b32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10936 // CHECK: [0xf9,0x58,0x0a,0x7e,0xf0,0x06,0x86,0x00]
10937
10938 v_bfrev_b32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10939 // CHECK: [0xf9,0x58,0x0a,0x7e,0xf7,0x06,0x86,0x00]
10940
10941 v_bfrev_b32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10942 // CHECK: [0xf9,0x58,0x0a,0x7e,0xfb,0x06,0x86,0x00]
10943
10944 v_bfrev_b32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10945 // CHECK: [0xf9,0x58,0x0a,0x7e,0xfc,0x06,0x86,0x00]
10946
10947 v_bfrev_b32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
10948 // CHECK: [0xf9,0x58,0x0a,0x7e,0xfd,0x06,0x86,0x00]
10949
10950 v_bfrev_b32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
10951 // CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x06,0x00]
10952
10953 v_bfrev_b32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
10954 // CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x00,0x06,0x00]
10955
10956 v_bfrev_b32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
10957 // CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x01,0x06,0x00]
10958
10959 v_bfrev_b32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
10960 // CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x02,0x06,0x00]
10961
10962 v_bfrev_b32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
10963 // CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x03,0x06,0x00]
10964
10965 v_bfrev_b32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
10966 // CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x04,0x06,0x00]
10967
10968 v_bfrev_b32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
10969 // CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x05,0x06,0x00]
10970
10971 v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
10972 // CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x0e,0x06,0x00]
10973
10974 v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
10975 // CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x16,0x06,0x00]
10976
10977 v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
10978 // CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x16,0x06,0x00]
10979
10980 v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
10981 // CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x06,0x00]
10982
10983 v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
10984 // CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x00,0x00]
10985
10986 v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
10987 // CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x01,0x00]
10988
10989 v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
10990 // CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x02,0x00]
10991
10992 v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
10993 // CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x03,0x00]
10994
10995 v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
10996 // CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x04,0x00]
10997
10998 v_bfrev_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
10999 // CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x05,0x00]
11000
11001 v_bfrev_b32_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11002 // CHECK: [0xf9,0x58,0x0a,0x7e,0x01,0x06,0x0e,0x00]
11003
11004 v_bfrev_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11005 // CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0xe4,0x00,0x00]
11006
11007 v_bfrev_b32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11008 // CHECK: [0xfa,0x58,0xfe,0x7f,0x01,0xe4,0x00,0x00]
11009
11010 v_bfrev_b32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11011 // CHECK: [0xfa,0x58,0x0a,0x7e,0xff,0xe4,0x00,0x00]
11012
11013 v_bfrev_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
11014 // CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x1b,0x00,0x00]
11015
11016 v_bfrev_b32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
11017 // CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x40,0x01,0x00]
11018
11019 v_bfrev_b32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
11020 // CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x41,0x01,0x00]
11021
11022 v_bfrev_b32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
11023 // CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x42,0x01,0x00]
11024
11025 v_bfrev_b32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
11026 // CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x43,0x01,0x00]
11027
11028 v_bfrev_b32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
11029 // CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x30,0x01,0x00]
11030
11031 v_bfrev_b32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
11032 // CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x34,0x01,0x00]
11033
11034 v_bfrev_b32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
11035 // CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x38,0x01,0x00]
11036
11037 v_bfrev_b32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
11038 // CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x3c,0x01,0x00]
11039
11040 v_bfrev_b32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
11041 // CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x01,0x01,0x00]
11042
11043 v_bfrev_b32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
11044 // CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x0f,0x01,0x00]
11045
11046 v_bfrev_b32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
11047 // CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x11,0x01,0x00]
11048
11049 v_bfrev_b32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
11050 // CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x1f,0x01,0x00]
11051
11052 v_bfrev_b32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
11053 // CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x21,0x01,0x00]
11054
11055 v_bfrev_b32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
11056 // CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0x2f,0x01,0x00]
11057
11058 v_bfrev_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
11059 // CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0xe4,0x00,0x10]
11060
11061 v_bfrev_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
11062 // CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0xe4,0x00,0x30]
11063
11064 v_bfrev_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
11065 // CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
11066
11067 v_bfrev_b32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
11068 // CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
11069
11070 v_bfrev_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
11071 // CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0xe4,0x00,0x01]
11072
11073 v_bfrev_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
11074 // CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0xe4,0x00,0x03]
11075
11076 v_bfrev_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
11077 // CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
11078
11079 v_bfrev_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
11080 // CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
11081
11082 v_bfrev_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
11083 // CHECK: [0xfa,0x58,0x0a,0x7e,0x01,0xe4,0x08,0x00]
11084
11085 v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11086 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x06,0x00]
11087
11088 v_ffbh_u32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11089 // CHECK: [0xf9,0x5a,0xfe,0x7f,0x01,0x06,0x06,0x00]
11090
11091 v_ffbh_u32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11092 // CHECK: [0xf9,0x5a,0x0a,0x7e,0xff,0x06,0x06,0x00]
11093
11094 v_ffbh_u32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11095 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x86,0x00]
11096
11097 v_ffbh_u32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11098 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x65,0x06,0x86,0x00]
11099
11100 v_ffbh_u32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11101 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x66,0x06,0x86,0x00]
11102
11103 v_ffbh_u32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11104 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x67,0x06,0x86,0x00]
11105
11106 v_ffbh_u32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11107 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x6a,0x06,0x86,0x00]
11108
11109 v_ffbh_u32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11110 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x6b,0x06,0x86,0x00]
11111
11112 v_ffbh_u32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11113 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x7b,0x06,0x86,0x00]
11114
11115 v_ffbh_u32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11116 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x7c,0x06,0x86,0x00]
11117
11118 v_ffbh_u32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11119 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x7e,0x06,0x86,0x00]
11120
11121 v_ffbh_u32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11122 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x7f,0x06,0x86,0x00]
11123
11124 v_ffbh_u32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11125 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x80,0x06,0x86,0x00]
11126
11127 v_ffbh_u32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11128 // CHECK: [0xf9,0x5a,0x0a,0x7e,0xc1,0x06,0x86,0x00]
11129
11130 v_ffbh_u32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11131 // CHECK: [0xf9,0x5a,0x0a,0x7e,0xf0,0x06,0x86,0x00]
11132
11133 v_ffbh_u32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11134 // CHECK: [0xf9,0x5a,0x0a,0x7e,0xf7,0x06,0x86,0x00]
11135
11136 v_ffbh_u32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11137 // CHECK: [0xf9,0x5a,0x0a,0x7e,0xfb,0x06,0x86,0x00]
11138
11139 v_ffbh_u32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11140 // CHECK: [0xf9,0x5a,0x0a,0x7e,0xfc,0x06,0x86,0x00]
11141
11142 v_ffbh_u32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11143 // CHECK: [0xf9,0x5a,0x0a,0x7e,0xfd,0x06,0x86,0x00]
11144
11145 v_ffbh_u32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
11146 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x06,0x00]
11147
11148 v_ffbh_u32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
11149 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x00,0x06,0x00]
11150
11151 v_ffbh_u32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
11152 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x01,0x06,0x00]
11153
11154 v_ffbh_u32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
11155 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x02,0x06,0x00]
11156
11157 v_ffbh_u32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
11158 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x03,0x06,0x00]
11159
11160 v_ffbh_u32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
11161 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x04,0x06,0x00]
11162
11163 v_ffbh_u32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
11164 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x05,0x06,0x00]
11165
11166 v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
11167 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x0e,0x06,0x00]
11168
11169 v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
11170 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x16,0x06,0x00]
11171
11172 v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
11173 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x16,0x06,0x00]
11174
11175 v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
11176 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x06,0x00]
11177
11178 v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
11179 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x00,0x00]
11180
11181 v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
11182 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x01,0x00]
11183
11184 v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
11185 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x02,0x00]
11186
11187 v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
11188 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x03,0x00]
11189
11190 v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
11191 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x04,0x00]
11192
11193 v_ffbh_u32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
11194 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x05,0x00]
11195
11196 v_ffbh_u32_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11197 // CHECK: [0xf9,0x5a,0x0a,0x7e,0x01,0x06,0x0e,0x00]
11198
11199 v_ffbh_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11200 // CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0xe4,0x00,0x00]
11201
11202 v_ffbh_u32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11203 // CHECK: [0xfa,0x5a,0xfe,0x7f,0x01,0xe4,0x00,0x00]
11204
11205 v_ffbh_u32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11206 // CHECK: [0xfa,0x5a,0x0a,0x7e,0xff,0xe4,0x00,0x00]
11207
11208 v_ffbh_u32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
11209 // CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x1b,0x00,0x00]
11210
11211 v_ffbh_u32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
11212 // CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x40,0x01,0x00]
11213
11214 v_ffbh_u32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
11215 // CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x41,0x01,0x00]
11216
11217 v_ffbh_u32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
11218 // CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x42,0x01,0x00]
11219
11220 v_ffbh_u32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
11221 // CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x43,0x01,0x00]
11222
11223 v_ffbh_u32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
11224 // CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x30,0x01,0x00]
11225
11226 v_ffbh_u32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
11227 // CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x34,0x01,0x00]
11228
11229 v_ffbh_u32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
11230 // CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x38,0x01,0x00]
11231
11232 v_ffbh_u32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
11233 // CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x3c,0x01,0x00]
11234
11235 v_ffbh_u32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
11236 // CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x01,0x01,0x00]
11237
11238 v_ffbh_u32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
11239 // CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x0f,0x01,0x00]
11240
11241 v_ffbh_u32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
11242 // CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x11,0x01,0x00]
11243
11244 v_ffbh_u32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
11245 // CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x1f,0x01,0x00]
11246
11247 v_ffbh_u32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
11248 // CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x21,0x01,0x00]
11249
11250 v_ffbh_u32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
11251 // CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0x2f,0x01,0x00]
11252
11253 v_ffbh_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
11254 // CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0xe4,0x00,0x10]
11255
11256 v_ffbh_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
11257 // CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0xe4,0x00,0x30]
11258
11259 v_ffbh_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
11260 // CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
11261
11262 v_ffbh_u32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
11263 // CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
11264
11265 v_ffbh_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
11266 // CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0xe4,0x00,0x01]
11267
11268 v_ffbh_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
11269 // CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0xe4,0x00,0x03]
11270
11271 v_ffbh_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
11272 // CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
11273
11274 v_ffbh_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
11275 // CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
11276
11277 v_ffbh_u32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
11278 // CHECK: [0xfa,0x5a,0x0a,0x7e,0x01,0xe4,0x08,0x00]
11279
11280 v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11281 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x06,0x00]
11282
11283 v_ffbl_b32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11284 // CHECK: [0xf9,0x5c,0xfe,0x7f,0x01,0x06,0x06,0x00]
11285
11286 v_ffbl_b32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11287 // CHECK: [0xf9,0x5c,0x0a,0x7e,0xff,0x06,0x06,0x00]
11288
11289 v_ffbl_b32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11290 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x86,0x00]
11291
11292 v_ffbl_b32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11293 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x65,0x06,0x86,0x00]
11294
11295 v_ffbl_b32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11296 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x66,0x06,0x86,0x00]
11297
11298 v_ffbl_b32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11299 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x67,0x06,0x86,0x00]
11300
11301 v_ffbl_b32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11302 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x6a,0x06,0x86,0x00]
11303
11304 v_ffbl_b32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11305 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x6b,0x06,0x86,0x00]
11306
11307 v_ffbl_b32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11308 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x7b,0x06,0x86,0x00]
11309
11310 v_ffbl_b32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11311 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x7c,0x06,0x86,0x00]
11312
11313 v_ffbl_b32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11314 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x7e,0x06,0x86,0x00]
11315
11316 v_ffbl_b32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11317 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x7f,0x06,0x86,0x00]
11318
11319 v_ffbl_b32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11320 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x80,0x06,0x86,0x00]
11321
11322 v_ffbl_b32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11323 // CHECK: [0xf9,0x5c,0x0a,0x7e,0xc1,0x06,0x86,0x00]
11324
11325 v_ffbl_b32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11326 // CHECK: [0xf9,0x5c,0x0a,0x7e,0xf0,0x06,0x86,0x00]
11327
11328 v_ffbl_b32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11329 // CHECK: [0xf9,0x5c,0x0a,0x7e,0xf7,0x06,0x86,0x00]
11330
11331 v_ffbl_b32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11332 // CHECK: [0xf9,0x5c,0x0a,0x7e,0xfb,0x06,0x86,0x00]
11333
11334 v_ffbl_b32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11335 // CHECK: [0xf9,0x5c,0x0a,0x7e,0xfc,0x06,0x86,0x00]
11336
11337 v_ffbl_b32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11338 // CHECK: [0xf9,0x5c,0x0a,0x7e,0xfd,0x06,0x86,0x00]
11339
11340 v_ffbl_b32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
11341 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x06,0x00]
11342
11343 v_ffbl_b32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
11344 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x00,0x06,0x00]
11345
11346 v_ffbl_b32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
11347 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x01,0x06,0x00]
11348
11349 v_ffbl_b32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
11350 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x02,0x06,0x00]
11351
11352 v_ffbl_b32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
11353 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x03,0x06,0x00]
11354
11355 v_ffbl_b32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
11356 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x04,0x06,0x00]
11357
11358 v_ffbl_b32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
11359 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x05,0x06,0x00]
11360
11361 v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
11362 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x0e,0x06,0x00]
11363
11364 v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
11365 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x16,0x06,0x00]
11366
11367 v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
11368 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x16,0x06,0x00]
11369
11370 v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
11371 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x06,0x00]
11372
11373 v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
11374 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x00,0x00]
11375
11376 v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
11377 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x01,0x00]
11378
11379 v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
11380 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x02,0x00]
11381
11382 v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
11383 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x03,0x00]
11384
11385 v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
11386 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x04,0x00]
11387
11388 v_ffbl_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
11389 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x05,0x00]
11390
11391 v_ffbl_b32_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11392 // CHECK: [0xf9,0x5c,0x0a,0x7e,0x01,0x06,0x0e,0x00]
11393
11394 v_ffbl_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11395 // CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0xe4,0x00,0x00]
11396
11397 v_ffbl_b32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11398 // CHECK: [0xfa,0x5c,0xfe,0x7f,0x01,0xe4,0x00,0x00]
11399
11400 v_ffbl_b32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11401 // CHECK: [0xfa,0x5c,0x0a,0x7e,0xff,0xe4,0x00,0x00]
11402
11403 v_ffbl_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
11404 // CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x1b,0x00,0x00]
11405
11406 v_ffbl_b32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
11407 // CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x40,0x01,0x00]
11408
11409 v_ffbl_b32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
11410 // CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x41,0x01,0x00]
11411
11412 v_ffbl_b32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
11413 // CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x42,0x01,0x00]
11414
11415 v_ffbl_b32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
11416 // CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x43,0x01,0x00]
11417
11418 v_ffbl_b32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
11419 // CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x30,0x01,0x00]
11420
11421 v_ffbl_b32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
11422 // CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x34,0x01,0x00]
11423
11424 v_ffbl_b32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
11425 // CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x38,0x01,0x00]
11426
11427 v_ffbl_b32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
11428 // CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x3c,0x01,0x00]
11429
11430 v_ffbl_b32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
11431 // CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x01,0x01,0x00]
11432
11433 v_ffbl_b32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
11434 // CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x0f,0x01,0x00]
11435
11436 v_ffbl_b32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
11437 // CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x11,0x01,0x00]
11438
11439 v_ffbl_b32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
11440 // CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x1f,0x01,0x00]
11441
11442 v_ffbl_b32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
11443 // CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x21,0x01,0x00]
11444
11445 v_ffbl_b32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
11446 // CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0x2f,0x01,0x00]
11447
11448 v_ffbl_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
11449 // CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0xe4,0x00,0x10]
11450
11451 v_ffbl_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
11452 // CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0xe4,0x00,0x30]
11453
11454 v_ffbl_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
11455 // CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
11456
11457 v_ffbl_b32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
11458 // CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
11459
11460 v_ffbl_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
11461 // CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0xe4,0x00,0x01]
11462
11463 v_ffbl_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
11464 // CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0xe4,0x00,0x03]
11465
11466 v_ffbl_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
11467 // CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
11468
11469 v_ffbl_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
11470 // CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
11471
11472 v_ffbl_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
11473 // CHECK: [0xfa,0x5c,0x0a,0x7e,0x01,0xe4,0x08,0x00]
11474
11475 v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11476 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x06,0x00]
11477
11478 v_ffbh_i32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11479 // CHECK: [0xf9,0x5e,0xfe,0x7f,0x01,0x06,0x06,0x00]
11480
11481 v_ffbh_i32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11482 // CHECK: [0xf9,0x5e,0x0a,0x7e,0xff,0x06,0x06,0x00]
11483
11484 v_ffbh_i32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11485 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x86,0x00]
11486
11487 v_ffbh_i32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11488 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x65,0x06,0x86,0x00]
11489
11490 v_ffbh_i32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11491 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x66,0x06,0x86,0x00]
11492
11493 v_ffbh_i32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11494 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x67,0x06,0x86,0x00]
11495
11496 v_ffbh_i32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11497 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x6a,0x06,0x86,0x00]
11498
11499 v_ffbh_i32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11500 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x6b,0x06,0x86,0x00]
11501
11502 v_ffbh_i32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11503 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x7b,0x06,0x86,0x00]
11504
11505 v_ffbh_i32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11506 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x7c,0x06,0x86,0x00]
11507
11508 v_ffbh_i32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11509 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x7e,0x06,0x86,0x00]
11510
11511 v_ffbh_i32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11512 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x7f,0x06,0x86,0x00]
11513
11514 v_ffbh_i32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11515 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x80,0x06,0x86,0x00]
11516
11517 v_ffbh_i32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11518 // CHECK: [0xf9,0x5e,0x0a,0x7e,0xc1,0x06,0x86,0x00]
11519
11520 v_ffbh_i32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11521 // CHECK: [0xf9,0x5e,0x0a,0x7e,0xf0,0x06,0x86,0x00]
11522
11523 v_ffbh_i32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11524 // CHECK: [0xf9,0x5e,0x0a,0x7e,0xf7,0x06,0x86,0x00]
11525
11526 v_ffbh_i32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11527 // CHECK: [0xf9,0x5e,0x0a,0x7e,0xfb,0x06,0x86,0x00]
11528
11529 v_ffbh_i32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11530 // CHECK: [0xf9,0x5e,0x0a,0x7e,0xfc,0x06,0x86,0x00]
11531
11532 v_ffbh_i32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11533 // CHECK: [0xf9,0x5e,0x0a,0x7e,0xfd,0x06,0x86,0x00]
11534
11535 v_ffbh_i32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
11536 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x06,0x00]
11537
11538 v_ffbh_i32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
11539 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x00,0x06,0x00]
11540
11541 v_ffbh_i32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
11542 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x01,0x06,0x00]
11543
11544 v_ffbh_i32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
11545 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x02,0x06,0x00]
11546
11547 v_ffbh_i32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
11548 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x03,0x06,0x00]
11549
11550 v_ffbh_i32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
11551 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x04,0x06,0x00]
11552
11553 v_ffbh_i32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
11554 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x05,0x06,0x00]
11555
11556 v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
11557 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x0e,0x06,0x00]
11558
11559 v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
11560 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x16,0x06,0x00]
11561
11562 v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
11563 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x16,0x06,0x00]
11564
11565 v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
11566 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x06,0x00]
11567
11568 v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
11569 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x00,0x00]
11570
11571 v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
11572 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x01,0x00]
11573
11574 v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
11575 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x02,0x00]
11576
11577 v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
11578 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x03,0x00]
11579
11580 v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
11581 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x04,0x00]
11582
11583 v_ffbh_i32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
11584 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x05,0x00]
11585
11586 v_ffbh_i32_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11587 // CHECK: [0xf9,0x5e,0x0a,0x7e,0x01,0x06,0x0e,0x00]
11588
11589 v_ffbh_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11590 // CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0xe4,0x00,0x00]
11591
11592 v_ffbh_i32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11593 // CHECK: [0xfa,0x5e,0xfe,0x7f,0x01,0xe4,0x00,0x00]
11594
11595 v_ffbh_i32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11596 // CHECK: [0xfa,0x5e,0x0a,0x7e,0xff,0xe4,0x00,0x00]
11597
11598 v_ffbh_i32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
11599 // CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x1b,0x00,0x00]
11600
11601 v_ffbh_i32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
11602 // CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x40,0x01,0x00]
11603
11604 v_ffbh_i32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
11605 // CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x41,0x01,0x00]
11606
11607 v_ffbh_i32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
11608 // CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x42,0x01,0x00]
11609
11610 v_ffbh_i32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
11611 // CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x43,0x01,0x00]
11612
11613 v_ffbh_i32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
11614 // CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x30,0x01,0x00]
11615
11616 v_ffbh_i32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
11617 // CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x34,0x01,0x00]
11618
11619 v_ffbh_i32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
11620 // CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x38,0x01,0x00]
11621
11622 v_ffbh_i32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
11623 // CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x3c,0x01,0x00]
11624
11625 v_ffbh_i32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
11626 // CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x01,0x01,0x00]
11627
11628 v_ffbh_i32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
11629 // CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x0f,0x01,0x00]
11630
11631 v_ffbh_i32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
11632 // CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x11,0x01,0x00]
11633
11634 v_ffbh_i32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
11635 // CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x1f,0x01,0x00]
11636
11637 v_ffbh_i32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
11638 // CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x21,0x01,0x00]
11639
11640 v_ffbh_i32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
11641 // CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0x2f,0x01,0x00]
11642
11643 v_ffbh_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
11644 // CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0xe4,0x00,0x10]
11645
11646 v_ffbh_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
11647 // CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0xe4,0x00,0x30]
11648
11649 v_ffbh_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
11650 // CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
11651
11652 v_ffbh_i32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
11653 // CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
11654
11655 v_ffbh_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
11656 // CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0xe4,0x00,0x01]
11657
11658 v_ffbh_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
11659 // CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0xe4,0x00,0x03]
11660
11661 v_ffbh_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
11662 // CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
11663
11664 v_ffbh_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
11665 // CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
11666
11667 v_ffbh_i32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
11668 // CHECK: [0xfa,0x5e,0x0a,0x7e,0x01,0xe4,0x08,0x00]
11669
11670 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11671 // CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x06,0x00]
11672
11673 v_frexp_exp_i32_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11674 // CHECK: [0xf9,0x66,0xfe,0x7f,0x01,0x06,0x06,0x00]
11675
11676 v_frexp_exp_i32_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11677 // CHECK: [0xf9,0x66,0x0a,0x7e,0xff,0x06,0x06,0x00]
11678
11679 v_frexp_exp_i32_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11680 // CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x86,0x00]
11681
11682 v_frexp_exp_i32_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11683 // CHECK: [0xf9,0x66,0x0a,0x7e,0x65,0x06,0x86,0x00]
11684
11685 v_frexp_exp_i32_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11686 // CHECK: [0xf9,0x66,0x0a,0x7e,0x66,0x06,0x86,0x00]
11687
11688 v_frexp_exp_i32_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11689 // CHECK: [0xf9,0x66,0x0a,0x7e,0x67,0x06,0x86,0x00]
11690
11691 v_frexp_exp_i32_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11692 // CHECK: [0xf9,0x66,0x0a,0x7e,0x6a,0x06,0x86,0x00]
11693
11694 v_frexp_exp_i32_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11695 // CHECK: [0xf9,0x66,0x0a,0x7e,0x6b,0x06,0x86,0x00]
11696
11697 v_frexp_exp_i32_f32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11698 // CHECK: [0xf9,0x66,0x0a,0x7e,0x7b,0x06,0x86,0x00]
11699
11700 v_frexp_exp_i32_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11701 // CHECK: [0xf9,0x66,0x0a,0x7e,0x7c,0x06,0x86,0x00]
11702
11703 v_frexp_exp_i32_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11704 // CHECK: [0xf9,0x66,0x0a,0x7e,0x7e,0x06,0x86,0x00]
11705
11706 v_frexp_exp_i32_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11707 // CHECK: [0xf9,0x66,0x0a,0x7e,0x7f,0x06,0x86,0x00]
11708
11709 v_frexp_exp_i32_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11710 // CHECK: [0xf9,0x66,0x0a,0x7e,0x80,0x06,0x86,0x00]
11711
11712 v_frexp_exp_i32_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11713 // CHECK: [0xf9,0x66,0x0a,0x7e,0xc1,0x06,0x86,0x00]
11714
11715 v_frexp_exp_i32_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11716 // CHECK: [0xf9,0x66,0x0a,0x7e,0xf0,0x06,0x86,0x00]
11717
11718 v_frexp_exp_i32_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11719 // CHECK: [0xf9,0x66,0x0a,0x7e,0xf7,0x06,0x86,0x00]
11720
11721 v_frexp_exp_i32_f32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11722 // CHECK: [0xf9,0x66,0x0a,0x7e,0xfb,0x06,0x86,0x00]
11723
11724 v_frexp_exp_i32_f32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11725 // CHECK: [0xf9,0x66,0x0a,0x7e,0xfc,0x06,0x86,0x00]
11726
11727 v_frexp_exp_i32_f32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11728 // CHECK: [0xf9,0x66,0x0a,0x7e,0xfd,0x06,0x86,0x00]
11729
11730 v_frexp_exp_i32_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
11731 // CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x06,0x00]
11732
11733 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
11734 // CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x00,0x06,0x00]
11735
11736 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
11737 // CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x01,0x06,0x00]
11738
11739 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
11740 // CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x02,0x06,0x00]
11741
11742 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
11743 // CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x03,0x06,0x00]
11744
11745 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
11746 // CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x04,0x06,0x00]
11747
11748 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
11749 // CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x05,0x06,0x00]
11750
11751 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
11752 // CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x0e,0x06,0x00]
11753
11754 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
11755 // CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x16,0x06,0x00]
11756
11757 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
11758 // CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x16,0x06,0x00]
11759
11760 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
11761 // CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x06,0x00]
11762
11763 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
11764 // CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x00,0x00]
11765
11766 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
11767 // CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x01,0x00]
11768
11769 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
11770 // CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x02,0x00]
11771
11772 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
11773 // CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x03,0x00]
11774
11775 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
11776 // CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x04,0x00]
11777
11778 v_frexp_exp_i32_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
11779 // CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x05,0x00]
11780
11781 v_frexp_exp_i32_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11782 // CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x16,0x00]
11783
11784 v_frexp_exp_i32_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11785 // CHECK: [0xf9,0x66,0x0a,0x7e,0x01,0x06,0x26,0x00]
11786
11787 v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11788 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0xe4,0x00,0x00]
11789
11790 v_frexp_exp_i32_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11791 // CHECK: [0xfa,0x66,0xfe,0x7f,0x01,0xe4,0x00,0x00]
11792
11793 v_frexp_exp_i32_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11794 // CHECK: [0xfa,0x66,0x0a,0x7e,0xff,0xe4,0x00,0x00]
11795
11796 v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
11797 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x1b,0x00,0x00]
11798
11799 v_frexp_exp_i32_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
11800 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x40,0x01,0x00]
11801
11802 v_frexp_exp_i32_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
11803 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x41,0x01,0x00]
11804
11805 v_frexp_exp_i32_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
11806 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x42,0x01,0x00]
11807
11808 v_frexp_exp_i32_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
11809 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x43,0x01,0x00]
11810
11811 v_frexp_exp_i32_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
11812 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x30,0x01,0x00]
11813
11814 v_frexp_exp_i32_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
11815 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x34,0x01,0x00]
11816
11817 v_frexp_exp_i32_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
11818 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x38,0x01,0x00]
11819
11820 v_frexp_exp_i32_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
11821 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x3c,0x01,0x00]
11822
11823 v_frexp_exp_i32_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
11824 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x01,0x01,0x00]
11825
11826 v_frexp_exp_i32_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
11827 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x0f,0x01,0x00]
11828
11829 v_frexp_exp_i32_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
11830 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x11,0x01,0x00]
11831
11832 v_frexp_exp_i32_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
11833 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x1f,0x01,0x00]
11834
11835 v_frexp_exp_i32_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
11836 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x21,0x01,0x00]
11837
11838 v_frexp_exp_i32_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
11839 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0x2f,0x01,0x00]
11840
11841 v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
11842 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0xe4,0x00,0x10]
11843
11844 v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
11845 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0xe4,0x00,0x30]
11846
11847 v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
11848 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
11849
11850 v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
11851 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
11852
11853 v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
11854 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0xe4,0x00,0x01]
11855
11856 v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
11857 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0xe4,0x00,0x03]
11858
11859 v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
11860 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
11861
11862 v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
11863 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
11864
11865 v_frexp_exp_i32_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
11866 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0xe4,0x08,0x00]
11867
11868 v_frexp_exp_i32_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11869 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0xe4,0x10,0x00]
11870
11871 v_frexp_exp_i32_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
11872 // CHECK: [0xfa,0x66,0x0a,0x7e,0x01,0xe4,0x20,0x00]
11873
11874 v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11875 // CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x06,0x00]
11876
11877 v_frexp_mant_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11878 // CHECK: [0xf9,0x68,0xfe,0x7f,0x01,0x06,0x06,0x00]
11879
11880 v_frexp_mant_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11881 // CHECK: [0xf9,0x68,0x0a,0x7e,0xff,0x06,0x06,0x00]
11882
11883 v_frexp_mant_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11884 // CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x86,0x00]
11885
11886 v_frexp_mant_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11887 // CHECK: [0xf9,0x68,0x0a,0x7e,0x65,0x06,0x86,0x00]
11888
11889 v_frexp_mant_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11890 // CHECK: [0xf9,0x68,0x0a,0x7e,0x66,0x06,0x86,0x00]
11891
11892 v_frexp_mant_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11893 // CHECK: [0xf9,0x68,0x0a,0x7e,0x67,0x06,0x86,0x00]
11894
11895 v_frexp_mant_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11896 // CHECK: [0xf9,0x68,0x0a,0x7e,0x6a,0x06,0x86,0x00]
11897
11898 v_frexp_mant_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11899 // CHECK: [0xf9,0x68,0x0a,0x7e,0x6b,0x06,0x86,0x00]
11900
11901 v_frexp_mant_f32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11902 // CHECK: [0xf9,0x68,0x0a,0x7e,0x7b,0x06,0x86,0x00]
11903
11904 v_frexp_mant_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11905 // CHECK: [0xf9,0x68,0x0a,0x7e,0x7c,0x06,0x86,0x00]
11906
11907 v_frexp_mant_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11908 // CHECK: [0xf9,0x68,0x0a,0x7e,0x7e,0x06,0x86,0x00]
11909
11910 v_frexp_mant_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11911 // CHECK: [0xf9,0x68,0x0a,0x7e,0x7f,0x06,0x86,0x00]
11912
11913 v_frexp_mant_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11914 // CHECK: [0xf9,0x68,0x0a,0x7e,0x80,0x06,0x86,0x00]
11915
11916 v_frexp_mant_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11917 // CHECK: [0xf9,0x68,0x0a,0x7e,0xc1,0x06,0x86,0x00]
11918
11919 v_frexp_mant_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11920 // CHECK: [0xf9,0x68,0x0a,0x7e,0xf0,0x06,0x86,0x00]
11921
11922 v_frexp_mant_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11923 // CHECK: [0xf9,0x68,0x0a,0x7e,0xf7,0x06,0x86,0x00]
11924
11925 v_frexp_mant_f32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11926 // CHECK: [0xf9,0x68,0x0a,0x7e,0xfb,0x06,0x86,0x00]
11927
11928 v_frexp_mant_f32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11929 // CHECK: [0xf9,0x68,0x0a,0x7e,0xfc,0x06,0x86,0x00]
11930
11931 v_frexp_mant_f32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11932 // CHECK: [0xf9,0x68,0x0a,0x7e,0xfd,0x06,0x86,0x00]
11933
11934 v_frexp_mant_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11935 // CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x26,0x06,0x00]
11936
11937 v_frexp_mant_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11938 // CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x46,0x06,0x00]
11939
11940 v_frexp_mant_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11941 // CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x86,0x06,0x00]
11942
11943 v_frexp_mant_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11944 // CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0xc6,0x06,0x00]
11945
11946 v_frexp_mant_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
11947 // CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x06,0x00]
11948
11949 v_frexp_mant_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
11950 // CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x00,0x06,0x00]
11951
11952 v_frexp_mant_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
11953 // CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x01,0x06,0x00]
11954
11955 v_frexp_mant_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
11956 // CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x02,0x06,0x00]
11957
11958 v_frexp_mant_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
11959 // CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x03,0x06,0x00]
11960
11961 v_frexp_mant_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
11962 // CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x04,0x06,0x00]
11963
11964 v_frexp_mant_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
11965 // CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x05,0x06,0x00]
11966
11967 v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
11968 // CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x0e,0x06,0x00]
11969
11970 v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
11971 // CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x16,0x06,0x00]
11972
11973 v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
11974 // CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x16,0x06,0x00]
11975
11976 v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
11977 // CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x06,0x00]
11978
11979 v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
11980 // CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x00,0x00]
11981
11982 v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
11983 // CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x01,0x00]
11984
11985 v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
11986 // CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x02,0x00]
11987
11988 v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
11989 // CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x03,0x00]
11990
11991 v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
11992 // CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x04,0x00]
11993
11994 v_frexp_mant_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
11995 // CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x05,0x00]
11996
11997 v_frexp_mant_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
11998 // CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x16,0x00]
11999
12000 v_frexp_mant_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12001 // CHECK: [0xf9,0x68,0x0a,0x7e,0x01,0x06,0x26,0x00]
12002
12003 v_frexp_mant_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12004 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0xe4,0x00,0x00]
12005
12006 v_frexp_mant_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12007 // CHECK: [0xfa,0x68,0xfe,0x7f,0x01,0xe4,0x00,0x00]
12008
12009 v_frexp_mant_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12010 // CHECK: [0xfa,0x68,0x0a,0x7e,0xff,0xe4,0x00,0x00]
12011
12012 v_frexp_mant_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
12013 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x1b,0x00,0x00]
12014
12015 v_frexp_mant_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
12016 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x40,0x01,0x00]
12017
12018 v_frexp_mant_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
12019 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x41,0x01,0x00]
12020
12021 v_frexp_mant_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
12022 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x42,0x01,0x00]
12023
12024 v_frexp_mant_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
12025 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x43,0x01,0x00]
12026
12027 v_frexp_mant_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
12028 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x30,0x01,0x00]
12029
12030 v_frexp_mant_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
12031 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x34,0x01,0x00]
12032
12033 v_frexp_mant_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
12034 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x38,0x01,0x00]
12035
12036 v_frexp_mant_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
12037 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x3c,0x01,0x00]
12038
12039 v_frexp_mant_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
12040 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x01,0x01,0x00]
12041
12042 v_frexp_mant_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
12043 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x0f,0x01,0x00]
12044
12045 v_frexp_mant_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
12046 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x11,0x01,0x00]
12047
12048 v_frexp_mant_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
12049 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x1f,0x01,0x00]
12050
12051 v_frexp_mant_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
12052 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x21,0x01,0x00]
12053
12054 v_frexp_mant_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
12055 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0x2f,0x01,0x00]
12056
12057 v_frexp_mant_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
12058 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0xe4,0x00,0x10]
12059
12060 v_frexp_mant_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
12061 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0xe4,0x00,0x30]
12062
12063 v_frexp_mant_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
12064 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
12065
12066 v_frexp_mant_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
12067 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
12068
12069 v_frexp_mant_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
12070 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0xe4,0x00,0x01]
12071
12072 v_frexp_mant_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
12073 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0xe4,0x00,0x03]
12074
12075 v_frexp_mant_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
12076 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
12077
12078 v_frexp_mant_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
12079 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
12080
12081 v_frexp_mant_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
12082 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0xe4,0x08,0x00]
12083
12084 v_frexp_mant_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12085 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0xe4,0x10,0x00]
12086
12087 v_frexp_mant_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12088 // CHECK: [0xfa,0x68,0x0a,0x7e,0x01,0xe4,0x20,0x00]
12089
12090 v_screen_partition_4se_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12091 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x01,0x06,0x06,0x00]
12092
12093 v_screen_partition_4se_b32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12094 // CHECK: [0xf9,0x6e,0xfe,0x7f,0x01,0x06,0x06,0x00]
12095
12096 v_screen_partition_4se_b32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12097 // CHECK: [0xf9,0x6e,0x0a,0x7e,0xff,0x06,0x06,0x00]
12098
12099 v_screen_partition_4se_b32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12100 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x01,0x06,0x86,0x00]
12101
12102 v_screen_partition_4se_b32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12103 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x65,0x06,0x86,0x00]
12104
12105 v_screen_partition_4se_b32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12106 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x66,0x06,0x86,0x00]
12107
12108 v_screen_partition_4se_b32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12109 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x67,0x06,0x86,0x00]
12110
12111 v_screen_partition_4se_b32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12112 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x6a,0x06,0x86,0x00]
12113
12114 v_screen_partition_4se_b32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12115 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x6b,0x06,0x86,0x00]
12116
12117 v_screen_partition_4se_b32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12118 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x7b,0x06,0x86,0x00]
12119
12120 v_screen_partition_4se_b32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12121 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x7c,0x06,0x86,0x00]
12122
12123 v_screen_partition_4se_b32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12124 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x7e,0x06,0x86,0x00]
12125
12126 v_screen_partition_4se_b32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12127 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x7f,0x06,0x86,0x00]
12128
12129 v_screen_partition_4se_b32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12130 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x80,0x06,0x86,0x00]
12131
12132 v_screen_partition_4se_b32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12133 // CHECK: [0xf9,0x6e,0x0a,0x7e,0xc1,0x06,0x86,0x00]
12134
12135 v_screen_partition_4se_b32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12136 // CHECK: [0xf9,0x6e,0x0a,0x7e,0xf0,0x06,0x86,0x00]
12137
12138 v_screen_partition_4se_b32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12139 // CHECK: [0xf9,0x6e,0x0a,0x7e,0xf7,0x06,0x86,0x00]
12140
12141 v_screen_partition_4se_b32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12142 // CHECK: [0xf9,0x6e,0x0a,0x7e,0xfb,0x06,0x86,0x00]
12143
12144 v_screen_partition_4se_b32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12145 // CHECK: [0xf9,0x6e,0x0a,0x7e,0xfc,0x06,0x86,0x00]
12146
12147 v_screen_partition_4se_b32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12148 // CHECK: [0xf9,0x6e,0x0a,0x7e,0xfd,0x06,0x86,0x00]
12149
12150 v_screen_partition_4se_b32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
12151 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x01,0x06,0x06,0x00]
12152
12153 v_screen_partition_4se_b32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
12154 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x01,0x00,0x06,0x00]
12155
12156 v_screen_partition_4se_b32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
12157 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x01,0x01,0x06,0x00]
12158
12159 v_screen_partition_4se_b32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
12160 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x01,0x02,0x06,0x00]
12161
12162 v_screen_partition_4se_b32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
12163 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x01,0x03,0x06,0x00]
12164
12165 v_screen_partition_4se_b32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
12166 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x01,0x04,0x06,0x00]
12167
12168 v_screen_partition_4se_b32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
12169 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x01,0x05,0x06,0x00]
12170
12171 v_screen_partition_4se_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
12172 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x01,0x0e,0x06,0x00]
12173
12174 v_screen_partition_4se_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
12175 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x01,0x16,0x06,0x00]
12176
12177 v_screen_partition_4se_b32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
12178 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x01,0x16,0x06,0x00]
12179
12180 v_screen_partition_4se_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
12181 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x01,0x06,0x06,0x00]
12182
12183 v_screen_partition_4se_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
12184 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x01,0x06,0x00,0x00]
12185
12186 v_screen_partition_4se_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
12187 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x01,0x06,0x01,0x00]
12188
12189 v_screen_partition_4se_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
12190 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x01,0x06,0x02,0x00]
12191
12192 v_screen_partition_4se_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
12193 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x01,0x06,0x03,0x00]
12194
12195 v_screen_partition_4se_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
12196 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x01,0x06,0x04,0x00]
12197
12198 v_screen_partition_4se_b32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
12199 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x01,0x06,0x05,0x00]
12200
12201 v_screen_partition_4se_b32_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12202 // CHECK: [0xf9,0x6e,0x0a,0x7e,0x01,0x06,0x0e,0x00]
12203
12204 v_screen_partition_4se_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12205 // CHECK: [0xfa,0x6e,0x0a,0x7e,0x01,0xe4,0x00,0x00]
12206
12207 v_screen_partition_4se_b32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12208 // CHECK: [0xfa,0x6e,0xfe,0x7f,0x01,0xe4,0x00,0x00]
12209
12210 v_screen_partition_4se_b32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12211 // CHECK: [0xfa,0x6e,0x0a,0x7e,0xff,0xe4,0x00,0x00]
12212
12213 v_screen_partition_4se_b32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
12214 // CHECK: [0xfa,0x6e,0x0a,0x7e,0x01,0x1b,0x00,0x00]
12215
12216 v_screen_partition_4se_b32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
12217 // CHECK: [0xfa,0x6e,0x0a,0x7e,0x01,0x40,0x01,0x00]
12218
12219 v_screen_partition_4se_b32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
12220 // CHECK: [0xfa,0x6e,0x0a,0x7e,0x01,0x41,0x01,0x00]
12221
12222 v_screen_partition_4se_b32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
12223 // CHECK: [0xfa,0x6e,0x0a,0x7e,0x01,0x42,0x01,0x00]
12224
12225 v_screen_partition_4se_b32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
12226 // CHECK: [0xfa,0x6e,0x0a,0x7e,0x01,0x43,0x01,0x00]
12227
12228 v_screen_partition_4se_b32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
12229 // CHECK: [0xfa,0x6e,0x0a,0x7e,0x01,0x30,0x01,0x00]
12230
12231 v_screen_partition_4se_b32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
12232 // CHECK: [0xfa,0x6e,0x0a,0x7e,0x01,0x34,0x01,0x00]
12233
12234 v_screen_partition_4se_b32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
12235 // CHECK: [0xfa,0x6e,0x0a,0x7e,0x01,0x38,0x01,0x00]
12236
12237 v_screen_partition_4se_b32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
12238 // CHECK: [0xfa,0x6e,0x0a,0x7e,0x01,0x3c,0x01,0x00]
12239
12240 v_screen_partition_4se_b32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
12241 // CHECK: [0xfa,0x6e,0x0a,0x7e,0x01,0x01,0x01,0x00]
12242
12243 v_screen_partition_4se_b32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
12244 // CHECK: [0xfa,0x6e,0x0a,0x7e,0x01,0x0f,0x01,0x00]
12245
12246 v_screen_partition_4se_b32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
12247 // CHECK: [0xfa,0x6e,0x0a,0x7e,0x01,0x11,0x01,0x00]
12248
12249 v_screen_partition_4se_b32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
12250 // CHECK: [0xfa,0x6e,0x0a,0x7e,0x01,0x1f,0x01,0x00]
12251
12252 v_screen_partition_4se_b32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
12253 // CHECK: [0xfa,0x6e,0x0a,0x7e,0x01,0x21,0x01,0x00]
12254
12255 v_screen_partition_4se_b32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
12256 // CHECK: [0xfa,0x6e,0x0a,0x7e,0x01,0x2f,0x01,0x00]
12257
12258 v_screen_partition_4se_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
12259 // CHECK: [0xfa,0x6e,0x0a,0x7e,0x01,0xe4,0x00,0x10]
12260
12261 v_screen_partition_4se_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
12262 // CHECK: [0xfa,0x6e,0x0a,0x7e,0x01,0xe4,0x00,0x30]
12263
12264 v_screen_partition_4se_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
12265 // CHECK: [0xfa,0x6e,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
12266
12267 v_screen_partition_4se_b32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
12268 // CHECK: [0xfa,0x6e,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
12269
12270 v_screen_partition_4se_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
12271 // CHECK: [0xfa,0x6e,0x0a,0x7e,0x01,0xe4,0x00,0x01]
12272
12273 v_screen_partition_4se_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
12274 // CHECK: [0xfa,0x6e,0x0a,0x7e,0x01,0xe4,0x00,0x03]
12275
12276 v_screen_partition_4se_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
12277 // CHECK: [0xfa,0x6e,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
12278
12279 v_screen_partition_4se_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
12280 // CHECK: [0xfa,0x6e,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
12281
12282 v_screen_partition_4se_b32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
12283 // CHECK: [0xfa,0x6e,0x0a,0x7e,0x01,0xe4,0x08,0x00]
12284
12285 v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12286 // CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x06,0x00]
12287
12288 v_cvt_f16_u16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12289 // CHECK: [0xf9,0x72,0xfe,0x7f,0x01,0x06,0x06,0x00]
12290
12291 v_cvt_f16_u16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12292 // CHECK: [0xf9,0x72,0x0a,0x7e,0xff,0x06,0x06,0x00]
12293
12294 v_cvt_f16_u16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12295 // CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x86,0x00]
12296
12297 v_cvt_f16_u16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12298 // CHECK: [0xf9,0x72,0x0a,0x7e,0x65,0x06,0x86,0x00]
12299
12300 v_cvt_f16_u16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12301 // CHECK: [0xf9,0x72,0x0a,0x7e,0x66,0x06,0x86,0x00]
12302
12303 v_cvt_f16_u16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12304 // CHECK: [0xf9,0x72,0x0a,0x7e,0x67,0x06,0x86,0x00]
12305
12306 v_cvt_f16_u16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12307 // CHECK: [0xf9,0x72,0x0a,0x7e,0x6a,0x06,0x86,0x00]
12308
12309 v_cvt_f16_u16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12310 // CHECK: [0xf9,0x72,0x0a,0x7e,0x6b,0x06,0x86,0x00]
12311
12312 v_cvt_f16_u16_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12313 // CHECK: [0xf9,0x72,0x0a,0x7e,0x7b,0x06,0x86,0x00]
12314
12315 v_cvt_f16_u16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12316 // CHECK: [0xf9,0x72,0x0a,0x7e,0x7c,0x06,0x86,0x00]
12317
12318 v_cvt_f16_u16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12319 // CHECK: [0xf9,0x72,0x0a,0x7e,0x7e,0x06,0x86,0x00]
12320
12321 v_cvt_f16_u16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12322 // CHECK: [0xf9,0x72,0x0a,0x7e,0x7f,0x06,0x86,0x00]
12323
12324 v_cvt_f16_u16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12325 // CHECK: [0xf9,0x72,0x0a,0x7e,0x80,0x06,0x86,0x00]
12326
12327 v_cvt_f16_u16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12328 // CHECK: [0xf9,0x72,0x0a,0x7e,0xc1,0x06,0x86,0x00]
12329
12330 v_cvt_f16_u16_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12331 // CHECK: [0xf9,0x72,0x0a,0x7e,0xfb,0x06,0x86,0x00]
12332
12333 v_cvt_f16_u16_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12334 // CHECK: [0xf9,0x72,0x0a,0x7e,0xfc,0x06,0x86,0x00]
12335
12336 v_cvt_f16_u16_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12337 // CHECK: [0xf9,0x72,0x0a,0x7e,0xfd,0x06,0x86,0x00]
12338
12339 v_cvt_f16_u16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12340 // CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x26,0x06,0x00]
12341
12342 v_cvt_f16_u16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
12343 // CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x06,0x00]
12344
12345 v_cvt_f16_u16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
12346 // CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x00,0x06,0x00]
12347
12348 v_cvt_f16_u16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
12349 // CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x01,0x06,0x00]
12350
12351 v_cvt_f16_u16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
12352 // CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x02,0x06,0x00]
12353
12354 v_cvt_f16_u16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
12355 // CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x03,0x06,0x00]
12356
12357 v_cvt_f16_u16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
12358 // CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x04,0x06,0x00]
12359
12360 v_cvt_f16_u16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
12361 // CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x05,0x06,0x00]
12362
12363 v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
12364 // CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x0e,0x06,0x00]
12365
12366 v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
12367 // CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x16,0x06,0x00]
12368
12369 v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
12370 // CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x16,0x06,0x00]
12371
12372 v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
12373 // CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x06,0x00]
12374
12375 v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
12376 // CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x00,0x00]
12377
12378 v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
12379 // CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x01,0x00]
12380
12381 v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
12382 // CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x02,0x00]
12383
12384 v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
12385 // CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x03,0x00]
12386
12387 v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
12388 // CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x04,0x00]
12389
12390 v_cvt_f16_u16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
12391 // CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x05,0x00]
12392
12393 v_cvt_f16_u16_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12394 // CHECK: [0xf9,0x72,0x0a,0x7e,0x01,0x06,0x0e,0x00]
12395
12396 v_cvt_f16_u16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12397 // CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0xe4,0x00,0x00]
12398
12399 v_cvt_f16_u16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12400 // CHECK: [0xfa,0x72,0xfe,0x7f,0x01,0xe4,0x00,0x00]
12401
12402 v_cvt_f16_u16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12403 // CHECK: [0xfa,0x72,0x0a,0x7e,0xff,0xe4,0x00,0x00]
12404
12405 v_cvt_f16_u16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
12406 // CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x1b,0x00,0x00]
12407
12408 v_cvt_f16_u16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
12409 // CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x40,0x01,0x00]
12410
12411 v_cvt_f16_u16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
12412 // CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x41,0x01,0x00]
12413
12414 v_cvt_f16_u16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
12415 // CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x42,0x01,0x00]
12416
12417 v_cvt_f16_u16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
12418 // CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x43,0x01,0x00]
12419
12420 v_cvt_f16_u16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
12421 // CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x30,0x01,0x00]
12422
12423 v_cvt_f16_u16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
12424 // CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x34,0x01,0x00]
12425
12426 v_cvt_f16_u16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
12427 // CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x38,0x01,0x00]
12428
12429 v_cvt_f16_u16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
12430 // CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x3c,0x01,0x00]
12431
12432 v_cvt_f16_u16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
12433 // CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x01,0x01,0x00]
12434
12435 v_cvt_f16_u16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
12436 // CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x0f,0x01,0x00]
12437
12438 v_cvt_f16_u16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
12439 // CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x11,0x01,0x00]
12440
12441 v_cvt_f16_u16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
12442 // CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x1f,0x01,0x00]
12443
12444 v_cvt_f16_u16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
12445 // CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x21,0x01,0x00]
12446
12447 v_cvt_f16_u16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
12448 // CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0x2f,0x01,0x00]
12449
12450 v_cvt_f16_u16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
12451 // CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0xe4,0x00,0x10]
12452
12453 v_cvt_f16_u16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
12454 // CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0xe4,0x00,0x30]
12455
12456 v_cvt_f16_u16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
12457 // CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
12458
12459 v_cvt_f16_u16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
12460 // CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
12461
12462 v_cvt_f16_u16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
12463 // CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0xe4,0x00,0x01]
12464
12465 v_cvt_f16_u16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
12466 // CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0xe4,0x00,0x03]
12467
12468 v_cvt_f16_u16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
12469 // CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
12470
12471 v_cvt_f16_u16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
12472 // CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
12473
12474 v_cvt_f16_u16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
12475 // CHECK: [0xfa,0x72,0x0a,0x7e,0x01,0xe4,0x08,0x00]
12476
12477 v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12478 // CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x06,0x00]
12479
12480 v_cvt_f16_i16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12481 // CHECK: [0xf9,0x74,0xfe,0x7f,0x01,0x06,0x06,0x00]
12482
12483 v_cvt_f16_i16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12484 // CHECK: [0xf9,0x74,0x0a,0x7e,0xff,0x06,0x06,0x00]
12485
12486 v_cvt_f16_i16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12487 // CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x86,0x00]
12488
12489 v_cvt_f16_i16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12490 // CHECK: [0xf9,0x74,0x0a,0x7e,0x65,0x06,0x86,0x00]
12491
12492 v_cvt_f16_i16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12493 // CHECK: [0xf9,0x74,0x0a,0x7e,0x66,0x06,0x86,0x00]
12494
12495 v_cvt_f16_i16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12496 // CHECK: [0xf9,0x74,0x0a,0x7e,0x67,0x06,0x86,0x00]
12497
12498 v_cvt_f16_i16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12499 // CHECK: [0xf9,0x74,0x0a,0x7e,0x6a,0x06,0x86,0x00]
12500
12501 v_cvt_f16_i16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12502 // CHECK: [0xf9,0x74,0x0a,0x7e,0x6b,0x06,0x86,0x00]
12503
12504 v_cvt_f16_i16_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12505 // CHECK: [0xf9,0x74,0x0a,0x7e,0x7b,0x06,0x86,0x00]
12506
12507 v_cvt_f16_i16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12508 // CHECK: [0xf9,0x74,0x0a,0x7e,0x7c,0x06,0x86,0x00]
12509
12510 v_cvt_f16_i16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12511 // CHECK: [0xf9,0x74,0x0a,0x7e,0x7e,0x06,0x86,0x00]
12512
12513 v_cvt_f16_i16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12514 // CHECK: [0xf9,0x74,0x0a,0x7e,0x7f,0x06,0x86,0x00]
12515
12516 v_cvt_f16_i16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12517 // CHECK: [0xf9,0x74,0x0a,0x7e,0x80,0x06,0x86,0x00]
12518
12519 v_cvt_f16_i16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12520 // CHECK: [0xf9,0x74,0x0a,0x7e,0xc1,0x06,0x86,0x00]
12521
12522 v_cvt_f16_i16_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12523 // CHECK: [0xf9,0x74,0x0a,0x7e,0xfb,0x06,0x86,0x00]
12524
12525 v_cvt_f16_i16_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12526 // CHECK: [0xf9,0x74,0x0a,0x7e,0xfc,0x06,0x86,0x00]
12527
12528 v_cvt_f16_i16_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12529 // CHECK: [0xf9,0x74,0x0a,0x7e,0xfd,0x06,0x86,0x00]
12530
12531 v_cvt_f16_i16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12532 // CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x26,0x06,0x00]
12533
12534 v_cvt_f16_i16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
12535 // CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x06,0x00]
12536
12537 v_cvt_f16_i16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
12538 // CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x00,0x06,0x00]
12539
12540 v_cvt_f16_i16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
12541 // CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x01,0x06,0x00]
12542
12543 v_cvt_f16_i16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
12544 // CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x02,0x06,0x00]
12545
12546 v_cvt_f16_i16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
12547 // CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x03,0x06,0x00]
12548
12549 v_cvt_f16_i16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
12550 // CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x04,0x06,0x00]
12551
12552 v_cvt_f16_i16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
12553 // CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x05,0x06,0x00]
12554
12555 v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
12556 // CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x0e,0x06,0x00]
12557
12558 v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
12559 // CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x16,0x06,0x00]
12560
12561 v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
12562 // CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x16,0x06,0x00]
12563
12564 v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
12565 // CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x06,0x00]
12566
12567 v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
12568 // CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x00,0x00]
12569
12570 v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
12571 // CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x01,0x00]
12572
12573 v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
12574 // CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x02,0x00]
12575
12576 v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
12577 // CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x03,0x00]
12578
12579 v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
12580 // CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x04,0x00]
12581
12582 v_cvt_f16_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
12583 // CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x05,0x00]
12584
12585 v_cvt_f16_i16_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12586 // CHECK: [0xf9,0x74,0x0a,0x7e,0x01,0x06,0x0e,0x00]
12587
12588 v_cvt_f16_i16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12589 // CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0xe4,0x00,0x00]
12590
12591 v_cvt_f16_i16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12592 // CHECK: [0xfa,0x74,0xfe,0x7f,0x01,0xe4,0x00,0x00]
12593
12594 v_cvt_f16_i16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12595 // CHECK: [0xfa,0x74,0x0a,0x7e,0xff,0xe4,0x00,0x00]
12596
12597 v_cvt_f16_i16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
12598 // CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x1b,0x00,0x00]
12599
12600 v_cvt_f16_i16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
12601 // CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x40,0x01,0x00]
12602
12603 v_cvt_f16_i16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
12604 // CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x41,0x01,0x00]
12605
12606 v_cvt_f16_i16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
12607 // CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x42,0x01,0x00]
12608
12609 v_cvt_f16_i16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
12610 // CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x43,0x01,0x00]
12611
12612 v_cvt_f16_i16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
12613 // CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x30,0x01,0x00]
12614
12615 v_cvt_f16_i16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
12616 // CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x34,0x01,0x00]
12617
12618 v_cvt_f16_i16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
12619 // CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x38,0x01,0x00]
12620
12621 v_cvt_f16_i16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
12622 // CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x3c,0x01,0x00]
12623
12624 v_cvt_f16_i16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
12625 // CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x01,0x01,0x00]
12626
12627 v_cvt_f16_i16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
12628 // CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x0f,0x01,0x00]
12629
12630 v_cvt_f16_i16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
12631 // CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x11,0x01,0x00]
12632
12633 v_cvt_f16_i16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
12634 // CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x1f,0x01,0x00]
12635
12636 v_cvt_f16_i16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
12637 // CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x21,0x01,0x00]
12638
12639 v_cvt_f16_i16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
12640 // CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0x2f,0x01,0x00]
12641
12642 v_cvt_f16_i16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
12643 // CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0xe4,0x00,0x10]
12644
12645 v_cvt_f16_i16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
12646 // CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0xe4,0x00,0x30]
12647
12648 v_cvt_f16_i16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
12649 // CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
12650
12651 v_cvt_f16_i16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
12652 // CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
12653
12654 v_cvt_f16_i16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
12655 // CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0xe4,0x00,0x01]
12656
12657 v_cvt_f16_i16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
12658 // CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0xe4,0x00,0x03]
12659
12660 v_cvt_f16_i16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
12661 // CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
12662
12663 v_cvt_f16_i16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
12664 // CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
12665
12666 v_cvt_f16_i16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
12667 // CHECK: [0xfa,0x74,0x0a,0x7e,0x01,0xe4,0x08,0x00]
12668
12669 v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12670 // CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x06,0x00]
12671
12672 v_cvt_u16_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12673 // CHECK: [0xf9,0x76,0xfe,0x7f,0x01,0x06,0x06,0x00]
12674
12675 v_cvt_u16_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12676 // CHECK: [0xf9,0x76,0x0a,0x7e,0xff,0x06,0x06,0x00]
12677
12678 v_cvt_u16_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12679 // CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x86,0x00]
12680
12681 v_cvt_u16_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12682 // CHECK: [0xf9,0x76,0x0a,0x7e,0x65,0x06,0x86,0x00]
12683
12684 v_cvt_u16_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12685 // CHECK: [0xf9,0x76,0x0a,0x7e,0x66,0x06,0x86,0x00]
12686
12687 v_cvt_u16_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12688 // CHECK: [0xf9,0x76,0x0a,0x7e,0x67,0x06,0x86,0x00]
12689
12690 v_cvt_u16_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12691 // CHECK: [0xf9,0x76,0x0a,0x7e,0x6a,0x06,0x86,0x00]
12692
12693 v_cvt_u16_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12694 // CHECK: [0xf9,0x76,0x0a,0x7e,0x6b,0x06,0x86,0x00]
12695
12696 v_cvt_u16_f16_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12697 // CHECK: [0xf9,0x76,0x0a,0x7e,0x7b,0x06,0x86,0x00]
12698
12699 v_cvt_u16_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12700 // CHECK: [0xf9,0x76,0x0a,0x7e,0x7c,0x06,0x86,0x00]
12701
12702 v_cvt_u16_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12703 // CHECK: [0xf9,0x76,0x0a,0x7e,0x7e,0x06,0x86,0x00]
12704
12705 v_cvt_u16_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12706 // CHECK: [0xf9,0x76,0x0a,0x7e,0x7f,0x06,0x86,0x00]
12707
12708 v_cvt_u16_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12709 // CHECK: [0xf9,0x76,0x0a,0x7e,0x80,0x06,0x86,0x00]
12710
12711 v_cvt_u16_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12712 // CHECK: [0xf9,0x76,0x0a,0x7e,0xc1,0x06,0x86,0x00]
12713
12714 v_cvt_u16_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12715 // CHECK: [0xf9,0x76,0x0a,0x7e,0xf0,0x06,0x86,0x00]
12716
12717 v_cvt_u16_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12718 // CHECK: [0xf9,0x76,0x0a,0x7e,0xf7,0x06,0x86,0x00]
12719
12720 v_cvt_u16_f16_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12721 // CHECK: [0xf9,0x76,0x0a,0x7e,0xfb,0x06,0x86,0x00]
12722
12723 v_cvt_u16_f16_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12724 // CHECK: [0xf9,0x76,0x0a,0x7e,0xfc,0x06,0x86,0x00]
12725
12726 v_cvt_u16_f16_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12727 // CHECK: [0xf9,0x76,0x0a,0x7e,0xfd,0x06,0x86,0x00]
12728
12729 v_cvt_u16_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12730 // CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x26,0x06,0x00]
12731
12732 v_cvt_u16_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
12733 // CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x06,0x00]
12734
12735 v_cvt_u16_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
12736 // CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x00,0x06,0x00]
12737
12738 v_cvt_u16_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
12739 // CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x01,0x06,0x00]
12740
12741 v_cvt_u16_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
12742 // CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x02,0x06,0x00]
12743
12744 v_cvt_u16_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
12745 // CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x03,0x06,0x00]
12746
12747 v_cvt_u16_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
12748 // CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x04,0x06,0x00]
12749
12750 v_cvt_u16_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
12751 // CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x05,0x06,0x00]
12752
12753 v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
12754 // CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x0e,0x06,0x00]
12755
12756 v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
12757 // CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x16,0x06,0x00]
12758
12759 v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
12760 // CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x16,0x06,0x00]
12761
12762 v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
12763 // CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x06,0x00]
12764
12765 v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
12766 // CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x00,0x00]
12767
12768 v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
12769 // CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x01,0x00]
12770
12771 v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
12772 // CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x02,0x00]
12773
12774 v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
12775 // CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x03,0x00]
12776
12777 v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
12778 // CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x04,0x00]
12779
12780 v_cvt_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
12781 // CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x05,0x00]
12782
12783 v_cvt_u16_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12784 // CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x16,0x00]
12785
12786 v_cvt_u16_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12787 // CHECK: [0xf9,0x76,0x0a,0x7e,0x01,0x06,0x26,0x00]
12788
12789 v_cvt_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12790 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0xe4,0x00,0x00]
12791
12792 v_cvt_u16_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12793 // CHECK: [0xfa,0x76,0xfe,0x7f,0x01,0xe4,0x00,0x00]
12794
12795 v_cvt_u16_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12796 // CHECK: [0xfa,0x76,0x0a,0x7e,0xff,0xe4,0x00,0x00]
12797
12798 v_cvt_u16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
12799 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x1b,0x00,0x00]
12800
12801 v_cvt_u16_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
12802 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x40,0x01,0x00]
12803
12804 v_cvt_u16_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
12805 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x41,0x01,0x00]
12806
12807 v_cvt_u16_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
12808 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x42,0x01,0x00]
12809
12810 v_cvt_u16_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
12811 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x43,0x01,0x00]
12812
12813 v_cvt_u16_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
12814 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x30,0x01,0x00]
12815
12816 v_cvt_u16_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
12817 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x34,0x01,0x00]
12818
12819 v_cvt_u16_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
12820 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x38,0x01,0x00]
12821
12822 v_cvt_u16_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
12823 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x3c,0x01,0x00]
12824
12825 v_cvt_u16_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
12826 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x01,0x01,0x00]
12827
12828 v_cvt_u16_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
12829 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x0f,0x01,0x00]
12830
12831 v_cvt_u16_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
12832 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x11,0x01,0x00]
12833
12834 v_cvt_u16_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
12835 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x1f,0x01,0x00]
12836
12837 v_cvt_u16_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
12838 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x21,0x01,0x00]
12839
12840 v_cvt_u16_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
12841 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0x2f,0x01,0x00]
12842
12843 v_cvt_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
12844 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0xe4,0x00,0x10]
12845
12846 v_cvt_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
12847 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0xe4,0x00,0x30]
12848
12849 v_cvt_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
12850 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
12851
12852 v_cvt_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
12853 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
12854
12855 v_cvt_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
12856 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0xe4,0x00,0x01]
12857
12858 v_cvt_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
12859 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0xe4,0x00,0x03]
12860
12861 v_cvt_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
12862 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
12863
12864 v_cvt_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
12865 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
12866
12867 v_cvt_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
12868 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0xe4,0x08,0x00]
12869
12870 v_cvt_u16_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12871 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0xe4,0x10,0x00]
12872
12873 v_cvt_u16_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12874 // CHECK: [0xfa,0x76,0x0a,0x7e,0x01,0xe4,0x20,0x00]
12875
12876 v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12877 // CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x06,0x00]
12878
12879 v_cvt_i16_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12880 // CHECK: [0xf9,0x78,0xfe,0x7f,0x01,0x06,0x06,0x00]
12881
12882 v_cvt_i16_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12883 // CHECK: [0xf9,0x78,0x0a,0x7e,0xff,0x06,0x06,0x00]
12884
12885 v_cvt_i16_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12886 // CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x86,0x00]
12887
12888 v_cvt_i16_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12889 // CHECK: [0xf9,0x78,0x0a,0x7e,0x65,0x06,0x86,0x00]
12890
12891 v_cvt_i16_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12892 // CHECK: [0xf9,0x78,0x0a,0x7e,0x66,0x06,0x86,0x00]
12893
12894 v_cvt_i16_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12895 // CHECK: [0xf9,0x78,0x0a,0x7e,0x67,0x06,0x86,0x00]
12896
12897 v_cvt_i16_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12898 // CHECK: [0xf9,0x78,0x0a,0x7e,0x6a,0x06,0x86,0x00]
12899
12900 v_cvt_i16_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12901 // CHECK: [0xf9,0x78,0x0a,0x7e,0x6b,0x06,0x86,0x00]
12902
12903 v_cvt_i16_f16_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12904 // CHECK: [0xf9,0x78,0x0a,0x7e,0x7b,0x06,0x86,0x00]
12905
12906 v_cvt_i16_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12907 // CHECK: [0xf9,0x78,0x0a,0x7e,0x7c,0x06,0x86,0x00]
12908
12909 v_cvt_i16_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12910 // CHECK: [0xf9,0x78,0x0a,0x7e,0x7e,0x06,0x86,0x00]
12911
12912 v_cvt_i16_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12913 // CHECK: [0xf9,0x78,0x0a,0x7e,0x7f,0x06,0x86,0x00]
12914
12915 v_cvt_i16_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12916 // CHECK: [0xf9,0x78,0x0a,0x7e,0x80,0x06,0x86,0x00]
12917
12918 v_cvt_i16_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12919 // CHECK: [0xf9,0x78,0x0a,0x7e,0xc1,0x06,0x86,0x00]
12920
12921 v_cvt_i16_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12922 // CHECK: [0xf9,0x78,0x0a,0x7e,0xf0,0x06,0x86,0x00]
12923
12924 v_cvt_i16_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12925 // CHECK: [0xf9,0x78,0x0a,0x7e,0xf7,0x06,0x86,0x00]
12926
12927 v_cvt_i16_f16_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12928 // CHECK: [0xf9,0x78,0x0a,0x7e,0xfb,0x06,0x86,0x00]
12929
12930 v_cvt_i16_f16_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12931 // CHECK: [0xf9,0x78,0x0a,0x7e,0xfc,0x06,0x86,0x00]
12932
12933 v_cvt_i16_f16_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12934 // CHECK: [0xf9,0x78,0x0a,0x7e,0xfd,0x06,0x86,0x00]
12935
12936 v_cvt_i16_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12937 // CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x26,0x06,0x00]
12938
12939 v_cvt_i16_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
12940 // CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x06,0x00]
12941
12942 v_cvt_i16_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
12943 // CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x00,0x06,0x00]
12944
12945 v_cvt_i16_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
12946 // CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x01,0x06,0x00]
12947
12948 v_cvt_i16_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
12949 // CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x02,0x06,0x00]
12950
12951 v_cvt_i16_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
12952 // CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x03,0x06,0x00]
12953
12954 v_cvt_i16_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
12955 // CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x04,0x06,0x00]
12956
12957 v_cvt_i16_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
12958 // CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x05,0x06,0x00]
12959
12960 v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
12961 // CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x0e,0x06,0x00]
12962
12963 v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
12964 // CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x16,0x06,0x00]
12965
12966 v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
12967 // CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x16,0x06,0x00]
12968
12969 v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
12970 // CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x06,0x00]
12971
12972 v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
12973 // CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x00,0x00]
12974
12975 v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
12976 // CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x01,0x00]
12977
12978 v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
12979 // CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x02,0x00]
12980
12981 v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
12982 // CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x03,0x00]
12983
12984 v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
12985 // CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x04,0x00]
12986
12987 v_cvt_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
12988 // CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x05,0x00]
12989
12990 v_cvt_i16_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12991 // CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x16,0x00]
12992
12993 v_cvt_i16_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
12994 // CHECK: [0xf9,0x78,0x0a,0x7e,0x01,0x06,0x26,0x00]
12995
12996 v_cvt_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
12997 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0xe4,0x00,0x00]
12998
12999 v_cvt_i16_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
13000 // CHECK: [0xfa,0x78,0xfe,0x7f,0x01,0xe4,0x00,0x00]
13001
13002 v_cvt_i16_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
13003 // CHECK: [0xfa,0x78,0x0a,0x7e,0xff,0xe4,0x00,0x00]
13004
13005 v_cvt_i16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
13006 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x1b,0x00,0x00]
13007
13008 v_cvt_i16_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
13009 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x40,0x01,0x00]
13010
13011 v_cvt_i16_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
13012 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x41,0x01,0x00]
13013
13014 v_cvt_i16_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
13015 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x42,0x01,0x00]
13016
13017 v_cvt_i16_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
13018 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x43,0x01,0x00]
13019
13020 v_cvt_i16_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
13021 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x30,0x01,0x00]
13022
13023 v_cvt_i16_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
13024 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x34,0x01,0x00]
13025
13026 v_cvt_i16_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
13027 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x38,0x01,0x00]
13028
13029 v_cvt_i16_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
13030 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x3c,0x01,0x00]
13031
13032 v_cvt_i16_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
13033 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x01,0x01,0x00]
13034
13035 v_cvt_i16_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
13036 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x0f,0x01,0x00]
13037
13038 v_cvt_i16_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
13039 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x11,0x01,0x00]
13040
13041 v_cvt_i16_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
13042 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x1f,0x01,0x00]
13043
13044 v_cvt_i16_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
13045 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x21,0x01,0x00]
13046
13047 v_cvt_i16_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
13048 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0x2f,0x01,0x00]
13049
13050 v_cvt_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
13051 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0xe4,0x00,0x10]
13052
13053 v_cvt_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
13054 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0xe4,0x00,0x30]
13055
13056 v_cvt_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
13057 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
13058
13059 v_cvt_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
13060 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
13061
13062 v_cvt_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
13063 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0xe4,0x00,0x01]
13064
13065 v_cvt_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
13066 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0xe4,0x00,0x03]
13067
13068 v_cvt_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
13069 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
13070
13071 v_cvt_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
13072 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
13073
13074 v_cvt_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
13075 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0xe4,0x08,0x00]
13076
13077 v_cvt_i16_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
13078 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0xe4,0x10,0x00]
13079
13080 v_cvt_i16_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
13081 // CHECK: [0xfa,0x78,0x0a,0x7e,0x01,0xe4,0x20,0x00]
13082
13083 v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13084 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x06,0x00]
13085
13086 v_rcp_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13087 // CHECK: [0xf9,0x7a,0xfe,0x7f,0x01,0x06,0x06,0x00]
13088
13089 v_rcp_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13090 // CHECK: [0xf9,0x7a,0x0a,0x7e,0xff,0x06,0x06,0x00]
13091
13092 v_rcp_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13093 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x86,0x00]
13094
13095 v_rcp_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13096 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x65,0x06,0x86,0x00]
13097
13098 v_rcp_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13099 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x66,0x06,0x86,0x00]
13100
13101 v_rcp_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13102 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x67,0x06,0x86,0x00]
13103
13104 v_rcp_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13105 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x6a,0x06,0x86,0x00]
13106
13107 v_rcp_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13108 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x6b,0x06,0x86,0x00]
13109
13110 v_rcp_f16_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13111 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x7b,0x06,0x86,0x00]
13112
13113 v_rcp_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13114 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x7c,0x06,0x86,0x00]
13115
13116 v_rcp_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13117 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x7e,0x06,0x86,0x00]
13118
13119 v_rcp_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13120 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x7f,0x06,0x86,0x00]
13121
13122 v_rcp_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13123 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x80,0x06,0x86,0x00]
13124
13125 v_rcp_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13126 // CHECK: [0xf9,0x7a,0x0a,0x7e,0xc1,0x06,0x86,0x00]
13127
13128 v_rcp_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13129 // CHECK: [0xf9,0x7a,0x0a,0x7e,0xf0,0x06,0x86,0x00]
13130
13131 v_rcp_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13132 // CHECK: [0xf9,0x7a,0x0a,0x7e,0xf7,0x06,0x86,0x00]
13133
13134 v_rcp_f16_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13135 // CHECK: [0xf9,0x7a,0x0a,0x7e,0xfb,0x06,0x86,0x00]
13136
13137 v_rcp_f16_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13138 // CHECK: [0xf9,0x7a,0x0a,0x7e,0xfc,0x06,0x86,0x00]
13139
13140 v_rcp_f16_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13141 // CHECK: [0xf9,0x7a,0x0a,0x7e,0xfd,0x06,0x86,0x00]
13142
13143 v_rcp_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13144 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x26,0x06,0x00]
13145
13146 v_rcp_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
13147 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x06,0x00]
13148
13149 v_rcp_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
13150 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x00,0x06,0x00]
13151
13152 v_rcp_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
13153 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x01,0x06,0x00]
13154
13155 v_rcp_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
13156 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x02,0x06,0x00]
13157
13158 v_rcp_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
13159 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x03,0x06,0x00]
13160
13161 v_rcp_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
13162 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x04,0x06,0x00]
13163
13164 v_rcp_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
13165 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x05,0x06,0x00]
13166
13167 v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
13168 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x0e,0x06,0x00]
13169
13170 v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
13171 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x16,0x06,0x00]
13172
13173 v_rcp_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
13174 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x16,0x06,0x00]
13175
13176 v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
13177 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x06,0x00]
13178
13179 v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
13180 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x00,0x00]
13181
13182 v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
13183 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x01,0x00]
13184
13185 v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
13186 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x02,0x00]
13187
13188 v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
13189 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x03,0x00]
13190
13191 v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
13192 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x04,0x00]
13193
13194 v_rcp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
13195 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x05,0x00]
13196
13197 v_rcp_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13198 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x16,0x00]
13199
13200 v_rcp_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13201 // CHECK: [0xf9,0x7a,0x0a,0x7e,0x01,0x06,0x26,0x00]
13202
13203 v_rcp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
13204 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0xe4,0x00,0x00]
13205
13206 v_rcp_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
13207 // CHECK: [0xfa,0x7a,0xfe,0x7f,0x01,0xe4,0x00,0x00]
13208
13209 v_rcp_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
13210 // CHECK: [0xfa,0x7a,0x0a,0x7e,0xff,0xe4,0x00,0x00]
13211
13212 v_rcp_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
13213 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x1b,0x00,0x00]
13214
13215 v_rcp_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
13216 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x40,0x01,0x00]
13217
13218 v_rcp_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
13219 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x41,0x01,0x00]
13220
13221 v_rcp_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
13222 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x42,0x01,0x00]
13223
13224 v_rcp_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
13225 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x43,0x01,0x00]
13226
13227 v_rcp_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
13228 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x30,0x01,0x00]
13229
13230 v_rcp_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
13231 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x34,0x01,0x00]
13232
13233 v_rcp_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
13234 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x38,0x01,0x00]
13235
13236 v_rcp_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
13237 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x3c,0x01,0x00]
13238
13239 v_rcp_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
13240 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x01,0x01,0x00]
13241
13242 v_rcp_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
13243 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x0f,0x01,0x00]
13244
13245 v_rcp_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
13246 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x11,0x01,0x00]
13247
13248 v_rcp_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
13249 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x1f,0x01,0x00]
13250
13251 v_rcp_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
13252 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x21,0x01,0x00]
13253
13254 v_rcp_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
13255 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0x2f,0x01,0x00]
13256
13257 v_rcp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
13258 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0xe4,0x00,0x10]
13259
13260 v_rcp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
13261 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0xe4,0x00,0x30]
13262
13263 v_rcp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
13264 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
13265
13266 v_rcp_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
13267 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
13268
13269 v_rcp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
13270 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0xe4,0x00,0x01]
13271
13272 v_rcp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
13273 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0xe4,0x00,0x03]
13274
13275 v_rcp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
13276 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
13277
13278 v_rcp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
13279 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
13280
13281 v_rcp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
13282 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0xe4,0x08,0x00]
13283
13284 v_rcp_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
13285 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0xe4,0x10,0x00]
13286
13287 v_rcp_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
13288 // CHECK: [0xfa,0x7a,0x0a,0x7e,0x01,0xe4,0x20,0x00]
13289
13290 v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13291 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x06,0x00]
13292
13293 v_sqrt_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13294 // CHECK: [0xf9,0x7c,0xfe,0x7f,0x01,0x06,0x06,0x00]
13295
13296 v_sqrt_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13297 // CHECK: [0xf9,0x7c,0x0a,0x7e,0xff,0x06,0x06,0x00]
13298
13299 v_sqrt_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13300 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x86,0x00]
13301
13302 v_sqrt_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13303 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x65,0x06,0x86,0x00]
13304
13305 v_sqrt_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13306 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x66,0x06,0x86,0x00]
13307
13308 v_sqrt_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13309 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x67,0x06,0x86,0x00]
13310
13311 v_sqrt_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13312 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x6a,0x06,0x86,0x00]
13313
13314 v_sqrt_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13315 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x6b,0x06,0x86,0x00]
13316
13317 v_sqrt_f16_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13318 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x7b,0x06,0x86,0x00]
13319
13320 v_sqrt_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13321 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x7c,0x06,0x86,0x00]
13322
13323 v_sqrt_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13324 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x7e,0x06,0x86,0x00]
13325
13326 v_sqrt_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13327 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x7f,0x06,0x86,0x00]
13328
13329 v_sqrt_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13330 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x80,0x06,0x86,0x00]
13331
13332 v_sqrt_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13333 // CHECK: [0xf9,0x7c,0x0a,0x7e,0xc1,0x06,0x86,0x00]
13334
13335 v_sqrt_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13336 // CHECK: [0xf9,0x7c,0x0a,0x7e,0xf0,0x06,0x86,0x00]
13337
13338 v_sqrt_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13339 // CHECK: [0xf9,0x7c,0x0a,0x7e,0xf7,0x06,0x86,0x00]
13340
13341 v_sqrt_f16_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13342 // CHECK: [0xf9,0x7c,0x0a,0x7e,0xfb,0x06,0x86,0x00]
13343
13344 v_sqrt_f16_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13345 // CHECK: [0xf9,0x7c,0x0a,0x7e,0xfc,0x06,0x86,0x00]
13346
13347 v_sqrt_f16_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13348 // CHECK: [0xf9,0x7c,0x0a,0x7e,0xfd,0x06,0x86,0x00]
13349
13350 v_sqrt_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13351 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x26,0x06,0x00]
13352
13353 v_sqrt_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
13354 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x06,0x00]
13355
13356 v_sqrt_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
13357 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x00,0x06,0x00]
13358
13359 v_sqrt_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
13360 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x01,0x06,0x00]
13361
13362 v_sqrt_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
13363 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x02,0x06,0x00]
13364
13365 v_sqrt_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
13366 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x03,0x06,0x00]
13367
13368 v_sqrt_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
13369 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x04,0x06,0x00]
13370
13371 v_sqrt_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
13372 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x05,0x06,0x00]
13373
13374 v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
13375 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x0e,0x06,0x00]
13376
13377 v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
13378 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x16,0x06,0x00]
13379
13380 v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
13381 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x16,0x06,0x00]
13382
13383 v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
13384 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x06,0x00]
13385
13386 v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
13387 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x00,0x00]
13388
13389 v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
13390 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x01,0x00]
13391
13392 v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
13393 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x02,0x00]
13394
13395 v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
13396 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x03,0x00]
13397
13398 v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
13399 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x04,0x00]
13400
13401 v_sqrt_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
13402 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x05,0x00]
13403
13404 v_sqrt_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13405 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x16,0x00]
13406
13407 v_sqrt_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13408 // CHECK: [0xf9,0x7c,0x0a,0x7e,0x01,0x06,0x26,0x00]
13409
13410 v_sqrt_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
13411 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0xe4,0x00,0x00]
13412
13413 v_sqrt_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
13414 // CHECK: [0xfa,0x7c,0xfe,0x7f,0x01,0xe4,0x00,0x00]
13415
13416 v_sqrt_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
13417 // CHECK: [0xfa,0x7c,0x0a,0x7e,0xff,0xe4,0x00,0x00]
13418
13419 v_sqrt_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
13420 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x1b,0x00,0x00]
13421
13422 v_sqrt_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
13423 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x40,0x01,0x00]
13424
13425 v_sqrt_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
13426 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x41,0x01,0x00]
13427
13428 v_sqrt_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
13429 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x42,0x01,0x00]
13430
13431 v_sqrt_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
13432 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x43,0x01,0x00]
13433
13434 v_sqrt_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
13435 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x30,0x01,0x00]
13436
13437 v_sqrt_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
13438 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x34,0x01,0x00]
13439
13440 v_sqrt_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
13441 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x38,0x01,0x00]
13442
13443 v_sqrt_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
13444 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x3c,0x01,0x00]
13445
13446 v_sqrt_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
13447 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x01,0x01,0x00]
13448
13449 v_sqrt_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
13450 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x0f,0x01,0x00]
13451
13452 v_sqrt_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
13453 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x11,0x01,0x00]
13454
13455 v_sqrt_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
13456 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x1f,0x01,0x00]
13457
13458 v_sqrt_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
13459 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x21,0x01,0x00]
13460
13461 v_sqrt_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
13462 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0x2f,0x01,0x00]
13463
13464 v_sqrt_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
13465 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0xe4,0x00,0x10]
13466
13467 v_sqrt_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
13468 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0xe4,0x00,0x30]
13469
13470 v_sqrt_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
13471 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
13472
13473 v_sqrt_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
13474 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
13475
13476 v_sqrt_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
13477 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0xe4,0x00,0x01]
13478
13479 v_sqrt_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
13480 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0xe4,0x00,0x03]
13481
13482 v_sqrt_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
13483 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
13484
13485 v_sqrt_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
13486 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
13487
13488 v_sqrt_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
13489 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0xe4,0x08,0x00]
13490
13491 v_sqrt_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
13492 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0xe4,0x10,0x00]
13493
13494 v_sqrt_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
13495 // CHECK: [0xfa,0x7c,0x0a,0x7e,0x01,0xe4,0x20,0x00]
13496
13497 v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13498 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x06,0x00]
13499
13500 v_rsq_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13501 // CHECK: [0xf9,0x7e,0xfe,0x7f,0x01,0x06,0x06,0x00]
13502
13503 v_rsq_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13504 // CHECK: [0xf9,0x7e,0x0a,0x7e,0xff,0x06,0x06,0x00]
13505
13506 v_rsq_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13507 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x86,0x00]
13508
13509 v_rsq_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13510 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x65,0x06,0x86,0x00]
13511
13512 v_rsq_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13513 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x66,0x06,0x86,0x00]
13514
13515 v_rsq_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13516 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x67,0x06,0x86,0x00]
13517
13518 v_rsq_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13519 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x6a,0x06,0x86,0x00]
13520
13521 v_rsq_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13522 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x6b,0x06,0x86,0x00]
13523
13524 v_rsq_f16_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13525 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x7b,0x06,0x86,0x00]
13526
13527 v_rsq_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13528 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x7c,0x06,0x86,0x00]
13529
13530 v_rsq_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13531 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x7e,0x06,0x86,0x00]
13532
13533 v_rsq_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13534 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x7f,0x06,0x86,0x00]
13535
13536 v_rsq_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13537 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x80,0x06,0x86,0x00]
13538
13539 v_rsq_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13540 // CHECK: [0xf9,0x7e,0x0a,0x7e,0xc1,0x06,0x86,0x00]
13541
13542 v_rsq_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13543 // CHECK: [0xf9,0x7e,0x0a,0x7e,0xf0,0x06,0x86,0x00]
13544
13545 v_rsq_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13546 // CHECK: [0xf9,0x7e,0x0a,0x7e,0xf7,0x06,0x86,0x00]
13547
13548 v_rsq_f16_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13549 // CHECK: [0xf9,0x7e,0x0a,0x7e,0xfb,0x06,0x86,0x00]
13550
13551 v_rsq_f16_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13552 // CHECK: [0xf9,0x7e,0x0a,0x7e,0xfc,0x06,0x86,0x00]
13553
13554 v_rsq_f16_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13555 // CHECK: [0xf9,0x7e,0x0a,0x7e,0xfd,0x06,0x86,0x00]
13556
13557 v_rsq_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13558 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x26,0x06,0x00]
13559
13560 v_rsq_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
13561 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x06,0x00]
13562
13563 v_rsq_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
13564 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x00,0x06,0x00]
13565
13566 v_rsq_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
13567 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x01,0x06,0x00]
13568
13569 v_rsq_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
13570 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x02,0x06,0x00]
13571
13572 v_rsq_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
13573 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x03,0x06,0x00]
13574
13575 v_rsq_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
13576 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x04,0x06,0x00]
13577
13578 v_rsq_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
13579 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x05,0x06,0x00]
13580
13581 v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
13582 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x0e,0x06,0x00]
13583
13584 v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
13585 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x16,0x06,0x00]
13586
13587 v_rsq_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
13588 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x16,0x06,0x00]
13589
13590 v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
13591 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x06,0x00]
13592
13593 v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
13594 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x00,0x00]
13595
13596 v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
13597 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x01,0x00]
13598
13599 v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
13600 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x02,0x00]
13601
13602 v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
13603 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x03,0x00]
13604
13605 v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
13606 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x04,0x00]
13607
13608 v_rsq_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
13609 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x05,0x00]
13610
13611 v_rsq_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13612 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x16,0x00]
13613
13614 v_rsq_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13615 // CHECK: [0xf9,0x7e,0x0a,0x7e,0x01,0x06,0x26,0x00]
13616
13617 v_rsq_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
13618 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0xe4,0x00,0x00]
13619
13620 v_rsq_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
13621 // CHECK: [0xfa,0x7e,0xfe,0x7f,0x01,0xe4,0x00,0x00]
13622
13623 v_rsq_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
13624 // CHECK: [0xfa,0x7e,0x0a,0x7e,0xff,0xe4,0x00,0x00]
13625
13626 v_rsq_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
13627 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x1b,0x00,0x00]
13628
13629 v_rsq_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
13630 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x40,0x01,0x00]
13631
13632 v_rsq_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
13633 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x41,0x01,0x00]
13634
13635 v_rsq_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
13636 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x42,0x01,0x00]
13637
13638 v_rsq_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
13639 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x43,0x01,0x00]
13640
13641 v_rsq_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
13642 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x30,0x01,0x00]
13643
13644 v_rsq_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
13645 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x34,0x01,0x00]
13646
13647 v_rsq_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
13648 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x38,0x01,0x00]
13649
13650 v_rsq_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
13651 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x3c,0x01,0x00]
13652
13653 v_rsq_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
13654 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x01,0x01,0x00]
13655
13656 v_rsq_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
13657 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x0f,0x01,0x00]
13658
13659 v_rsq_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
13660 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x11,0x01,0x00]
13661
13662 v_rsq_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
13663 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x1f,0x01,0x00]
13664
13665 v_rsq_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
13666 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x21,0x01,0x00]
13667
13668 v_rsq_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
13669 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0x2f,0x01,0x00]
13670
13671 v_rsq_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
13672 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0xe4,0x00,0x10]
13673
13674 v_rsq_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
13675 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0xe4,0x00,0x30]
13676
13677 v_rsq_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
13678 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
13679
13680 v_rsq_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
13681 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
13682
13683 v_rsq_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
13684 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0xe4,0x00,0x01]
13685
13686 v_rsq_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
13687 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0xe4,0x00,0x03]
13688
13689 v_rsq_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
13690 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
13691
13692 v_rsq_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
13693 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
13694
13695 v_rsq_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
13696 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0xe4,0x08,0x00]
13697
13698 v_rsq_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
13699 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0xe4,0x10,0x00]
13700
13701 v_rsq_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
13702 // CHECK: [0xfa,0x7e,0x0a,0x7e,0x01,0xe4,0x20,0x00]
13703
13704 v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13705 // CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x06,0x00]
13706
13707 v_log_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13708 // CHECK: [0xf9,0x80,0xfe,0x7f,0x01,0x06,0x06,0x00]
13709
13710 v_log_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13711 // CHECK: [0xf9,0x80,0x0a,0x7e,0xff,0x06,0x06,0x00]
13712
13713 v_log_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13714 // CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x86,0x00]
13715
13716 v_log_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13717 // CHECK: [0xf9,0x80,0x0a,0x7e,0x65,0x06,0x86,0x00]
13718
13719 v_log_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13720 // CHECK: [0xf9,0x80,0x0a,0x7e,0x66,0x06,0x86,0x00]
13721
13722 v_log_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13723 // CHECK: [0xf9,0x80,0x0a,0x7e,0x67,0x06,0x86,0x00]
13724
13725 v_log_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13726 // CHECK: [0xf9,0x80,0x0a,0x7e,0x6a,0x06,0x86,0x00]
13727
13728 v_log_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13729 // CHECK: [0xf9,0x80,0x0a,0x7e,0x6b,0x06,0x86,0x00]
13730
13731 v_log_f16_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13732 // CHECK: [0xf9,0x80,0x0a,0x7e,0x7b,0x06,0x86,0x00]
13733
13734 v_log_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13735 // CHECK: [0xf9,0x80,0x0a,0x7e,0x7c,0x06,0x86,0x00]
13736
13737 v_log_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13738 // CHECK: [0xf9,0x80,0x0a,0x7e,0x7e,0x06,0x86,0x00]
13739
13740 v_log_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13741 // CHECK: [0xf9,0x80,0x0a,0x7e,0x7f,0x06,0x86,0x00]
13742
13743 v_log_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13744 // CHECK: [0xf9,0x80,0x0a,0x7e,0x80,0x06,0x86,0x00]
13745
13746 v_log_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13747 // CHECK: [0xf9,0x80,0x0a,0x7e,0xc1,0x06,0x86,0x00]
13748
13749 v_log_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13750 // CHECK: [0xf9,0x80,0x0a,0x7e,0xf0,0x06,0x86,0x00]
13751
13752 v_log_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13753 // CHECK: [0xf9,0x80,0x0a,0x7e,0xf7,0x06,0x86,0x00]
13754
13755 v_log_f16_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13756 // CHECK: [0xf9,0x80,0x0a,0x7e,0xfb,0x06,0x86,0x00]
13757
13758 v_log_f16_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13759 // CHECK: [0xf9,0x80,0x0a,0x7e,0xfc,0x06,0x86,0x00]
13760
13761 v_log_f16_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13762 // CHECK: [0xf9,0x80,0x0a,0x7e,0xfd,0x06,0x86,0x00]
13763
13764 v_log_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13765 // CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x26,0x06,0x00]
13766
13767 v_log_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
13768 // CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x06,0x00]
13769
13770 v_log_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
13771 // CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x00,0x06,0x00]
13772
13773 v_log_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
13774 // CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x01,0x06,0x00]
13775
13776 v_log_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
13777 // CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x02,0x06,0x00]
13778
13779 v_log_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
13780 // CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x03,0x06,0x00]
13781
13782 v_log_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
13783 // CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x04,0x06,0x00]
13784
13785 v_log_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
13786 // CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x05,0x06,0x00]
13787
13788 v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
13789 // CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x0e,0x06,0x00]
13790
13791 v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
13792 // CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x16,0x06,0x00]
13793
13794 v_log_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
13795 // CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x16,0x06,0x00]
13796
13797 v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
13798 // CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x06,0x00]
13799
13800 v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
13801 // CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x00,0x00]
13802
13803 v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
13804 // CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x01,0x00]
13805
13806 v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
13807 // CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x02,0x00]
13808
13809 v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
13810 // CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x03,0x00]
13811
13812 v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
13813 // CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x04,0x00]
13814
13815 v_log_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
13816 // CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x05,0x00]
13817
13818 v_log_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13819 // CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x16,0x00]
13820
13821 v_log_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13822 // CHECK: [0xf9,0x80,0x0a,0x7e,0x01,0x06,0x26,0x00]
13823
13824 v_log_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
13825 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0xe4,0x00,0x00]
13826
13827 v_log_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
13828 // CHECK: [0xfa,0x80,0xfe,0x7f,0x01,0xe4,0x00,0x00]
13829
13830 v_log_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
13831 // CHECK: [0xfa,0x80,0x0a,0x7e,0xff,0xe4,0x00,0x00]
13832
13833 v_log_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
13834 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x1b,0x00,0x00]
13835
13836 v_log_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
13837 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x40,0x01,0x00]
13838
13839 v_log_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
13840 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x41,0x01,0x00]
13841
13842 v_log_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
13843 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x42,0x01,0x00]
13844
13845 v_log_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
13846 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x43,0x01,0x00]
13847
13848 v_log_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
13849 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x30,0x01,0x00]
13850
13851 v_log_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
13852 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x34,0x01,0x00]
13853
13854 v_log_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
13855 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x38,0x01,0x00]
13856
13857 v_log_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
13858 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x3c,0x01,0x00]
13859
13860 v_log_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
13861 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x01,0x01,0x00]
13862
13863 v_log_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
13864 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x0f,0x01,0x00]
13865
13866 v_log_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
13867 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x11,0x01,0x00]
13868
13869 v_log_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
13870 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x1f,0x01,0x00]
13871
13872 v_log_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
13873 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x21,0x01,0x00]
13874
13875 v_log_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
13876 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0x2f,0x01,0x00]
13877
13878 v_log_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
13879 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0xe4,0x00,0x10]
13880
13881 v_log_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
13882 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0xe4,0x00,0x30]
13883
13884 v_log_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
13885 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
13886
13887 v_log_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
13888 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
13889
13890 v_log_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
13891 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0xe4,0x00,0x01]
13892
13893 v_log_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
13894 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0xe4,0x00,0x03]
13895
13896 v_log_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
13897 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
13898
13899 v_log_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
13900 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
13901
13902 v_log_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
13903 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0xe4,0x08,0x00]
13904
13905 v_log_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
13906 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0xe4,0x10,0x00]
13907
13908 v_log_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
13909 // CHECK: [0xfa,0x80,0x0a,0x7e,0x01,0xe4,0x20,0x00]
13910
13911 v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13912 // CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x06,0x00]
13913
13914 v_exp_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13915 // CHECK: [0xf9,0x82,0xfe,0x7f,0x01,0x06,0x06,0x00]
13916
13917 v_exp_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13918 // CHECK: [0xf9,0x82,0x0a,0x7e,0xff,0x06,0x06,0x00]
13919
13920 v_exp_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13921 // CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x86,0x00]
13922
13923 v_exp_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13924 // CHECK: [0xf9,0x82,0x0a,0x7e,0x65,0x06,0x86,0x00]
13925
13926 v_exp_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13927 // CHECK: [0xf9,0x82,0x0a,0x7e,0x66,0x06,0x86,0x00]
13928
13929 v_exp_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13930 // CHECK: [0xf9,0x82,0x0a,0x7e,0x67,0x06,0x86,0x00]
13931
13932 v_exp_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13933 // CHECK: [0xf9,0x82,0x0a,0x7e,0x6a,0x06,0x86,0x00]
13934
13935 v_exp_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13936 // CHECK: [0xf9,0x82,0x0a,0x7e,0x6b,0x06,0x86,0x00]
13937
13938 v_exp_f16_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13939 // CHECK: [0xf9,0x82,0x0a,0x7e,0x7b,0x06,0x86,0x00]
13940
13941 v_exp_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13942 // CHECK: [0xf9,0x82,0x0a,0x7e,0x7c,0x06,0x86,0x00]
13943
13944 v_exp_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13945 // CHECK: [0xf9,0x82,0x0a,0x7e,0x7e,0x06,0x86,0x00]
13946
13947 v_exp_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13948 // CHECK: [0xf9,0x82,0x0a,0x7e,0x7f,0x06,0x86,0x00]
13949
13950 v_exp_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13951 // CHECK: [0xf9,0x82,0x0a,0x7e,0x80,0x06,0x86,0x00]
13952
13953 v_exp_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13954 // CHECK: [0xf9,0x82,0x0a,0x7e,0xc1,0x06,0x86,0x00]
13955
13956 v_exp_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13957 // CHECK: [0xf9,0x82,0x0a,0x7e,0xf0,0x06,0x86,0x00]
13958
13959 v_exp_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13960 // CHECK: [0xf9,0x82,0x0a,0x7e,0xf7,0x06,0x86,0x00]
13961
13962 v_exp_f16_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13963 // CHECK: [0xf9,0x82,0x0a,0x7e,0xfb,0x06,0x86,0x00]
13964
13965 v_exp_f16_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13966 // CHECK: [0xf9,0x82,0x0a,0x7e,0xfc,0x06,0x86,0x00]
13967
13968 v_exp_f16_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13969 // CHECK: [0xf9,0x82,0x0a,0x7e,0xfd,0x06,0x86,0x00]
13970
13971 v_exp_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
13972 // CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x26,0x06,0x00]
13973
13974 v_exp_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
13975 // CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x06,0x00]
13976
13977 v_exp_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
13978 // CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x00,0x06,0x00]
13979
13980 v_exp_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
13981 // CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x01,0x06,0x00]
13982
13983 v_exp_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
13984 // CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x02,0x06,0x00]
13985
13986 v_exp_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
13987 // CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x03,0x06,0x00]
13988
13989 v_exp_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
13990 // CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x04,0x06,0x00]
13991
13992 v_exp_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
13993 // CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x05,0x06,0x00]
13994
13995 v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
13996 // CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x0e,0x06,0x00]
13997
13998 v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
13999 // CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x16,0x06,0x00]
14000
14001 v_exp_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
14002 // CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x16,0x06,0x00]
14003
14004 v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
14005 // CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x06,0x00]
14006
14007 v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
14008 // CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x00,0x00]
14009
14010 v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
14011 // CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x01,0x00]
14012
14013 v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
14014 // CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x02,0x00]
14015
14016 v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
14017 // CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x03,0x00]
14018
14019 v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
14020 // CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x04,0x00]
14021
14022 v_exp_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
14023 // CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x05,0x00]
14024
14025 v_exp_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14026 // CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x16,0x00]
14027
14028 v_exp_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14029 // CHECK: [0xf9,0x82,0x0a,0x7e,0x01,0x06,0x26,0x00]
14030
14031 v_exp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
14032 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0xe4,0x00,0x00]
14033
14034 v_exp_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
14035 // CHECK: [0xfa,0x82,0xfe,0x7f,0x01,0xe4,0x00,0x00]
14036
14037 v_exp_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
14038 // CHECK: [0xfa,0x82,0x0a,0x7e,0xff,0xe4,0x00,0x00]
14039
14040 v_exp_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
14041 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x1b,0x00,0x00]
14042
14043 v_exp_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
14044 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x40,0x01,0x00]
14045
14046 v_exp_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
14047 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x41,0x01,0x00]
14048
14049 v_exp_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
14050 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x42,0x01,0x00]
14051
14052 v_exp_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
14053 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x43,0x01,0x00]
14054
14055 v_exp_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
14056 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x30,0x01,0x00]
14057
14058 v_exp_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
14059 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x34,0x01,0x00]
14060
14061 v_exp_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
14062 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x38,0x01,0x00]
14063
14064 v_exp_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
14065 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x3c,0x01,0x00]
14066
14067 v_exp_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
14068 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x01,0x01,0x00]
14069
14070 v_exp_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
14071 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x0f,0x01,0x00]
14072
14073 v_exp_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
14074 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x11,0x01,0x00]
14075
14076 v_exp_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
14077 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x1f,0x01,0x00]
14078
14079 v_exp_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
14080 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x21,0x01,0x00]
14081
14082 v_exp_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
14083 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0x2f,0x01,0x00]
14084
14085 v_exp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
14086 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0xe4,0x00,0x10]
14087
14088 v_exp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
14089 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0xe4,0x00,0x30]
14090
14091 v_exp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
14092 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
14093
14094 v_exp_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
14095 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
14096
14097 v_exp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
14098 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0xe4,0x00,0x01]
14099
14100 v_exp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
14101 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0xe4,0x00,0x03]
14102
14103 v_exp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
14104 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
14105
14106 v_exp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
14107 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
14108
14109 v_exp_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
14110 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0xe4,0x08,0x00]
14111
14112 v_exp_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
14113 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0xe4,0x10,0x00]
14114
14115 v_exp_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
14116 // CHECK: [0xfa,0x82,0x0a,0x7e,0x01,0xe4,0x20,0x00]
14117
14118 v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14119 // CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x06,0x00]
14120
14121 v_frexp_mant_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14122 // CHECK: [0xf9,0x84,0xfe,0x7f,0x01,0x06,0x06,0x00]
14123
14124 v_frexp_mant_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14125 // CHECK: [0xf9,0x84,0x0a,0x7e,0xff,0x06,0x06,0x00]
14126
14127 v_frexp_mant_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14128 // CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x86,0x00]
14129
14130 v_frexp_mant_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14131 // CHECK: [0xf9,0x84,0x0a,0x7e,0x65,0x06,0x86,0x00]
14132
14133 v_frexp_mant_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14134 // CHECK: [0xf9,0x84,0x0a,0x7e,0x66,0x06,0x86,0x00]
14135
14136 v_frexp_mant_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14137 // CHECK: [0xf9,0x84,0x0a,0x7e,0x67,0x06,0x86,0x00]
14138
14139 v_frexp_mant_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14140 // CHECK: [0xf9,0x84,0x0a,0x7e,0x6a,0x06,0x86,0x00]
14141
14142 v_frexp_mant_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14143 // CHECK: [0xf9,0x84,0x0a,0x7e,0x6b,0x06,0x86,0x00]
14144
14145 v_frexp_mant_f16_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14146 // CHECK: [0xf9,0x84,0x0a,0x7e,0x7b,0x06,0x86,0x00]
14147
14148 v_frexp_mant_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14149 // CHECK: [0xf9,0x84,0x0a,0x7e,0x7c,0x06,0x86,0x00]
14150
14151 v_frexp_mant_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14152 // CHECK: [0xf9,0x84,0x0a,0x7e,0x7e,0x06,0x86,0x00]
14153
14154 v_frexp_mant_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14155 // CHECK: [0xf9,0x84,0x0a,0x7e,0x7f,0x06,0x86,0x00]
14156
14157 v_frexp_mant_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14158 // CHECK: [0xf9,0x84,0x0a,0x7e,0x80,0x06,0x86,0x00]
14159
14160 v_frexp_mant_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14161 // CHECK: [0xf9,0x84,0x0a,0x7e,0xc1,0x06,0x86,0x00]
14162
14163 v_frexp_mant_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14164 // CHECK: [0xf9,0x84,0x0a,0x7e,0xf0,0x06,0x86,0x00]
14165
14166 v_frexp_mant_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14167 // CHECK: [0xf9,0x84,0x0a,0x7e,0xf7,0x06,0x86,0x00]
14168
14169 v_frexp_mant_f16_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14170 // CHECK: [0xf9,0x84,0x0a,0x7e,0xfb,0x06,0x86,0x00]
14171
14172 v_frexp_mant_f16_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14173 // CHECK: [0xf9,0x84,0x0a,0x7e,0xfc,0x06,0x86,0x00]
14174
14175 v_frexp_mant_f16_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14176 // CHECK: [0xf9,0x84,0x0a,0x7e,0xfd,0x06,0x86,0x00]
14177
14178 v_frexp_mant_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14179 // CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x26,0x06,0x00]
14180
14181 v_frexp_mant_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
14182 // CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x06,0x00]
14183
14184 v_frexp_mant_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
14185 // CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x00,0x06,0x00]
14186
14187 v_frexp_mant_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
14188 // CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x01,0x06,0x00]
14189
14190 v_frexp_mant_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
14191 // CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x02,0x06,0x00]
14192
14193 v_frexp_mant_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
14194 // CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x03,0x06,0x00]
14195
14196 v_frexp_mant_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
14197 // CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x04,0x06,0x00]
14198
14199 v_frexp_mant_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
14200 // CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x05,0x06,0x00]
14201
14202 v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
14203 // CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x0e,0x06,0x00]
14204
14205 v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
14206 // CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x16,0x06,0x00]
14207
14208 v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
14209 // CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x16,0x06,0x00]
14210
14211 v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
14212 // CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x06,0x00]
14213
14214 v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
14215 // CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x00,0x00]
14216
14217 v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
14218 // CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x01,0x00]
14219
14220 v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
14221 // CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x02,0x00]
14222
14223 v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
14224 // CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x03,0x00]
14225
14226 v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
14227 // CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x04,0x00]
14228
14229 v_frexp_mant_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
14230 // CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x05,0x00]
14231
14232 v_frexp_mant_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14233 // CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x16,0x00]
14234
14235 v_frexp_mant_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14236 // CHECK: [0xf9,0x84,0x0a,0x7e,0x01,0x06,0x26,0x00]
14237
14238 v_frexp_mant_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
14239 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0xe4,0x00,0x00]
14240
14241 v_frexp_mant_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
14242 // CHECK: [0xfa,0x84,0xfe,0x7f,0x01,0xe4,0x00,0x00]
14243
14244 v_frexp_mant_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
14245 // CHECK: [0xfa,0x84,0x0a,0x7e,0xff,0xe4,0x00,0x00]
14246
14247 v_frexp_mant_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
14248 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x1b,0x00,0x00]
14249
14250 v_frexp_mant_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
14251 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x40,0x01,0x00]
14252
14253 v_frexp_mant_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
14254 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x41,0x01,0x00]
14255
14256 v_frexp_mant_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
14257 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x42,0x01,0x00]
14258
14259 v_frexp_mant_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
14260 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x43,0x01,0x00]
14261
14262 v_frexp_mant_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
14263 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x30,0x01,0x00]
14264
14265 v_frexp_mant_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
14266 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x34,0x01,0x00]
14267
14268 v_frexp_mant_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
14269 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x38,0x01,0x00]
14270
14271 v_frexp_mant_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
14272 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x3c,0x01,0x00]
14273
14274 v_frexp_mant_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
14275 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x01,0x01,0x00]
14276
14277 v_frexp_mant_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
14278 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x0f,0x01,0x00]
14279
14280 v_frexp_mant_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
14281 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x11,0x01,0x00]
14282
14283 v_frexp_mant_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
14284 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x1f,0x01,0x00]
14285
14286 v_frexp_mant_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
14287 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x21,0x01,0x00]
14288
14289 v_frexp_mant_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
14290 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0x2f,0x01,0x00]
14291
14292 v_frexp_mant_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
14293 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0xe4,0x00,0x10]
14294
14295 v_frexp_mant_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
14296 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0xe4,0x00,0x30]
14297
14298 v_frexp_mant_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
14299 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
14300
14301 v_frexp_mant_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
14302 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
14303
14304 v_frexp_mant_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
14305 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0xe4,0x00,0x01]
14306
14307 v_frexp_mant_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
14308 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0xe4,0x00,0x03]
14309
14310 v_frexp_mant_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
14311 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
14312
14313 v_frexp_mant_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
14314 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
14315
14316 v_frexp_mant_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
14317 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0xe4,0x08,0x00]
14318
14319 v_frexp_mant_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
14320 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0xe4,0x10,0x00]
14321
14322 v_frexp_mant_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
14323 // CHECK: [0xfa,0x84,0x0a,0x7e,0x01,0xe4,0x20,0x00]
14324
14325 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14326 // CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x06,0x00]
14327
14328 v_frexp_exp_i16_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14329 // CHECK: [0xf9,0x86,0xfe,0x7f,0x01,0x06,0x06,0x00]
14330
14331 v_frexp_exp_i16_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14332 // CHECK: [0xf9,0x86,0x0a,0x7e,0xff,0x06,0x06,0x00]
14333
14334 v_frexp_exp_i16_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14335 // CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x86,0x00]
14336
14337 v_frexp_exp_i16_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14338 // CHECK: [0xf9,0x86,0x0a,0x7e,0x65,0x06,0x86,0x00]
14339
14340 v_frexp_exp_i16_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14341 // CHECK: [0xf9,0x86,0x0a,0x7e,0x66,0x06,0x86,0x00]
14342
14343 v_frexp_exp_i16_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14344 // CHECK: [0xf9,0x86,0x0a,0x7e,0x67,0x06,0x86,0x00]
14345
14346 v_frexp_exp_i16_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14347 // CHECK: [0xf9,0x86,0x0a,0x7e,0x6a,0x06,0x86,0x00]
14348
14349 v_frexp_exp_i16_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14350 // CHECK: [0xf9,0x86,0x0a,0x7e,0x6b,0x06,0x86,0x00]
14351
14352 v_frexp_exp_i16_f16_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14353 // CHECK: [0xf9,0x86,0x0a,0x7e,0x7b,0x06,0x86,0x00]
14354
14355 v_frexp_exp_i16_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14356 // CHECK: [0xf9,0x86,0x0a,0x7e,0x7c,0x06,0x86,0x00]
14357
14358 v_frexp_exp_i16_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14359 // CHECK: [0xf9,0x86,0x0a,0x7e,0x7e,0x06,0x86,0x00]
14360
14361 v_frexp_exp_i16_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14362 // CHECK: [0xf9,0x86,0x0a,0x7e,0x7f,0x06,0x86,0x00]
14363
14364 v_frexp_exp_i16_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14365 // CHECK: [0xf9,0x86,0x0a,0x7e,0x80,0x06,0x86,0x00]
14366
14367 v_frexp_exp_i16_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14368 // CHECK: [0xf9,0x86,0x0a,0x7e,0xc1,0x06,0x86,0x00]
14369
14370 v_frexp_exp_i16_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14371 // CHECK: [0xf9,0x86,0x0a,0x7e,0xf0,0x06,0x86,0x00]
14372
14373 v_frexp_exp_i16_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14374 // CHECK: [0xf9,0x86,0x0a,0x7e,0xf7,0x06,0x86,0x00]
14375
14376 v_frexp_exp_i16_f16_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14377 // CHECK: [0xf9,0x86,0x0a,0x7e,0xfb,0x06,0x86,0x00]
14378
14379 v_frexp_exp_i16_f16_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14380 // CHECK: [0xf9,0x86,0x0a,0x7e,0xfc,0x06,0x86,0x00]
14381
14382 v_frexp_exp_i16_f16_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14383 // CHECK: [0xf9,0x86,0x0a,0x7e,0xfd,0x06,0x86,0x00]
14384
14385 v_frexp_exp_i16_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
14386 // CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x06,0x00]
14387
14388 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
14389 // CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x00,0x06,0x00]
14390
14391 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
14392 // CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x01,0x06,0x00]
14393
14394 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
14395 // CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x02,0x06,0x00]
14396
14397 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
14398 // CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x03,0x06,0x00]
14399
14400 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
14401 // CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x04,0x06,0x00]
14402
14403 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
14404 // CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x05,0x06,0x00]
14405
14406 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
14407 // CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x0e,0x06,0x00]
14408
14409 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
14410 // CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x16,0x06,0x00]
14411
14412 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
14413 // CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x16,0x06,0x00]
14414
14415 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
14416 // CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x06,0x00]
14417
14418 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
14419 // CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x00,0x00]
14420
14421 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
14422 // CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x01,0x00]
14423
14424 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
14425 // CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x02,0x00]
14426
14427 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
14428 // CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x03,0x00]
14429
14430 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
14431 // CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x04,0x00]
14432
14433 v_frexp_exp_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
14434 // CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x05,0x00]
14435
14436 v_frexp_exp_i16_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14437 // CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x16,0x00]
14438
14439 v_frexp_exp_i16_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14440 // CHECK: [0xf9,0x86,0x0a,0x7e,0x01,0x06,0x26,0x00]
14441
14442 v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
14443 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0xe4,0x00,0x00]
14444
14445 v_frexp_exp_i16_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
14446 // CHECK: [0xfa,0x86,0xfe,0x7f,0x01,0xe4,0x00,0x00]
14447
14448 v_frexp_exp_i16_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
14449 // CHECK: [0xfa,0x86,0x0a,0x7e,0xff,0xe4,0x00,0x00]
14450
14451 v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
14452 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x1b,0x00,0x00]
14453
14454 v_frexp_exp_i16_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
14455 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x40,0x01,0x00]
14456
14457 v_frexp_exp_i16_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
14458 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x41,0x01,0x00]
14459
14460 v_frexp_exp_i16_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
14461 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x42,0x01,0x00]
14462
14463 v_frexp_exp_i16_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
14464 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x43,0x01,0x00]
14465
14466 v_frexp_exp_i16_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
14467 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x30,0x01,0x00]
14468
14469 v_frexp_exp_i16_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
14470 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x34,0x01,0x00]
14471
14472 v_frexp_exp_i16_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
14473 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x38,0x01,0x00]
14474
14475 v_frexp_exp_i16_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
14476 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x3c,0x01,0x00]
14477
14478 v_frexp_exp_i16_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
14479 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x01,0x01,0x00]
14480
14481 v_frexp_exp_i16_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
14482 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x0f,0x01,0x00]
14483
14484 v_frexp_exp_i16_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
14485 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x11,0x01,0x00]
14486
14487 v_frexp_exp_i16_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
14488 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x1f,0x01,0x00]
14489
14490 v_frexp_exp_i16_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
14491 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x21,0x01,0x00]
14492
14493 v_frexp_exp_i16_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
14494 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0x2f,0x01,0x00]
14495
14496 v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
14497 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0xe4,0x00,0x10]
14498
14499 v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
14500 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0xe4,0x00,0x30]
14501
14502 v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
14503 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
14504
14505 v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
14506 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
14507
14508 v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
14509 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0xe4,0x00,0x01]
14510
14511 v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
14512 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0xe4,0x00,0x03]
14513
14514 v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
14515 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
14516
14517 v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
14518 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
14519
14520 v_frexp_exp_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
14521 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0xe4,0x08,0x00]
14522
14523 v_frexp_exp_i16_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
14524 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0xe4,0x10,0x00]
14525
14526 v_frexp_exp_i16_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
14527 // CHECK: [0xfa,0x86,0x0a,0x7e,0x01,0xe4,0x20,0x00]
14528
14529 v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14530 // CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x06,0x00]
14531
14532 v_floor_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14533 // CHECK: [0xf9,0x88,0xfe,0x7f,0x01,0x06,0x06,0x00]
14534
14535 v_floor_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14536 // CHECK: [0xf9,0x88,0x0a,0x7e,0xff,0x06,0x06,0x00]
14537
14538 v_floor_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14539 // CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x86,0x00]
14540
14541 v_floor_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14542 // CHECK: [0xf9,0x88,0x0a,0x7e,0x65,0x06,0x86,0x00]
14543
14544 v_floor_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14545 // CHECK: [0xf9,0x88,0x0a,0x7e,0x66,0x06,0x86,0x00]
14546
14547 v_floor_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14548 // CHECK: [0xf9,0x88,0x0a,0x7e,0x67,0x06,0x86,0x00]
14549
14550 v_floor_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14551 // CHECK: [0xf9,0x88,0x0a,0x7e,0x6a,0x06,0x86,0x00]
14552
14553 v_floor_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14554 // CHECK: [0xf9,0x88,0x0a,0x7e,0x6b,0x06,0x86,0x00]
14555
14556 v_floor_f16_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14557 // CHECK: [0xf9,0x88,0x0a,0x7e,0x7b,0x06,0x86,0x00]
14558
14559 v_floor_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14560 // CHECK: [0xf9,0x88,0x0a,0x7e,0x7c,0x06,0x86,0x00]
14561
14562 v_floor_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14563 // CHECK: [0xf9,0x88,0x0a,0x7e,0x7e,0x06,0x86,0x00]
14564
14565 v_floor_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14566 // CHECK: [0xf9,0x88,0x0a,0x7e,0x7f,0x06,0x86,0x00]
14567
14568 v_floor_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14569 // CHECK: [0xf9,0x88,0x0a,0x7e,0x80,0x06,0x86,0x00]
14570
14571 v_floor_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14572 // CHECK: [0xf9,0x88,0x0a,0x7e,0xc1,0x06,0x86,0x00]
14573
14574 v_floor_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14575 // CHECK: [0xf9,0x88,0x0a,0x7e,0xf0,0x06,0x86,0x00]
14576
14577 v_floor_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14578 // CHECK: [0xf9,0x88,0x0a,0x7e,0xf7,0x06,0x86,0x00]
14579
14580 v_floor_f16_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14581 // CHECK: [0xf9,0x88,0x0a,0x7e,0xfb,0x06,0x86,0x00]
14582
14583 v_floor_f16_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14584 // CHECK: [0xf9,0x88,0x0a,0x7e,0xfc,0x06,0x86,0x00]
14585
14586 v_floor_f16_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14587 // CHECK: [0xf9,0x88,0x0a,0x7e,0xfd,0x06,0x86,0x00]
14588
14589 v_floor_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14590 // CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x26,0x06,0x00]
14591
14592 v_floor_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
14593 // CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x06,0x00]
14594
14595 v_floor_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
14596 // CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x00,0x06,0x00]
14597
14598 v_floor_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
14599 // CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x01,0x06,0x00]
14600
14601 v_floor_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
14602 // CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x02,0x06,0x00]
14603
14604 v_floor_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
14605 // CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x03,0x06,0x00]
14606
14607 v_floor_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
14608 // CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x04,0x06,0x00]
14609
14610 v_floor_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
14611 // CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x05,0x06,0x00]
14612
14613 v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
14614 // CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x0e,0x06,0x00]
14615
14616 v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
14617 // CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x16,0x06,0x00]
14618
14619 v_floor_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
14620 // CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x16,0x06,0x00]
14621
14622 v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
14623 // CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x06,0x00]
14624
14625 v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
14626 // CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x00,0x00]
14627
14628 v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
14629 // CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x01,0x00]
14630
14631 v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
14632 // CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x02,0x00]
14633
14634 v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
14635 // CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x03,0x00]
14636
14637 v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
14638 // CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x04,0x00]
14639
14640 v_floor_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
14641 // CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x05,0x00]
14642
14643 v_floor_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14644 // CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x16,0x00]
14645
14646 v_floor_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14647 // CHECK: [0xf9,0x88,0x0a,0x7e,0x01,0x06,0x26,0x00]
14648
14649 v_floor_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
14650 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0xe4,0x00,0x00]
14651
14652 v_floor_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
14653 // CHECK: [0xfa,0x88,0xfe,0x7f,0x01,0xe4,0x00,0x00]
14654
14655 v_floor_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
14656 // CHECK: [0xfa,0x88,0x0a,0x7e,0xff,0xe4,0x00,0x00]
14657
14658 v_floor_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
14659 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x1b,0x00,0x00]
14660
14661 v_floor_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
14662 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x40,0x01,0x00]
14663
14664 v_floor_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
14665 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x41,0x01,0x00]
14666
14667 v_floor_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
14668 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x42,0x01,0x00]
14669
14670 v_floor_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
14671 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x43,0x01,0x00]
14672
14673 v_floor_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
14674 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x30,0x01,0x00]
14675
14676 v_floor_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
14677 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x34,0x01,0x00]
14678
14679 v_floor_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
14680 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x38,0x01,0x00]
14681
14682 v_floor_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
14683 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x3c,0x01,0x00]
14684
14685 v_floor_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
14686 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x01,0x01,0x00]
14687
14688 v_floor_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
14689 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x0f,0x01,0x00]
14690
14691 v_floor_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
14692 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x11,0x01,0x00]
14693
14694 v_floor_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
14695 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x1f,0x01,0x00]
14696
14697 v_floor_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
14698 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x21,0x01,0x00]
14699
14700 v_floor_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
14701 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0x2f,0x01,0x00]
14702
14703 v_floor_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
14704 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0xe4,0x00,0x10]
14705
14706 v_floor_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
14707 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0xe4,0x00,0x30]
14708
14709 v_floor_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
14710 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
14711
14712 v_floor_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
14713 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
14714
14715 v_floor_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
14716 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0xe4,0x00,0x01]
14717
14718 v_floor_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
14719 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0xe4,0x00,0x03]
14720
14721 v_floor_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
14722 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
14723
14724 v_floor_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
14725 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
14726
14727 v_floor_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
14728 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0xe4,0x08,0x00]
14729
14730 v_floor_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
14731 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0xe4,0x10,0x00]
14732
14733 v_floor_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
14734 // CHECK: [0xfa,0x88,0x0a,0x7e,0x01,0xe4,0x20,0x00]
14735
14736 v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14737 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x06,0x00]
14738
14739 v_ceil_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14740 // CHECK: [0xf9,0x8a,0xfe,0x7f,0x01,0x06,0x06,0x00]
14741
14742 v_ceil_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14743 // CHECK: [0xf9,0x8a,0x0a,0x7e,0xff,0x06,0x06,0x00]
14744
14745 v_ceil_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14746 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x86,0x00]
14747
14748 v_ceil_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14749 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x65,0x06,0x86,0x00]
14750
14751 v_ceil_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14752 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x66,0x06,0x86,0x00]
14753
14754 v_ceil_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14755 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x67,0x06,0x86,0x00]
14756
14757 v_ceil_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14758 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x6a,0x06,0x86,0x00]
14759
14760 v_ceil_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14761 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x6b,0x06,0x86,0x00]
14762
14763 v_ceil_f16_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14764 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x7b,0x06,0x86,0x00]
14765
14766 v_ceil_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14767 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x7c,0x06,0x86,0x00]
14768
14769 v_ceil_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14770 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x7e,0x06,0x86,0x00]
14771
14772 v_ceil_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14773 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x7f,0x06,0x86,0x00]
14774
14775 v_ceil_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14776 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x80,0x06,0x86,0x00]
14777
14778 v_ceil_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14779 // CHECK: [0xf9,0x8a,0x0a,0x7e,0xc1,0x06,0x86,0x00]
14780
14781 v_ceil_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14782 // CHECK: [0xf9,0x8a,0x0a,0x7e,0xf0,0x06,0x86,0x00]
14783
14784 v_ceil_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14785 // CHECK: [0xf9,0x8a,0x0a,0x7e,0xf7,0x06,0x86,0x00]
14786
14787 v_ceil_f16_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14788 // CHECK: [0xf9,0x8a,0x0a,0x7e,0xfb,0x06,0x86,0x00]
14789
14790 v_ceil_f16_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14791 // CHECK: [0xf9,0x8a,0x0a,0x7e,0xfc,0x06,0x86,0x00]
14792
14793 v_ceil_f16_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14794 // CHECK: [0xf9,0x8a,0x0a,0x7e,0xfd,0x06,0x86,0x00]
14795
14796 v_ceil_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14797 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x26,0x06,0x00]
14798
14799 v_ceil_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
14800 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x06,0x00]
14801
14802 v_ceil_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
14803 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x00,0x06,0x00]
14804
14805 v_ceil_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
14806 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x01,0x06,0x00]
14807
14808 v_ceil_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
14809 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x02,0x06,0x00]
14810
14811 v_ceil_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
14812 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x03,0x06,0x00]
14813
14814 v_ceil_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
14815 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x04,0x06,0x00]
14816
14817 v_ceil_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
14818 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x05,0x06,0x00]
14819
14820 v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
14821 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x0e,0x06,0x00]
14822
14823 v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
14824 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x16,0x06,0x00]
14825
14826 v_ceil_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
14827 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x16,0x06,0x00]
14828
14829 v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
14830 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x06,0x00]
14831
14832 v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
14833 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x00,0x00]
14834
14835 v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
14836 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x01,0x00]
14837
14838 v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
14839 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x02,0x00]
14840
14841 v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
14842 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x03,0x00]
14843
14844 v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
14845 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x04,0x00]
14846
14847 v_ceil_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
14848 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x05,0x00]
14849
14850 v_ceil_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14851 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x16,0x00]
14852
14853 v_ceil_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14854 // CHECK: [0xf9,0x8a,0x0a,0x7e,0x01,0x06,0x26,0x00]
14855
14856 v_ceil_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
14857 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0xe4,0x00,0x00]
14858
14859 v_ceil_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
14860 // CHECK: [0xfa,0x8a,0xfe,0x7f,0x01,0xe4,0x00,0x00]
14861
14862 v_ceil_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
14863 // CHECK: [0xfa,0x8a,0x0a,0x7e,0xff,0xe4,0x00,0x00]
14864
14865 v_ceil_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
14866 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x1b,0x00,0x00]
14867
14868 v_ceil_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
14869 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x40,0x01,0x00]
14870
14871 v_ceil_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
14872 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x41,0x01,0x00]
14873
14874 v_ceil_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
14875 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x42,0x01,0x00]
14876
14877 v_ceil_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
14878 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x43,0x01,0x00]
14879
14880 v_ceil_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
14881 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x30,0x01,0x00]
14882
14883 v_ceil_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
14884 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x34,0x01,0x00]
14885
14886 v_ceil_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
14887 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x38,0x01,0x00]
14888
14889 v_ceil_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
14890 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x3c,0x01,0x00]
14891
14892 v_ceil_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
14893 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x01,0x01,0x00]
14894
14895 v_ceil_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
14896 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x0f,0x01,0x00]
14897
14898 v_ceil_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
14899 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x11,0x01,0x00]
14900
14901 v_ceil_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
14902 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x1f,0x01,0x00]
14903
14904 v_ceil_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
14905 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x21,0x01,0x00]
14906
14907 v_ceil_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
14908 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0x2f,0x01,0x00]
14909
14910 v_ceil_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
14911 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0xe4,0x00,0x10]
14912
14913 v_ceil_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
14914 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0xe4,0x00,0x30]
14915
14916 v_ceil_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
14917 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
14918
14919 v_ceil_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
14920 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
14921
14922 v_ceil_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
14923 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0xe4,0x00,0x01]
14924
14925 v_ceil_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
14926 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0xe4,0x00,0x03]
14927
14928 v_ceil_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
14929 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
14930
14931 v_ceil_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
14932 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
14933
14934 v_ceil_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
14935 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0xe4,0x08,0x00]
14936
14937 v_ceil_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
14938 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0xe4,0x10,0x00]
14939
14940 v_ceil_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
14941 // CHECK: [0xfa,0x8a,0x0a,0x7e,0x01,0xe4,0x20,0x00]
14942
14943 v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14944 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x06,0x00]
14945
14946 v_trunc_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14947 // CHECK: [0xf9,0x8c,0xfe,0x7f,0x01,0x06,0x06,0x00]
14948
14949 v_trunc_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14950 // CHECK: [0xf9,0x8c,0x0a,0x7e,0xff,0x06,0x06,0x00]
14951
14952 v_trunc_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14953 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x86,0x00]
14954
14955 v_trunc_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14956 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x65,0x06,0x86,0x00]
14957
14958 v_trunc_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14959 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x66,0x06,0x86,0x00]
14960
14961 v_trunc_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14962 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x67,0x06,0x86,0x00]
14963
14964 v_trunc_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14965 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x6a,0x06,0x86,0x00]
14966
14967 v_trunc_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14968 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x6b,0x06,0x86,0x00]
14969
14970 v_trunc_f16_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14971 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x7b,0x06,0x86,0x00]
14972
14973 v_trunc_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14974 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x7c,0x06,0x86,0x00]
14975
14976 v_trunc_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14977 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x7e,0x06,0x86,0x00]
14978
14979 v_trunc_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14980 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x7f,0x06,0x86,0x00]
14981
14982 v_trunc_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14983 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x80,0x06,0x86,0x00]
14984
14985 v_trunc_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14986 // CHECK: [0xf9,0x8c,0x0a,0x7e,0xc1,0x06,0x86,0x00]
14987
14988 v_trunc_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14989 // CHECK: [0xf9,0x8c,0x0a,0x7e,0xf0,0x06,0x86,0x00]
14990
14991 v_trunc_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14992 // CHECK: [0xf9,0x8c,0x0a,0x7e,0xf7,0x06,0x86,0x00]
14993
14994 v_trunc_f16_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14995 // CHECK: [0xf9,0x8c,0x0a,0x7e,0xfb,0x06,0x86,0x00]
14996
14997 v_trunc_f16_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
14998 // CHECK: [0xf9,0x8c,0x0a,0x7e,0xfc,0x06,0x86,0x00]
14999
15000 v_trunc_f16_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15001 // CHECK: [0xf9,0x8c,0x0a,0x7e,0xfd,0x06,0x86,0x00]
15002
15003 v_trunc_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15004 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x26,0x06,0x00]
15005
15006 v_trunc_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
15007 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x06,0x00]
15008
15009 v_trunc_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
15010 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x00,0x06,0x00]
15011
15012 v_trunc_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
15013 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x01,0x06,0x00]
15014
15015 v_trunc_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
15016 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x02,0x06,0x00]
15017
15018 v_trunc_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
15019 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x03,0x06,0x00]
15020
15021 v_trunc_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
15022 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x04,0x06,0x00]
15023
15024 v_trunc_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
15025 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x05,0x06,0x00]
15026
15027 v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
15028 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x0e,0x06,0x00]
15029
15030 v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
15031 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x16,0x06,0x00]
15032
15033 v_trunc_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
15034 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x16,0x06,0x00]
15035
15036 v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
15037 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x06,0x00]
15038
15039 v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
15040 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x00,0x00]
15041
15042 v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
15043 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x01,0x00]
15044
15045 v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
15046 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x02,0x00]
15047
15048 v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
15049 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x03,0x00]
15050
15051 v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
15052 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x04,0x00]
15053
15054 v_trunc_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
15055 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x05,0x00]
15056
15057 v_trunc_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15058 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x16,0x00]
15059
15060 v_trunc_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15061 // CHECK: [0xf9,0x8c,0x0a,0x7e,0x01,0x06,0x26,0x00]
15062
15063 v_trunc_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
15064 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0xe4,0x00,0x00]
15065
15066 v_trunc_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
15067 // CHECK: [0xfa,0x8c,0xfe,0x7f,0x01,0xe4,0x00,0x00]
15068
15069 v_trunc_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
15070 // CHECK: [0xfa,0x8c,0x0a,0x7e,0xff,0xe4,0x00,0x00]
15071
15072 v_trunc_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
15073 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x1b,0x00,0x00]
15074
15075 v_trunc_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
15076 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x40,0x01,0x00]
15077
15078 v_trunc_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
15079 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x41,0x01,0x00]
15080
15081 v_trunc_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
15082 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x42,0x01,0x00]
15083
15084 v_trunc_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
15085 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x43,0x01,0x00]
15086
15087 v_trunc_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
15088 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x30,0x01,0x00]
15089
15090 v_trunc_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
15091 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x34,0x01,0x00]
15092
15093 v_trunc_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
15094 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x38,0x01,0x00]
15095
15096 v_trunc_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
15097 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x3c,0x01,0x00]
15098
15099 v_trunc_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
15100 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x01,0x01,0x00]
15101
15102 v_trunc_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
15103 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x0f,0x01,0x00]
15104
15105 v_trunc_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
15106 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x11,0x01,0x00]
15107
15108 v_trunc_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
15109 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x1f,0x01,0x00]
15110
15111 v_trunc_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
15112 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x21,0x01,0x00]
15113
15114 v_trunc_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
15115 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0x2f,0x01,0x00]
15116
15117 v_trunc_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
15118 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0xe4,0x00,0x10]
15119
15120 v_trunc_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
15121 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0xe4,0x00,0x30]
15122
15123 v_trunc_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
15124 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
15125
15126 v_trunc_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
15127 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
15128
15129 v_trunc_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
15130 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0xe4,0x00,0x01]
15131
15132 v_trunc_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
15133 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0xe4,0x00,0x03]
15134
15135 v_trunc_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
15136 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
15137
15138 v_trunc_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
15139 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
15140
15141 v_trunc_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
15142 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0xe4,0x08,0x00]
15143
15144 v_trunc_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
15145 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0xe4,0x10,0x00]
15146
15147 v_trunc_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
15148 // CHECK: [0xfa,0x8c,0x0a,0x7e,0x01,0xe4,0x20,0x00]
15149
15150 v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15151 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x06,0x00]
15152
15153 v_rndne_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15154 // CHECK: [0xf9,0x8e,0xfe,0x7f,0x01,0x06,0x06,0x00]
15155
15156 v_rndne_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15157 // CHECK: [0xf9,0x8e,0x0a,0x7e,0xff,0x06,0x06,0x00]
15158
15159 v_rndne_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15160 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x86,0x00]
15161
15162 v_rndne_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15163 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x65,0x06,0x86,0x00]
15164
15165 v_rndne_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15166 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x66,0x06,0x86,0x00]
15167
15168 v_rndne_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15169 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x67,0x06,0x86,0x00]
15170
15171 v_rndne_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15172 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x6a,0x06,0x86,0x00]
15173
15174 v_rndne_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15175 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x6b,0x06,0x86,0x00]
15176
15177 v_rndne_f16_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15178 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x7b,0x06,0x86,0x00]
15179
15180 v_rndne_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15181 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x7c,0x06,0x86,0x00]
15182
15183 v_rndne_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15184 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x7e,0x06,0x86,0x00]
15185
15186 v_rndne_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15187 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x7f,0x06,0x86,0x00]
15188
15189 v_rndne_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15190 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x80,0x06,0x86,0x00]
15191
15192 v_rndne_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15193 // CHECK: [0xf9,0x8e,0x0a,0x7e,0xc1,0x06,0x86,0x00]
15194
15195 v_rndne_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15196 // CHECK: [0xf9,0x8e,0x0a,0x7e,0xf0,0x06,0x86,0x00]
15197
15198 v_rndne_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15199 // CHECK: [0xf9,0x8e,0x0a,0x7e,0xf7,0x06,0x86,0x00]
15200
15201 v_rndne_f16_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15202 // CHECK: [0xf9,0x8e,0x0a,0x7e,0xfb,0x06,0x86,0x00]
15203
15204 v_rndne_f16_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15205 // CHECK: [0xf9,0x8e,0x0a,0x7e,0xfc,0x06,0x86,0x00]
15206
15207 v_rndne_f16_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15208 // CHECK: [0xf9,0x8e,0x0a,0x7e,0xfd,0x06,0x86,0x00]
15209
15210 v_rndne_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15211 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x26,0x06,0x00]
15212
15213 v_rndne_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
15214 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x06,0x00]
15215
15216 v_rndne_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
15217 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x00,0x06,0x00]
15218
15219 v_rndne_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
15220 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x01,0x06,0x00]
15221
15222 v_rndne_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
15223 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x02,0x06,0x00]
15224
15225 v_rndne_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
15226 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x03,0x06,0x00]
15227
15228 v_rndne_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
15229 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x04,0x06,0x00]
15230
15231 v_rndne_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
15232 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x05,0x06,0x00]
15233
15234 v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
15235 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x0e,0x06,0x00]
15236
15237 v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
15238 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x16,0x06,0x00]
15239
15240 v_rndne_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
15241 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x16,0x06,0x00]
15242
15243 v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
15244 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x06,0x00]
15245
15246 v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
15247 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x00,0x00]
15248
15249 v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
15250 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x01,0x00]
15251
15252 v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
15253 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x02,0x00]
15254
15255 v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
15256 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x03,0x00]
15257
15258 v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
15259 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x04,0x00]
15260
15261 v_rndne_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
15262 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x05,0x00]
15263
15264 v_rndne_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15265 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x16,0x00]
15266
15267 v_rndne_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15268 // CHECK: [0xf9,0x8e,0x0a,0x7e,0x01,0x06,0x26,0x00]
15269
15270 v_rndne_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
15271 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0xe4,0x00,0x00]
15272
15273 v_rndne_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
15274 // CHECK: [0xfa,0x8e,0xfe,0x7f,0x01,0xe4,0x00,0x00]
15275
15276 v_rndne_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
15277 // CHECK: [0xfa,0x8e,0x0a,0x7e,0xff,0xe4,0x00,0x00]
15278
15279 v_rndne_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
15280 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x1b,0x00,0x00]
15281
15282 v_rndne_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
15283 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x40,0x01,0x00]
15284
15285 v_rndne_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
15286 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x41,0x01,0x00]
15287
15288 v_rndne_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
15289 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x42,0x01,0x00]
15290
15291 v_rndne_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
15292 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x43,0x01,0x00]
15293
15294 v_rndne_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
15295 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x30,0x01,0x00]
15296
15297 v_rndne_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
15298 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x34,0x01,0x00]
15299
15300 v_rndne_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
15301 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x38,0x01,0x00]
15302
15303 v_rndne_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
15304 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x3c,0x01,0x00]
15305
15306 v_rndne_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
15307 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x01,0x01,0x00]
15308
15309 v_rndne_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
15310 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x0f,0x01,0x00]
15311
15312 v_rndne_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
15313 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x11,0x01,0x00]
15314
15315 v_rndne_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
15316 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x1f,0x01,0x00]
15317
15318 v_rndne_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
15319 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x21,0x01,0x00]
15320
15321 v_rndne_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
15322 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0x2f,0x01,0x00]
15323
15324 v_rndne_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
15325 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0xe4,0x00,0x10]
15326
15327 v_rndne_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
15328 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0xe4,0x00,0x30]
15329
15330 v_rndne_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
15331 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
15332
15333 v_rndne_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
15334 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
15335
15336 v_rndne_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
15337 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0xe4,0x00,0x01]
15338
15339 v_rndne_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
15340 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0xe4,0x00,0x03]
15341
15342 v_rndne_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
15343 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
15344
15345 v_rndne_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
15346 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
15347
15348 v_rndne_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
15349 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0xe4,0x08,0x00]
15350
15351 v_rndne_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
15352 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0xe4,0x10,0x00]
15353
15354 v_rndne_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
15355 // CHECK: [0xfa,0x8e,0x0a,0x7e,0x01,0xe4,0x20,0x00]
15356
15357 v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15358 // CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x06,0x00]
15359
15360 v_fract_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15361 // CHECK: [0xf9,0x90,0xfe,0x7f,0x01,0x06,0x06,0x00]
15362
15363 v_fract_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15364 // CHECK: [0xf9,0x90,0x0a,0x7e,0xff,0x06,0x06,0x00]
15365
15366 v_fract_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15367 // CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x86,0x00]
15368
15369 v_fract_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15370 // CHECK: [0xf9,0x90,0x0a,0x7e,0x65,0x06,0x86,0x00]
15371
15372 v_fract_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15373 // CHECK: [0xf9,0x90,0x0a,0x7e,0x66,0x06,0x86,0x00]
15374
15375 v_fract_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15376 // CHECK: [0xf9,0x90,0x0a,0x7e,0x67,0x06,0x86,0x00]
15377
15378 v_fract_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15379 // CHECK: [0xf9,0x90,0x0a,0x7e,0x6a,0x06,0x86,0x00]
15380
15381 v_fract_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15382 // CHECK: [0xf9,0x90,0x0a,0x7e,0x6b,0x06,0x86,0x00]
15383
15384 v_fract_f16_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15385 // CHECK: [0xf9,0x90,0x0a,0x7e,0x7b,0x06,0x86,0x00]
15386
15387 v_fract_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15388 // CHECK: [0xf9,0x90,0x0a,0x7e,0x7c,0x06,0x86,0x00]
15389
15390 v_fract_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15391 // CHECK: [0xf9,0x90,0x0a,0x7e,0x7e,0x06,0x86,0x00]
15392
15393 v_fract_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15394 // CHECK: [0xf9,0x90,0x0a,0x7e,0x7f,0x06,0x86,0x00]
15395
15396 v_fract_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15397 // CHECK: [0xf9,0x90,0x0a,0x7e,0x80,0x06,0x86,0x00]
15398
15399 v_fract_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15400 // CHECK: [0xf9,0x90,0x0a,0x7e,0xc1,0x06,0x86,0x00]
15401
15402 v_fract_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15403 // CHECK: [0xf9,0x90,0x0a,0x7e,0xf0,0x06,0x86,0x00]
15404
15405 v_fract_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15406 // CHECK: [0xf9,0x90,0x0a,0x7e,0xf7,0x06,0x86,0x00]
15407
15408 v_fract_f16_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15409 // CHECK: [0xf9,0x90,0x0a,0x7e,0xfb,0x06,0x86,0x00]
15410
15411 v_fract_f16_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15412 // CHECK: [0xf9,0x90,0x0a,0x7e,0xfc,0x06,0x86,0x00]
15413
15414 v_fract_f16_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15415 // CHECK: [0xf9,0x90,0x0a,0x7e,0xfd,0x06,0x86,0x00]
15416
15417 v_fract_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15418 // CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x26,0x06,0x00]
15419
15420 v_fract_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
15421 // CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x06,0x00]
15422
15423 v_fract_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
15424 // CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x00,0x06,0x00]
15425
15426 v_fract_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
15427 // CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x01,0x06,0x00]
15428
15429 v_fract_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
15430 // CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x02,0x06,0x00]
15431
15432 v_fract_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
15433 // CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x03,0x06,0x00]
15434
15435 v_fract_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
15436 // CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x04,0x06,0x00]
15437
15438 v_fract_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
15439 // CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x05,0x06,0x00]
15440
15441 v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
15442 // CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x0e,0x06,0x00]
15443
15444 v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
15445 // CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x16,0x06,0x00]
15446
15447 v_fract_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
15448 // CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x16,0x06,0x00]
15449
15450 v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
15451 // CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x06,0x00]
15452
15453 v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
15454 // CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x00,0x00]
15455
15456 v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
15457 // CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x01,0x00]
15458
15459 v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
15460 // CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x02,0x00]
15461
15462 v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
15463 // CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x03,0x00]
15464
15465 v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
15466 // CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x04,0x00]
15467
15468 v_fract_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
15469 // CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x05,0x00]
15470
15471 v_fract_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15472 // CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x16,0x00]
15473
15474 v_fract_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15475 // CHECK: [0xf9,0x90,0x0a,0x7e,0x01,0x06,0x26,0x00]
15476
15477 v_fract_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
15478 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0xe4,0x00,0x00]
15479
15480 v_fract_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
15481 // CHECK: [0xfa,0x90,0xfe,0x7f,0x01,0xe4,0x00,0x00]
15482
15483 v_fract_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
15484 // CHECK: [0xfa,0x90,0x0a,0x7e,0xff,0xe4,0x00,0x00]
15485
15486 v_fract_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
15487 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x1b,0x00,0x00]
15488
15489 v_fract_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
15490 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x40,0x01,0x00]
15491
15492 v_fract_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
15493 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x41,0x01,0x00]
15494
15495 v_fract_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
15496 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x42,0x01,0x00]
15497
15498 v_fract_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
15499 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x43,0x01,0x00]
15500
15501 v_fract_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
15502 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x30,0x01,0x00]
15503
15504 v_fract_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
15505 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x34,0x01,0x00]
15506
15507 v_fract_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
15508 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x38,0x01,0x00]
15509
15510 v_fract_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
15511 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x3c,0x01,0x00]
15512
15513 v_fract_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
15514 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x01,0x01,0x00]
15515
15516 v_fract_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
15517 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x0f,0x01,0x00]
15518
15519 v_fract_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
15520 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x11,0x01,0x00]
15521
15522 v_fract_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
15523 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x1f,0x01,0x00]
15524
15525 v_fract_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
15526 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x21,0x01,0x00]
15527
15528 v_fract_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
15529 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0x2f,0x01,0x00]
15530
15531 v_fract_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
15532 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0xe4,0x00,0x10]
15533
15534 v_fract_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
15535 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0xe4,0x00,0x30]
15536
15537 v_fract_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
15538 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
15539
15540 v_fract_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
15541 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
15542
15543 v_fract_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
15544 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0xe4,0x00,0x01]
15545
15546 v_fract_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
15547 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0xe4,0x00,0x03]
15548
15549 v_fract_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
15550 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
15551
15552 v_fract_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
15553 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
15554
15555 v_fract_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
15556 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0xe4,0x08,0x00]
15557
15558 v_fract_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
15559 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0xe4,0x10,0x00]
15560
15561 v_fract_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
15562 // CHECK: [0xfa,0x90,0x0a,0x7e,0x01,0xe4,0x20,0x00]
15563
15564 v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15565 // CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x06,0x00]
15566
15567 v_sin_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15568 // CHECK: [0xf9,0x92,0xfe,0x7f,0x01,0x06,0x06,0x00]
15569
15570 v_sin_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15571 // CHECK: [0xf9,0x92,0x0a,0x7e,0xff,0x06,0x06,0x00]
15572
15573 v_sin_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15574 // CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x86,0x00]
15575
15576 v_sin_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15577 // CHECK: [0xf9,0x92,0x0a,0x7e,0x65,0x06,0x86,0x00]
15578
15579 v_sin_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15580 // CHECK: [0xf9,0x92,0x0a,0x7e,0x66,0x06,0x86,0x00]
15581
15582 v_sin_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15583 // CHECK: [0xf9,0x92,0x0a,0x7e,0x67,0x06,0x86,0x00]
15584
15585 v_sin_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15586 // CHECK: [0xf9,0x92,0x0a,0x7e,0x6a,0x06,0x86,0x00]
15587
15588 v_sin_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15589 // CHECK: [0xf9,0x92,0x0a,0x7e,0x6b,0x06,0x86,0x00]
15590
15591 v_sin_f16_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15592 // CHECK: [0xf9,0x92,0x0a,0x7e,0x7b,0x06,0x86,0x00]
15593
15594 v_sin_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15595 // CHECK: [0xf9,0x92,0x0a,0x7e,0x7c,0x06,0x86,0x00]
15596
15597 v_sin_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15598 // CHECK: [0xf9,0x92,0x0a,0x7e,0x7e,0x06,0x86,0x00]
15599
15600 v_sin_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15601 // CHECK: [0xf9,0x92,0x0a,0x7e,0x7f,0x06,0x86,0x00]
15602
15603 v_sin_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15604 // CHECK: [0xf9,0x92,0x0a,0x7e,0x80,0x06,0x86,0x00]
15605
15606 v_sin_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15607 // CHECK: [0xf9,0x92,0x0a,0x7e,0xc1,0x06,0x86,0x00]
15608
15609 v_sin_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15610 // CHECK: [0xf9,0x92,0x0a,0x7e,0xf0,0x06,0x86,0x00]
15611
15612 v_sin_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15613 // CHECK: [0xf9,0x92,0x0a,0x7e,0xf7,0x06,0x86,0x00]
15614
15615 v_sin_f16_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15616 // CHECK: [0xf9,0x92,0x0a,0x7e,0xfb,0x06,0x86,0x00]
15617
15618 v_sin_f16_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15619 // CHECK: [0xf9,0x92,0x0a,0x7e,0xfc,0x06,0x86,0x00]
15620
15621 v_sin_f16_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15622 // CHECK: [0xf9,0x92,0x0a,0x7e,0xfd,0x06,0x86,0x00]
15623
15624 v_sin_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15625 // CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x26,0x06,0x00]
15626
15627 v_sin_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
15628 // CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x06,0x00]
15629
15630 v_sin_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
15631 // CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x00,0x06,0x00]
15632
15633 v_sin_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
15634 // CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x01,0x06,0x00]
15635
15636 v_sin_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
15637 // CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x02,0x06,0x00]
15638
15639 v_sin_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
15640 // CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x03,0x06,0x00]
15641
15642 v_sin_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
15643 // CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x04,0x06,0x00]
15644
15645 v_sin_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
15646 // CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x05,0x06,0x00]
15647
15648 v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
15649 // CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x0e,0x06,0x00]
15650
15651 v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
15652 // CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x16,0x06,0x00]
15653
15654 v_sin_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
15655 // CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x16,0x06,0x00]
15656
15657 v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
15658 // CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x06,0x00]
15659
15660 v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
15661 // CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x00,0x00]
15662
15663 v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
15664 // CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x01,0x00]
15665
15666 v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
15667 // CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x02,0x00]
15668
15669 v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
15670 // CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x03,0x00]
15671
15672 v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
15673 // CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x04,0x00]
15674
15675 v_sin_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
15676 // CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x05,0x00]
15677
15678 v_sin_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15679 // CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x16,0x00]
15680
15681 v_sin_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15682 // CHECK: [0xf9,0x92,0x0a,0x7e,0x01,0x06,0x26,0x00]
15683
15684 v_sin_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
15685 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0xe4,0x00,0x00]
15686
15687 v_sin_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
15688 // CHECK: [0xfa,0x92,0xfe,0x7f,0x01,0xe4,0x00,0x00]
15689
15690 v_sin_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
15691 // CHECK: [0xfa,0x92,0x0a,0x7e,0xff,0xe4,0x00,0x00]
15692
15693 v_sin_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
15694 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x1b,0x00,0x00]
15695
15696 v_sin_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
15697 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x40,0x01,0x00]
15698
15699 v_sin_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
15700 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x41,0x01,0x00]
15701
15702 v_sin_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
15703 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x42,0x01,0x00]
15704
15705 v_sin_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
15706 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x43,0x01,0x00]
15707
15708 v_sin_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
15709 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x30,0x01,0x00]
15710
15711 v_sin_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
15712 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x34,0x01,0x00]
15713
15714 v_sin_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
15715 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x38,0x01,0x00]
15716
15717 v_sin_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
15718 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x3c,0x01,0x00]
15719
15720 v_sin_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
15721 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x01,0x01,0x00]
15722
15723 v_sin_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
15724 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x0f,0x01,0x00]
15725
15726 v_sin_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
15727 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x11,0x01,0x00]
15728
15729 v_sin_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
15730 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x1f,0x01,0x00]
15731
15732 v_sin_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
15733 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x21,0x01,0x00]
15734
15735 v_sin_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
15736 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0x2f,0x01,0x00]
15737
15738 v_sin_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
15739 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0xe4,0x00,0x10]
15740
15741 v_sin_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
15742 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0xe4,0x00,0x30]
15743
15744 v_sin_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
15745 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
15746
15747 v_sin_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
15748 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
15749
15750 v_sin_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
15751 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0xe4,0x00,0x01]
15752
15753 v_sin_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
15754 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0xe4,0x00,0x03]
15755
15756 v_sin_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
15757 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
15758
15759 v_sin_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
15760 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
15761
15762 v_sin_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
15763 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0xe4,0x08,0x00]
15764
15765 v_sin_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
15766 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0xe4,0x10,0x00]
15767
15768 v_sin_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
15769 // CHECK: [0xfa,0x92,0x0a,0x7e,0x01,0xe4,0x20,0x00]
15770
15771 v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15772 // CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x06,0x00]
15773
15774 v_cos_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15775 // CHECK: [0xf9,0x94,0xfe,0x7f,0x01,0x06,0x06,0x00]
15776
15777 v_cos_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15778 // CHECK: [0xf9,0x94,0x0a,0x7e,0xff,0x06,0x06,0x00]
15779
15780 v_cos_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15781 // CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x86,0x00]
15782
15783 v_cos_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15784 // CHECK: [0xf9,0x94,0x0a,0x7e,0x65,0x06,0x86,0x00]
15785
15786 v_cos_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15787 // CHECK: [0xf9,0x94,0x0a,0x7e,0x66,0x06,0x86,0x00]
15788
15789 v_cos_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15790 // CHECK: [0xf9,0x94,0x0a,0x7e,0x67,0x06,0x86,0x00]
15791
15792 v_cos_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15793 // CHECK: [0xf9,0x94,0x0a,0x7e,0x6a,0x06,0x86,0x00]
15794
15795 v_cos_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15796 // CHECK: [0xf9,0x94,0x0a,0x7e,0x6b,0x06,0x86,0x00]
15797
15798 v_cos_f16_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15799 // CHECK: [0xf9,0x94,0x0a,0x7e,0x7b,0x06,0x86,0x00]
15800
15801 v_cos_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15802 // CHECK: [0xf9,0x94,0x0a,0x7e,0x7c,0x06,0x86,0x00]
15803
15804 v_cos_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15805 // CHECK: [0xf9,0x94,0x0a,0x7e,0x7e,0x06,0x86,0x00]
15806
15807 v_cos_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15808 // CHECK: [0xf9,0x94,0x0a,0x7e,0x7f,0x06,0x86,0x00]
15809
15810 v_cos_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15811 // CHECK: [0xf9,0x94,0x0a,0x7e,0x80,0x06,0x86,0x00]
15812
15813 v_cos_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15814 // CHECK: [0xf9,0x94,0x0a,0x7e,0xc1,0x06,0x86,0x00]
15815
15816 v_cos_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15817 // CHECK: [0xf9,0x94,0x0a,0x7e,0xf0,0x06,0x86,0x00]
15818
15819 v_cos_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15820 // CHECK: [0xf9,0x94,0x0a,0x7e,0xf7,0x06,0x86,0x00]
15821
15822 v_cos_f16_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15823 // CHECK: [0xf9,0x94,0x0a,0x7e,0xfb,0x06,0x86,0x00]
15824
15825 v_cos_f16_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15826 // CHECK: [0xf9,0x94,0x0a,0x7e,0xfc,0x06,0x86,0x00]
15827
15828 v_cos_f16_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15829 // CHECK: [0xf9,0x94,0x0a,0x7e,0xfd,0x06,0x86,0x00]
15830
15831 v_cos_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15832 // CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x26,0x06,0x00]
15833
15834 v_cos_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
15835 // CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x06,0x00]
15836
15837 v_cos_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
15838 // CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x00,0x06,0x00]
15839
15840 v_cos_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
15841 // CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x01,0x06,0x00]
15842
15843 v_cos_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
15844 // CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x02,0x06,0x00]
15845
15846 v_cos_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
15847 // CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x03,0x06,0x00]
15848
15849 v_cos_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
15850 // CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x04,0x06,0x00]
15851
15852 v_cos_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
15853 // CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x05,0x06,0x00]
15854
15855 v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
15856 // CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x0e,0x06,0x00]
15857
15858 v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
15859 // CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x16,0x06,0x00]
15860
15861 v_cos_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
15862 // CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x16,0x06,0x00]
15863
15864 v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
15865 // CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x06,0x00]
15866
15867 v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
15868 // CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x00,0x00]
15869
15870 v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
15871 // CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x01,0x00]
15872
15873 v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
15874 // CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x02,0x00]
15875
15876 v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
15877 // CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x03,0x00]
15878
15879 v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
15880 // CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x04,0x00]
15881
15882 v_cos_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
15883 // CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x05,0x00]
15884
15885 v_cos_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15886 // CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x16,0x00]
15887
15888 v_cos_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15889 // CHECK: [0xf9,0x94,0x0a,0x7e,0x01,0x06,0x26,0x00]
15890
15891 v_cos_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
15892 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0xe4,0x00,0x00]
15893
15894 v_cos_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
15895 // CHECK: [0xfa,0x94,0xfe,0x7f,0x01,0xe4,0x00,0x00]
15896
15897 v_cos_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
15898 // CHECK: [0xfa,0x94,0x0a,0x7e,0xff,0xe4,0x00,0x00]
15899
15900 v_cos_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
15901 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x1b,0x00,0x00]
15902
15903 v_cos_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
15904 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x40,0x01,0x00]
15905
15906 v_cos_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
15907 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x41,0x01,0x00]
15908
15909 v_cos_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
15910 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x42,0x01,0x00]
15911
15912 v_cos_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
15913 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x43,0x01,0x00]
15914
15915 v_cos_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
15916 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x30,0x01,0x00]
15917
15918 v_cos_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
15919 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x34,0x01,0x00]
15920
15921 v_cos_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
15922 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x38,0x01,0x00]
15923
15924 v_cos_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
15925 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x3c,0x01,0x00]
15926
15927 v_cos_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
15928 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x01,0x01,0x00]
15929
15930 v_cos_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
15931 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x0f,0x01,0x00]
15932
15933 v_cos_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
15934 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x11,0x01,0x00]
15935
15936 v_cos_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
15937 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x1f,0x01,0x00]
15938
15939 v_cos_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
15940 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x21,0x01,0x00]
15941
15942 v_cos_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
15943 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0x2f,0x01,0x00]
15944
15945 v_cos_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
15946 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0xe4,0x00,0x10]
15947
15948 v_cos_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
15949 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0xe4,0x00,0x30]
15950
15951 v_cos_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
15952 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
15953
15954 v_cos_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
15955 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
15956
15957 v_cos_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
15958 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0xe4,0x00,0x01]
15959
15960 v_cos_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
15961 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0xe4,0x00,0x03]
15962
15963 v_cos_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
15964 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
15965
15966 v_cos_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
15967 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
15968
15969 v_cos_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
15970 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0xe4,0x08,0x00]
15971
15972 v_cos_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
15973 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0xe4,0x10,0x00]
15974
15975 v_cos_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
15976 // CHECK: [0xfa,0x94,0x0a,0x7e,0x01,0xe4,0x20,0x00]
15977
15978 v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15979 // CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x06,0x00]
15980
15981 v_exp_legacy_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15982 // CHECK: [0xf9,0x96,0xfe,0x7f,0x01,0x06,0x06,0x00]
15983
15984 v_exp_legacy_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15985 // CHECK: [0xf9,0x96,0x0a,0x7e,0xff,0x06,0x06,0x00]
15986
15987 v_exp_legacy_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15988 // CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x86,0x00]
15989
15990 v_exp_legacy_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15991 // CHECK: [0xf9,0x96,0x0a,0x7e,0x65,0x06,0x86,0x00]
15992
15993 v_exp_legacy_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15994 // CHECK: [0xf9,0x96,0x0a,0x7e,0x66,0x06,0x86,0x00]
15995
15996 v_exp_legacy_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
15997 // CHECK: [0xf9,0x96,0x0a,0x7e,0x67,0x06,0x86,0x00]
15998
15999 v_exp_legacy_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16000 // CHECK: [0xf9,0x96,0x0a,0x7e,0x6a,0x06,0x86,0x00]
16001
16002 v_exp_legacy_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16003 // CHECK: [0xf9,0x96,0x0a,0x7e,0x6b,0x06,0x86,0x00]
16004
16005 v_exp_legacy_f32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16006 // CHECK: [0xf9,0x96,0x0a,0x7e,0x7b,0x06,0x86,0x00]
16007
16008 v_exp_legacy_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16009 // CHECK: [0xf9,0x96,0x0a,0x7e,0x7c,0x06,0x86,0x00]
16010
16011 v_exp_legacy_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16012 // CHECK: [0xf9,0x96,0x0a,0x7e,0x7e,0x06,0x86,0x00]
16013
16014 v_exp_legacy_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16015 // CHECK: [0xf9,0x96,0x0a,0x7e,0x7f,0x06,0x86,0x00]
16016
16017 v_exp_legacy_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16018 // CHECK: [0xf9,0x96,0x0a,0x7e,0x80,0x06,0x86,0x00]
16019
16020 v_exp_legacy_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16021 // CHECK: [0xf9,0x96,0x0a,0x7e,0xc1,0x06,0x86,0x00]
16022
16023 v_exp_legacy_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16024 // CHECK: [0xf9,0x96,0x0a,0x7e,0xf0,0x06,0x86,0x00]
16025
16026 v_exp_legacy_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16027 // CHECK: [0xf9,0x96,0x0a,0x7e,0xf7,0x06,0x86,0x00]
16028
16029 v_exp_legacy_f32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16030 // CHECK: [0xf9,0x96,0x0a,0x7e,0xfb,0x06,0x86,0x00]
16031
16032 v_exp_legacy_f32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16033 // CHECK: [0xf9,0x96,0x0a,0x7e,0xfc,0x06,0x86,0x00]
16034
16035 v_exp_legacy_f32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16036 // CHECK: [0xf9,0x96,0x0a,0x7e,0xfd,0x06,0x86,0x00]
16037
16038 v_exp_legacy_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16039 // CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x26,0x06,0x00]
16040
16041 v_exp_legacy_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16042 // CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x46,0x06,0x00]
16043
16044 v_exp_legacy_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16045 // CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x86,0x06,0x00]
16046
16047 v_exp_legacy_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16048 // CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0xc6,0x06,0x00]
16049
16050 v_exp_legacy_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
16051 // CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x06,0x00]
16052
16053 v_exp_legacy_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
16054 // CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x00,0x06,0x00]
16055
16056 v_exp_legacy_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
16057 // CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x01,0x06,0x00]
16058
16059 v_exp_legacy_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
16060 // CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x02,0x06,0x00]
16061
16062 v_exp_legacy_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
16063 // CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x03,0x06,0x00]
16064
16065 v_exp_legacy_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
16066 // CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x04,0x06,0x00]
16067
16068 v_exp_legacy_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
16069 // CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x05,0x06,0x00]
16070
16071 v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
16072 // CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x0e,0x06,0x00]
16073
16074 v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
16075 // CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x16,0x06,0x00]
16076
16077 v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
16078 // CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x16,0x06,0x00]
16079
16080 v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
16081 // CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x06,0x00]
16082
16083 v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
16084 // CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x00,0x00]
16085
16086 v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
16087 // CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x01,0x00]
16088
16089 v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
16090 // CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x02,0x00]
16091
16092 v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
16093 // CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x03,0x00]
16094
16095 v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
16096 // CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x04,0x00]
16097
16098 v_exp_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
16099 // CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x05,0x00]
16100
16101 v_exp_legacy_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16102 // CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x16,0x00]
16103
16104 v_exp_legacy_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16105 // CHECK: [0xf9,0x96,0x0a,0x7e,0x01,0x06,0x26,0x00]
16106
16107 v_exp_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
16108 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0xe4,0x00,0x00]
16109
16110 v_exp_legacy_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
16111 // CHECK: [0xfa,0x96,0xfe,0x7f,0x01,0xe4,0x00,0x00]
16112
16113 v_exp_legacy_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
16114 // CHECK: [0xfa,0x96,0x0a,0x7e,0xff,0xe4,0x00,0x00]
16115
16116 v_exp_legacy_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
16117 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x1b,0x00,0x00]
16118
16119 v_exp_legacy_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
16120 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x40,0x01,0x00]
16121
16122 v_exp_legacy_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
16123 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x41,0x01,0x00]
16124
16125 v_exp_legacy_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
16126 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x42,0x01,0x00]
16127
16128 v_exp_legacy_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
16129 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x43,0x01,0x00]
16130
16131 v_exp_legacy_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
16132 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x30,0x01,0x00]
16133
16134 v_exp_legacy_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
16135 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x34,0x01,0x00]
16136
16137 v_exp_legacy_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
16138 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x38,0x01,0x00]
16139
16140 v_exp_legacy_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
16141 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x3c,0x01,0x00]
16142
16143 v_exp_legacy_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
16144 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x01,0x01,0x00]
16145
16146 v_exp_legacy_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
16147 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x0f,0x01,0x00]
16148
16149 v_exp_legacy_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
16150 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x11,0x01,0x00]
16151
16152 v_exp_legacy_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
16153 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x1f,0x01,0x00]
16154
16155 v_exp_legacy_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
16156 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x21,0x01,0x00]
16157
16158 v_exp_legacy_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
16159 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0x2f,0x01,0x00]
16160
16161 v_exp_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
16162 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0xe4,0x00,0x10]
16163
16164 v_exp_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
16165 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0xe4,0x00,0x30]
16166
16167 v_exp_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
16168 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
16169
16170 v_exp_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
16171 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
16172
16173 v_exp_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
16174 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0xe4,0x00,0x01]
16175
16176 v_exp_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
16177 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0xe4,0x00,0x03]
16178
16179 v_exp_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
16180 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
16181
16182 v_exp_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
16183 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
16184
16185 v_exp_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
16186 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0xe4,0x08,0x00]
16187
16188 v_exp_legacy_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
16189 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0xe4,0x10,0x00]
16190
16191 v_exp_legacy_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
16192 // CHECK: [0xfa,0x96,0x0a,0x7e,0x01,0xe4,0x20,0x00]
16193
16194 v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16195 // CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x06,0x00]
16196
16197 v_log_legacy_f32_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16198 // CHECK: [0xf9,0x98,0xfe,0x7f,0x01,0x06,0x06,0x00]
16199
16200 v_log_legacy_f32_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16201 // CHECK: [0xf9,0x98,0x0a,0x7e,0xff,0x06,0x06,0x00]
16202
16203 v_log_legacy_f32_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16204 // CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x86,0x00]
16205
16206 v_log_legacy_f32_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16207 // CHECK: [0xf9,0x98,0x0a,0x7e,0x65,0x06,0x86,0x00]
16208
16209 v_log_legacy_f32_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16210 // CHECK: [0xf9,0x98,0x0a,0x7e,0x66,0x06,0x86,0x00]
16211
16212 v_log_legacy_f32_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16213 // CHECK: [0xf9,0x98,0x0a,0x7e,0x67,0x06,0x86,0x00]
16214
16215 v_log_legacy_f32_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16216 // CHECK: [0xf9,0x98,0x0a,0x7e,0x6a,0x06,0x86,0x00]
16217
16218 v_log_legacy_f32_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16219 // CHECK: [0xf9,0x98,0x0a,0x7e,0x6b,0x06,0x86,0x00]
16220
16221 v_log_legacy_f32_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16222 // CHECK: [0xf9,0x98,0x0a,0x7e,0x7b,0x06,0x86,0x00]
16223
16224 v_log_legacy_f32_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16225 // CHECK: [0xf9,0x98,0x0a,0x7e,0x7c,0x06,0x86,0x00]
16226
16227 v_log_legacy_f32_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16228 // CHECK: [0xf9,0x98,0x0a,0x7e,0x7e,0x06,0x86,0x00]
16229
16230 v_log_legacy_f32_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16231 // CHECK: [0xf9,0x98,0x0a,0x7e,0x7f,0x06,0x86,0x00]
16232
16233 v_log_legacy_f32_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16234 // CHECK: [0xf9,0x98,0x0a,0x7e,0x80,0x06,0x86,0x00]
16235
16236 v_log_legacy_f32_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16237 // CHECK: [0xf9,0x98,0x0a,0x7e,0xc1,0x06,0x86,0x00]
16238
16239 v_log_legacy_f32_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16240 // CHECK: [0xf9,0x98,0x0a,0x7e,0xf0,0x06,0x86,0x00]
16241
16242 v_log_legacy_f32_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16243 // CHECK: [0xf9,0x98,0x0a,0x7e,0xf7,0x06,0x86,0x00]
16244
16245 v_log_legacy_f32_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16246 // CHECK: [0xf9,0x98,0x0a,0x7e,0xfb,0x06,0x86,0x00]
16247
16248 v_log_legacy_f32_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16249 // CHECK: [0xf9,0x98,0x0a,0x7e,0xfc,0x06,0x86,0x00]
16250
16251 v_log_legacy_f32_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16252 // CHECK: [0xf9,0x98,0x0a,0x7e,0xfd,0x06,0x86,0x00]
16253
16254 v_log_legacy_f32_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16255 // CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x26,0x06,0x00]
16256
16257 v_log_legacy_f32_sdwa v5, v1 mul:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16258 // CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x46,0x06,0x00]
16259
16260 v_log_legacy_f32_sdwa v5, v1 mul:4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16261 // CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x86,0x06,0x00]
16262
16263 v_log_legacy_f32_sdwa v5, v1 div:2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16264 // CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0xc6,0x06,0x00]
16265
16266 v_log_legacy_f32_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
16267 // CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x06,0x00]
16268
16269 v_log_legacy_f32_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
16270 // CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x00,0x06,0x00]
16271
16272 v_log_legacy_f32_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
16273 // CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x01,0x06,0x00]
16274
16275 v_log_legacy_f32_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
16276 // CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x02,0x06,0x00]
16277
16278 v_log_legacy_f32_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
16279 // CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x03,0x06,0x00]
16280
16281 v_log_legacy_f32_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
16282 // CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x04,0x06,0x00]
16283
16284 v_log_legacy_f32_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
16285 // CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x05,0x06,0x00]
16286
16287 v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
16288 // CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x0e,0x06,0x00]
16289
16290 v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
16291 // CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x16,0x06,0x00]
16292
16293 v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
16294 // CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x16,0x06,0x00]
16295
16296 v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
16297 // CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x06,0x00]
16298
16299 v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
16300 // CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x00,0x00]
16301
16302 v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
16303 // CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x01,0x00]
16304
16305 v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
16306 // CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x02,0x00]
16307
16308 v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
16309 // CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x03,0x00]
16310
16311 v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
16312 // CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x04,0x00]
16313
16314 v_log_legacy_f32_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
16315 // CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x05,0x00]
16316
16317 v_log_legacy_f32_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16318 // CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x16,0x00]
16319
16320 v_log_legacy_f32_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16321 // CHECK: [0xf9,0x98,0x0a,0x7e,0x01,0x06,0x26,0x00]
16322
16323 v_log_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
16324 // CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0xe4,0x00,0x00]
16325
16326 v_log_legacy_f32_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
16327 // CHECK: [0xfa,0x98,0xfe,0x7f,0x01,0xe4,0x00,0x00]
16328
16329 v_log_legacy_f32_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
16330 // CHECK: [0xfa,0x98,0x0a,0x7e,0xff,0xe4,0x00,0x00]
16331
16332 v_log_legacy_f32_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
16333 // CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x1b,0x00,0x00]
16334
16335 v_log_legacy_f32_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
16336 // CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x40,0x01,0x00]
16337
16338 v_log_legacy_f32_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
16339 // CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x41,0x01,0x00]
16340
16341 v_log_legacy_f32_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
16342 // CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x42,0x01,0x00]
16343
16344 v_log_legacy_f32_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
16345 // CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x43,0x01,0x00]
16346
16347 v_log_legacy_f32_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
16348 // CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x30,0x01,0x00]
16349
16350 v_log_legacy_f32_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
16351 // CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x34,0x01,0x00]
16352
16353 v_log_legacy_f32_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
16354 // CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x38,0x01,0x00]
16355
16356 v_log_legacy_f32_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
16357 // CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x3c,0x01,0x00]
16358
16359 v_log_legacy_f32_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
16360 // CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x01,0x01,0x00]
16361
16362 v_log_legacy_f32_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
16363 // CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x0f,0x01,0x00]
16364
16365 v_log_legacy_f32_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
16366 // CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x11,0x01,0x00]
16367
16368 v_log_legacy_f32_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
16369 // CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x1f,0x01,0x00]
16370
16371 v_log_legacy_f32_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
16372 // CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x21,0x01,0x00]
16373
16374 v_log_legacy_f32_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
16375 // CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0x2f,0x01,0x00]
16376
16377 v_log_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
16378 // CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0xe4,0x00,0x10]
16379
16380 v_log_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
16381 // CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0xe4,0x00,0x30]
16382
16383 v_log_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
16384 // CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
16385
16386 v_log_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
16387 // CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
16388
16389 v_log_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
16390 // CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0xe4,0x00,0x01]
16391
16392 v_log_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
16393 // CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0xe4,0x00,0x03]
16394
16395 v_log_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
16396 // CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
16397
16398 v_log_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
16399 // CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
16400
16401 v_log_legacy_f32_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
16402 // CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0xe4,0x08,0x00]
16403
16404 v_log_legacy_f32_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
16405 // CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0xe4,0x10,0x00]
16406
16407 v_log_legacy_f32_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
16408 // CHECK: [0xfa,0x98,0x0a,0x7e,0x01,0xe4,0x20,0x00]
16409
16410 v_cvt_norm_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16411 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x01,0x06,0x06,0x00]
16412
16413 v_cvt_norm_i16_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16414 // CHECK: [0xf9,0x9a,0xfe,0x7f,0x01,0x06,0x06,0x00]
16415
16416 v_cvt_norm_i16_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16417 // CHECK: [0xf9,0x9a,0x0a,0x7e,0xff,0x06,0x06,0x00]
16418
16419 v_cvt_norm_i16_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16420 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x01,0x06,0x86,0x00]
16421
16422 v_cvt_norm_i16_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16423 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x65,0x06,0x86,0x00]
16424
16425 v_cvt_norm_i16_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16426 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x66,0x06,0x86,0x00]
16427
16428 v_cvt_norm_i16_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16429 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x67,0x06,0x86,0x00]
16430
16431 v_cvt_norm_i16_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16432 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x6a,0x06,0x86,0x00]
16433
16434 v_cvt_norm_i16_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16435 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x6b,0x06,0x86,0x00]
16436
16437 v_cvt_norm_i16_f16_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16438 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x7b,0x06,0x86,0x00]
16439
16440 v_cvt_norm_i16_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16441 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x7c,0x06,0x86,0x00]
16442
16443 v_cvt_norm_i16_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16444 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x7e,0x06,0x86,0x00]
16445
16446 v_cvt_norm_i16_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16447 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x7f,0x06,0x86,0x00]
16448
16449 v_cvt_norm_i16_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16450 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x80,0x06,0x86,0x00]
16451
16452 v_cvt_norm_i16_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16453 // CHECK: [0xf9,0x9a,0x0a,0x7e,0xc1,0x06,0x86,0x00]
16454
16455 v_cvt_norm_i16_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16456 // CHECK: [0xf9,0x9a,0x0a,0x7e,0xf0,0x06,0x86,0x00]
16457
16458 v_cvt_norm_i16_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16459 // CHECK: [0xf9,0x9a,0x0a,0x7e,0xf7,0x06,0x86,0x00]
16460
16461 v_cvt_norm_i16_f16_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16462 // CHECK: [0xf9,0x9a,0x0a,0x7e,0xfb,0x06,0x86,0x00]
16463
16464 v_cvt_norm_i16_f16_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16465 // CHECK: [0xf9,0x9a,0x0a,0x7e,0xfc,0x06,0x86,0x00]
16466
16467 v_cvt_norm_i16_f16_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16468 // CHECK: [0xf9,0x9a,0x0a,0x7e,0xfd,0x06,0x86,0x00]
16469
16470 v_cvt_norm_i16_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16471 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x01,0x26,0x06,0x00]
16472
16473 v_cvt_norm_i16_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
16474 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x01,0x06,0x06,0x00]
16475
16476 v_cvt_norm_i16_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
16477 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x01,0x00,0x06,0x00]
16478
16479 v_cvt_norm_i16_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
16480 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x01,0x01,0x06,0x00]
16481
16482 v_cvt_norm_i16_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
16483 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x01,0x02,0x06,0x00]
16484
16485 v_cvt_norm_i16_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
16486 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x01,0x03,0x06,0x00]
16487
16488 v_cvt_norm_i16_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
16489 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x01,0x04,0x06,0x00]
16490
16491 v_cvt_norm_i16_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
16492 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x01,0x05,0x06,0x00]
16493
16494 v_cvt_norm_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
16495 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x01,0x0e,0x06,0x00]
16496
16497 v_cvt_norm_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
16498 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x01,0x16,0x06,0x00]
16499
16500 v_cvt_norm_i16_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
16501 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x01,0x16,0x06,0x00]
16502
16503 v_cvt_norm_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
16504 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x01,0x06,0x06,0x00]
16505
16506 v_cvt_norm_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
16507 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x01,0x06,0x00,0x00]
16508
16509 v_cvt_norm_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
16510 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x01,0x06,0x01,0x00]
16511
16512 v_cvt_norm_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
16513 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x01,0x06,0x02,0x00]
16514
16515 v_cvt_norm_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
16516 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x01,0x06,0x03,0x00]
16517
16518 v_cvt_norm_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
16519 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x01,0x06,0x04,0x00]
16520
16521 v_cvt_norm_i16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
16522 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x01,0x06,0x05,0x00]
16523
16524 v_cvt_norm_i16_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16525 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x01,0x06,0x16,0x00]
16526
16527 v_cvt_norm_i16_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16528 // CHECK: [0xf9,0x9a,0x0a,0x7e,0x01,0x06,0x26,0x00]
16529
16530 v_cvt_norm_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
16531 // CHECK: [0xfa,0x9a,0x0a,0x7e,0x01,0xe4,0x00,0x00]
16532
16533 v_cvt_norm_i16_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
16534 // CHECK: [0xfa,0x9a,0xfe,0x7f,0x01,0xe4,0x00,0x00]
16535
16536 v_cvt_norm_i16_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
16537 // CHECK: [0xfa,0x9a,0x0a,0x7e,0xff,0xe4,0x00,0x00]
16538
16539 v_cvt_norm_i16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
16540 // CHECK: [0xfa,0x9a,0x0a,0x7e,0x01,0x1b,0x00,0x00]
16541
16542 v_cvt_norm_i16_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
16543 // CHECK: [0xfa,0x9a,0x0a,0x7e,0x01,0x40,0x01,0x00]
16544
16545 v_cvt_norm_i16_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
16546 // CHECK: [0xfa,0x9a,0x0a,0x7e,0x01,0x41,0x01,0x00]
16547
16548 v_cvt_norm_i16_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
16549 // CHECK: [0xfa,0x9a,0x0a,0x7e,0x01,0x42,0x01,0x00]
16550
16551 v_cvt_norm_i16_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
16552 // CHECK: [0xfa,0x9a,0x0a,0x7e,0x01,0x43,0x01,0x00]
16553
16554 v_cvt_norm_i16_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
16555 // CHECK: [0xfa,0x9a,0x0a,0x7e,0x01,0x30,0x01,0x00]
16556
16557 v_cvt_norm_i16_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
16558 // CHECK: [0xfa,0x9a,0x0a,0x7e,0x01,0x34,0x01,0x00]
16559
16560 v_cvt_norm_i16_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
16561 // CHECK: [0xfa,0x9a,0x0a,0x7e,0x01,0x38,0x01,0x00]
16562
16563 v_cvt_norm_i16_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
16564 // CHECK: [0xfa,0x9a,0x0a,0x7e,0x01,0x3c,0x01,0x00]
16565
16566 v_cvt_norm_i16_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
16567 // CHECK: [0xfa,0x9a,0x0a,0x7e,0x01,0x01,0x01,0x00]
16568
16569 v_cvt_norm_i16_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
16570 // CHECK: [0xfa,0x9a,0x0a,0x7e,0x01,0x0f,0x01,0x00]
16571
16572 v_cvt_norm_i16_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
16573 // CHECK: [0xfa,0x9a,0x0a,0x7e,0x01,0x11,0x01,0x00]
16574
16575 v_cvt_norm_i16_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
16576 // CHECK: [0xfa,0x9a,0x0a,0x7e,0x01,0x1f,0x01,0x00]
16577
16578 v_cvt_norm_i16_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
16579 // CHECK: [0xfa,0x9a,0x0a,0x7e,0x01,0x21,0x01,0x00]
16580
16581 v_cvt_norm_i16_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
16582 // CHECK: [0xfa,0x9a,0x0a,0x7e,0x01,0x2f,0x01,0x00]
16583
16584 v_cvt_norm_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
16585 // CHECK: [0xfa,0x9a,0x0a,0x7e,0x01,0xe4,0x00,0x10]
16586
16587 v_cvt_norm_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
16588 // CHECK: [0xfa,0x9a,0x0a,0x7e,0x01,0xe4,0x00,0x30]
16589
16590 v_cvt_norm_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
16591 // CHECK: [0xfa,0x9a,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
16592
16593 v_cvt_norm_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
16594 // CHECK: [0xfa,0x9a,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
16595
16596 v_cvt_norm_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
16597 // CHECK: [0xfa,0x9a,0x0a,0x7e,0x01,0xe4,0x00,0x01]
16598
16599 v_cvt_norm_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
16600 // CHECK: [0xfa,0x9a,0x0a,0x7e,0x01,0xe4,0x00,0x03]
16601
16602 v_cvt_norm_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
16603 // CHECK: [0xfa,0x9a,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
16604
16605 v_cvt_norm_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
16606 // CHECK: [0xfa,0x9a,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
16607
16608 v_cvt_norm_i16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
16609 // CHECK: [0xfa,0x9a,0x0a,0x7e,0x01,0xe4,0x08,0x00]
16610
16611 v_cvt_norm_i16_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
16612 // CHECK: [0xfa,0x9a,0x0a,0x7e,0x01,0xe4,0x10,0x00]
16613
16614 v_cvt_norm_i16_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
16615 // CHECK: [0xfa,0x9a,0x0a,0x7e,0x01,0xe4,0x20,0x00]
16616
16617 v_cvt_norm_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16618 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x01,0x06,0x06,0x00]
16619
16620 v_cvt_norm_u16_f16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16621 // CHECK: [0xf9,0x9c,0xfe,0x7f,0x01,0x06,0x06,0x00]
16622
16623 v_cvt_norm_u16_f16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16624 // CHECK: [0xf9,0x9c,0x0a,0x7e,0xff,0x06,0x06,0x00]
16625
16626 v_cvt_norm_u16_f16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16627 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x01,0x06,0x86,0x00]
16628
16629 v_cvt_norm_u16_f16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16630 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x65,0x06,0x86,0x00]
16631
16632 v_cvt_norm_u16_f16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16633 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x66,0x06,0x86,0x00]
16634
16635 v_cvt_norm_u16_f16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16636 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x67,0x06,0x86,0x00]
16637
16638 v_cvt_norm_u16_f16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16639 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x6a,0x06,0x86,0x00]
16640
16641 v_cvt_norm_u16_f16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16642 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x6b,0x06,0x86,0x00]
16643
16644 v_cvt_norm_u16_f16_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16645 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x7b,0x06,0x86,0x00]
16646
16647 v_cvt_norm_u16_f16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16648 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x7c,0x06,0x86,0x00]
16649
16650 v_cvt_norm_u16_f16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16651 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x7e,0x06,0x86,0x00]
16652
16653 v_cvt_norm_u16_f16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16654 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x7f,0x06,0x86,0x00]
16655
16656 v_cvt_norm_u16_f16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16657 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x80,0x06,0x86,0x00]
16658
16659 v_cvt_norm_u16_f16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16660 // CHECK: [0xf9,0x9c,0x0a,0x7e,0xc1,0x06,0x86,0x00]
16661
16662 v_cvt_norm_u16_f16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16663 // CHECK: [0xf9,0x9c,0x0a,0x7e,0xf0,0x06,0x86,0x00]
16664
16665 v_cvt_norm_u16_f16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16666 // CHECK: [0xf9,0x9c,0x0a,0x7e,0xf7,0x06,0x86,0x00]
16667
16668 v_cvt_norm_u16_f16_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16669 // CHECK: [0xf9,0x9c,0x0a,0x7e,0xfb,0x06,0x86,0x00]
16670
16671 v_cvt_norm_u16_f16_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16672 // CHECK: [0xf9,0x9c,0x0a,0x7e,0xfc,0x06,0x86,0x00]
16673
16674 v_cvt_norm_u16_f16_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16675 // CHECK: [0xf9,0x9c,0x0a,0x7e,0xfd,0x06,0x86,0x00]
16676
16677 v_cvt_norm_u16_f16_sdwa v5, v1 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16678 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x01,0x26,0x06,0x00]
16679
16680 v_cvt_norm_u16_f16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
16681 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x01,0x06,0x06,0x00]
16682
16683 v_cvt_norm_u16_f16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
16684 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x01,0x00,0x06,0x00]
16685
16686 v_cvt_norm_u16_f16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
16687 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x01,0x01,0x06,0x00]
16688
16689 v_cvt_norm_u16_f16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
16690 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x01,0x02,0x06,0x00]
16691
16692 v_cvt_norm_u16_f16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
16693 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x01,0x03,0x06,0x00]
16694
16695 v_cvt_norm_u16_f16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
16696 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x01,0x04,0x06,0x00]
16697
16698 v_cvt_norm_u16_f16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
16699 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x01,0x05,0x06,0x00]
16700
16701 v_cvt_norm_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
16702 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x01,0x0e,0x06,0x00]
16703
16704 v_cvt_norm_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
16705 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x01,0x16,0x06,0x00]
16706
16707 v_cvt_norm_u16_f16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
16708 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x01,0x16,0x06,0x00]
16709
16710 v_cvt_norm_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
16711 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x01,0x06,0x06,0x00]
16712
16713 v_cvt_norm_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
16714 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x01,0x06,0x00,0x00]
16715
16716 v_cvt_norm_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
16717 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x01,0x06,0x01,0x00]
16718
16719 v_cvt_norm_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
16720 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x01,0x06,0x02,0x00]
16721
16722 v_cvt_norm_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
16723 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x01,0x06,0x03,0x00]
16724
16725 v_cvt_norm_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
16726 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x01,0x06,0x04,0x00]
16727
16728 v_cvt_norm_u16_f16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
16729 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x01,0x06,0x05,0x00]
16730
16731 v_cvt_norm_u16_f16_sdwa v5, -v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16732 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x01,0x06,0x16,0x00]
16733
16734 v_cvt_norm_u16_f16_sdwa v5, |v1| dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16735 // CHECK: [0xf9,0x9c,0x0a,0x7e,0x01,0x06,0x26,0x00]
16736
16737 v_cvt_norm_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
16738 // CHECK: [0xfa,0x9c,0x0a,0x7e,0x01,0xe4,0x00,0x00]
16739
16740 v_cvt_norm_u16_f16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
16741 // CHECK: [0xfa,0x9c,0xfe,0x7f,0x01,0xe4,0x00,0x00]
16742
16743 v_cvt_norm_u16_f16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
16744 // CHECK: [0xfa,0x9c,0x0a,0x7e,0xff,0xe4,0x00,0x00]
16745
16746 v_cvt_norm_u16_f16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
16747 // CHECK: [0xfa,0x9c,0x0a,0x7e,0x01,0x1b,0x00,0x00]
16748
16749 v_cvt_norm_u16_f16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
16750 // CHECK: [0xfa,0x9c,0x0a,0x7e,0x01,0x40,0x01,0x00]
16751
16752 v_cvt_norm_u16_f16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
16753 // CHECK: [0xfa,0x9c,0x0a,0x7e,0x01,0x41,0x01,0x00]
16754
16755 v_cvt_norm_u16_f16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
16756 // CHECK: [0xfa,0x9c,0x0a,0x7e,0x01,0x42,0x01,0x00]
16757
16758 v_cvt_norm_u16_f16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
16759 // CHECK: [0xfa,0x9c,0x0a,0x7e,0x01,0x43,0x01,0x00]
16760
16761 v_cvt_norm_u16_f16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
16762 // CHECK: [0xfa,0x9c,0x0a,0x7e,0x01,0x30,0x01,0x00]
16763
16764 v_cvt_norm_u16_f16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
16765 // CHECK: [0xfa,0x9c,0x0a,0x7e,0x01,0x34,0x01,0x00]
16766
16767 v_cvt_norm_u16_f16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
16768 // CHECK: [0xfa,0x9c,0x0a,0x7e,0x01,0x38,0x01,0x00]
16769
16770 v_cvt_norm_u16_f16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
16771 // CHECK: [0xfa,0x9c,0x0a,0x7e,0x01,0x3c,0x01,0x00]
16772
16773 v_cvt_norm_u16_f16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
16774 // CHECK: [0xfa,0x9c,0x0a,0x7e,0x01,0x01,0x01,0x00]
16775
16776 v_cvt_norm_u16_f16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
16777 // CHECK: [0xfa,0x9c,0x0a,0x7e,0x01,0x0f,0x01,0x00]
16778
16779 v_cvt_norm_u16_f16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
16780 // CHECK: [0xfa,0x9c,0x0a,0x7e,0x01,0x11,0x01,0x00]
16781
16782 v_cvt_norm_u16_f16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
16783 // CHECK: [0xfa,0x9c,0x0a,0x7e,0x01,0x1f,0x01,0x00]
16784
16785 v_cvt_norm_u16_f16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
16786 // CHECK: [0xfa,0x9c,0x0a,0x7e,0x01,0x21,0x01,0x00]
16787
16788 v_cvt_norm_u16_f16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
16789 // CHECK: [0xfa,0x9c,0x0a,0x7e,0x01,0x2f,0x01,0x00]
16790
16791 v_cvt_norm_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
16792 // CHECK: [0xfa,0x9c,0x0a,0x7e,0x01,0xe4,0x00,0x10]
16793
16794 v_cvt_norm_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
16795 // CHECK: [0xfa,0x9c,0x0a,0x7e,0x01,0xe4,0x00,0x30]
16796
16797 v_cvt_norm_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
16798 // CHECK: [0xfa,0x9c,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
16799
16800 v_cvt_norm_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
16801 // CHECK: [0xfa,0x9c,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
16802
16803 v_cvt_norm_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
16804 // CHECK: [0xfa,0x9c,0x0a,0x7e,0x01,0xe4,0x00,0x01]
16805
16806 v_cvt_norm_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
16807 // CHECK: [0xfa,0x9c,0x0a,0x7e,0x01,0xe4,0x00,0x03]
16808
16809 v_cvt_norm_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
16810 // CHECK: [0xfa,0x9c,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
16811
16812 v_cvt_norm_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
16813 // CHECK: [0xfa,0x9c,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
16814
16815 v_cvt_norm_u16_f16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
16816 // CHECK: [0xfa,0x9c,0x0a,0x7e,0x01,0xe4,0x08,0x00]
16817
16818 v_cvt_norm_u16_f16_dpp v5, -v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
16819 // CHECK: [0xfa,0x9c,0x0a,0x7e,0x01,0xe4,0x10,0x00]
16820
16821 v_cvt_norm_u16_f16_dpp v5, |v1| quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
16822 // CHECK: [0xfa,0x9c,0x0a,0x7e,0x01,0xe4,0x20,0x00]
16823
16824 v_sat_pk_u8_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16825 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x01,0x06,0x06,0x00]
16826
16827 v_sat_pk_u8_i16_sdwa v255, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16828 // CHECK: [0xf9,0x9e,0xfe,0x7f,0x01,0x06,0x06,0x00]
16829
16830 v_sat_pk_u8_i16_sdwa v5, v255 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16831 // CHECK: [0xf9,0x9e,0x0a,0x7e,0xff,0x06,0x06,0x00]
16832
16833 v_sat_pk_u8_i16_sdwa v5, s1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16834 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x01,0x06,0x86,0x00]
16835
16836 v_sat_pk_u8_i16_sdwa v5, s101 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16837 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x65,0x06,0x86,0x00]
16838
16839 v_sat_pk_u8_i16_sdwa v5, flat_scratch_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16840 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x66,0x06,0x86,0x00]
16841
16842 v_sat_pk_u8_i16_sdwa v5, flat_scratch_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16843 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x67,0x06,0x86,0x00]
16844
16845 v_sat_pk_u8_i16_sdwa v5, vcc_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16846 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x6a,0x06,0x86,0x00]
16847
16848 v_sat_pk_u8_i16_sdwa v5, vcc_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16849 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x6b,0x06,0x86,0x00]
16850
16851 v_sat_pk_u8_i16_sdwa v5, ttmp15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16852 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x7b,0x06,0x86,0x00]
16853
16854 v_sat_pk_u8_i16_sdwa v5, m0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16855 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x7c,0x06,0x86,0x00]
16856
16857 v_sat_pk_u8_i16_sdwa v5, exec_lo dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16858 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x7e,0x06,0x86,0x00]
16859
16860 v_sat_pk_u8_i16_sdwa v5, exec_hi dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16861 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x7f,0x06,0x86,0x00]
16862
16863 v_sat_pk_u8_i16_sdwa v5, 0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16864 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x80,0x06,0x86,0x00]
16865
16866 v_sat_pk_u8_i16_sdwa v5, -1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16867 // CHECK: [0xf9,0x9e,0x0a,0x7e,0xc1,0x06,0x86,0x00]
16868
16869 v_sat_pk_u8_i16_sdwa v5, 0.5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16870 // CHECK: [0xf9,0x9e,0x0a,0x7e,0xf0,0x06,0x86,0x00]
16871
16872 v_sat_pk_u8_i16_sdwa v5, -4.0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16873 // CHECK: [0xf9,0x9e,0x0a,0x7e,0xf7,0x06,0x86,0x00]
16874
16875 v_sat_pk_u8_i16_sdwa v5, src_vccz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16876 // CHECK: [0xf9,0x9e,0x0a,0x7e,0xfb,0x06,0x86,0x00]
16877
16878 v_sat_pk_u8_i16_sdwa v5, src_execz dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16879 // CHECK: [0xf9,0x9e,0x0a,0x7e,0xfc,0x06,0x86,0x00]
16880
16881 v_sat_pk_u8_i16_sdwa v5, src_scc dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16882 // CHECK: [0xf9,0x9e,0x0a,0x7e,0xfd,0x06,0x86,0x00]
16883
16884 v_sat_pk_u8_i16_sdwa v5, v1 dst_unused:UNUSED_PAD src0_sel:DWORD
16885 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x01,0x06,0x06,0x00]
16886
16887 v_sat_pk_u8_i16_sdwa v5, v1 dst_sel:BYTE_0 dst_unused:UNUSED_PAD src0_sel:DWORD
16888 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x01,0x00,0x06,0x00]
16889
16890 v_sat_pk_u8_i16_sdwa v5, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD
16891 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x01,0x01,0x06,0x00]
16892
16893 v_sat_pk_u8_i16_sdwa v5, v1 dst_sel:BYTE_2 dst_unused:UNUSED_PAD src0_sel:DWORD
16894 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x01,0x02,0x06,0x00]
16895
16896 v_sat_pk_u8_i16_sdwa v5, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:DWORD
16897 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x01,0x03,0x06,0x00]
16898
16899 v_sat_pk_u8_i16_sdwa v5, v1 dst_sel:WORD_0 dst_unused:UNUSED_PAD src0_sel:DWORD
16900 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x01,0x04,0x06,0x00]
16901
16902 v_sat_pk_u8_i16_sdwa v5, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
16903 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x01,0x05,0x06,0x00]
16904
16905 v_sat_pk_u8_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_SEXT src0_sel:DWORD
16906 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x01,0x0e,0x06,0x00]
16907
16908 v_sat_pk_u8_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PRESERVE src0_sel:DWORD
16909 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x01,0x16,0x06,0x00]
16910
16911 v_sat_pk_u8_i16_sdwa v5, v1 dst_sel:DWORD src0_sel:DWORD
16912 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x01,0x16,0x06,0x00]
16913
16914 v_sat_pk_u8_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD
16915 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x01,0x06,0x06,0x00]
16916
16917 v_sat_pk_u8_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
16918 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x01,0x06,0x00,0x00]
16919
16920 v_sat_pk_u8_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
16921 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x01,0x06,0x01,0x00]
16922
16923 v_sat_pk_u8_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
16924 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x01,0x06,0x02,0x00]
16925
16926 v_sat_pk_u8_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3
16927 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x01,0x06,0x03,0x00]
16928
16929 v_sat_pk_u8_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0
16930 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x01,0x06,0x04,0x00]
16931
16932 v_sat_pk_u8_i16_sdwa v5, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
16933 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x01,0x06,0x05,0x00]
16934
16935 v_sat_pk_u8_i16_sdwa v5, sext(v1) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD
16936 // CHECK: [0xf9,0x9e,0x0a,0x7e,0x01,0x06,0x0e,0x00]
16937
16938 v_sat_pk_u8_i16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
16939 // CHECK: [0xfa,0x9e,0x0a,0x7e,0x01,0xe4,0x00,0x00]
16940
16941 v_sat_pk_u8_i16_dpp v255, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
16942 // CHECK: [0xfa,0x9e,0xfe,0x7f,0x01,0xe4,0x00,0x00]
16943
16944 v_sat_pk_u8_i16_dpp v5, v255 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0
16945 // CHECK: [0xfa,0x9e,0x0a,0x7e,0xff,0xe4,0x00,0x00]
16946
16947 v_sat_pk_u8_i16_dpp v5, v1 quad_perm:[3,2,1,0] row_mask:0x0 bank_mask:0x0
16948 // CHECK: [0xfa,0x9e,0x0a,0x7e,0x01,0x1b,0x00,0x00]
16949
16950 v_sat_pk_u8_i16_dpp v5, v1 row_mirror row_mask:0x0 bank_mask:0x0
16951 // CHECK: [0xfa,0x9e,0x0a,0x7e,0x01,0x40,0x01,0x00]
16952
16953 v_sat_pk_u8_i16_dpp v5, v1 row_half_mirror row_mask:0x0 bank_mask:0x0
16954 // CHECK: [0xfa,0x9e,0x0a,0x7e,0x01,0x41,0x01,0x00]
16955
16956 v_sat_pk_u8_i16_dpp v5, v1 row_bcast:15 row_mask:0x0 bank_mask:0x0
16957 // CHECK: [0xfa,0x9e,0x0a,0x7e,0x01,0x42,0x01,0x00]
16958
16959 v_sat_pk_u8_i16_dpp v5, v1 row_bcast:31 row_mask:0x0 bank_mask:0x0
16960 // CHECK: [0xfa,0x9e,0x0a,0x7e,0x01,0x43,0x01,0x00]
16961
16962 v_sat_pk_u8_i16_dpp v5, v1 wave_shl:1 row_mask:0x0 bank_mask:0x0
16963 // CHECK: [0xfa,0x9e,0x0a,0x7e,0x01,0x30,0x01,0x00]
16964
16965 v_sat_pk_u8_i16_dpp v5, v1 wave_rol:1 row_mask:0x0 bank_mask:0x0
16966 // CHECK: [0xfa,0x9e,0x0a,0x7e,0x01,0x34,0x01,0x00]
16967
16968 v_sat_pk_u8_i16_dpp v5, v1 wave_shr:1 row_mask:0x0 bank_mask:0x0
16969 // CHECK: [0xfa,0x9e,0x0a,0x7e,0x01,0x38,0x01,0x00]
16970
16971 v_sat_pk_u8_i16_dpp v5, v1 wave_ror:1 row_mask:0x0 bank_mask:0x0
16972 // CHECK: [0xfa,0x9e,0x0a,0x7e,0x01,0x3c,0x01,0x00]
16973
16974 v_sat_pk_u8_i16_dpp v5, v1 row_shl:1 row_mask:0x0 bank_mask:0x0
16975 // CHECK: [0xfa,0x9e,0x0a,0x7e,0x01,0x01,0x01,0x00]
16976
16977 v_sat_pk_u8_i16_dpp v5, v1 row_shl:15 row_mask:0x0 bank_mask:0x0
16978 // CHECK: [0xfa,0x9e,0x0a,0x7e,0x01,0x0f,0x01,0x00]
16979
16980 v_sat_pk_u8_i16_dpp v5, v1 row_shr:1 row_mask:0x0 bank_mask:0x0
16981 // CHECK: [0xfa,0x9e,0x0a,0x7e,0x01,0x11,0x01,0x00]
16982
16983 v_sat_pk_u8_i16_dpp v5, v1 row_shr:15 row_mask:0x0 bank_mask:0x0
16984 // CHECK: [0xfa,0x9e,0x0a,0x7e,0x01,0x1f,0x01,0x00]
16985
16986 v_sat_pk_u8_i16_dpp v5, v1 row_ror:1 row_mask:0x0 bank_mask:0x0
16987 // CHECK: [0xfa,0x9e,0x0a,0x7e,0x01,0x21,0x01,0x00]
16988
16989 v_sat_pk_u8_i16_dpp v5, v1 row_ror:15 row_mask:0x0 bank_mask:0x0
16990 // CHECK: [0xfa,0x9e,0x0a,0x7e,0x01,0x2f,0x01,0x00]
16991
16992 v_sat_pk_u8_i16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x1 bank_mask:0x0
16993 // CHECK: [0xfa,0x9e,0x0a,0x7e,0x01,0xe4,0x00,0x10]
16994
16995 v_sat_pk_u8_i16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x3 bank_mask:0x0
16996 // CHECK: [0xfa,0x9e,0x0a,0x7e,0x01,0xe4,0x00,0x30]
16997
16998 v_sat_pk_u8_i16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0xf bank_mask:0x0
16999 // CHECK: [0xfa,0x9e,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
17000
17001 v_sat_pk_u8_i16_dpp v5, v1 quad_perm:[0,1,2,3] bank_mask:0x0
17002 // CHECK: [0xfa,0x9e,0x0a,0x7e,0x01,0xe4,0x00,0xf0]
17003
17004 v_sat_pk_u8_i16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x1
17005 // CHECK: [0xfa,0x9e,0x0a,0x7e,0x01,0xe4,0x00,0x01]
17006
17007 v_sat_pk_u8_i16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x3
17008 // CHECK: [0xfa,0x9e,0x0a,0x7e,0x01,0xe4,0x00,0x03]
17009
17010 v_sat_pk_u8_i16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0xf
17011 // CHECK: [0xfa,0x9e,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
17012
17013 v_sat_pk_u8_i16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0
17014 // CHECK: [0xfa,0x9e,0x0a,0x7e,0x01,0xe4,0x00,0x0f]
17015
17016 v_sat_pk_u8_i16_dpp v5, v1 quad_perm:[0,1,2,3] row_mask:0x0 bank_mask:0x0 bound_ctrl:0
17017 // CHECK: [0xfa,0x9e,0x0a,0x7e,0x01,0xe4,0x08,0x00]