llvm/test/MC/ARM/cde-fp-vec.s

   1 // RUN: not llvm-mc -triple=thumbv8m.main -mattr=+fp-armv8 -mattr=+cdecp0 -mattr=+cdecp1 -show-encoding < %s 2>%t | FileCheck %s
   2 // RUN: FileCheck <%t --check-prefixes=ERROR,ERROR-FP %s
   3 // RUN: not llvm-mc -triple=thumbv8m.main -mattr=+fp-armv8d16sp -mattr=+cdecp0 -mattr=+cdecp1 -show-encoding < %s 2>%t | FileCheck %s
   4 // RUN: FileCheck <%t --check-prefixes=ERROR,ERROR-FP %s
   5 // RUN: not llvm-mc -triple=thumbv8.1m.main -mattr=+mve -mattr=+cdecp0 -mattr=+cdecp1 -show-encoding < %s 2>%t | FileCheck --check-prefixes=CHECK,CHECK-MVE %s
   6 // RUN: FileCheck <%t --check-prefixes=ERROR,ERROR-MVE %s
   7
   8 // CHECK-LABEL: test_predication:
   9 test_predication:
  10 ittt eq
  11 // ERROR: [[@LINE+1]]:{{[0-9]+}}: error: instructions in IT block must be predicable
  12 vcx1a   p1, s7, #2047
  13 // ERROR: [[@LINE+1]]:{{[0-9]+}}: error: instructions in IT block must be predicable
  14 vcx2    p0, d0, d15, #0
  15 // ERROR-FP: [[@LINE+2]]:{{[0-9]+}}: error: invalid instruction
  16 // ERROR-MVE: [[@LINE+1]]:{{[0-9]+}}: error: instructions in IT block must be predicable
  17 vcx3    p0, q0, q7, q0, #12
  18 nop
  19 nop
  20 nop
  21
  22 // CHECK-LABEL: test_vcx1:
  23 test_vcx1:
  24 // CHECK-NEXT: vcx1 p0, s11, #1234 @ encoding: [0x69,0xec,0x92,0x50]
  25 vcx1    p0, s11, #1234
  26 // CHECK-NEXT: vcx1a p1, s7, #2047 @ encoding: [0x6f,0xfc,0xbf,0x31]
  27 vcx1a   p1, s7, #2047
  28 // CHECK-NEXT: vcx1 p0, d0, #0 @ encoding: [0x20,0xed,0x00,0x00]
  29 vcx1    p0, d0, #0
  30 // CHECK-NEXT: vcx1a p1, d3, #2047 @ encoding: [0x2f,0xfd,0xbf,0x31]
  31 vcx1a   p1, d3, #2047
  32 // CHECK-MVE-NEXT: vcx1 p0, q1, #1234 @ encoding: [0x29,0xec,0xd2,0x20]
  33 // ERROR-FP: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction, any one of the following would fix this:
  34 vcx1    p0, q1, #1234
  35 // CHECK-MVE-NEXT: vcx1a p1, q5, #4095 @ encoding: [0x2f,0xfd,0xff,0xa1]
  36 // ERROR-FP: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction
  37 vcx1a   p1, q5, #4095
  38
  39 // ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction
  40 vcx1a   p1, s7, s7, #2047
  41 // ERROR: [[@LINE+1]]:{{[0-9]+}}: error: operand must be an immediate in the range [0,2047]
  42 vcx1    p0, d0, #2048
  43 // ERROR-FP: [[@LINE+1]]:{{[0-9]+}}: error: operand must be an immediate in the range [0,2047]
  44 vcx1a   p1, s0, #2048
  45 // ERROR-FP: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction
  46 vcx1    p0, q0, #4096
  47 // ERROR-FP: [[@LINE+2]]:{{[0-9]+}}: error: coprocessor must be in the range [p0, p7]
  48 // ERROR-MVE: [[@LINE+1]]:{{[0-9]+}}: error: invalid operand for instruction
  49 vcx1    p8, d0, #1234
  50 // ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction
  51 vcx1    p0, d16, #1234
  52 // ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction
  53 vcx1    p0, s32, #1234
  54 // ERROR-FP: [[@LINE+4]]:{{[0-9]+}}: error: invalid instruction, any one of the following would fix this:
  55 // ERROR-FP: [[@LINE+3]]:{{[0-9]+}}: note: operand must be a register in range [s0, s31]
  56 // ERROR-FP: [[@LINE+2]]:{{[0-9]+}}: note: operand must be a register in range [d0, d15]
  57 // ERROR-MVE: [[@LINE+1]]:{{[0-9]+}}: error: operand must be a register in range [q0, q7]
  58 vcx1    p0, q8, #1234
  59 // ERROR: [[@LINE+3]]:{{[0-9]+}}: error: invalid instruction, any one of the following would fix this:
  60 // ERROR: [[@LINE+2]]:{{[0-9]+}}: note: operand must be a register in range [s0, s31]
  61 // ERROR: [[@LINE+1]]:{{[0-9]+}}: note: operand must be a register in range [d0, d15]
  62 vcx1    p0, r0, #1234
  63 // ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction
  64 vcx1    p0, d0, d0, #0
  65 // ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction
  66 vcx1a   p0, d0, d2, #0
  67
  68 // CHECK-LABEL: test_vcx2:
  69 test_vcx2:
  70 // CHECK-NEXT: vcx2 p0, s0, s31, #12 @ encoding: [0x33,0xec,0x2f,0x00]
  71 vcx2    p0, s0, s31,  #12
  72 // CHECK-NEXT: vcx2a p0, s1, s1, #63 @ encoding: [0x7f,0xfc,0xb0,0x00]
  73 vcx2a   p0, s1, s1, #63
  74 // CHECK-NEXT: vcx2 p0, d0, d15, #0 @ encoding: [0x30,0xed,0x0f,0x00]
  75 vcx2    p0, d0, d15, #0
  76 // CHECK-NEXT: vcx2a p0, d1, d11, #63 @ encoding: [0x3f,0xfd,0x9b,0x10]
  77 vcx2a   p0, d1, d11, #63
  78 // CHECK-MVE: vcx2 p1, q0, q6, #123 @ encoding: [0x3e,0xed,0xdc,0x01]
  79 vcx2    p1, q0, q6, #123
  80 // CHECK-MVE: vcx2a p1, q3, q7, #127 @ encoding: [0x3f,0xfd,0xde,0x61]
  81 vcx2a   p1, q3, q7, #127
  82
  83 // ERROR: [[@LINE+1]]:{{[0-9]+}}: error: operand must be an immediate in the range [0,63]
  84 vcx2    p0, d0, d1, #64
  85 // ERROR: [[@LINE+1]]:{{[0-9]+}}: error: operand must be an immediate in the range [0,63]
  86 vcx2a   p0, s3, s1, #64
  87 // ERROR-MVE: [[@LINE+2]]:{{[0-9]+}}: error: operand must be an immediate in the range [0,127]
  88 // ERROR-FP: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction
  89 vcx2a   p0, q1, q5, #128
  90 // ERROR-FP: [[@LINE+1]]:{{[0-9]+}}: error: operand must be a register in range [d0, d15]
  91 vcx2    p1, d0, q2, #0
  92 // ERROR-FP: [[@LINE+1]]:{{[0-9]+}}: error: operand must be a register in range [s0, s31]
  93 vcx2a   p1, q2, s3, #0
  94 // ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction
  95 vcx2    p1, d0, d0, d2, #0
  96 // ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction
  97 vcx2a   p1, q2, q3, q1, #0
  98
  99 // CHECK-LABEL: test_vcx3:
 100 test_vcx3:
 101 // CHECK-NEXT: vcx3 p0, s0, s31, s0, #1 @ encoding: [0x8f,0xec,0x90,0x00]
 102 vcx3    p0, s0, s31, s0, #1
 103 // CHECK-NEXT: vcx3a p1, s1, s17, s11, #7 @ encoding: [0xf8,0xfc,0xb5,0x01]
 104 vcx3a   p1, s1, s17, s11, #7
 105 // CHECK-NEXT: vcx3 p0, d0, d15, d7, #0 @ encoding: [0x8f,0xed,0x07,0x00]
 106 vcx3    p0, d0, d15, d7, #0
 107 // CHECK-NEXT: vcx3a p1, d1, d11, d11, #7 @ encoding: [0xbb,0xfd,0x1b,0x11]
 108 vcx3a   p1, d1, d11, d11, #7
 109 // CHECK-MVE-NEXT: vcx3 p0, q0, q2, q0, #12 @ encoding: [0xa4,0xed,0x40,0x00]
 110 vcx3    p0, q0, q2, q0, #12
 111 // CHECK-MVE-NEXT: vcx3a p1, q3, q7, q6, #15 @ encoding: [0xbe,0xfd,0x5c,0x61]
 112 vcx3a   p1, q3, q7, q6, #15
 113
 114 // ERROR: [[@LINE+1]]:{{[0-9]+}}: error: operand must be an immediate in the range [0,7]
 115 vcx3a   p1, d1, d11, d12, #8
 116 // ERROR-MVE: [[@LINE+2]]:{{[0-9]+}}: error: operand must be an immediate in the range [0,15]
 117 // ERROR-FP: error: invalid instruction
 118 vcx3a   p1, q1, q2, q3, #16
 119 // ERROR-MVE: [[@LINE+2]]:{{[0-9]+}}: error: invalid instruction
 120 // ERROR-FP: [[@LINE+1]]:{{[0-9]+}}: error: operand must be a register in range [d0, d15]
 121 vcx3    p0, d0, q0, d7, #1
 122 // ERROR: [[@LINE+1]]:{{[0-9]+}}: error: operand must be a register in range [s0, s31]
 123 vcx3a   p1, s0, s1, d3, #2
 124 // ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction
 125 vcx3a   p0, s0, d0, q0, #2
 126 // ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction
 127 vcx3    p0, s0, s0, s31, s0, #1
 128 // ERROR: [[@LINE+1]]:{{[0-9]+}}: error: invalid instruction
 129 vcx3a   p1, d1, d3, d22, d22, #7