llvm/test/MC/ARM/invalid-addsub.s

   1 @ RUN: not llvm-mc -triple thumbv7-apple-ios %s -o /dev/null 2>&1 | FileCheck %s
   2 add sp, r5, #1
   3 addw sp, r7, #4
   4 add sp, r3, r2
   5 add sp, r3, r5, lsl #3
   6 sub sp, r5, #1
   7 subw sp, r7, #4
   8 sub sp, r3, r2
   9 sub sp, r3, r5, lsl #3
  10 @CHECK: error: invalid instruction, any one of the following would fix this:
  11 @CHECK-NEXT: add sp, r5, #1
  12 @CHECK-NEXT: ^
  13 @CHECK-NEXT: note: invalid operand for instruction
  14 @CHECK-NEXT: add sp, r5, #1
  15 @CHECK-NEXT:             ^
  16 @CHECK-NEXT: note: operand must be a register in range [r0, r12] or r14
  17 @CHECK-NEXT: add sp, r5, #1
  18 @CHECK-NEXT:             ^
  19 @CHECK-NEXT: note: operand must be a register in range [r0, r12] or r14
  20 @CHECK-NEXT: add sp, r5, #1
  21 @CHECK-NEXT:     ^
  22 @CHECK-NEXT: note: operand must be a register sp
  23 @CHECK-NEXT: add sp, r5, #1
  24 @CHECK-NEXT:         ^
  25 @CHECK-NEXT: error: invalid instruction, any one of the following would fix this:
  26 @CHECK-NEXT: addw sp, r7, #4
  27 @CHECK-NEXT: ^
  28 @CHECK-NEXT: note: operand must be a register in range [r0, r12] or r14
  29 @CHECK-NEXT: addw sp, r7, #4
  30 @CHECK-NEXT:      ^
  31 @CHECK-NEXT: note: operand must be a register sp
  32 @CHECK-NEXT: addw sp, r7, #4
  33 @CHECK-NEXT:          ^
  34 @CHECK-NEXT: error: source register must be sp if destination is sp
  35 @CHECK-NEXT: add sp, r3, r2
  36 @CHECK-NEXT:         ^
  37 @CHECK-NEXT: error: source register must be sp if destination is sp
  38 @CHECK-NEXT: add sp, r3, r5, lsl #3
  39 @CHECK-NEXT:         ^
  40 @CHECK-NEXT: error: invalid instruction, any one of the following would fix this:
  41 @CHECK-NEXT: sub sp, r5, #1
  42 @CHECK-NEXT: ^
  43 @CHECK-NEXT: note: invalid operand for instruction
  44 @CHECK-NEXT: sub sp, r5, #1
  45 @CHECK-NEXT:             ^
  46 @CHECK-NEXT: note: operand must be a register in range [r0, r12] or r14
  47 @CHECK-NEXT: sub sp, r5, #1
  48 @CHECK-NEXT:             ^
  49 @CHECK-NEXT: note: operand must be a register in range [r0, r12] or r14
  50 @CHECK-NEXT: sub sp, r5, #1
  51 @CHECK-NEXT:     ^
  52 @CHECK-NEXT: note: operand must be a register sp
  53 @CHECK-NEXT: sub sp, r5, #1
  54 @CHECK-NEXT:         ^
  55 @CHECK-NEXT: error: invalid instruction, any one of the following would fix this:
  56 @CHECK-NEXT: subw sp, r7, #4
  57 @CHECK-NEXT: ^
  58 @CHECK-NEXT: note: operand must be a register in range [r0, r12] or r14
  59 @CHECK-NEXT: subw sp, r7, #4
  60 @CHECK-NEXT:      ^
  61 @CHECK-NEXT: note: operand must be a register sp
  62 @CHECK-NEXT: subw sp, r7, #4
  63 @CHECK-NEXT:          ^
  64 @CHECK-NEXT: error: source register must be sp if destination is sp
  65 @CHECK-NEXT: sub sp, r3, r2
  66 @CHECK-NEXT:         ^
  67 @CHECK-NEXT: error: source register must be sp if destination is sp
  68 @CHECK-NEXT: sub sp, r3, r5, lsl #3