llvm/test/MC/ARM/thumb2-ldr.w-str.w.s

   1 @ RUN: not llvm-mc -triple=thumbv7-unknown-linux-gnueabi -arm-implicit-it=thumb -show-encoding < %s 2>&1 | FileCheck %s
   2 .syntax unified
   3
   4 @ Note: The error stream for XFAIL needs to get checked first.
   5
   6 ldr.w r1, [r1, #-4]!
   7 ldr.w r1, [r0, #256]!
   8 ldr.w r1, [r0, #-256]!
   9 ldr.w r1, [pc, #-4]!
  10 ldr.w r1, [r1], #4
  11 ldr.w r0, [r0], #4
  12 ldr.w r0, [r1], #256
  13 ldr.w r0, [r1], #-256
  14 str.w r0, [r0, #-4]!
  15 str.w pc, [r0, #-4]!
  16 str.w r1, [pc, #-4]!
  17 str.w r1, [r2, #256]!
  18 str.w r1, [r2, #-256]!
  19 str.w r0, [r0], #4
  20 str.w pc, [r0], #4
  21 str.w r1, [r0], #256
  22 str.w r1, [r0], #-256
  23
  24 @@ XFAIL
  25
  26 @ CHECK: error: destination register and base register can't be identical
  27 @ CHECK-NEXT: ldr.w r1, [r1, #-4]!
  28 @ CHECK: error: invalid instruction, any one of the following would fix this:
  29 @ CHECK-NEXT: ldr.w r1, [r0, #256]!
  30 @ CHECK: note: invalid operand for instruction
  31 @ CHECK: note: too many operands for instruction
  32 @ CHECK: error: invalid operand for instruction
  33 @ CHECK-NEXT: ldr.w r1, [r0, #-256]!
  34 @ CHECK: error: invalid instruction, any one of the following would fix this:
  35 @ CHECK-NEXT: ldr.w r1, [pc, #-4]!
  36 @ CHECK: note: invalid operand for instruction
  37 @ CHECK: note: too many operands for instruction
  38 @ CHECK: error: destination register and base register can't be identical
  39 @ CHECK-NEXT: ldr.w r1, [r1], #4
  40 @ CHECK: error: destination register and base register can't be identical
  41 @ CHECK-NEXT: ldr.w r0, [r0], #4
  42 @ CHECK: error: operand must be in range [-255, 255]
  43 @ CHECK-NEXT: ldr.w r0, [r1], #256
  44 @ CHECK: error: operand must be in range [-255, 255]
  45 @ CHECK-NEXT: ldr.w r0, [r1], #-256
  46 @ CHECK: error: destination register and base register can't be identical
  47 @ CHECK-NEXT: str.w r0, [r0, #-4]!
  48 @ CHECK: error: operand must be a register in range [r0, r14]
  49 @ CHECK-NEXT: str.w pc, [r0, #-4]!
  50 @ CHECK: error: invalid operand for instruction
  51 @ CHECK-NEXT: str.w r1, [pc, #-4]!
  52 @ CHECK: error: invalid instruction, any one of the following would fix this:
  53 @ CHECK-NEXT: str.w r1, [r2, #256]!
  54 @ CHECK: note: invalid operand for instruction
  55 @ CHECK: note: too many operands for instruction
  56 @ CHECK: error: invalid operand for instruction
  57 @ CHECK-NEXT: str.w r1, [r2, #-256]!
  58 @ CHECK: error: destination register and base register can't be identical
  59 @ CHECK-NEXT: str.w r0, [r0], #4
  60 @ CHECK: error: operand must be a register in range [r0, r14]
  61 @ CHECK-NEXT: str.w pc, [r0], #4
  62 @ CHECK: error: operand must be in range [-255, 255]
  63 @ CHECK-NEXT: str.w r1, [r0], #256
  64 @ CHECK: error: operand must be in range [-255, 255]
  65 @ CHECK-NEXT: str.w r1, [r0], #-256
  66
  67 @@ XPASS
  68
  69 @ Simple checks that we get the same encoding w/ and w/o the .w suffix.
  70 ldr r3, [r1], #4
  71 ldr.w r3, [r1], #4
  72
  73 str r3, [r0], #4
  74 str.w r3, [r0], #4
  75
  76 ldr r3, [r1, #-4]!
  77 ldr.w r3, [r1, #-4]!
  78
  79 str r3, [r0, #-4]!
  80 str.w r3, [r0, #-4]!
  81
  82 @ CHECK: ldr r3, [r1], #4   @ encoding: [0x51,0xf8,0x04,0x3b]
  83 @ CHECK: ldr r3, [r1], #4   @ encoding: [0x51,0xf8,0x04,0x3b]
  84 @ CHECK: str r3, [r0], #4   @ encoding: [0x40,0xf8,0x04,0x3b]
  85 @ CHECK: str r3, [r0], #4   @ encoding: [0x40,0xf8,0x04,0x3b]
  86 @ CHECK: ldr r3, [r1, #-4]! @ encoding: [0x51,0xf8,0x04,0x3d]
  87 @ CHECK: ldr r3, [r1, #-4]! @ encoding: [0x51,0xf8,0x04,0x3d]
  88 @ CHECK: str r3, [r0, #-4]! @ encoding: [0x40,0xf8,0x04,0x3d]
  89 @ CHECK: str r3, [r0, #-4]! @ encoding: [0x40,0xf8,0x04,0x3d]
  90
  91 @@ LDR pre-increment w/ writeback
  92 @ Vary Rt.
  93 ldr.w r0, [r1, #-4]!
  94 ldr.w sp, [r1, #-4]! @ TODO: GAS warns for this
  95 ldr.w pc, [r1, #-4]!
  96 @ Vary Rn.
  97 ldr.w r1, [r0, #-4]!
  98 ldr.w r1, [sp, #-4]!
  99 @ Vary imm.
 100 ldr.w r1, [r0, #255]!
 101 ldr.w r1, [r0, #-255]!
 102 ldr.w r1, [r0, #0]!
 103 @ Condition codes.
 104 ldreq.w r1, [r0, #255]!
 105 ldrle.w r1, [r0, #255]!
 106
 107 @ CHECK: ldr r0, [r1, #-4]!    @ encoding: [0x51,0xf8,0x04,0x0d]
 108 @ CHECK: ldr sp, [r1, #-4]!    @ encoding: [0x51,0xf8,0x04,0xdd]
 109 @ CHECK: ldr pc, [r1, #-4]!    @ encoding: [0x51,0xf8,0x04,0xfd]
 110 @ CHECK: ldr r1, [r0, #-4]!    @ encoding: [0x50,0xf8,0x04,0x1d]
 111 @ CHECK: ldr r1, [sp, #-4]!    @ encoding: [0x5d,0xf8,0x04,0x1d]
 112 @ CHECK: ldr r1, [r0, #255]!   @ encoding: [0x50,0xf8,0xff,0x1f]
 113 @ CHECK: ldr r1, [r0, #-255]!  @ encoding: [0x50,0xf8,0xff,0x1d]
 114 @ CHECK: ldr r1, [r0, #0]!     @ encoding: [0x50,0xf8,0x00,0x1f]
 115 @ CHECK: it    eq              @ encoding: [0x08,0xbf]
 116 @ CHECK: ldreq r1, [r0, #255]! @ encoding: [0x50,0xf8,0xff,0x1f]
 117 @ CHECK: it    le              @ encoding: [0xd8,0xbf]
 118 @ CHECK: ldrle r1, [r0, #255]! @ encoding: [0x50,0xf8,0xff,0x1f]
 119
 120 @@ LDR post-increment
 121 @ Vary Rt.
 122 ldr.w r0, [r1], #4
 123 ldr.w sp, [r1], #4 @ TODO: GAS warns for this
 124 ldr.w pc, [r1], #4
 125 @ Vary Rn.
 126 ldr.w r0, [r1], #4
 127 ldr.w r0, [sp], #4
 128 ldr.w r0, [pc], #4 @ TODO: GAS warns for this
 129 @ Vary imm.
 130 ldr.w r0, [r1], #255
 131 ldr.w r0, [r1], #0
 132 ldr.w r0, [r1], #-255
 133 @ Condition codes.
 134 ldreq.w r0, [r1], #255
 135 ldrle.w r0, [r1], #255
 136
 137 @ CHECK: ldr r0, [r1], #4     @ encoding: [0x51,0xf8,0x04,0x0b]
 138 @ CHECK: ldr sp, [r1], #4     @ encoding: [0x51,0xf8,0x04,0xdb]
 139 @ CHECK: ldr pc, [r1], #4     @ encoding: [0x51,0xf8,0x04,0xfb]
 140 @ CHECK: ldr r0, [r1], #4     @ encoding: [0x51,0xf8,0x04,0x0b]
 141 @ CHECK: ldr r0, [sp], #4     @ encoding: [0x5d,0xf8,0x04,0x0b]
 142 @ CHECK: ldr r0, [pc], #4     @ encoding: [0x5f,0xf8,0x04,0x0b]
 143 @ CHECK: ldr r0, [r1], #255   @ encoding: [0x51,0xf8,0xff,0x0b]
 144 @ CHECK: ldr r0, [r1], #0     @ encoding: [0x51,0xf8,0x00,0x0b]
 145 @ CHECK: ldr r0, [r1], #-255  @ encoding: [0x51,0xf8,0xff,0x09]
 146 @ CHECK: it    eq             @ encoding: [0x08,0xbf]
 147 @ CHECK: ldreq r0, [r1], #255 @ encoding: [0x51,0xf8,0xff,0x0b]
 148 @ CHECK: it    le             @ encoding: [0xd8,0xbf]
 149 @ CHECK: ldrle r0, [r1], #255 @ encoding: [0x51,0xf8,0xff,0x0b]
 150
 151 @@ STR pre-increment w/ writeback
 152 @ Vary Rt.
 153 str.w r1, [r0, #-4]!
 154 str.w sp, [r0, #-4]!
 155 @ Vary Rn.
 156 str.w r1, [r2, #-4]!
 157 str.w r1, [sp, #-4]!
 158 @ Vary imm.
 159 str.w r1, [r2, #255]!
 160 str.w r1, [r2, #0]!
 161 str.w r1, [r2, #-255]!
 162 @ Condition codes.
 163 streq.w r1, [r2, #255]!
 164 strle.w r1, [r2, #255]!
 165
 166 @ CHECK: str r1, [r0, #-4]!     @ encoding: [0x40,0xf8,0x04,0x1d]
 167 @ CHECK: str sp, [r0, #-4]!     @ encoding: [0x40,0xf8,0x04,0xdd]
 168 @ CHECK: str r1, [r2, #-4]!     @ encoding: [0x42,0xf8,0x04,0x1d]
 169 @ CHECK: str r1, [sp, #-4]!     @ encoding: [0x4d,0xf8,0x04,0x1d]
 170 @ CHECK: str   r1, [r2, #255]!  @ encoding: [0x42,0xf8,0xff,0x1f]
 171 @ CHECK: str   r1, [r2, #0]!    @ encoding: [0x42,0xf8,0x00,0x1f]
 172 @ CHECK: str   r1, [r2, #-255]! @ encoding: [0x42,0xf8,0xff,0x1d]
 173 @ CHECK: it    eq               @ encoding: [0x08,0xbf]
 174 @ CHECK: streq r1, [r2, #255]!  @ encoding: [0x42,0xf8,0xff,0x1f]
 175 @ CHECK: it    le               @ encoding: [0xd8,0xbf]
 176 @ CHECK: strle r1, [r2, #255]!  @ encoding: [0x42,0xf8,0xff,0x1f]
 177
 178 @@ STR post-increment
 179 @ Vary Rt.
 180 str.w r1, [r0], #4
 181 str.w sp, [r0], #4
 182 @ Vary Rn.
 183 str.w r0, [r1], #4
 184 str.w r0, [sp], #4
 185 str.w r0, [pc], #4 @ TODO: GAS warns for this.
 186 @ Vary imm.
 187 str.w r1, [r0], #255
 188 str.w r1, [r0], #0
 189 str.w r1, [r0], #-255
 190 @ Condition codes.
 191 streq.w r1, [r0], #255
 192 strle.w r1, [r0], #255
 193
 194 @ CHECK: str   r1, [r0], #4    @ encoding: [0x40,0xf8,0x04,0x1b]
 195 @ CHECK: str   sp, [r0], #4    @ encoding: [0x40,0xf8,0x04,0xdb]
 196 @ CHECK: str   r0, [r1], #4    @ encoding: [0x41,0xf8,0x04,0x0b]
 197 @ CHECK: str   r0, [sp], #4    @ encoding: [0x4d,0xf8,0x04,0x0b]
 198 @ CHECK: str   r0, [pc], #4    @ encoding: [0x4f,0xf8,0x04,0x0b]
 199 @ CHECK: str   r1, [r0], #255  @ encoding: [0x40,0xf8,0xff,0x1b]
 200 @ CHECK: str   r1, [r0], #0    @ encoding: [0x40,0xf8,0x00,0x1b]
 201 @ CHECK: str   r1, [r0], #-255 @ encoding: [0x40,0xf8,0xff,0x19]
 202 @ CHECK: it    eq              @ encoding: [0x08,0xbf]
 203 @ CHECK: streq r1, [r0], #255  @ encoding: [0x40,0xf8,0xff,0x1b]
 204 @ CHECK: it    le              @ encoding: [0xd8,0xbf]
 205 @ CHECK: strle r1, [r0], #255  @ encoding: [0x40,0xf8,0xff,0x1b]