llvm/test/MC/Mips/mips1/invalid-mips32.s

   1 # Instructions that are invalid
   2 #
   3 # RUN: not llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips1 \
   4 # RUN:     2>%t1
   5 # RUN: FileCheck %s < %t1
   6
   7         .set noat
   8
   9         sync 0                    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
  10         sync 1                    # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled
  11         mtc0  $4, $5, 1           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: selector must be zero for pre-MIPS32 ISAs
  12         mfc0  $4, $5, 1           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: selector must be zero for pre-MIPS32 ISAs
  13         mtc2  $4, $5, 1           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: selector must be zero for pre-MIPS32 ISAs
  14         mfc2  $4, $5, 1           # CHECK: :[[@LINE]]:{{[0-9]+}}: error: selector must be zero for pre-MIPS32 ISAs
  15