llvm/test/MC/RISCV/fixups-expr.s

   1 # RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=+relax %s \
   2 # RUN:     | llvm-readobj -r - | FileCheck -check-prefix RELAX %s
   3 # RUN: llvm-mc -filetype=obj -triple=riscv32 -mattr=-relax %s \
   4 # RUN:     | llvm-readobj -r - | FileCheck -check-prefix RELAX %s
   5
   6 # RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+relax %s \
   7 # RUN:     | llvm-readobj -r - | FileCheck -check-prefix RELAX %s
   8 # RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=-relax %s \
   9 # RUN:     | llvm-readobj -r - | FileCheck -check-prefix RELAX %s
  10
  11 # Check that subtraction expressions are emitted as two relocations always.
  12
  13 .globl G1
  14 .globl G2
  15 .L1:
  16 G1:
  17 addi a0, a0, 0
  18 .L2:
  19 G2:
  20
  21 .data
  22 .dword .L2-.L1
  23 .dword G2-G1
  24 .word .L2-.L1
  25 .word G2-G1
  26 .half .L2-.L1
  27 .half G2-G1
  28 .byte .L2-.L1
  29 .byte G2-G1
  30 # RELAX: 0x0 R_RISCV_ADD64 .L2 0x0
  31 # RELAX: 0x0 R_RISCV_SUB64 .L1 0x0
  32 # RELAX: 0x8 R_RISCV_ADD64 G2 0x0
  33 # RELAX: 0x8 R_RISCV_SUB64 G1 0x0
  34 # RELAX: 0x10 R_RISCV_ADD32 .L2 0x0
  35 # RELAX: 0x10 R_RISCV_SUB32 .L1 0x0
  36 # RELAX: 0x14 R_RISCV_ADD32 G2 0x0
  37 # RELAX: 0x14 R_RISCV_SUB32 G1 0x0
  38 # RELAX: 0x18 R_RISCV_ADD16 .L2 0x0
  39 # RELAX: 0x18 R_RISCV_SUB16 .L1 0x0
  40 # RELAX: 0x1A R_RISCV_ADD16 G2 0x0
  41 # RELAX: 0x1A R_RISCV_SUB16 G1 0x0
  42 # RELAX: 0x1C R_RISCV_ADD8 .L2 0x0
  43 # RELAX: 0x1C R_RISCV_SUB8 .L1 0x0
  44 # RELAX: 0x1D R_RISCV_ADD8 G2 0x0
  45 # RELAX: 0x1D R_RISCV_SUB8 G1 0x0