llvm/test/MC/RISCV/rv32zbproposedc-invalid.s

   1 # RUN: not llvm-mc -triple riscv32 -mattr=+c,+experimental-zbproposedc,+experimental-Zba < %s 2>&1 | FileCheck %s
   2
   3 # Too many operands
   4 c.not s0, s1 # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
   5 c.neg s0, s1 # CHECK: :[[@LINE]]:11: error: invalid operand for instruction
   6 c.zext.w s0 # CHECK: :[[@LINE]]:1: error: instruction requires the following: RV64I Base Instruction Set