llvm/test/MC/RISCV/rv64a-valid.s

   1 # RUN: llvm-mc %s -triple=riscv64 -mattr=+a -riscv-no-aliases -show-encoding \
   2 # RUN:     | FileCheck -check-prefixes=CHECK-ASM,CHECK-ASM-AND-OBJ %s
   3 # RUN: llvm-mc -filetype=obj -triple=riscv64 -mattr=+a < %s \
   4 # RUN:     | llvm-objdump --mattr=+a -M no-aliases -d -r - \
   5 # RUN:     | FileCheck --check-prefix=CHECK-ASM-AND-OBJ %s
   6 #
   7 # RUN: not llvm-mc -triple riscv32 -mattr=+a < %s 2>&1 \
   8 # RUN:     | FileCheck -check-prefix=CHECK-RV32 %s
   9
  10 # CHECK-ASM-AND-OBJ: lr.d t0, (t1)
  11 # CHECK-ASM: encoding: [0xaf,0x32,0x03,0x10]
  12 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
  13 lr.d t0, (t1)
  14 # CHECK-ASM-AND-OBJ: lr.d.aq t1, (t2)
  15 # CHECK-ASM: encoding: [0x2f,0xb3,0x03,0x14]
  16 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
  17 lr.d.aq t1, (t2)
  18 # CHECK-ASM-AND-OBJ: lr.d.rl t2, (t3)
  19 # CHECK-ASM: encoding: [0xaf,0x33,0x0e,0x12]
  20 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
  21 lr.d.rl t2, (t3)
  22 # CHECK-ASM-AND-OBJ: lr.d.aqrl t3, (t4)
  23 # CHECK-ASM: encoding: [0x2f,0xbe,0x0e,0x16]
  24 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
  25 lr.d.aqrl t3, (t4)
  26
  27 # CHECK-ASM-AND-OBJ: sc.d t6, t5, (t4)
  28 # CHECK-ASM: encoding: [0xaf,0xbf,0xee,0x19]
  29 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
  30 sc.d t6, t5, (t4)
  31 # CHECK-ASM-AND-OBJ: sc.d.aq t5, t4, (t3)
  32 # CHECK-ASM: encoding: [0x2f,0x3f,0xde,0x1d]
  33 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
  34 sc.d.aq t5, t4, (t3)
  35 # CHECK-ASM-AND-OBJ: sc.d.rl t4, t3, (t2)
  36 # CHECK-ASM: encoding: [0xaf,0xbe,0xc3,0x1b]
  37 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
  38 sc.d.rl t4, t3, (t2)
  39 # CHECK-ASM-AND-OBJ: sc.d.aqrl t3, t2, (t1)
  40 # CHECK-ASM: encoding: [0x2f,0x3e,0x73,0x1e]
  41 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
  42 sc.d.aqrl t3, t2, (t1)
  43
  44 # CHECK-ASM-AND-OBJ: amoswap.d a4, ra, (s0)
  45 # CHECK-ASM: encoding: [0x2f,0x37,0x14,0x08]
  46 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
  47 amoswap.d a4, ra, (s0)
  48 # CHECK-ASM-AND-OBJ: amoadd.d a1, a2, (a3)
  49 # CHECK-ASM: encoding: [0xaf,0xb5,0xc6,0x00]
  50 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
  51 amoadd.d a1, a2, (a3)
  52 # CHECK-ASM-AND-OBJ: amoxor.d a2, a3, (a4)
  53 # CHECK-ASM: encoding: [0x2f,0x36,0xd7,0x20]
  54 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
  55 amoxor.d a2, a3, (a4)
  56 # CHECK-ASM-AND-OBJ: amoand.d a3, a4, (a5)
  57 # CHECK-ASM: encoding: [0xaf,0xb6,0xe7,0x60]
  58 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
  59 amoand.d a3, a4, (a5)
  60 # CHECK-ASM-AND-OBJ: amoor.d a4, a5, (a6)
  61 # CHECK-ASM: encoding: [0x2f,0x37,0xf8,0x40]
  62 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
  63 amoor.d a4, a5, (a6)
  64 # CHECK-ASM-AND-OBJ: amomin.d a5, a6, (a7)
  65 # CHECK-ASM: encoding: [0xaf,0xb7,0x08,0x81]
  66 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
  67 amomin.d a5, a6, (a7)
  68 # CHECK-ASM-AND-OBJ: amomax.d s7, s6, (s5)
  69 # CHECK-ASM: encoding: [0xaf,0xbb,0x6a,0xa1]
  70 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
  71 amomax.d s7, s6, (s5)
  72 # CHECK-ASM-AND-OBJ: amominu.d s6, s5, (s4)
  73 # CHECK-ASM: encoding: [0x2f,0x3b,0x5a,0xc1]
  74 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
  75 amominu.d s6, s5, (s4)
  76 # CHECK-ASM-AND-OBJ: amomaxu.d s5, s4, (s3)
  77 # CHECK-ASM: encoding: [0xaf,0xba,0x49,0xe1]
  78 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
  79 amomaxu.d s5, s4, (s3)
  80
  81
  82 # CHECK-ASM-AND-OBJ: amoswap.d.aq a4, ra, (s0)
  83 # CHECK-ASM: encoding: [0x2f,0x37,0x14,0x0c]
  84 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
  85 amoswap.d.aq a4, ra, (s0)
  86 # CHECK-ASM-AND-OBJ: amoadd.d.aq a1, a2, (a3)
  87 # CHECK-ASM: encoding: [0xaf,0xb5,0xc6,0x04]
  88 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
  89 amoadd.d.aq a1, a2, (a3)
  90 # CHECK-ASM-AND-OBJ: amoxor.d.aq a2, a3, (a4)
  91 # CHECK-ASM: encoding: [0x2f,0x36,0xd7,0x24]
  92 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
  93 amoxor.d.aq a2, a3, (a4)
  94 # CHECK-ASM-AND-OBJ: amoand.d.aq a3, a4, (a5)
  95 # CHECK-ASM: encoding: [0xaf,0xb6,0xe7,0x64]
  96 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
  97 amoand.d.aq a3, a4, (a5)
  98 # CHECK-ASM-AND-OBJ: amoor.d.aq a4, a5, (a6)
  99 # CHECK-ASM: encoding: [0x2f,0x37,0xf8,0x44]
 100 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
 101 amoor.d.aq a4, a5, (a6)
 102 # CHECK-ASM-AND-OBJ: amomin.d.aq a5, a6, (a7)
 103 # CHECK-ASM: encoding: [0xaf,0xb7,0x08,0x85]
 104 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
 105 amomin.d.aq a5, a6, (a7)
 106 # CHECK-ASM-AND-OBJ: amomax.d.aq s7, s6, (s5)
 107 # CHECK-ASM: encoding: [0xaf,0xbb,0x6a,0xa5]
 108 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
 109 amomax.d.aq s7, s6, (s5)
 110 # CHECK-ASM-AND-OBJ: amominu.d.aq s6, s5, (s4)
 111 # CHECK-ASM: encoding: [0x2f,0x3b,0x5a,0xc5]
 112 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
 113 amominu.d.aq s6, s5, (s4)
 114 # CHECK-ASM-AND-OBJ: amomaxu.d.aq s5, s4, (s3)
 115 # CHECK-ASM: encoding: [0xaf,0xba,0x49,0xe5]
 116 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
 117 amomaxu.d.aq s5, s4, (s3)
 118
 119 # CHECK-ASM-AND-OBJ: amoswap.d.rl a4, ra, (s0)
 120 # CHECK-ASM: encoding: [0x2f,0x37,0x14,0x0a]
 121 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
 122 amoswap.d.rl a4, ra, (s0)
 123 # CHECK-ASM-AND-OBJ: amoadd.d.rl a1, a2, (a3)
 124 # CHECK-ASM: encoding: [0xaf,0xb5,0xc6,0x02]
 125 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
 126 amoadd.d.rl a1, a2, (a3)
 127 # CHECK-ASM-AND-OBJ: amoxor.d.rl a2, a3, (a4)
 128 # CHECK-ASM: encoding: [0x2f,0x36,0xd7,0x22]
 129 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
 130 amoxor.d.rl a2, a3, (a4)
 131 # CHECK-ASM-AND-OBJ: amoand.d.rl a3, a4, (a5)
 132 # CHECK-ASM: encoding: [0xaf,0xb6,0xe7,0x62]
 133 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
 134 amoand.d.rl a3, a4, (a5)
 135 # CHECK-ASM-AND-OBJ: amoor.d.rl a4, a5, (a6)
 136 # CHECK-ASM: encoding: [0x2f,0x37,0xf8,0x42]
 137 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
 138 amoor.d.rl a4, a5, (a6)
 139 # CHECK-ASM-AND-OBJ: amomin.d.rl a5, a6, (a7)
 140 # CHECK-ASM: encoding: [0xaf,0xb7,0x08,0x83]
 141 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
 142 amomin.d.rl a5, a6, (a7)
 143 # CHECK-ASM-AND-OBJ: amomax.d.rl s7, s6, (s5)
 144 # CHECK-ASM: encoding: [0xaf,0xbb,0x6a,0xa3]
 145 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
 146 amomax.d.rl s7, s6, (s5)
 147 # CHECK-ASM-AND-OBJ: amominu.d.rl s6, s5, (s4)
 148 # CHECK-ASM: encoding: [0x2f,0x3b,0x5a,0xc3]
 149 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
 150 amominu.d.rl s6, s5, (s4)
 151 # CHECK-ASM-AND-OBJ: amomaxu.d.rl s5, s4, (s3)
 152 # CHECK-ASM: encoding: [0xaf,0xba,0x49,0xe3]
 153 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
 154 amomaxu.d.rl s5, s4, (s3)
 155
 156 # CHECK-ASM-AND-OBJ: amoswap.d.aqrl a4, ra, (s0)
 157 # CHECK-ASM: encoding: [0x2f,0x37,0x14,0x0e]
 158 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
 159 amoswap.d.aqrl a4, ra, (s0)
 160 # CHECK-ASM-AND-OBJ: amoadd.d.aqrl a1, a2, (a3)
 161 # CHECK-ASM: encoding: [0xaf,0xb5,0xc6,0x06]
 162 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
 163 amoadd.d.aqrl a1, a2, (a3)
 164 # CHECK-ASM-AND-OBJ: amoxor.d.aqrl a2, a3, (a4)
 165 # CHECK-ASM: encoding: [0x2f,0x36,0xd7,0x26]
 166 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
 167 amoxor.d.aqrl a2, a3, (a4)
 168 # CHECK-ASM-AND-OBJ: amoand.d.aqrl a3, a4, (a5)
 169 # CHECK-ASM: encoding: [0xaf,0xb6,0xe7,0x66]
 170 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
 171 amoand.d.aqrl a3, a4, (a5)
 172 # CHECK-ASM-AND-OBJ: amoor.d.aqrl a4, a5, (a6)
 173 # CHECK-ASM: encoding: [0x2f,0x37,0xf8,0x46]
 174 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
 175 amoor.d.aqrl a4, a5, (a6)
 176 # CHECK-ASM-AND-OBJ: amomin.d.aqrl a5, a6, (a7)
 177 # CHECK-ASM: encoding: [0xaf,0xb7,0x08,0x87]
 178 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
 179 amomin.d.aqrl a5, a6, (a7)
 180 # CHECK-ASM-AND-OBJ: amomax.d.aqrl s7, s6, (s5)
 181 # CHECK-ASM: encoding: [0xaf,0xbb,0x6a,0xa7]
 182 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
 183 amomax.d.aqrl s7, s6, (s5)
 184 # CHECK-ASM-AND-OBJ: amominu.d.aqrl s6, s5, (s4)
 185 # CHECK-ASM: encoding: [0x2f,0x3b,0x5a,0xc7]
 186 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
 187 amominu.d.aqrl s6, s5, (s4)
 188 # CHECK-ASM-AND-OBJ: amomaxu.d.aqrl s5, s4, (s3)
 189 # CHECK-ASM: encoding: [0xaf,0xba,0x49,0xe7]
 190 # CHECK-RV32: :[[@LINE+1]]:1: error: instruction requires the following: RV64I Base Instruction Set
 191 amomaxu.d.aqrl s5, s4, (s3)