llvm/test/MC/RISCV/rv64i-aliases-valid.s

   1 # RUN: llvm-mc %s -triple=riscv64 -riscv-no-aliases \
   2 # RUN:     | FileCheck -check-prefixes=CHECK-EXPAND,CHECK-INST %s
   3 # RUN: llvm-mc %s -triple=riscv64 \
   4 # RUN:     | FileCheck -check-prefixes=CHECK-EXPAND,CHECK-ALIAS %s
   5 # RUN: llvm-mc -filetype=obj -triple riscv64 < %s \
   6 # RUN:     | llvm-objdump -M no-aliases -d - \
   7 # RUN:     | FileCheck -check-prefixes=CHECK-OBJ-NOALIAS,CHECK-EXPAND,CHECK-INST %s
   8 # RUN: llvm-mc -filetype=obj -triple riscv64 < %s \
   9 # RUN:     | llvm-objdump -d - \
  10 # RUN:     | FileCheck -check-prefixes=CHECK-EXPAND,CHECK-ALIAS %s
  11
  12 # The following check prefixes are used in this test:
  13 # CHECK-INST.....Match the canonical instr (tests alias to instr. mapping)
  14 # CHECK-ALIAS....Match the alias (tests instr. to alias mapping)
  15 # CHECK-EXPAND...Match canonical instr. unconditionally (tests alias expansion)
  16
  17 # TODO ld
  18 # TODO sd
  19
  20 # Needed for testing valid %pcrel_lo expressions
  21 .Lpcrel_hi0: auipc a0, %pcrel_hi(foo)
  22
  23 # CHECK-INST: addi a0, zero, 0
  24 # CHECK-ALIAS: mv a0, zero
  25 li x10, 0
  26 # CHECK-EXPAND: addi a0, zero, 1
  27 li x10, 1
  28 # CHECK-EXPAND: addi a0, zero, -1
  29 li x10, -1
  30 # CHECK-EXPAND: addi a0, zero, 2047
  31 li x10, 2047
  32 # CHECK-EXPAND: addi a0, zero, -2047
  33 li x10, -2047
  34 # CHECK-EXPAND: lui a1, 1
  35 # CHECK-EXPAND: addiw a1, a1, -2048
  36 li x11, 2048
  37 # CHECK-EXPAND: addi a1, zero, -2048
  38 li x11, -2048
  39 # CHECK-EXPAND: lui a1, 1
  40 # CHECK-EXPAND: addiw a1, a1, -2047
  41 li x11, 2049
  42 # CHECK-EXPAND: lui a1, 1048575
  43 # CHECK-EXPAND: addiw a1, a1, 2047
  44 li x11, -2049
  45 # CHECK-EXPAND: lui a1, 1
  46 # CHECK-EXPAND: addiw a1, a1, -1
  47 li x11, 4095
  48 # CHECK-EXPAND: lui a1, 1048575
  49 # CHECK-EXPAND: addiw a1, a1, 1
  50 li x11, -4095
  51 # CHECK-EXPAND: lui a2, 1
  52 li x12, 4096
  53 # CHECK-EXPAND: lui a2, 1048575
  54 li x12, -4096
  55 # CHECK-EXPAND: lui a2, 1
  56 # CHECK-EXPAND-NEXT: addiw a2, a2, 1
  57 li x12, 4097
  58 # CHECK-EXPAND: lui a2, 1048575
  59 # CHECK-EXPAND: addiw a2, a2, -1
  60 li x12, -4097
  61 # CHECK-EXPAND: lui a2, 524288
  62 # CHECK-EXPAND-NEXT: addiw a2, a2, -1
  63 li x12, 2147483647
  64 # CHECK-EXPAND: lui a2, 524288
  65 # CHECK-EXPAND-NEXT: addiw a2, a2, 1
  66 li x12, -2147483647
  67 # CHECK-EXPAND: lui a2, 524288
  68 li x12, -2147483648
  69 # CHECK-EXPAND: lui a2, 524288
  70 li x12, -0x80000000
  71
  72 # CHECK-EXPAND: addi a2, zero, 1
  73 # CHECK-EXPAND-NEXT: slli a2, a2, 31
  74 li x12, 0x80000000
  75 # CHECK-EXPAND: addi a2, zero, -1
  76 # CHECK-EXPAND-NEXT: srli a2, a2, 32
  77 li x12, 0xFFFFFFFF
  78
  79 # CHECK-EXPAND: addi t0, zero, 1
  80 # CHECK-EXPAND-NEXT: slli t0, t0, 32
  81 li t0, 0x100000000
  82 # CHECK-EXPAND: addi t1, zero, -1
  83 # CHECK-EXPAND-NEXT: slli t1, t1, 63
  84 li t1, 0x8000000000000000
  85 # CHECK-EXPAND: addi t1, zero, -1
  86 # CHECK-EXPAND-NEXT: slli t1, t1, 63
  87 li t1, -0x8000000000000000
  88 # CHECK-EXPAND: lui t2, 9321
  89 # CHECK-EXPAND-NEXT: addiw t2, t2, -1329
  90 # CHECK-EXPAND-NEXT: slli t2, t2, 35
  91 li t2, 0x1234567800000000
  92 # CHECK-EXPAND: addi t3, zero, 7
  93 # CHECK-EXPAND-NEXT: slli t3, t3, 36
  94 # CHECK-EXPAND-NEXT: addi t3, t3, 11
  95 # CHECK-EXPAND-NEXT: slli t3, t3, 24
  96 # CHECK-EXPAND-NEXT: addi t3, t3, 15
  97 li t3, 0x700000000B00000F
  98 # CHECK-EXPAND: lui t4, 583
  99 # CHECK-EXPAND-NEXT: addiw t4, t4, -1875
 100 # CHECK-EXPAND-NEXT: slli t4, t4, 14
 101 # CHECK-EXPAND-NEXT: addi t4, t4, -947
 102 # CHECK-EXPAND-NEXT: slli t4, t4, 12
 103 # CHECK-EXPAND-NEXT: addi t4, t4, 1511
 104 # CHECK-EXPAND-NEXT: slli t4, t4, 13
 105 # CHECK-EXPAND-NEXT: addi t4, t4, -272
 106 li t4, 0x123456789abcdef0
 107 # CHECK-EXPAND: addi t5, zero, -1
 108 li t5, 0xFFFFFFFFFFFFFFFF
 109 # CHECK-EXPAND: lui t6, 262145
 110 # CHECK-EXPAND-NEXT: slli t6, t6, 1
 111 li t6, 0x80002000
 112 # CHECK-EXPAND: lui t0, 262145
 113 # CHECK-EXPAND-NEXT: slli t0, t0, 2
 114 li x5, 0x100004000
 115 # CHECK-EXPAND: lui t1, 4097
 116 # CHECK-EXPAND-NEXT: slli t1, t1, 20
 117 li x6, 0x100100000000
 118 # CHECK-EXPAND: lui t2, 983056
 119 # CHECK-EXPAND-NEXT: srli t2, t2, 16
 120 li x7, 0xFFFFFFFFF001
 121 # CHECK-EXPAND: lui s0, 1044481
 122 # CHECK-EXPAND-NEXT: slli s0, s0, 12
 123 # CHECK-EXPAND-NEXT: srli s0, s0, 24
 124 li x8, 0xFFFFFFF001
 125 # CHECK-EXPAND: lui s1, 4097
 126 # CHECK-EXPAND-NEXT: slli s1, s1, 20
 127 # CHECK-EXPAND-NEXT: addi s1, s1, -3
 128 li x9, 0x1000FFFFFFFD
 129 # CHECK-EXPAND: addi a0, zero, -1
 130 # CHECK-EXPAND-NEXT: slli a0, a0, 36
 131 # CHECK-EXPAND-NEXT: addi a0, a0, 1
 132 # CHECK-EXPAND-NEXT: slli a0, a0, 25
 133 # CHECK-EXPAND-NEXT: addi a0, a0, -1
 134 li x10, 0xE000000001FFFFFF
 135 # CHECK-EXPAND: addi a1, zero, -2047
 136 # CHECK-EXPAND-NEXT: slli a1, a1, 27
 137 # CHECK-EXPAND-NEXT: addi a1, a1, -1
 138 # CHECK-EXPAND-NEXT: slli a1, a1, 12
 139 # CHECK-EXPAND-NEXT: addi a1, a1, 2047
 140 li x11, 0xFFFC007FFFFFF7FF
 141
 142 # CHECK-EXPAND: addi a0, zero, 1110
 143 li a0, %lo(0x123456)
 144
 145 # CHECK-OBJ-NOALIAS: addi a0, zero, 0
 146 # CHECK-OBJ: R_RISCV_LO12
 147 li a0, %lo(foo)
 148 # CHECK-OBJ-NOALIAS: addi a0, zero, 0
 149 # CHECK-OBJ: R_RISCV_PCREL_LO12
 150 li a0, %pcrel_lo(.Lpcrel_hi0)
 151
 152 .equ CONST, 0x123456
 153 # CHECK-EXPAND: lui a0, 291
 154 # CHECK-EXPAND: addiw a0, a0, 1110
 155 li a0, CONST
 156
 157 .equ CONST, 0x654321
 158 # CHECK-EXPAND: lui a0, 1620
 159 # CHECK-EXPAND: addiw a0, a0, 801
 160 li a0, CONST
 161
 162 # CHECK-INST: subw t6, zero, ra
 163 # CHECK-ALIAS: negw t6, ra
 164 negw x31, x1
 165 # CHECK-INST: addiw t6, ra, 0
 166 # CHECK-ALIAS: sext.w t6, ra
 167 sext.w x31, x1
 168
 169 # The following aliases are accepted as input but the canonical form
 170 # of the instruction will always be printed.
 171 # CHECK-INST: addiw a2, a3, 4
 172 # CHECK-ALIAS: addiw a2, a3, 4
 173 addw a2,a3,4
 174
 175 # CHECK-INST: slliw a2, a3, 4
 176 # CHECK-ALIAS: slliw a2, a3, 4
 177 sllw a2,a3,4
 178
 179 # CHECK-INST: srliw a2, a3, 4
 180 # CHECK-ALIAS: srliw a2, a3, 4
 181 srlw a2,a3,4
 182
 183 # CHECK-INST: sraiw a2, a3, 4
 184 # CHECK-ALIAS: sraiw a2, a3, 4
 185 sraw a2,a3,4
 186
 187 # CHECK-EXPAND: lwu a0, 0(a1)
 188 lwu x10, (x11)
 189 # CHECK-EXPAND: ld a0, 0(a1)
 190 ld x10, (x11)
 191 # CHECK-EXPAND: sd a0, 0(a1)
 192 sd x10, (x11)
 193
 194 # CHECK-EXPAND: slli a0, a1, 56
 195 # CHECK-EXPAND: srai a0, a0, 56
 196 sext.b x10, x11
 197
 198 # CHECK-EXPAND: slli a0, a1, 48
 199 # CHECK-EXPAND: srai a0, a0, 48
 200 sext.h x10, x11
 201
 202 # CHECK-INST: andi a0, a1, 255
 203 # CHECK-ALIAS: andi a0, a1, 255
 204 zext.b x10, x11
 205
 206 # CHECK-EXPAND: slli a0, a1, 48
 207 # CHECK-EXPAND: srli a0, a0, 48
 208 zext.h x10, x11
 209
 210 # CHECK-EXPAND: slli a0, a1, 32
 211 # CHECK-EXPAND: srli a0, a0, 32
 212 zext.w x10, x11