1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --scrub-attributes --check-globals
2 ; call site specific analysis is enabled
4 ; RUN: opt -attributor -enable-new-pm=0 -attributor-enable-call-site-specific-deduction=true -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM
6 ; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-enable-call-site-specific-deduction=true -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=1 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM
8 ; RUN: opt -attributor-cgscc -attributor-enable-call-site-specific-deduction=true -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM
10 ; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-enable-call-site-specific-deduction=true -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM
12 define i32 @test_range(i32 %unknown) {
13 ; CHECK-LABEL: define {{[^@]+}}@test_range
14 ; CHECK-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR0:[0-9]+]] {
15 ; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[UNKNOWN]], 100
16 ; CHECK-NEXT: [[TMP2:%.*]] = select i1 [[TMP1]], i32 100, i32 0
17 ; CHECK-NEXT: ret i32 [[TMP2]]
19 %1 = icmp sgt i32 %unknown, 100
20 %2 = select i1 %1, i32 100, i32 0
24 define i32 @test1(i32 %unknown, i32 %b) {
25 ; IS__TUNIT____-LABEL: define {{[^@]+}}@test1
26 ; IS__TUNIT____-SAME: (i32 [[UNKNOWN:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
27 ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i32 @test_range(i32 [[UNKNOWN]]) #[[ATTR0]], !range [[RNG0:![0-9]+]]
28 ; IS__TUNIT____-NEXT: [[TMP2:%.*]] = sub nsw i32 [[TMP1]], [[B]]
29 ; IS__TUNIT____-NEXT: ret i32 [[TMP2]]
31 ; IS__CGSCC____-LABEL: define {{[^@]+}}@test1
32 ; IS__CGSCC____-SAME: (i32 [[UNKNOWN:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
33 ; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @test_range(i32 [[UNKNOWN]]) #[[ATTR1:[0-9]+]], !range [[RNG0:![0-9]+]]
34 ; IS__CGSCC____-NEXT: [[TMP2:%.*]] = sub nsw i32 [[TMP1]], [[B]]
35 ; IS__CGSCC____-NEXT: ret i32 [[TMP2]]
37 %1 = call i32 @test_range(i32 %unknown)
38 %2 = sub nsw i32 %1, %b
42 define i32 @test2(i32 %unknown, i32 %b) {
43 ; IS__TUNIT____-LABEL: define {{[^@]+}}@test2
44 ; IS__TUNIT____-SAME: (i32 [[UNKNOWN:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
45 ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i32 @test_range(i32 [[UNKNOWN]]) #[[ATTR0]], !range [[RNG0]]
46 ; IS__TUNIT____-NEXT: [[TMP2:%.*]] = add nsw i32 [[TMP1]], [[B]]
47 ; IS__TUNIT____-NEXT: ret i32 [[TMP2]]
49 ; IS__CGSCC____-LABEL: define {{[^@]+}}@test2
50 ; IS__CGSCC____-SAME: (i32 [[UNKNOWN:%.*]], i32 [[B:%.*]]) #[[ATTR0]] {
51 ; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @test_range(i32 [[UNKNOWN]]) #[[ATTR1]], !range [[RNG0]]
52 ; IS__CGSCC____-NEXT: [[TMP2:%.*]] = add nsw i32 [[TMP1]], [[B]]
53 ; IS__CGSCC____-NEXT: ret i32 [[TMP2]]
55 %1 = call i32 @test_range(i32 %unknown)
56 %2 = add nsw i32 %1, %b
62 ; FIXME: AAValueSimplify preserves the context but simplifies to a value in the other function, I think.
63 ; Either way, as we settle on the new AAValueSimplifyReturned scheme that replaces AAReturnedValues
64 ; we need to look into this again. For the purpose of making some progress we take this regression
65 ; for now, call site contexts are not on by default anyway (yet).
66 define i32 @test1_pcheck(i32 %unknown) {
67 ; CHECK-LABEL: define {{[^@]+}}@test1_pcheck
68 ; CHECK-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR0]] {
69 ; CHECK-NEXT: ret i32 1
71 %1 = call i32 @test1(i32 %unknown, i32 20)
72 %2 = icmp sle i32 %1, 90
73 %3 = zext i1 %2 to i32
77 define i32 @test2_pcheck(i32 %unknown) {
78 ; CHECK-LABEL: define {{[^@]+}}@test2_pcheck
79 ; CHECK-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR0]] {
80 ; CHECK-NEXT: ret i32 1
82 %1 = call i32 @test2(i32 %unknown, i32 20)
83 %2 = icmp sge i32 %1, 20
84 %3 = zext i1 %2 to i32
90 define i32 @test1_ncheck(i32 %unknown) {
91 ; IS__TUNIT____-LABEL: define {{[^@]+}}@test1_ncheck
92 ; IS__TUNIT____-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR0]] {
93 ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i32 @test1(i32 [[UNKNOWN]], i32 noundef 20) #[[ATTR0]], !range [[RNG1:![0-9]+]]
94 ; IS__TUNIT____-NEXT: [[TMP2:%.*]] = icmp sle i32 [[TMP1]], 10
95 ; IS__TUNIT____-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i32
96 ; IS__TUNIT____-NEXT: ret i32 [[TMP3]]
98 ; IS__CGSCC____-LABEL: define {{[^@]+}}@test1_ncheck
99 ; IS__CGSCC____-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR0]] {
100 ; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @test1(i32 [[UNKNOWN]], i32 noundef 20) #[[ATTR1]], !range [[RNG1:![0-9]+]]
101 ; IS__CGSCC____-NEXT: [[TMP2:%.*]] = icmp sle i32 [[TMP1]], 10
102 ; IS__CGSCC____-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i32
103 ; IS__CGSCC____-NEXT: ret i32 [[TMP3]]
105 %1 = call i32 @test1(i32 %unknown, i32 20)
106 %2 = icmp sle i32 %1, 10
107 %3 = zext i1 %2 to i32
111 define i32 @test2_ncheck(i32 %unknown) {
112 ; IS__TUNIT____-LABEL: define {{[^@]+}}@test2_ncheck
113 ; IS__TUNIT____-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR0]] {
114 ; IS__TUNIT____-NEXT: [[TMP1:%.*]] = call i32 @test2(i32 [[UNKNOWN]], i32 noundef 20) #[[ATTR0]], !range [[RNG2:![0-9]+]]
115 ; IS__TUNIT____-NEXT: [[TMP2:%.*]] = icmp sge i32 [[TMP1]], 30
116 ; IS__TUNIT____-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i32
117 ; IS__TUNIT____-NEXT: ret i32 [[TMP3]]
119 ; IS__CGSCC____-LABEL: define {{[^@]+}}@test2_ncheck
120 ; IS__CGSCC____-SAME: (i32 [[UNKNOWN:%.*]]) #[[ATTR0]] {
121 ; IS__CGSCC____-NEXT: [[TMP1:%.*]] = call i32 @test2(i32 [[UNKNOWN]], i32 noundef 20) #[[ATTR1]], !range [[RNG2:![0-9]+]]
122 ; IS__CGSCC____-NEXT: [[TMP2:%.*]] = icmp sge i32 [[TMP1]], 30
123 ; IS__CGSCC____-NEXT: [[TMP3:%.*]] = zext i1 [[TMP2]] to i32
124 ; IS__CGSCC____-NEXT: ret i32 [[TMP3]]
126 %1 = call i32 @test2(i32 %unknown, i32 20)
127 %2 = icmp sge i32 %1, 30
128 %3 = zext i1 %2 to i32
132 ; IS__TUNIT____: attributes #[[ATTR0]] = { nofree nosync nounwind readnone willreturn }
134 ; IS__CGSCC____: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind readnone willreturn }
135 ; IS__CGSCC____: attributes #[[ATTR1]] = { readnone willreturn }
137 ; CHECK: [[META0:![0-9]+]] = !{i32 0, i32 101}
138 ; CHECK: [[META1:![0-9]+]] = !{i32 -20, i32 81}
139 ; CHECK: [[META2:![0-9]+]] = !{i32 20, i32 121}