1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt -S -instcombine < %s | FileCheck %s
4 define i1 @isnan_f32_noflags(float %x, float %y) {
5 ; CHECK-LABEL: @isnan_f32_noflags(
6 ; CHECK-NEXT: [[R:%.*]] = fmul float [[X:%.*]], [[Y:%.*]]
7 ; CHECK-NEXT: [[T:%.*]] = call i1 @llvm.isnan.f32(float [[R]])
8 ; CHECK-NEXT: ret i1 [[T]]
10 %r = fmul float %x, %y
11 %t = call i1 @llvm.isnan.f32(float %r)
16 define i1 @isnan_f32_load(float* %p) {
17 %r = load float, float* %p
18 %t = call i1 @llvm.isnan.f32(float %r)
22 define i1 @isnan_f32_ninf(float %x, float %y) {
23 ; CHECK-LABEL: @isnan_f32_ninf(
24 ; CHECK-NEXT: [[R:%.*]] = fsub ninf float [[X:%.*]], [[Y:%.*]]
25 ; CHECK-NEXT: [[T:%.*]] = call i1 @llvm.isnan.f32(float [[R]])
26 ; CHECK-NEXT: ret i1 [[T]]
28 %r = fsub ninf float %x, %y
29 %t = call i1 @llvm.isnan.f32(float %r)
33 define i1 @isnan_f32_nsz(float %x, float %y) {
34 ; CHECK-LABEL: @isnan_f32_nsz(
35 ; CHECK-NEXT: [[R:%.*]] = fdiv nsz float [[X:%.*]], [[Y:%.*]]
36 ; CHECK-NEXT: [[T:%.*]] = call i1 @llvm.isnan.f32(float [[R]])
37 ; CHECK-NEXT: ret i1 [[T]]
39 %r = fdiv nsz float %x, %y
40 %t = call i1 @llvm.isnan.f32(float %r)
44 define i1 @isnan_f32(float %x, float %y) {
45 ; CHECK-LABEL: @isnan_f32(
46 ; CHECK-NEXT: ret i1 false
48 %r = fadd nnan float %x, %y
49 %t = call i1 @llvm.isnan.f32(float %r)
53 define <1 x i1> @isnan_v1f32(<1 x float> %x, <1 x float> %y) {
54 ; CHECK-LABEL: @isnan_v1f32(
55 ; CHECK-NEXT: ret <1 x i1> zeroinitializer
57 %r = fadd nnan <1 x float> %x, %y
58 %t = call <1 x i1> @llvm.isnan.v1f32(<1 x float> %r)
62 define <2 x i1> @isnan_v2f32(<2 x float> %x, <2 x float> %y) {
63 ; CHECK-LABEL: @isnan_v2f32(
64 ; CHECK-NEXT: ret <2 x i1> zeroinitializer
66 %r = fadd nnan <2 x float> %x, %y
67 %t = call <2 x i1> @llvm.isnan.v2f32(<2 x float> %r)
71 declare i1 @llvm.isnan.f32(float %r)
72 declare <1 x i1> @llvm.isnan.v1f32(<1 x float> %r)
73 declare <2 x i1> @llvm.isnan.v2f32(<2 x float> %r)