2 ; RUN: opt < %s -loop-vectorize -force-vector-width=4 -force-vector-interleave=1 -instcombine -debug-only=loop-vectorize -disable-output -print-after=instcombine 2>&1 -enable-new-pm=0 | FileCheck %s
3 ; RUN: opt < %s -passes=loop-vectorize,instcombine -force-vector-width=4 -force-vector-interleave=1 -debug-only=loop-vectorize -disable-output -print-after=instcombine 2>&1 | FileCheck %s
5 target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
7 ; CHECK-LABEL: more_than_one_use
9 ; PR30627. Check that a compare instruction with more than one use is not
10 ; recognized as uniform and is vectorized.
12 ; CHECK-NOT: Found uniform instruction: %cond = icmp slt i64 %i.next, %n
14 ; CHECK: %[[I:.+]] = add nuw nsw <4 x i64> %vec.ind, <i64 1, i64 1, i64 1, i64 1>
15 ; CHECK: icmp slt <4 x i64> %[[I]], %broadcast.splat
16 ; CHECK: br i1 {{.*}}, label %middle.block, label %vector.body
18 define i32 @more_than_one_use(i32* %a, i64 %n) {
23 %i = phi i64 [ %i.next, %for.body ], [ 0, %entry ]
24 %r = phi i32 [ %tmp3, %for.body ], [ 0, %entry ]
25 %i.next = add nuw nsw i64 %i, 1
26 %cond = icmp slt i64 %i.next, %n
27 %tmp0 = select i1 %cond, i64 %i.next, i64 0
28 %tmp1 = getelementptr inbounds i32, i32* %a, i64 %tmp0
29 %tmp2 = load i32, i32* %tmp1, align 8
30 %tmp3 = add i32 %r, %tmp2
31 br i1 %cond, label %for.body, label %for.end
34 %tmp4 = phi i32 [ %tmp3, %for.body ]
38 ; Check for crash exposed by D76992.
39 ; CHECK: VPlan 'Initial VPlan for VF={4},UF>=1' {
41 ; CHECK-NEXT: WIDEN-INDUCTION %iv = phi 0, %iv.next
42 ; CHECK-NEXT: WIDEN ir<%cond0> = icmp ir<%iv>, ir<13>
43 ; CHECK-NEXT: WIDEN-SELECT ir<%s> = select ir<%cond0>, ir<10>, ir<20>
44 ; CHECK-NEXT: No successor
50 loop: ; preds = %loop, %entry
51 %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ]
52 %cond0 = icmp ult i64 %iv, 13
53 %s = select i1 %cond0, i32 10, i32 20
54 %iv.next = add nuw nsw i64 %iv, 1
55 %exitcond = icmp eq i64 %iv.next, 14
56 br i1 %exitcond, label %exit, label %loop