1 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2 ; RUN: opt -loop-vectorize -force-vector-width=2 -S %s | FileCheck %s
4 ; Tests where the indices of some accesses are clamped to a small range.
6 ; FIXME: At the moment, the runtime checks require that the indices do not wrap
7 ; and runtime checks are emitted to ensure that. The clamped indices do
8 ; wrap, so the vector loops are dead at the moment. But it is still
9 ; possible to compute the bounds of the accesses and generate proper
12 ; The relevant bounds for %gep.A are [%A, %A+4).
13 define void @load_clamped_index(i32* %A, i32* %B, i32 %N) {
14 ; CHECK-LABEL: @load_clamped_index(
16 ; CHECK-NEXT: [[B1:%.*]] = bitcast i32* [[B:%.*]] to i8*
17 ; CHECK-NEXT: [[A3:%.*]] = bitcast i32* [[A:%.*]] to i8*
18 ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N:%.*]], 2
19 ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]
20 ; CHECK: vector.scevcheck:
21 ; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N]], -1
22 ; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[TMP0]] to i2
23 ; CHECK-NEXT: [[MUL:%.*]] = call { i2, i1 } @llvm.umul.with.overflow.i2(i2 1, i2 [[TMP1]])
24 ; CHECK-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i2, i1 } [[MUL]], 0
25 ; CHECK-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i2, i1 } [[MUL]], 1
26 ; CHECK-NEXT: [[TMP2:%.*]] = add i2 0, [[MUL_RESULT]]
27 ; CHECK-NEXT: [[TMP3:%.*]] = sub i2 0, [[MUL_RESULT]]
28 ; CHECK-NEXT: [[TMP4:%.*]] = icmp ugt i2 [[TMP3]], 0
29 ; CHECK-NEXT: [[TMP5:%.*]] = icmp ult i2 [[TMP2]], 0
30 ; CHECK-NEXT: [[TMP6:%.*]] = select i1 false, i1 [[TMP4]], i1 [[TMP5]]
31 ; CHECK-NEXT: [[TMP7:%.*]] = icmp ugt i32 [[TMP0]], 3
32 ; CHECK-NEXT: [[TMP8:%.*]] = or i1 [[TMP6]], [[TMP7]]
33 ; CHECK-NEXT: [[TMP9:%.*]] = or i1 [[TMP8]], [[MUL_OVERFLOW]]
34 ; CHECK-NEXT: [[TMP10:%.*]] = or i1 false, [[TMP9]]
35 ; CHECK-NEXT: br i1 [[TMP10]], label [[SCALAR_PH]], label [[VECTOR_MEMCHECK:%.*]]
36 ; CHECK: vector.memcheck:
37 ; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[N]], -1
38 ; CHECK-NEXT: [[TMP12:%.*]] = zext i32 [[TMP11]] to i64
39 ; CHECK-NEXT: [[TMP13:%.*]] = add nuw nsw i64 [[TMP12]], 1
40 ; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[B]], i64 [[TMP13]]
41 ; CHECK-NEXT: [[SCEVGEP2:%.*]] = bitcast i32* [[SCEVGEP]] to i8*
42 ; CHECK-NEXT: [[SCEVGEP4:%.*]] = getelementptr i32, i32* [[A]], i64 [[TMP13]]
43 ; CHECK-NEXT: [[SCEVGEP45:%.*]] = bitcast i32* [[SCEVGEP4]] to i8*
44 ; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[B1]], [[SCEVGEP45]]
45 ; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[A3]], [[SCEVGEP2]]
46 ; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
47 ; CHECK-NEXT: [[MEMCHECK_CONFLICT:%.*]] = and i1 [[FOUND_CONFLICT]], true
48 ; CHECK-NEXT: br i1 [[MEMCHECK_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
50 ; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[N]], 2
51 ; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[N]], [[N_MOD_VF]]
52 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
54 ; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
55 ; CHECK-NEXT: [[TMP14:%.*]] = add i32 [[INDEX]], 0
56 ; CHECK-NEXT: [[TMP15:%.*]] = urem i32 [[TMP14]], 4
57 ; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[TMP15]]
58 ; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, i32* [[TMP16]], i32 0
59 ; CHECK-NEXT: [[TMP18:%.*]] = bitcast i32* [[TMP17]] to <2 x i32>*
60 ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, <2 x i32>* [[TMP18]], align 4, !alias.scope !0
61 ; CHECK-NEXT: [[TMP19:%.*]] = add <2 x i32> [[WIDE_LOAD]], <i32 10, i32 10>
62 ; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, i32* [[B]], i32 [[TMP14]]
63 ; CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds i32, i32* [[TMP20]], i32 0
64 ; CHECK-NEXT: [[TMP22:%.*]] = bitcast i32* [[TMP21]] to <2 x i32>*
65 ; CHECK-NEXT: store <2 x i32> [[TMP19]], <2 x i32>* [[TMP22]], align 4, !alias.scope !3, !noalias !0
66 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2
67 ; CHECK-NEXT: [[TMP23:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
68 ; CHECK-NEXT: br i1 [[TMP23]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
69 ; CHECK: middle.block:
70 ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[N]], [[N_VEC]]
71 ; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]
73 ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ], [ 0, [[VECTOR_SCEVCHECK]] ], [ 0, [[VECTOR_MEMCHECK]] ]
74 ; CHECK-NEXT: br label [[LOOP:%.*]]
76 ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
77 ; CHECK-NEXT: [[CLAMPED_INDEX:%.*]] = urem i32 [[IV]], 4
78 ; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[CLAMPED_INDEX]]
79 ; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[GEP_A]], align 4
80 ; CHECK-NEXT: [[ADD:%.*]] = add i32 [[LV]], 10
81 ; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr inbounds i32, i32* [[B]], i32 [[IV]]
82 ; CHECK-NEXT: store i32 [[ADD]], i32* [[GEP_B]], align 4
83 ; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
84 ; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], [[N]]
85 ; CHECK-NEXT: br i1 [[COND]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP7:![0-9]+]]
87 ; CHECK-NEXT: ret void
93 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
94 %clamped.index = urem i32 %iv, 4
95 %gep.A = getelementptr inbounds i32, i32* %A, i32 %clamped.index
96 %lv = load i32, i32* %gep.A
97 %add = add i32 %lv, 10
98 %gep.B = getelementptr inbounds i32, i32* %B, i32 %iv
99 store i32 %add, i32* %gep.B
100 %iv.next = add nuw nsw i32 %iv, 1
101 %cond = icmp eq i32 %iv.next, %N
102 br i1 %cond, label %exit, label %loop
108 ; The relevant bounds for %gep.A are [%A, %A+4).
109 define void @store_clamped_index(i32* %A, i32* %B, i32 %N) {
110 ; CHECK-LABEL: @store_clamped_index(
112 ; CHECK-NEXT: [[B1:%.*]] = bitcast i32* [[B:%.*]] to i8*
113 ; CHECK-NEXT: [[A3:%.*]] = bitcast i32* [[A:%.*]] to i8*
114 ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N:%.*]], 2
115 ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]
116 ; CHECK: vector.scevcheck:
117 ; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N]], -1
118 ; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[TMP0]] to i2
119 ; CHECK-NEXT: [[MUL:%.*]] = call { i2, i1 } @llvm.umul.with.overflow.i2(i2 1, i2 [[TMP1]])
120 ; CHECK-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i2, i1 } [[MUL]], 0
121 ; CHECK-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i2, i1 } [[MUL]], 1
122 ; CHECK-NEXT: [[TMP2:%.*]] = add i2 0, [[MUL_RESULT]]
123 ; CHECK-NEXT: [[TMP3:%.*]] = sub i2 0, [[MUL_RESULT]]
124 ; CHECK-NEXT: [[TMP4:%.*]] = icmp ugt i2 [[TMP3]], 0
125 ; CHECK-NEXT: [[TMP5:%.*]] = icmp ult i2 [[TMP2]], 0
126 ; CHECK-NEXT: [[TMP6:%.*]] = select i1 false, i1 [[TMP4]], i1 [[TMP5]]
127 ; CHECK-NEXT: [[TMP7:%.*]] = icmp ugt i32 [[TMP0]], 3
128 ; CHECK-NEXT: [[TMP8:%.*]] = or i1 [[TMP6]], [[TMP7]]
129 ; CHECK-NEXT: [[TMP9:%.*]] = or i1 [[TMP8]], [[MUL_OVERFLOW]]
130 ; CHECK-NEXT: [[TMP10:%.*]] = or i1 false, [[TMP9]]
131 ; CHECK-NEXT: br i1 [[TMP10]], label [[SCALAR_PH]], label [[VECTOR_MEMCHECK:%.*]]
132 ; CHECK: vector.memcheck:
133 ; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[N]], -1
134 ; CHECK-NEXT: [[TMP12:%.*]] = zext i32 [[TMP11]] to i64
135 ; CHECK-NEXT: [[TMP13:%.*]] = add nuw nsw i64 [[TMP12]], 1
136 ; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i32, i32* [[B]], i64 [[TMP13]]
137 ; CHECK-NEXT: [[SCEVGEP2:%.*]] = bitcast i32* [[SCEVGEP]] to i8*
138 ; CHECK-NEXT: [[SCEVGEP4:%.*]] = getelementptr i32, i32* [[A]], i64 [[TMP13]]
139 ; CHECK-NEXT: [[SCEVGEP45:%.*]] = bitcast i32* [[SCEVGEP4]] to i8*
140 ; CHECK-NEXT: [[BOUND0:%.*]] = icmp ult i8* [[B1]], [[SCEVGEP45]]
141 ; CHECK-NEXT: [[BOUND1:%.*]] = icmp ult i8* [[A3]], [[SCEVGEP2]]
142 ; CHECK-NEXT: [[FOUND_CONFLICT:%.*]] = and i1 [[BOUND0]], [[BOUND1]]
143 ; CHECK-NEXT: [[MEMCHECK_CONFLICT:%.*]] = and i1 [[FOUND_CONFLICT]], true
144 ; CHECK-NEXT: br i1 [[MEMCHECK_CONFLICT]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
146 ; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[N]], 2
147 ; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[N]], [[N_MOD_VF]]
148 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
149 ; CHECK: vector.body:
150 ; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
151 ; CHECK-NEXT: [[TMP14:%.*]] = add i32 [[INDEX]], 0
152 ; CHECK-NEXT: [[TMP15:%.*]] = urem i32 [[TMP14]], 4
153 ; CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds i32, i32* [[B]], i32 [[TMP14]]
154 ; CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds i32, i32* [[TMP16]], i32 0
155 ; CHECK-NEXT: [[TMP18:%.*]] = bitcast i32* [[TMP17]] to <2 x i32>*
156 ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, <2 x i32>* [[TMP18]], align 4, !alias.scope !8, !noalias !11
157 ; CHECK-NEXT: [[TMP19:%.*]] = add <2 x i32> [[WIDE_LOAD]], <i32 10, i32 10>
158 ; CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[TMP15]]
159 ; CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds i32, i32* [[TMP20]], i32 0
160 ; CHECK-NEXT: [[TMP22:%.*]] = bitcast i32* [[TMP21]] to <2 x i32>*
161 ; CHECK-NEXT: store <2 x i32> [[TMP19]], <2 x i32>* [[TMP22]], align 4, !alias.scope !11
162 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2
163 ; CHECK-NEXT: [[TMP23:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
164 ; CHECK-NEXT: br i1 [[TMP23]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP13:![0-9]+]]
165 ; CHECK: middle.block:
166 ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[N]], [[N_VEC]]
167 ; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]
169 ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ], [ 0, [[VECTOR_SCEVCHECK]] ], [ 0, [[VECTOR_MEMCHECK]] ]
170 ; CHECK-NEXT: br label [[LOOP:%.*]]
172 ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
173 ; CHECK-NEXT: [[CLAMPED_INDEX:%.*]] = urem i32 [[IV]], 4
174 ; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr inbounds i32, i32* [[B]], i32 [[IV]]
175 ; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[GEP_B]], align 4
176 ; CHECK-NEXT: [[ADD:%.*]] = add i32 [[LV]], 10
177 ; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[CLAMPED_INDEX]]
178 ; CHECK-NEXT: store i32 [[ADD]], i32* [[GEP_A]], align 4
179 ; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
180 ; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], [[N]]
181 ; CHECK-NEXT: br i1 [[COND]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP14:![0-9]+]]
183 ; CHECK-NEXT: ret void
189 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
190 %clamped.index = urem i32 %iv, 4
191 %gep.B = getelementptr inbounds i32, i32* %B, i32 %iv
192 %lv = load i32, i32* %gep.B
193 %add = add i32 %lv, 10
194 %gep.A = getelementptr inbounds i32, i32* %A, i32 %clamped.index
195 store i32 %add, i32* %gep.A
196 %iv.next = add nuw nsw i32 %iv, 1
197 %cond = icmp eq i32 %iv.next, %N
198 br i1 %cond, label %exit, label %loop
204 define void @clamped_index_dependence_non_clamped(i32* %A, i32* %B, i32 %N) {
205 ; CHECK-LABEL: @clamped_index_dependence_non_clamped(
207 ; CHECK-NEXT: br label [[LOOP:%.*]]
209 ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
210 ; CHECK-NEXT: [[GEP_B:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i32 [[IV]]
211 ; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[GEP_B]], align 4
212 ; CHECK-NEXT: [[GEP_A_1:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i32 [[IV]]
213 ; CHECK-NEXT: [[LV_A:%.*]] = load i32, i32* [[GEP_A_1]], align 4
214 ; CHECK-NEXT: [[ADD:%.*]] = add i32 [[LV]], [[LV_A]]
215 ; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
216 ; CHECK-NEXT: [[CLAMPED_INDEX:%.*]] = urem i32 [[IV_NEXT]], 4
217 ; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[CLAMPED_INDEX]]
218 ; CHECK-NEXT: store i32 [[ADD]], i32* [[GEP_A]], align 4
219 ; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], [[N:%.*]]
220 ; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[LOOP]]
222 ; CHECK-NEXT: ret void
228 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
229 %gep.B = getelementptr inbounds i32, i32* %B, i32 %iv
230 %lv = load i32, i32* %gep.B
231 %gep.A.1 = getelementptr inbounds i32, i32* %A, i32 %iv
232 %lv.A = load i32, i32* %gep.A.1
233 %add = add i32 %lv, %lv.A
235 %iv.next = add nuw nsw i32 %iv, 1
236 %clamped.index = urem i32 %iv.next, 4
237 %gep.A = getelementptr inbounds i32, i32* %A, i32 %clamped.index
238 store i32 %add, i32* %gep.A
239 %cond = icmp eq i32 %iv.next, %N
240 br i1 %cond, label %exit, label %loop
246 define void @clamped_index_dependence_clamped_index(i32* %A, i32* %B, i32 %N) {
247 ; CHECK-LABEL: @clamped_index_dependence_clamped_index(
249 ; CHECK-NEXT: br label [[LOOP:%.*]]
251 ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
252 ; CHECK-NEXT: [[CLAMPED_INDEX_1:%.*]] = urem i32 [[IV]], 4
253 ; CHECK-NEXT: [[GEP_A_1:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i32 [[CLAMPED_INDEX_1]]
254 ; CHECK-NEXT: [[LV_A:%.*]] = load i32, i32* [[GEP_A_1]], align 4
255 ; CHECK-NEXT: [[ADD:%.*]] = add i32 [[LV_A]], 10
256 ; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
257 ; CHECK-NEXT: [[CLAMPED_INDEX:%.*]] = urem i32 [[IV_NEXT]], 4
258 ; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[CLAMPED_INDEX]]
259 ; CHECK-NEXT: store i32 [[ADD]], i32* [[GEP_A]], align 4
260 ; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], [[N:%.*]]
261 ; CHECK-NEXT: br i1 [[COND]], label [[EXIT:%.*]], label [[LOOP]]
263 ; CHECK-NEXT: ret void
269 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
270 %clamped.index.1 = urem i32 %iv, 4
271 %gep.A.1 = getelementptr inbounds i32, i32* %A, i32 %clamped.index.1
272 %lv.A = load i32, i32* %gep.A.1
273 %add = add i32 %lv.A, 10
275 %iv.next = add nuw nsw i32 %iv, 1
276 %clamped.index = urem i32 %iv.next, 4
277 %gep.A = getelementptr inbounds i32, i32* %A, i32 %clamped.index
278 store i32 %add, i32* %gep.A
279 %cond = icmp eq i32 %iv.next, %N
280 br i1 %cond, label %exit, label %loop
286 define void @clamped_index_equal_dependence(i32* %A, i32* %B, i32 %N) {
287 ; CHECK-LABEL: @clamped_index_equal_dependence(
289 ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i32 [[N:%.*]], 2
290 ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]]
291 ; CHECK: vector.scevcheck:
292 ; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[N]], -1
293 ; CHECK-NEXT: [[TMP1:%.*]] = trunc i32 [[TMP0]] to i2
294 ; CHECK-NEXT: [[MUL:%.*]] = call { i2, i1 } @llvm.umul.with.overflow.i2(i2 1, i2 [[TMP1]])
295 ; CHECK-NEXT: [[MUL_RESULT:%.*]] = extractvalue { i2, i1 } [[MUL]], 0
296 ; CHECK-NEXT: [[MUL_OVERFLOW:%.*]] = extractvalue { i2, i1 } [[MUL]], 1
297 ; CHECK-NEXT: [[TMP2:%.*]] = add i2 0, [[MUL_RESULT]]
298 ; CHECK-NEXT: [[TMP3:%.*]] = sub i2 0, [[MUL_RESULT]]
299 ; CHECK-NEXT: [[TMP4:%.*]] = icmp ugt i2 [[TMP3]], 0
300 ; CHECK-NEXT: [[TMP5:%.*]] = icmp ult i2 [[TMP2]], 0
301 ; CHECK-NEXT: [[TMP6:%.*]] = select i1 false, i1 [[TMP4]], i1 [[TMP5]]
302 ; CHECK-NEXT: [[TMP7:%.*]] = icmp ugt i32 [[TMP0]], 3
303 ; CHECK-NEXT: [[TMP8:%.*]] = or i1 [[TMP6]], [[TMP7]]
304 ; CHECK-NEXT: [[TMP9:%.*]] = or i1 [[TMP8]], [[MUL_OVERFLOW]]
305 ; CHECK-NEXT: [[TMP10:%.*]] = or i1 false, [[TMP9]]
306 ; CHECK-NEXT: br i1 [[TMP10]], label [[SCALAR_PH]], label [[VECTOR_PH:%.*]]
308 ; CHECK-NEXT: [[N_MOD_VF:%.*]] = urem i32 [[N]], 2
309 ; CHECK-NEXT: [[N_VEC:%.*]] = sub i32 [[N]], [[N_MOD_VF]]
310 ; CHECK-NEXT: br label [[VECTOR_BODY:%.*]]
311 ; CHECK: vector.body:
312 ; CHECK-NEXT: [[INDEX:%.*]] = phi i32 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
313 ; CHECK-NEXT: [[TMP11:%.*]] = add i32 [[INDEX]], 0
314 ; CHECK-NEXT: [[TMP12:%.*]] = urem i32 [[TMP11]], 4
315 ; CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds i32, i32* [[A:%.*]], i32 [[TMP12]]
316 ; CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds i32, i32* [[TMP13]], i32 0
317 ; CHECK-NEXT: [[TMP15:%.*]] = bitcast i32* [[TMP14]] to <2 x i32>*
318 ; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i32>, <2 x i32>* [[TMP15]], align 4
319 ; CHECK-NEXT: [[TMP16:%.*]] = add <2 x i32> [[WIDE_LOAD]], <i32 10, i32 10>
320 ; CHECK-NEXT: [[TMP17:%.*]] = bitcast i32* [[TMP14]] to <2 x i32>*
321 ; CHECK-NEXT: store <2 x i32> [[TMP16]], <2 x i32>* [[TMP17]], align 4
322 ; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i32 [[INDEX]], 2
323 ; CHECK-NEXT: [[TMP18:%.*]] = icmp eq i32 [[INDEX_NEXT]], [[N_VEC]]
324 ; CHECK-NEXT: br i1 [[TMP18]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP15:![0-9]+]]
325 ; CHECK: middle.block:
326 ; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i32 [[N]], [[N_VEC]]
327 ; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT:%.*]], label [[SCALAR_PH]]
329 ; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ [[N_VEC]], [[MIDDLE_BLOCK]] ], [ 0, [[ENTRY:%.*]] ], [ 0, [[VECTOR_SCEVCHECK]] ]
330 ; CHECK-NEXT: br label [[LOOP:%.*]]
332 ; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP]] ]
333 ; CHECK-NEXT: [[CLAMPED_INDEX:%.*]] = urem i32 [[IV]], 4
334 ; CHECK-NEXT: [[GEP_A:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[CLAMPED_INDEX]]
335 ; CHECK-NEXT: [[LV_A:%.*]] = load i32, i32* [[GEP_A]], align 4
336 ; CHECK-NEXT: [[ADD:%.*]] = add i32 [[LV_A]], 10
337 ; CHECK-NEXT: [[IV_NEXT]] = add nuw nsw i32 [[IV]], 1
338 ; CHECK-NEXT: store i32 [[ADD]], i32* [[GEP_A]], align 4
339 ; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[IV_NEXT]], [[N]]
340 ; CHECK-NEXT: br i1 [[COND]], label [[EXIT]], label [[LOOP]], !llvm.loop [[LOOP16:![0-9]+]]
342 ; CHECK-NEXT: ret void
348 %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop ]
349 %clamped.index = urem i32 %iv, 4
350 %gep.A = getelementptr inbounds i32, i32* %A, i32 %clamped.index
351 %lv.A = load i32, i32* %gep.A
352 %add = add i32 %lv.A, 10
354 %iv.next = add nuw nsw i32 %iv, 1
355 store i32 %add, i32* %gep.A
356 %cond = icmp eq i32 %iv.next, %N
357 br i1 %cond, label %exit, label %loop